.ifndef	KF32R2ALLOVER_HEADER
.equ		KF32R2ALLOVER_HEADER ,1

//***********************************************************
//      Header file for the KungFu32
//      //      Microcontroller
//
//      Copyright 2012-2020 ChipON, All rights reserved
//***********************************************************

//  register-------------------------------------
	.EQU	OSC_CTL0,		0x40000000
//  0x4000 0000  OSC_CTL0   Bits-------------------------------------
	.EQU	OSC_CTL0_PLLDIV,		28
	.EQU	OSC_CTL0_LFCKDIV2,		26
	.EQU	OSC_CTL0_LFCKDIV1,		25
	.EQU	OSC_CTL0_LFCKDIV0,		24
	.EQU	OSC_CTL0_HFCKDIV3,		23
	.EQU	OSC_CTL0_HFCKDIV2,		22
	.EQU	OSC_CTL0_HFCKDIV1,		21
	.EQU	OSC_CTL0_HFCKDIV0,		20
	.EQU	OSC_CTL0_SCKDIV2,		18
	.EQU	OSC_CTL0_SCKDIV1,		17
	.EQU	OSC_CTL0_SCKDIV0,		16
	.EQU	OSC_CTL0_PLLCKS,		12
	.EQU	OSC_CTL0_HFCKS2,		11
	.EQU	OSC_CTL0_HFCKS1,		10
	.EQU	OSC_CTL0_HFCKS0,		9
	.EQU	OSC_CTL0_HFCKEN,		8
	.EQU	OSC_CTL0_LFCKS,		6
	.EQU	OSC_CTL0_LFCKEN,		4
	.EQU	OSC_CTL0_SCKS2,		3
	.EQU	OSC_CTL0_SCKS1,		2
	.EQU	OSC_CTL0_SCKS0,		1
	.EQU	OSC_CTL0_PMWREN,		0
//  register-------------------------------------
	.EQU	OSC_CTL1,		0x40000004
//  0x4000 0004  OSC_CTL1   Bits-------------------------------------
	.EQU	OSC_CTL1_CLKOUTDIV2,		31
	.EQU	OSC_CTL1_CLKOUTDIV1,		30
	.EQU	OSC_CTL1_CLKOUTDIV0,		29
	.EQU	OSC_CTL1_CLKOE,		28
	.EQU	OSC_CTL1_CLKOUTS2,		27
	.EQU	OSC_CTL1_CLKOUTS1,		26
	.EQU	OSC_CTL1_CLKOUTS0,		25
	.EQU	OSC_CTL1_FSCMS2,		23
	.EQU	OSC_CTL1_FSCMS1,		22
	.EQU	OSC_CTL1_FSCMS0,		21
	.EQU	OSC_CTL1_FSCMGAP2,		19
	.EQU	OSC_CTL1_FSCMGAP1,		18
	.EQU	OSC_CTL1_FSCMGAP0,		17
	.EQU	OSC_CTL1_FSCM,		16
//  register-------------------------------------
	.EQU	OSC_INT,		0x40000008
//  0x4000 0008  OSC_INT   Bits-------------------------------------
	.EQU	OSC_INT_LP4MIE,		14
	.EQU	OSC_INT_PLLIE,		12
	.EQU	OSC_INT_EHFIE,		11
	.EQU	OSC_INT_ELFIE,		10
	.EQU	OSC_INT_IHFIE,		9
	.EQU	OSC_INT_ILFIE,		8
	.EQU	OSC_INT_CKFIF,		7
	.EQU	OSC_INT_LP4MIF,		6
	.EQU	OSC_INT_PLLIF,		4
	.EQU	OSC_INT_EHFIF,		3
	.EQU	OSC_INT_ELFIF,		2
	.EQU	OSC_INT_IHFIF,		1
	.EQU	OSC_INT_ILFIF,		0
//  register-------------------------------------
	.EQU	OSC_CTL2,		0x4000000C
//  0x4000 000C  OSC_CTL2   Bits-------------------------------------
	.EQU	OSC_CTL2_LPCKDLY3,		31
	.EQU	OSC_CTL2_LPCKDLY2,		30
	.EQU	OSC_CTL2_LPCKDLY1,		29
	.EQU	OSC_CTL2_LPCKDLY0,		28
	.EQU	OSC_CTL2_PLLDLY3,		27
	.EQU	OSC_CTL2_PLLDLY2,		26
	.EQU	OSC_CTL2_PLLDLY1,		25
	.EQU	OSC_CTL2_PLLDLY0,		24
	.EQU	OSC_CTL2_EHFDLY3,		23
	.EQU	OSC_CTL2_EHFDLY2,		22
	.EQU	OSC_CTL2_EHFDLY1,		21
	.EQU	OSC_CTL2_EHFDLY0,		20
	.EQU	OSC_CTL2_ELFDLY3,		19
	.EQU	OSC_CTL2_ELFDLY2,		18
	.EQU	OSC_CTL2_ELFDLY1,		17
	.EQU	OSC_CTL2_ELFDLY0,		16
	.EQU	OSC_CTL2_IHFDLY3,		15
	.EQU	OSC_CTL2_IHFDLY2,		14
	.EQU	OSC_CTL2_IHFDLY1,		13
	.EQU	OSC_CTL2_IHFDLY0,		12
	.EQU	OSC_CTL2_ILFDLY3,		11
	.EQU	OSC_CTL2_ILFDLY2,		10
	.EQU	OSC_CTL2_ILFDLY1,		9
	.EQU	OSC_CTL2_ILFDLY0,		8
	.EQU	OSC_CTL2_LP4MSWEN,		6
	.EQU	OSC_CTL2_PLLSWEN,		4
	.EQU	OSC_CTL2_EXTHFSWEN,		3
	.EQU	OSC_CTL2_EXTLFSWEN,		2
	.EQU	OSC_CTL2_INTHFSWEN,		1
	.EQU	OSC_CTL2_INTLFSWEN,		0
//  register-------------------------------------
	.EQU	QEI1_CTL0,		0x40000080
//  0x4000 0080  QEI1_CTL0   Bits-------------------------------------
	.EQU	QEI1_CTL0_LPCLK,		11
	.EQU	QEI1_CTL0_TXIF,		10
	.EQU	QEI1_CTL0_PHEIF,		9
	.EQU	QEI1_CTL0_CNTERRIF,		8
	.EQU	QEI1_CTL0_QEIMOD2,		7
	.EQU	QEI1_CTL0_QEIMOD1,		6
	.EQU	QEI1_CTL0_QEIMOD0,		5
	.EQU	QEI1_CTL0_INDRES,		4
	.EQU	QEI1_CTL0_TXCS,		3
	.EQU	QEI1_CTL0_INDEX,		2
	.EQU	QEI1_CTL0_TXDIROUT,		1
	.EQU	QEI1_CTL0_TXDIR,		0
//  register-------------------------------------
	.EQU	QEI1_CTL1,		0x40000084
//  0x4000 0084  QEI1_CTL1   Bits-------------------------------------
	.EQU	QEI1_CTL1_PHSEL3,		12
	.EQU	QEI1_CTL1_PHSEL2,		11
	.EQU	QEI1_CTL1_PHSEL1,		10
	.EQU	QEI1_CTL1_PHSEL0,		9
	.EQU	QEI1_CTL1_PHDFEN,		8
	.EQU	QEI1_CTL1_MODEN,		7
	.EQU	QEI1_CTL1_QEICLK1,		6
	.EQU	QEI1_CTL1_QEICLK0,		5
	.EQU	QEI1_CTL1_QEIOUT,		4
	.EQU	QEI1_CTL1_QEICK2,		3
	.EQU	QEI1_CTL1_QEICK1,		2
	.EQU	QEI1_CTL1_QEICK0,		1
	.EQU	QEI1_CTL1_SWPAB,		0
//  register-------------------------------------
	.EQU	T8_CNT,			0x40000088
//  0x4000 0088  T8_CNT   Bits-------------------------------------
	.EQU	T8_CNT_TXCNT15,		15
	.EQU	T8_CNT_TXCNT14,		14
	.EQU	T8_CNT_TXCNT13,		13
	.EQU	T8_CNT_TXCNT12,		12
	.EQU	T8_CNT_TXCNT11,		11
	.EQU	T8_CNT_TXCNT10,		10
	.EQU	T8_CNT_TXCNT9,		9
	.EQU	T8_CNT_TXCNT8,		8
	.EQU	T8_CNT_TXCNT7,		7
	.EQU	T8_CNT_TXCNT6,		6
	.EQU	T8_CNT_TXCNT5,		5
	.EQU	T8_CNT_TXCNT4,		4
	.EQU	T8_CNT_TXCNT3,		3
	.EQU	T8_CNT_TXCNT2,		2
	.EQU	T8_CNT_TXCNT1,		1
	.EQU	T8_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T8_PPX,			0x4000008C
//  0x4000 008C  T8_PPX   Bits-------------------------------------
	.EQU	T8_PPX_PPX15,		15
	.EQU	T8_PPX_PPX14,		14
	.EQU	T8_PPX_PPX13,		13
	.EQU	T8_PPX_PPX12,		12
	.EQU	T8_PPX_PPX11,		11
	.EQU	T8_PPX_PPX10,		10
	.EQU	T8_PPX_PPX9,		9
	.EQU	T8_PPX_PPX8,		8
	.EQU	T8_PPX_PPX7,		7
	.EQU	T8_PPX_PPX6,		6
	.EQU	T8_PPX_PPX5,		5
	.EQU	T8_PPX_PPX4,		4
	.EQU	T8_PPX_PPX3,		3
	.EQU	T8_PPX_PPX2,		2
	.EQU	T8_PPX_PPX1,		1
	.EQU	T8_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T8_PRSC,		0x40000090
//  0x4000 0090  T8_PRSC   Bits-------------------------------------
	.EQU	T8_PRSC_TXPRSC15,		15
	.EQU	T8_PRSC_TXPRSC14,		14
	.EQU	T8_PRSC_TXPRSC13,		13
	.EQU	T8_PRSC_TXPRSC12,		12
	.EQU	T8_PRSC_TXPRSC11,		11
	.EQU	T8_PRSC_TXPRSC10,		10
	.EQU	T8_PRSC_TXPRSC9,		9
	.EQU	T8_PRSC_TXPRSC8,		8
	.EQU	T8_PRSC_TXPRSC7,		7
	.EQU	T8_PRSC_TXPRSC6,		6
	.EQU	T8_PRSC_TXPRSC5,		5
	.EQU	T8_PRSC_TXPRSC4,		4
	.EQU	T8_PRSC_TXPRSC3,		3
	.EQU	T8_PRSC_TXPRSC2,		2
	.EQU	T8_PRSC_TXPRSC1,		1
	.EQU	T8_PRSC_TXPRSC0,		0
//  register-------------------------------------
	.EQU	QEI1_DIER,		0x40000094
//  0x4000 0094  QEI1_DIER   Bits-------------------------------------
	.EQU	QEI1_DIER_TXIC,		5
	.EQU	QEI1_DIER_PHEIC,		4
	.EQU	QEI1_DIER_CNTERRIC,		3
	.EQU	QEI1_DIER_TXIE,		2
	.EQU	QEI1_DIER_PHEIE,		1
	.EQU	QEI1_DIER_CNTERRIE,		0
//  register-------------------------------------
	.EQU	T1_CNT,			0x40000100
//  0x4000 0100  T1_CNT   Bits-------------------------------------
	.EQU	T1_CNT_TXCNT15,		15
	.EQU	T1_CNT_TXCNT14,		14
	.EQU	T1_CNT_TXCNT13,		13
	.EQU	T1_CNT_TXCNT12,		12
	.EQU	T1_CNT_TXCNT11,		11
	.EQU	T1_CNT_TXCNT10,		10
	.EQU	T1_CNT_TXCNT9,		9
	.EQU	T1_CNT_TXCNT8,		8
	.EQU	T1_CNT_TXCNT7,		7
	.EQU	T1_CNT_TXCNT6,		6
	.EQU	T1_CNT_TXCNT5,		5
	.EQU	T1_CNT_TXCNT4,		4
	.EQU	T1_CNT_TXCNT3,		3
	.EQU	T1_CNT_TXCNT2,		2
	.EQU	T1_CNT_TXCNT1,		1
	.EQU	T1_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T1_CTL1,		0x40000104
//  0x4000 0104  T1_CTL1   Bits-------------------------------------
	.EQU	T1_CTL1_TXIF,		13
	.EQU	T1_CTL1_TXIE,		12
	.EQU	T1_CTL1_TXCMS2,		10
	.EQU	T1_CTL1_TXCMS1,		9
	.EQU	T1_CTL1_TXCMS0,		8
	.EQU	T1_CTL1_TXDIR,		7
	.EQU	T1_CTL1_TXCLK1,		6
	.EQU	T1_CTL1_TXCLK0,		5
	.EQU	T1_CTL1_TXSY,		3
	.EQU	T1_CTL1_TXCS,		1
	.EQU	T1_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T1_CTL2,		0x40000108
//  0x4000 0108  T1_CTL2   Bits-------------------------------------
	.EQU	T1_CTL2_TRGSEL1,		15
	.EQU	T1_CTL2_TRGSEL0,		14
	.EQU	T1_CTL2_TXUR,		13
	.EQU	T1_CTL2_TXMSSYNC,		12
	.EQU	T1_CTL2_TXTS3,		11
	.EQU	T1_CTL2_TXTS2,		10
	.EQU	T1_CTL2_TXTS1,		9
	.EQU	T1_CTL2_TXTS0,		8
	.EQU	T1_CTL2_TXSMS2,		7
	.EQU	T1_CTL2_TXSMS1,		6
	.EQU	T1_CTL2_TXSMS0,		5
	.EQU	T1_CTL2_TXMMS2,		4
	.EQU	T1_CTL2_TXMMS1,		3
	.EQU	T1_CTL2_TXMMS0,		2
	.EQU	T1_CTL2_TXUDEVT,		1
	.EQU	T1_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T1_PRSC,		0x4000010C
//  0x4000 010C  T1_PRSC   Bits-------------------------------------
	.EQU	T1_PRSC_TXCKS15,		15
	.EQU	T1_PRSC_TXCKS14,		14
	.EQU	T1_PRSC_TXCKS13,		13
	.EQU	T1_PRSC_TXCKS12,		12
	.EQU	T1_PRSC_TXCKS11,		11
	.EQU	T1_PRSC_TXCKS10,		10
	.EQU	T1_PRSC_TXCKS9,		9
	.EQU	T1_PRSC_TXCKS8,		8
	.EQU	T1_PRSC_TXCKS7,		7
	.EQU	T1_PRSC_TXCKS6,		6
	.EQU	T1_PRSC_TXCKS5,		5
	.EQU	T1_PRSC_TXCKS4,		4
	.EQU	T1_PRSC_TXCKS3,		3
	.EQU	T1_PRSC_TXCKS2,		2
	.EQU	T1_PRSC_TXCKS1,		1
	.EQU	T1_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T1_PPX,			0x40000110
//  0x4000 0110  T1_PPX   Bits-------------------------------------
	.EQU	T1_PPX_PPX15,		15
	.EQU	T1_PPX_PPX14,		14
	.EQU	T1_PPX_PPX13,		13
	.EQU	T1_PPX_PPX12,		12
	.EQU	T1_PPX_PPX11,		11
	.EQU	T1_PPX_PPX10,		10
	.EQU	T1_PPX_PPX9,		9
	.EQU	T1_PPX_PPX8,		8
	.EQU	T1_PPX_PPX7,		7
	.EQU	T1_PPX_PPX6,		6
	.EQU	T1_PPX_PPX5,		5
	.EQU	T1_PPX_PPX4,		4
	.EQU	T1_PPX_PPX3,		3
	.EQU	T1_PPX_PPX2,		2
	.EQU	T1_PPX_PPX1,		1
	.EQU	T1_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T1_UDTIMx,		0x40000114
//  0x4000 0114  T1_UDTIMx   Bits-------------------------------------
	.EQU	T1_UDTIMx_TXUD7,		7
	.EQU	T1_UDTIMx_TXUD6,		6
	.EQU	T1_UDTIMx_TXUD5,		5
	.EQU	T1_UDTIMx_TXUD4,		4
	.EQU	T1_UDTIMx_TXUD3,		3
	.EQU	T1_UDTIMx_TXUD2,		2
	.EQU	T1_UDTIMx_TXUD1,		1
	.EQU	T1_UDTIMx_TXUD0,		0
//  register-------------------------------------
	.EQU	CCP1_C1,		0x40000120
//  0x4000 0120  CCP1_C1   Bits-------------------------------------
	.EQU	CCP1_C1_CCPXCY15,		15
	.EQU	CCP1_C1_CCPXCY14,		14
	.EQU	CCP1_C1_CCPXCY13,		13
	.EQU	CCP1_C1_CCPXCY12,		12
	.EQU	CCP1_C1_CCPXCY11,		11
	.EQU	CCP1_C1_CCPXCY10,		10
	.EQU	CCP1_C1_CCPXCY9,		9
	.EQU	CCP1_C1_CCPXCY8,		8
	.EQU	CCP1_C1_CCPXCY7,		7
	.EQU	CCP1_C1_CCPXCY6,		6
	.EQU	CCP1_C1_CCPXCY5,		5
	.EQU	CCP1_C1_CCPXCY4,		4
	.EQU	CCP1_C1_CCPXCY3,		3
	.EQU	CCP1_C1_CCPXCY2,		2
	.EQU	CCP1_C1_CCPXCY1,		1
	.EQU	CCP1_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP1_C2,		0x40000124
//  0x4000 0124  CCP1_C2   Bits-------------------------------------
	.EQU	CCP1_C2_CCPXCY15,		15
	.EQU	CCP1_C2_CCPXCY14,		14
	.EQU	CCP1_C2_CCPXCY13,		13
	.EQU	CCP1_C2_CCPXCY12,		12
	.EQU	CCP1_C2_CCPXCY11,		11
	.EQU	CCP1_C2_CCPXCY10,		10
	.EQU	CCP1_C2_CCPXCY9,		9
	.EQU	CCP1_C2_CCPXCY8,		8
	.EQU	CCP1_C2_CCPXCY7,		7
	.EQU	CCP1_C2_CCPXCY6,		6
	.EQU	CCP1_C2_CCPXCY5,		5
	.EQU	CCP1_C2_CCPXCY4,		4
	.EQU	CCP1_C2_CCPXCY3,		3
	.EQU	CCP1_C2_CCPXCY2,		2
	.EQU	CCP1_C2_CCPXCY1,		1
	.EQU	CCP1_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP1_C3,		0x40000128
//  0x4000 0128  CCP1_C3   Bits-------------------------------------
	.EQU	CCP1_C3_CCPXCY15,		15
	.EQU	CCP1_C3_CCPXCY14,		14
	.EQU	CCP1_C3_CCPXCY13,		13
	.EQU	CCP1_C3_CCPXCY12,		12
	.EQU	CCP1_C3_CCPXCY11,		11
	.EQU	CCP1_C3_CCPXCY10,		10
	.EQU	CCP1_C3_CCPXCY9,		9
	.EQU	CCP1_C3_CCPXCY8,		8
	.EQU	CCP1_C3_CCPXCY7,		7
	.EQU	CCP1_C3_CCPXCY6,		6
	.EQU	CCP1_C3_CCPXCY5,		5
	.EQU	CCP1_C3_CCPXCY4,		4
	.EQU	CCP1_C3_CCPXCY3,		3
	.EQU	CCP1_C3_CCPXCY2,		2
	.EQU	CCP1_C3_CCPXCY1,		1
	.EQU	CCP1_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP1_C4,		0x4000012C
//  0x4000 012C  CCP1_C4   Bits-------------------------------------
	.EQU	CCP1_C4_CCPXCY15,		15
	.EQU	CCP1_C4_CCPXCY14,		14
	.EQU	CCP1_C4_CCPXCY13,		13
	.EQU	CCP1_C4_CCPXCY12,		12
	.EQU	CCP1_C4_CCPXCY11,		11
	.EQU	CCP1_C4_CCPXCY10,		10
	.EQU	CCP1_C4_CCPXCY9,		9
	.EQU	CCP1_C4_CCPXCY8,		8
	.EQU	CCP1_C4_CCPXCY7,		7
	.EQU	CCP1_C4_CCPXCY6,		6
	.EQU	CCP1_C4_CCPXCY5,		5
	.EQU	CCP1_C4_CCPXCY4,		4
	.EQU	CCP1_C4_CCPXCY3,		3
	.EQU	CCP1_C4_CCPXCY2,		2
	.EQU	CCP1_C4_CCPXCY1,		1
	.EQU	CCP1_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP1_SRIC,		0x40000130
//  0x4000 0130  CCP1_SRIC   Bits-------------------------------------
	.EQU	CCP1_SRIC_TXIC,		6
	.EQU	CCP1_SRIC_TXUIC,		5
	.EQU	CCP1_SRIC_TXTIC,		4
	.EQU	CCP1_SRIC_CC4IC,		3
	.EQU	CCP1_SRIC_CC3IC,		2
	.EQU	CCP1_SRIC_CC2IC,		1
	.EQU	CCP1_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP1_DF,		0x40000134
//  0x4000 0134  CCP1_DF   Bits-------------------------------------
	.EQU	CCP1_DF_TXUDF,		5
	.EQU	CCP1_DF_TXTDF,		4
	.EQU	CCP1_DF_CC4DF,		3
	.EQU	CCP1_DF_CC3DF,		2
	.EQU	CCP1_DF_CC2DF,		1
	.EQU	CCP1_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP1_CTL1,		0x40000140
//  0x4000 0140  CCP1_CTL1   Bits-------------------------------------
	.EQU	CCP1_CTL1_CH4M3,		15
	.EQU	CCP1_CTL1_CH4M2,		14
	.EQU	CCP1_CTL1_CH4M1,		13
	.EQU	CCP1_CTL1_CH4M0,		12
	.EQU	CCP1_CTL1_CH3M3,		11
	.EQU	CCP1_CTL1_CH3M2,		10
	.EQU	CCP1_CTL1_CH3M1,		9
	.EQU	CCP1_CTL1_CH3M0,		8
	.EQU	CCP1_CTL1_CH2M3,		7
	.EQU	CCP1_CTL1_CH2M2,		6
	.EQU	CCP1_CTL1_CH2M1,		5
	.EQU	CCP1_CTL1_CH2M0,		4
	.EQU	CCP1_CTL1_CH1M3,		3
	.EQU	CCP1_CTL1_CH1M2,		2
	.EQU	CCP1_CTL1_CH1M1,		1
	.EQU	CCP1_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP1_R1,		0x40000144
//  0x4000 0144  CCP1_R1   Bits-------------------------------------
	.EQU	CCP1_R1_CCPXRY15,		15
	.EQU	CCP1_R1_CCPXRY14,		14
	.EQU	CCP1_R1_CCPXRY13,		13
	.EQU	CCP1_R1_CCPXRY12,		12
	.EQU	CCP1_R1_CCPXRY11,		11
	.EQU	CCP1_R1_CCPXRY10,		10
	.EQU	CCP1_R1_CCPXRY9,		9
	.EQU	CCP1_R1_CCPXRY8,		8
	.EQU	CCP1_R1_CCPXRY7,		7
	.EQU	CCP1_R1_CCPXRY6,		6
	.EQU	CCP1_R1_CCPXRY5,		5
	.EQU	CCP1_R1_CCPXRY4,		4
	.EQU	CCP1_R1_CCPXRY3,		3
	.EQU	CCP1_R1_CCPXRY2,		2
	.EQU	CCP1_R1_CCPXRY1,		1
	.EQU	CCP1_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP1_R2,		0x40000148
//  0x4000 0148  CCP1_R2   Bits-------------------------------------
	.EQU	CCP1_R2_CCPXRY15,		15
	.EQU	CCP1_R2_CCPXRY14,		14
	.EQU	CCP1_R2_CCPXRY13,		13
	.EQU	CCP1_R2_CCPXRY12,		12
	.EQU	CCP1_R2_CCPXRY11,		11
	.EQU	CCP1_R2_CCPXRY10,		10
	.EQU	CCP1_R2_CCPXRY9,		9
	.EQU	CCP1_R2_CCPXRY8,		8
	.EQU	CCP1_R2_CCPXRY7,		7
	.EQU	CCP1_R2_CCPXRY6,		6
	.EQU	CCP1_R2_CCPXRY5,		5
	.EQU	CCP1_R2_CCPXRY4,		4
	.EQU	CCP1_R2_CCPXRY3,		3
	.EQU	CCP1_R2_CCPXRY2,		2
	.EQU	CCP1_R2_CCPXRY1,		1
	.EQU	CCP1_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP1_R3,		0x4000014C
//  0x4000 014C  CCP1_R3   Bits-------------------------------------
	.EQU	CCP1_R3_CCPXRY15,		15
	.EQU	CCP1_R3_CCPXRY14,		14
	.EQU	CCP1_R3_CCPXRY13,		13
	.EQU	CCP1_R3_CCPXRY12,		12
	.EQU	CCP1_R3_CCPXRY11,		11
	.EQU	CCP1_R3_CCPXRY10,		10
	.EQU	CCP1_R3_CCPXRY9,		9
	.EQU	CCP1_R3_CCPXRY8,		8
	.EQU	CCP1_R3_CCPXRY7,		7
	.EQU	CCP1_R3_CCPXRY6,		6
	.EQU	CCP1_R3_CCPXRY5,		5
	.EQU	CCP1_R3_CCPXRY4,		4
	.EQU	CCP1_R3_CCPXRY3,		3
	.EQU	CCP1_R3_CCPXRY2,		2
	.EQU	CCP1_R3_CCPXRY1,		1
	.EQU	CCP1_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP1_R4,		0x40000150
//  0x4000 0150  CCP1_R4   Bits-------------------------------------
	.EQU	CCP1_R4_CCPXRY15,		15
	.EQU	CCP1_R4_CCPXRY14,		14
	.EQU	CCP1_R4_CCPXRY13,		13
	.EQU	CCP1_R4_CCPXRY12,		12
	.EQU	CCP1_R4_CCPXRY11,		11
	.EQU	CCP1_R4_CCPXRY10,		10
	.EQU	CCP1_R4_CCPXRY9,		9
	.EQU	CCP1_R4_CCPXRY8,		8
	.EQU	CCP1_R4_CCPXRY7,		7
	.EQU	CCP1_R4_CCPXRY6,		6
	.EQU	CCP1_R4_CCPXRY5,		5
	.EQU	CCP1_R4_CCPXRY4,		4
	.EQU	CCP1_R4_CCPXRY3,		3
	.EQU	CCP1_R4_CCPXRY2,		2
	.EQU	CCP1_R4_CCPXRY1,		1
	.EQU	CCP1_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP1_CTL2,		0x40000154
//  0x4000 0154  CCP1_CTL2   Bits-------------------------------------
	.EQU	CCP1_CTL2_PXOC4CE,		15
	.EQU	CCP1_CTL2_PXOC3CE,		14
	.EQU	CCP1_CTL2_PXOC2CE,		13
	.EQU	CCP1_CTL2_PXOC1CE,		12
	.EQU	CCP1_CTL2_PXASS1,		11
	.EQU	CCP1_CTL2_PXASS0,		10
	.EQU	CCP1_CTL2_TCKSEL1,		9
	.EQU	CCP1_CTL2_TCKSEL0,		8
	.EQU	CCP1_CTL2_PXOC4_1,		7
	.EQU	CCP1_CTL2_PXOC4_0,		6
	.EQU	CCP1_CTL2_PXOC3_1,		5
	.EQU	CCP1_CTL2_PXOC3_0,		4
	.EQU	CCP1_CTL2_PXOC2_1,		3
	.EQU	CCP1_CTL2_PXOC2_0,		2
	.EQU	CCP1_CTL2_PXOC1_1,		1
	.EQU	CCP1_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP1_CTL3,		0x40000158
//  0x4000 0158  CCP1_CTL3   Bits-------------------------------------
	.EQU	CCP1_CTL3_PXSPMST,		15
	.EQU	CCP1_CTL3_PXPWMI,		14
	.EQU	CCP1_CTL3_PXXORM,		13
	.EQU	CCP1_CTL3_PXSPM,		12
	.EQU	CCP1_CTL3_TXTDE,		11
	.EQU	CCP1_CTL3_CC4DE,		10
	.EQU	CCP1_CTL3_CC3DE,		9
	.EQU	CCP1_CTL3_CC2DE,		8
	.EQU	CCP1_CTL3_CC1DE,		7
	.EQU	CCP1_CTL3_TXUDE,		6
	.EQU	CCP1_CTL3_TXUIE,		5
	.EQU	CCP1_CTL3_TXTIE,		4
	.EQU	CCP1_CTL3_CC4IE,		3
	.EQU	CCP1_CTL3_CC3IE,		2
	.EQU	CCP1_CTL3_CC2IE,		1
	.EQU	CCP1_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP1_EGIF,		0x4000015C
//  0x4000 015C  CCP1_EGIF   Bits-------------------------------------
	.EQU	CCP1_EGIF_POSSEL,		13
	.EQU	CCP1_EGIF_PXSEL,		12
	.EQU	CCP1_EGIF_TXUIF,		11
	.EQU	CCP1_EGIF_TXTIF,		10
	.EQU	CCP1_EGIF_CC4IF,		9
	.EQU	CCP1_EGIF_CC3IF,		8
	.EQU	CCP1_EGIF_CC2IF,		7
	.EQU	CCP1_EGIF_CC1IF,		6
	.EQU	CCP1_EGIF_TXTRG,		5
	.EQU	CCP1_EGIF_CC4G,		4
	.EQU	CCP1_EGIF_CC3G,		3
	.EQU	CCP1_EGIF_CC2G,		2
	.EQU	CCP1_EGIF_CC1G,		1
	.EQU	CCP1_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	T2_CNT,			0x40000180
//  0x4000 0180  T2_CNT   Bits-------------------------------------
	.EQU	T2_CNT_TXCNT15,		15
	.EQU	T2_CNT_TXCNT14,		14
	.EQU	T2_CNT_TXCNT13,		13
	.EQU	T2_CNT_TXCNT12,		12
	.EQU	T2_CNT_TXCNT11,		11
	.EQU	T2_CNT_TXCNT10,		10
	.EQU	T2_CNT_TXCNT9,		9
	.EQU	T2_CNT_TXCNT8,		8
	.EQU	T2_CNT_TXCNT7,		7
	.EQU	T2_CNT_TXCNT6,		6
	.EQU	T2_CNT_TXCNT5,		5
	.EQU	T2_CNT_TXCNT4,		4
	.EQU	T2_CNT_TXCNT3,		3
	.EQU	T2_CNT_TXCNT2,		2
	.EQU	T2_CNT_TXCNT1,		1
	.EQU	T2_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T2_CTL1,		0x40000184
//  0x4000 0184  T2_CTL1   Bits-------------------------------------
	.EQU	T2_CTL1_TXIF,		13
	.EQU	T2_CTL1_TXIE,		12
	.EQU	T2_CTL1_TXCMS2,		10
	.EQU	T2_CTL1_TXCMS1,		9
	.EQU	T2_CTL1_TXCMS0,		8
	.EQU	T2_CTL1_TXDIR,		7
	.EQU	T2_CTL1_TXCLK1,		6
	.EQU	T2_CTL1_TXCLK0,		5
	.EQU	T2_CTL1_TXSY,		3
	.EQU	T2_CTL1_TXCS,		1
	.EQU	T2_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T2_CTL2,		0x40000188
//  0x4000 0188  T2_CTL2   Bits-------------------------------------
	.EQU	T2_CTL2_TRGSEL1,		15
	.EQU	T2_CTL2_TRGSEL0,		14
	.EQU	T2_CTL2_TXUR,		13
	.EQU	T2_CTL2_TXMSSYNC,		12
	.EQU	T2_CTL2_TXTS3,		11
	.EQU	T2_CTL2_TXTS2,		10
	.EQU	T2_CTL2_TXTS1,		9
	.EQU	T2_CTL2_TXTS0,		8
	.EQU	T2_CTL2_TXSMS2,		7
	.EQU	T2_CTL2_TXSMS1,		6
	.EQU	T2_CTL2_TXSMS0,		5
	.EQU	T2_CTL2_TXMMS2,		4
	.EQU	T2_CTL2_TXMMS1,		3
	.EQU	T2_CTL2_TXMMS0,		2
	.EQU	T2_CTL2_TXUDEVT,		1
	.EQU	T2_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T2_PRSC,		0x4000018C
//  0x4000 018C  T2_PRSC   Bits-------------------------------------
	.EQU	T2_PRSC_TXCKS15,		15
	.EQU	T2_PRSC_TXCKS14,		14
	.EQU	T2_PRSC_TXCKS13,		13
	.EQU	T2_PRSC_TXCKS12,		12
	.EQU	T2_PRSC_TXCKS11,		11
	.EQU	T2_PRSC_TXCKS10,		10
	.EQU	T2_PRSC_TXCKS9,		9
	.EQU	T2_PRSC_TXCKS8,		8
	.EQU	T2_PRSC_TXCKS7,		7
	.EQU	T2_PRSC_TXCKS6,		6
	.EQU	T2_PRSC_TXCKS5,		5
	.EQU	T2_PRSC_TXCKS4,		4
	.EQU	T2_PRSC_TXCKS3,		3
	.EQU	T2_PRSC_TXCKS2,		2
	.EQU	T2_PRSC_TXCKS1,		1
	.EQU	T2_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T2_PPX,			0x40000190
//  0x4000 0190  T2_PPX   Bits-------------------------------------
	.EQU	T2_PPX_PPX15,		15
	.EQU	T2_PPX_PPX14,		14
	.EQU	T2_PPX_PPX13,		13
	.EQU	T2_PPX_PPX12,		12
	.EQU	T2_PPX_PPX11,		11
	.EQU	T2_PPX_PPX10,		10
	.EQU	T2_PPX_PPX9,		9
	.EQU	T2_PPX_PPX8,		8
	.EQU	T2_PPX_PPX7,		7
	.EQU	T2_PPX_PPX6,		6
	.EQU	T2_PPX_PPX5,		5
	.EQU	T2_PPX_PPX4,		4
	.EQU	T2_PPX_PPX3,		3
	.EQU	T2_PPX_PPX2,		2
	.EQU	T2_PPX_PPX1,		1
	.EQU	T2_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T2_UDTIMx,		0x40000194
//  0x4000 0194  T2_UDTIMx   Bits-------------------------------------
	.EQU	T2_UDTIMx_TXUD7,		7
	.EQU	T2_UDTIMx_TXUD6,		6
	.EQU	T2_UDTIMx_TXUD5,		5
	.EQU	T2_UDTIMx_TXUD4,		4
	.EQU	T2_UDTIMx_TXUD3,		3
	.EQU	T2_UDTIMx_TXUD2,		2
	.EQU	T2_UDTIMx_TXUD1,		1
	.EQU	T2_UDTIMx_TXUD0,		0
//  register-------------------------------------
	.EQU	CCP2_C1,		0x400001A0
//  0x4000 01A0  CCP2_C1   Bits-------------------------------------
	.EQU	CCP2_C1_CCPXCY15,		15
	.EQU	CCP2_C1_CCPXCY14,		14
	.EQU	CCP2_C1_CCPXCY13,		13
	.EQU	CCP2_C1_CCPXCY12,		12
	.EQU	CCP2_C1_CCPXCY11,		11
	.EQU	CCP2_C1_CCPXCY10,		10
	.EQU	CCP2_C1_CCPXCY9,		9
	.EQU	CCP2_C1_CCPXCY8,		8
	.EQU	CCP2_C1_CCPXCY7,		7
	.EQU	CCP2_C1_CCPXCY6,		6
	.EQU	CCP2_C1_CCPXCY5,		5
	.EQU	CCP2_C1_CCPXCY4,		4
	.EQU	CCP2_C1_CCPXCY3,		3
	.EQU	CCP2_C1_CCPXCY2,		2
	.EQU	CCP2_C1_CCPXCY1,		1
	.EQU	CCP2_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP2_C2,		0x400001A4
//  0x4000 01A4  CCP2_C2   Bits-------------------------------------
	.EQU	CCP2_C2_CCPXCY15,		15
	.EQU	CCP2_C2_CCPXCY14,		14
	.EQU	CCP2_C2_CCPXCY13,		13
	.EQU	CCP2_C2_CCPXCY12,		12
	.EQU	CCP2_C2_CCPXCY11,		11
	.EQU	CCP2_C2_CCPXCY10,		10
	.EQU	CCP2_C2_CCPXCY9,		9
	.EQU	CCP2_C2_CCPXCY8,		8
	.EQU	CCP2_C2_CCPXCY7,		7
	.EQU	CCP2_C2_CCPXCY6,		6
	.EQU	CCP2_C2_CCPXCY5,		5
	.EQU	CCP2_C2_CCPXCY4,		4
	.EQU	CCP2_C2_CCPXCY3,		3
	.EQU	CCP2_C2_CCPXCY2,		2
	.EQU	CCP2_C2_CCPXCY1,		1
	.EQU	CCP2_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP2_C3,		0x400001A8
//  0x4000 01A8  CCP2_C3   Bits-------------------------------------
	.EQU	CCP2_C3_CCPXCY15,		15
	.EQU	CCP2_C3_CCPXCY14,		14
	.EQU	CCP2_C3_CCPXCY13,		13
	.EQU	CCP2_C3_CCPXCY12,		12
	.EQU	CCP2_C3_CCPXCY11,		11
	.EQU	CCP2_C3_CCPXCY10,		10
	.EQU	CCP2_C3_CCPXCY9,		9
	.EQU	CCP2_C3_CCPXCY8,		8
	.EQU	CCP2_C3_CCPXCY7,		7
	.EQU	CCP2_C3_CCPXCY6,		6
	.EQU	CCP2_C3_CCPXCY5,		5
	.EQU	CCP2_C3_CCPXCY4,		4
	.EQU	CCP2_C3_CCPXCY3,		3
	.EQU	CCP2_C3_CCPXCY2,		2
	.EQU	CCP2_C3_CCPXCY1,		1
	.EQU	CCP2_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP2_C4,		0x400001AC
//  0x4000 01AC  CCP2_C4   Bits-------------------------------------
	.EQU	CCP2_C4_CCPXCY15,		15
	.EQU	CCP2_C4_CCPXCY14,		14
	.EQU	CCP2_C4_CCPXCY13,		13
	.EQU	CCP2_C4_CCPXCY12,		12
	.EQU	CCP2_C4_CCPXCY11,		11
	.EQU	CCP2_C4_CCPXCY10,		10
	.EQU	CCP2_C4_CCPXCY9,		9
	.EQU	CCP2_C4_CCPXCY8,		8
	.EQU	CCP2_C4_CCPXCY7,		7
	.EQU	CCP2_C4_CCPXCY6,		6
	.EQU	CCP2_C4_CCPXCY5,		5
	.EQU	CCP2_C4_CCPXCY4,		4
	.EQU	CCP2_C4_CCPXCY3,		3
	.EQU	CCP2_C4_CCPXCY2,		2
	.EQU	CCP2_C4_CCPXCY1,		1
	.EQU	CCP2_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP2_SRIC,		0x400001B0
//  0x4000 01B0  CCP2_SRIC   Bits-------------------------------------
	.EQU	CCP2_SRIC_TXIC,		6
	.EQU	CCP2_SRIC_TXUIC,		5
	.EQU	CCP2_SRIC_TXTIC,		4
	.EQU	CCP2_SRIC_CC4IC,		3
	.EQU	CCP2_SRIC_CC3IC,		2
	.EQU	CCP2_SRIC_CC2IC,		1
	.EQU	CCP2_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP2_DF,		0x400001B4
//  0x4000 01B4  CCP2_DF   Bits-------------------------------------
	.EQU	CCP2_DF_TXUDF,		5
	.EQU	CCP2_DF_TXTDF,		4
	.EQU	CCP2_DF_CC4DF,		3
	.EQU	CCP2_DF_CC3DF,		2
	.EQU	CCP2_DF_CC2DF,		1
	.EQU	CCP2_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP2_CTL1,		0x400001C0
//  0x4000 01C0  CCP2_CTL1   Bits-------------------------------------
	.EQU	CCP2_CTL1_CH4M3,		15
	.EQU	CCP2_CTL1_CH4M2,		14
	.EQU	CCP2_CTL1_CH4M1,		13
	.EQU	CCP2_CTL1_CH4M0,		12
	.EQU	CCP2_CTL1_CH3M3,		11
	.EQU	CCP2_CTL1_CH3M2,		10
	.EQU	CCP2_CTL1_CH3M1,		9
	.EQU	CCP2_CTL1_CH3M0,		8
	.EQU	CCP2_CTL1_CH2M3,		7
	.EQU	CCP2_CTL1_CH2M2,		6
	.EQU	CCP2_CTL1_CH2M1,		5
	.EQU	CCP2_CTL1_CH2M0,		4
	.EQU	CCP2_CTL1_CH1M3,		3
	.EQU	CCP2_CTL1_CH1M2,		2
	.EQU	CCP2_CTL1_CH1M1,		1
	.EQU	CCP2_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP2_R1,		0x400001C4
//  0x4000 01C4  CCP2_R1   Bits-------------------------------------
	.EQU	CCP2_R1_CCPXRY15,		15
	.EQU	CCP2_R1_CCPXRY14,		14
	.EQU	CCP2_R1_CCPXRY13,		13
	.EQU	CCP2_R1_CCPXRY12,		12
	.EQU	CCP2_R1_CCPXRY11,		11
	.EQU	CCP2_R1_CCPXRY10,		10
	.EQU	CCP2_R1_CCPXRY9,		9
	.EQU	CCP2_R1_CCPXRY8,		8
	.EQU	CCP2_R1_CCPXRY7,		7
	.EQU	CCP2_R1_CCPXRY6,		6
	.EQU	CCP2_R1_CCPXRY5,		5
	.EQU	CCP2_R1_CCPXRY4,		4
	.EQU	CCP2_R1_CCPXRY3,		3
	.EQU	CCP2_R1_CCPXRY2,		2
	.EQU	CCP2_R1_CCPXRY1,		1
	.EQU	CCP2_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP2_R2,		0x400001C8
//  0x4000 01C8  CCP2_R2   Bits-------------------------------------
	.EQU	CCP2_R2_CCPXRY15,		15
	.EQU	CCP2_R2_CCPXRY14,		14
	.EQU	CCP2_R2_CCPXRY13,		13
	.EQU	CCP2_R2_CCPXRY12,		12
	.EQU	CCP2_R2_CCPXRY11,		11
	.EQU	CCP2_R2_CCPXRY10,		10
	.EQU	CCP2_R2_CCPXRY9,		9
	.EQU	CCP2_R2_CCPXRY8,		8
	.EQU	CCP2_R2_CCPXRY7,		7
	.EQU	CCP2_R2_CCPXRY6,		6
	.EQU	CCP2_R2_CCPXRY5,		5
	.EQU	CCP2_R2_CCPXRY4,		4
	.EQU	CCP2_R2_CCPXRY3,		3
	.EQU	CCP2_R2_CCPXRY2,		2
	.EQU	CCP2_R2_CCPXRY1,		1
	.EQU	CCP2_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP2_R3,		0x400001CC
//  0x4000 01CC  CCP2_R3   Bits-------------------------------------
	.EQU	CCP2_R3_CCPXRY15,		15
	.EQU	CCP2_R3_CCPXRY14,		14
	.EQU	CCP2_R3_CCPXRY13,		13
	.EQU	CCP2_R3_CCPXRY12,		12
	.EQU	CCP2_R3_CCPXRY11,		11
	.EQU	CCP2_R3_CCPXRY10,		10
	.EQU	CCP2_R3_CCPXRY9,		9
	.EQU	CCP2_R3_CCPXRY8,		8
	.EQU	CCP2_R3_CCPXRY7,		7
	.EQU	CCP2_R3_CCPXRY6,		6
	.EQU	CCP2_R3_CCPXRY5,		5
	.EQU	CCP2_R3_CCPXRY4,		4
	.EQU	CCP2_R3_CCPXRY3,		3
	.EQU	CCP2_R3_CCPXRY2,		2
	.EQU	CCP2_R3_CCPXRY1,		1
	.EQU	CCP2_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP2_R4,		0x400001D0
//  0x4000 01D0  CCP2_R4   Bits-------------------------------------
	.EQU	CCP2_R4_CCPXRY15,		15
	.EQU	CCP2_R4_CCPXRY14,		14
	.EQU	CCP2_R4_CCPXRY13,		13
	.EQU	CCP2_R4_CCPXRY12,		12
	.EQU	CCP2_R4_CCPXRY11,		11
	.EQU	CCP2_R4_CCPXRY10,		10
	.EQU	CCP2_R4_CCPXRY9,		9
	.EQU	CCP2_R4_CCPXRY8,		8
	.EQU	CCP2_R4_CCPXRY7,		7
	.EQU	CCP2_R4_CCPXRY6,		6
	.EQU	CCP2_R4_CCPXRY5,		5
	.EQU	CCP2_R4_CCPXRY4,		4
	.EQU	CCP2_R4_CCPXRY3,		3
	.EQU	CCP2_R4_CCPXRY2,		2
	.EQU	CCP2_R4_CCPXRY1,		1
	.EQU	CCP2_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP2_CTL2,		0x400001D4
//  0x4000 01D4  CCP2_CTL2   Bits-------------------------------------
	.EQU	CCP2_CTL2_PXOC4CE,		15
	.EQU	CCP2_CTL2_PXOC3CE,		14
	.EQU	CCP2_CTL2_PXOC2CE,		13
	.EQU	CCP2_CTL2_PXOC1CE,		12
	.EQU	CCP2_CTL2_PXASS1,		11
	.EQU	CCP2_CTL2_PXASS0,		10
	.EQU	CCP2_CTL2_TCKSEL1,		9
	.EQU	CCP2_CTL2_TCKSEL0,		8
	.EQU	CCP2_CTL2_PXOC4_1,		7
	.EQU	CCP2_CTL2_PXOC4_0,		6
	.EQU	CCP2_CTL2_PXOC3_1,		5
	.EQU	CCP2_CTL2_PXOC3_0,		4
	.EQU	CCP2_CTL2_PXOC2_1,		3
	.EQU	CCP2_CTL2_PXOC2_0,		2
	.EQU	CCP2_CTL2_PXOC1_1,		1
	.EQU	CCP2_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP2_CTL3,		0x400001D8
//  0x4000 01D8  CCP2_CTL3   Bits-------------------------------------
	.EQU	CCP2_CTL3_PXSPMST,		15
	.EQU	CCP2_CTL3_PXPWMI,		14
	.EQU	CCP2_CTL3_PXXORM,		13
	.EQU	CCP2_CTL3_PXSPM,		12
	.EQU	CCP2_CTL3_TXTDE,		11
	.EQU	CCP2_CTL3_CC4DE,		10
	.EQU	CCP2_CTL3_CC3DE,		9
	.EQU	CCP2_CTL3_CC2DE,		8
	.EQU	CCP2_CTL3_CC1DE,		7
	.EQU	CCP2_CTL3_TXUDE,		6
	.EQU	CCP2_CTL3_TXUIE,		5
	.EQU	CCP2_CTL3_TXTIE,		4
	.EQU	CCP2_CTL3_CC4IE,		3
	.EQU	CCP2_CTL3_CC3IE,		2
	.EQU	CCP2_CTL3_CC2IE,		1
	.EQU	CCP2_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP2_EGIF,		0x400001DC
//  0x4000 01DC  CCP2_EGIF   Bits-------------------------------------
	.EQU	CCP2_EGIF_POSSEL,		13
	.EQU	CCP2_EGIF_PXSEL,		12
	.EQU	CCP2_EGIF_TXUIF,		11
	.EQU	CCP2_EGIF_TXTIF,		10
	.EQU	CCP2_EGIF_CC4IF,		9
	.EQU	CCP2_EGIF_CC3IF,		8
	.EQU	CCP2_EGIF_CC2IF,		7
	.EQU	CCP2_EGIF_CC1IF,		6
	.EQU	CCP2_EGIF_TXTRG,		5
	.EQU	CCP2_EGIF_CC4G,		4
	.EQU	CCP2_EGIF_CC3G,		3
	.EQU	CCP2_EGIF_CC2G,		2
	.EQU	CCP2_EGIF_CC1G,		1
	.EQU	CCP2_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	T3_CNT,			0x40000200
//  0x4000 0200  T3_CNT   Bits-------------------------------------
	.EQU	T3_CNT_TXCNT15,		15
	.EQU	T3_CNT_TXCNT14,		14
	.EQU	T3_CNT_TXCNT13,		13
	.EQU	T3_CNT_TXCNT12,		12
	.EQU	T3_CNT_TXCNT11,		11
	.EQU	T3_CNT_TXCNT10,		10
	.EQU	T3_CNT_TXCNT9,		9
	.EQU	T3_CNT_TXCNT8,		8
	.EQU	T3_CNT_TXCNT7,		7
	.EQU	T3_CNT_TXCNT6,		6
	.EQU	T3_CNT_TXCNT5,		5
	.EQU	T3_CNT_TXCNT4,		4
	.EQU	T3_CNT_TXCNT3,		3
	.EQU	T3_CNT_TXCNT2,		2
	.EQU	T3_CNT_TXCNT1,		1
	.EQU	T3_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T3_CTL1,		0x40000204
//  0x4000 0204  T3_CTL1   Bits-------------------------------------
	.EQU	T3_CTL1_TXIF,		13
	.EQU	T3_CTL1_TXIE,		12
	.EQU	T3_CTL1_TXCMS2,		10
	.EQU	T3_CTL1_TXCMS1,		9
	.EQU	T3_CTL1_TXCMS0,		8
	.EQU	T3_CTL1_TXDIR,		7
	.EQU	T3_CTL1_TXCLK1,		6
	.EQU	T3_CTL1_TXCLK0,		5
	.EQU	T3_CTL1_TXSY,		3
	.EQU	T3_CTL1_TXCS,		1
	.EQU	T3_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T3_CTL2,		0x40000208
//  0x4000 0208  T3_CTL2   Bits-------------------------------------
	.EQU	T3_CTL2_TRGSEL1,		15
	.EQU	T3_CTL2_TRGSEL0,		14
	.EQU	T3_CTL2_TXUR,		13
	.EQU	T3_CTL2_TXMSSYNC,		12
	.EQU	T3_CTL2_TXTS3,		11
	.EQU	T3_CTL2_TXTS2,		10
	.EQU	T3_CTL2_TXTS1,		9
	.EQU	T3_CTL2_TXTS0,		8
	.EQU	T3_CTL2_TXSMS2,		7
	.EQU	T3_CTL2_TXSMS1,		6
	.EQU	T3_CTL2_TXSMS0,		5
	.EQU	T3_CTL2_TXMMS2,		4
	.EQU	T3_CTL2_TXMMS1,		3
	.EQU	T3_CTL2_TXMMS0,		2
	.EQU	T3_CTL2_TXUDEVT,		1
	.EQU	T3_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T3_PRSC,		0x4000020C
//  0x4000 020C  T3_PRSC   Bits-------------------------------------
	.EQU	T3_PRSC_TXCKS15,		15
	.EQU	T3_PRSC_TXCKS14,		14
	.EQU	T3_PRSC_TXCKS13,		13
	.EQU	T3_PRSC_TXCKS12,		12
	.EQU	T3_PRSC_TXCKS11,		11
	.EQU	T3_PRSC_TXCKS10,		10
	.EQU	T3_PRSC_TXCKS9,		9
	.EQU	T3_PRSC_TXCKS8,		8
	.EQU	T3_PRSC_TXCKS7,		7
	.EQU	T3_PRSC_TXCKS6,		6
	.EQU	T3_PRSC_TXCKS5,		5
	.EQU	T3_PRSC_TXCKS4,		4
	.EQU	T3_PRSC_TXCKS3,		3
	.EQU	T3_PRSC_TXCKS2,		2
	.EQU	T3_PRSC_TXCKS1,		1
	.EQU	T3_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T3_PPX,			0x40000210
//  0x4000 0210  T3_PPX   Bits-------------------------------------
	.EQU	T3_PPX_PPX15,		15
	.EQU	T3_PPX_PPX14,		14
	.EQU	T3_PPX_PPX13,		13
	.EQU	T3_PPX_PPX12,		12
	.EQU	T3_PPX_PPX11,		11
	.EQU	T3_PPX_PPX10,		10
	.EQU	T3_PPX_PPX9,		9
	.EQU	T3_PPX_PPX8,		8
	.EQU	T3_PPX_PPX7,		7
	.EQU	T3_PPX_PPX6,		6
	.EQU	T3_PPX_PPX5,		5
	.EQU	T3_PPX_PPX4,		4
	.EQU	T3_PPX_PPX3,		3
	.EQU	T3_PPX_PPX2,		2
	.EQU	T3_PPX_PPX1,		1
	.EQU	T3_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T3_UDTIMx,		0x40000214
//  0x4000 0214  T3_UDTIMx   Bits-------------------------------------
	.EQU	T3_UDTIMx_TXUD7,		7
	.EQU	T3_UDTIMx_TXUD6,		6
	.EQU	T3_UDTIMx_TXUD5,		5
	.EQU	T3_UDTIMx_TXUD4,		4
	.EQU	T3_UDTIMx_TXUD3,		3
	.EQU	T3_UDTIMx_TXUD2,		2
	.EQU	T3_UDTIMx_TXUD1,		1
	.EQU	T3_UDTIMx_TXUD0,		0
//  register-------------------------------------
	.EQU	CCP3_C1,		0x40000220
//  0x4000 0220  CCP3_C1   Bits-------------------------------------
	.EQU	CCP3_C1_CCPXCY15,		15
	.EQU	CCP3_C1_CCPXCY14,		14
	.EQU	CCP3_C1_CCPXCY13,		13
	.EQU	CCP3_C1_CCPXCY12,		12
	.EQU	CCP3_C1_CCPXCY11,		11
	.EQU	CCP3_C1_CCPXCY10,		10
	.EQU	CCP3_C1_CCPXCY9,		9
	.EQU	CCP3_C1_CCPXCY8,		8
	.EQU	CCP3_C1_CCPXCY7,		7
	.EQU	CCP3_C1_CCPXCY6,		6
	.EQU	CCP3_C1_CCPXCY5,		5
	.EQU	CCP3_C1_CCPXCY4,		4
	.EQU	CCP3_C1_CCPXCY3,		3
	.EQU	CCP3_C1_CCPXCY2,		2
	.EQU	CCP3_C1_CCPXCY1,		1
	.EQU	CCP3_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP3_C2,		0x40000224
//  0x4000 0224  CCP3_C2   Bits-------------------------------------
	.EQU	CCP3_C2_CCPXCY15,		15
	.EQU	CCP3_C2_CCPXCY14,		14
	.EQU	CCP3_C2_CCPXCY13,		13
	.EQU	CCP3_C2_CCPXCY12,		12
	.EQU	CCP3_C2_CCPXCY11,		11
	.EQU	CCP3_C2_CCPXCY10,		10
	.EQU	CCP3_C2_CCPXCY9,		9
	.EQU	CCP3_C2_CCPXCY8,		8
	.EQU	CCP3_C2_CCPXCY7,		7
	.EQU	CCP3_C2_CCPXCY6,		6
	.EQU	CCP3_C2_CCPXCY5,		5
	.EQU	CCP3_C2_CCPXCY4,		4
	.EQU	CCP3_C2_CCPXCY3,		3
	.EQU	CCP3_C2_CCPXCY2,		2
	.EQU	CCP3_C2_CCPXCY1,		1
	.EQU	CCP3_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP3_C3,		0x40000228
//  0x4000 0228  CCP3_C3   Bits-------------------------------------
	.EQU	CCP3_C3_CCPXCY15,		15
	.EQU	CCP3_C3_CCPXCY14,		14
	.EQU	CCP3_C3_CCPXCY13,		13
	.EQU	CCP3_C3_CCPXCY12,		12
	.EQU	CCP3_C3_CCPXCY11,		11
	.EQU	CCP3_C3_CCPXCY10,		10
	.EQU	CCP3_C3_CCPXCY9,		9
	.EQU	CCP3_C3_CCPXCY8,		8
	.EQU	CCP3_C3_CCPXCY7,		7
	.EQU	CCP3_C3_CCPXCY6,		6
	.EQU	CCP3_C3_CCPXCY5,		5
	.EQU	CCP3_C3_CCPXCY4,		4
	.EQU	CCP3_C3_CCPXCY3,		3
	.EQU	CCP3_C3_CCPXCY2,		2
	.EQU	CCP3_C3_CCPXCY1,		1
	.EQU	CCP3_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP3_C4,		0x4000022C
//  0x4000 022C  CCP3_C4   Bits-------------------------------------
	.EQU	CCP3_C4_CCPXCY15,		15
	.EQU	CCP3_C4_CCPXCY14,		14
	.EQU	CCP3_C4_CCPXCY13,		13
	.EQU	CCP3_C4_CCPXCY12,		12
	.EQU	CCP3_C4_CCPXCY11,		11
	.EQU	CCP3_C4_CCPXCY10,		10
	.EQU	CCP3_C4_CCPXCY9,		9
	.EQU	CCP3_C4_CCPXCY8,		8
	.EQU	CCP3_C4_CCPXCY7,		7
	.EQU	CCP3_C4_CCPXCY6,		6
	.EQU	CCP3_C4_CCPXCY5,		5
	.EQU	CCP3_C4_CCPXCY4,		4
	.EQU	CCP3_C4_CCPXCY3,		3
	.EQU	CCP3_C4_CCPXCY2,		2
	.EQU	CCP3_C4_CCPXCY1,		1
	.EQU	CCP3_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP3_SRIC,		0x40000230
//  0x4000 0230  CCP3_SRIC   Bits-------------------------------------
	.EQU	CCP3_SRIC_TXIC,		6
	.EQU	CCP3_SRIC_TXUIC,		5
	.EQU	CCP3_SRIC_TXTIC,		4
	.EQU	CCP3_SRIC_CC4IC,		3
	.EQU	CCP3_SRIC_CC3IC,		2
	.EQU	CCP3_SRIC_CC2IC,		1
	.EQU	CCP3_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP3_DF,		0x40000234
//  0x4000 0234  CCP3_DF   Bits-------------------------------------
	.EQU	CCP3_DF_TXUDF,		5
	.EQU	CCP3_DF_TXTDF,		4
	.EQU	CCP3_DF_CC4DF,		3
	.EQU	CCP3_DF_CC3DF,		2
	.EQU	CCP3_DF_CC2DF,		1
	.EQU	CCP3_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP3_CTL1,		0x40000240
//  0x4000 0240  CCP3_CTL1   Bits-------------------------------------
	.EQU	CCP3_CTL1_CH4M3,		15
	.EQU	CCP3_CTL1_CH4M2,		14
	.EQU	CCP3_CTL1_CH4M1,		13
	.EQU	CCP3_CTL1_CH4M0,		12
	.EQU	CCP3_CTL1_CH3M3,		11
	.EQU	CCP3_CTL1_CH3M2,		10
	.EQU	CCP3_CTL1_CH3M1,		9
	.EQU	CCP3_CTL1_CH3M0,		8
	.EQU	CCP3_CTL1_CH2M3,		7
	.EQU	CCP3_CTL1_CH2M2,		6
	.EQU	CCP3_CTL1_CH2M1,		5
	.EQU	CCP3_CTL1_CH2M0,		4
	.EQU	CCP3_CTL1_CH1M3,		3
	.EQU	CCP3_CTL1_CH1M2,		2
	.EQU	CCP3_CTL1_CH1M1,		1
	.EQU	CCP3_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP3_R1,		0x40000244
//  0x4000 0244  CCP3_R1   Bits-------------------------------------
	.EQU	CCP3_R1_CCPXRY15,		15
	.EQU	CCP3_R1_CCPXRY14,		14
	.EQU	CCP3_R1_CCPXRY13,		13
	.EQU	CCP3_R1_CCPXRY12,		12
	.EQU	CCP3_R1_CCPXRY11,		11
	.EQU	CCP3_R1_CCPXRY10,		10
	.EQU	CCP3_R1_CCPXRY9,		9
	.EQU	CCP3_R1_CCPXRY8,		8
	.EQU	CCP3_R1_CCPXRY7,		7
	.EQU	CCP3_R1_CCPXRY6,		6
	.EQU	CCP3_R1_CCPXRY5,		5
	.EQU	CCP3_R1_CCPXRY4,		4
	.EQU	CCP3_R1_CCPXRY3,		3
	.EQU	CCP3_R1_CCPXRY2,		2
	.EQU	CCP3_R1_CCPXRY1,		1
	.EQU	CCP3_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP3_R2,		0x40000248
//  0x4000 0248  CCP3_R2   Bits-------------------------------------
	.EQU	CCP3_R2_CCPXRY15,		15
	.EQU	CCP3_R2_CCPXRY14,		14
	.EQU	CCP3_R2_CCPXRY13,		13
	.EQU	CCP3_R2_CCPXRY12,		12
	.EQU	CCP3_R2_CCPXRY11,		11
	.EQU	CCP3_R2_CCPXRY10,		10
	.EQU	CCP3_R2_CCPXRY9,		9
	.EQU	CCP3_R2_CCPXRY8,		8
	.EQU	CCP3_R2_CCPXRY7,		7
	.EQU	CCP3_R2_CCPXRY6,		6
	.EQU	CCP3_R2_CCPXRY5,		5
	.EQU	CCP3_R2_CCPXRY4,		4
	.EQU	CCP3_R2_CCPXRY3,		3
	.EQU	CCP3_R2_CCPXRY2,		2
	.EQU	CCP3_R2_CCPXRY1,		1
	.EQU	CCP3_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP3_R3,		0x4000024C
//  0x4000 024C  CCP3_R3   Bits-------------------------------------
	.EQU	CCP3_R3_CCPXRY15,		15
	.EQU	CCP3_R3_CCPXRY14,		14
	.EQU	CCP3_R3_CCPXRY13,		13
	.EQU	CCP3_R3_CCPXRY12,		12
	.EQU	CCP3_R3_CCPXRY11,		11
	.EQU	CCP3_R3_CCPXRY10,		10
	.EQU	CCP3_R3_CCPXRY9,		9
	.EQU	CCP3_R3_CCPXRY8,		8
	.EQU	CCP3_R3_CCPXRY7,		7
	.EQU	CCP3_R3_CCPXRY6,		6
	.EQU	CCP3_R3_CCPXRY5,		5
	.EQU	CCP3_R3_CCPXRY4,		4
	.EQU	CCP3_R3_CCPXRY3,		3
	.EQU	CCP3_R3_CCPXRY2,		2
	.EQU	CCP3_R3_CCPXRY1,		1
	.EQU	CCP3_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP3_R4,		0x40000250
//  0x4000 0250  CCP3_R4   Bits-------------------------------------
	.EQU	CCP3_R4_CCPXRY15,		15
	.EQU	CCP3_R4_CCPXRY14,		14
	.EQU	CCP3_R4_CCPXRY13,		13
	.EQU	CCP3_R4_CCPXRY12,		12
	.EQU	CCP3_R4_CCPXRY11,		11
	.EQU	CCP3_R4_CCPXRY10,		10
	.EQU	CCP3_R4_CCPXRY9,		9
	.EQU	CCP3_R4_CCPXRY8,		8
	.EQU	CCP3_R4_CCPXRY7,		7
	.EQU	CCP3_R4_CCPXRY6,		6
	.EQU	CCP3_R4_CCPXRY5,		5
	.EQU	CCP3_R4_CCPXRY4,		4
	.EQU	CCP3_R4_CCPXRY3,		3
	.EQU	CCP3_R4_CCPXRY2,		2
	.EQU	CCP3_R4_CCPXRY1,		1
	.EQU	CCP3_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP3_CTL2,		0x40000254
//  0x4000 0254  CCP3_CTL2   Bits-------------------------------------
	.EQU	CCP3_CTL2_PXOC4CE,		15
	.EQU	CCP3_CTL2_PXOC3CE,		14
	.EQU	CCP3_CTL2_PXOC2CE,		13
	.EQU	CCP3_CTL2_PXOC1CE,		12
	.EQU	CCP3_CTL2_PXASS1,		11
	.EQU	CCP3_CTL2_PXASS0,		10
	.EQU	CCP3_CTL2_TCKSEL1,		9
	.EQU	CCP3_CTL2_TCKSEL0,		8
	.EQU	CCP3_CTL2_PXOC4_1,		7
	.EQU	CCP3_CTL2_PXOC4_0,		6
	.EQU	CCP3_CTL2_PXOC3_1,		5
	.EQU	CCP3_CTL2_PXOC3_0,		4
	.EQU	CCP3_CTL2_PXOC2_1,		3
	.EQU	CCP3_CTL2_PXOC2_0,		2
	.EQU	CCP3_CTL2_PXOC1_1,		1
	.EQU	CCP3_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP3_CTL3,		0x40000258
//  0x4000 0258  CCP3_CTL3   Bits-------------------------------------
	.EQU	CCP3_CTL3_PXSPMST,		15
	.EQU	CCP3_CTL3_PXPWMI,		14
	.EQU	CCP3_CTL3_PXXORM,		13
	.EQU	CCP3_CTL3_PXSPM,		12
	.EQU	CCP3_CTL3_TXTDE,		11
	.EQU	CCP3_CTL3_CC4DE,		10
	.EQU	CCP3_CTL3_CC3DE,		9
	.EQU	CCP3_CTL3_CC2DE,		8
	.EQU	CCP3_CTL3_CC1DE,		7
	.EQU	CCP3_CTL3_TXUDE,		6
	.EQU	CCP3_CTL3_TXUIE,		5
	.EQU	CCP3_CTL3_TXTIE,		4
	.EQU	CCP3_CTL3_CC4IE,		3
	.EQU	CCP3_CTL3_CC3IE,		2
	.EQU	CCP3_CTL3_CC2IE,		1
	.EQU	CCP3_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP3_EGIF,		0x4000025C
//  0x4000 025C  CCP3_EGIF   Bits-------------------------------------
	.EQU	CCP3_EGIF_POSSEL,		13
	.EQU	CCP3_EGIF_PXSEL,		12
	.EQU	CCP3_EGIF_TXUIF,		11
	.EQU	CCP3_EGIF_TXTIF,		10
	.EQU	CCP3_EGIF_CC4IF,		9
	.EQU	CCP3_EGIF_CC3IF,		8
	.EQU	CCP3_EGIF_CC2IF,		7
	.EQU	CCP3_EGIF_CC1IF,		6
	.EQU	CCP3_EGIF_TXTRG,		5
	.EQU	CCP3_EGIF_CC4G,		4
	.EQU	CCP3_EGIF_CC3G,		3
	.EQU	CCP3_EGIF_CC2G,		2
	.EQU	CCP3_EGIF_CC1G,		1
	.EQU	CCP3_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	T4_CNT,			0x40000280
//  0x4000 0280  T4_CNT   Bits-------------------------------------
	.EQU	T4_CNT_TXCNT15,		15
	.EQU	T4_CNT_TXCNT14,		14
	.EQU	T4_CNT_TXCNT13,		13
	.EQU	T4_CNT_TXCNT12,		12
	.EQU	T4_CNT_TXCNT11,		11
	.EQU	T4_CNT_TXCNT10,		10
	.EQU	T4_CNT_TXCNT9,		9
	.EQU	T4_CNT_TXCNT8,		8
	.EQU	T4_CNT_TXCNT7,		7
	.EQU	T4_CNT_TXCNT6,		6
	.EQU	T4_CNT_TXCNT5,		5
	.EQU	T4_CNT_TXCNT4,		4
	.EQU	T4_CNT_TXCNT3,		3
	.EQU	T4_CNT_TXCNT2,		2
	.EQU	T4_CNT_TXCNT1,		1
	.EQU	T4_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T4_CTL1,		0x40000284
//  0x4000 0284  T4_CTL1   Bits-------------------------------------
	.EQU	T4_CTL1_TXIF,		13
	.EQU	T4_CTL1_TXIE,		12
	.EQU	T4_CTL1_TXCMS2,		10
	.EQU	T4_CTL1_TXCMS1,		9
	.EQU	T4_CTL1_TXCMS0,		8
	.EQU	T4_CTL1_TXDIR,		7
	.EQU	T4_CTL1_TXCLK1,		6
	.EQU	T4_CTL1_TXCLK0,		5
	.EQU	T4_CTL1_TXSY,		3
	.EQU	T4_CTL1_TXCS,		1
	.EQU	T4_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T4_CTL2,		0x40000288
//  0x4000 0288  T4_CTL2   Bits-------------------------------------
	.EQU	T4_CTL2_TRGSEL1,		15
	.EQU	T4_CTL2_TRGSEL0,		14
	.EQU	T4_CTL2_TXUR,		13
	.EQU	T4_CTL2_TXMSSYNC,		12
	.EQU	T4_CTL2_TXTS3,		11
	.EQU	T4_CTL2_TXTS2,		10
	.EQU	T4_CTL2_TXTS1,		9
	.EQU	T4_CTL2_TXTS0,		8
	.EQU	T4_CTL2_TXSMS2,		7
	.EQU	T4_CTL2_TXSMS1,		6
	.EQU	T4_CTL2_TXSMS0,		5
	.EQU	T4_CTL2_TXMMS2,		4
	.EQU	T4_CTL2_TXMMS1,		3
	.EQU	T4_CTL2_TXMMS0,		2
	.EQU	T4_CTL2_TXUDEVT,		1
	.EQU	T4_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T4_PRSC,		0x4000028C
//  0x4000 028C  T4_PRSC   Bits-------------------------------------
	.EQU	T4_PRSC_TXCKS15,		15
	.EQU	T4_PRSC_TXCKS14,		14
	.EQU	T4_PRSC_TXCKS13,		13
	.EQU	T4_PRSC_TXCKS12,		12
	.EQU	T4_PRSC_TXCKS11,		11
	.EQU	T4_PRSC_TXCKS10,		10
	.EQU	T4_PRSC_TXCKS9,		9
	.EQU	T4_PRSC_TXCKS8,		8
	.EQU	T4_PRSC_TXCKS7,		7
	.EQU	T4_PRSC_TXCKS6,		6
	.EQU	T4_PRSC_TXCKS5,		5
	.EQU	T4_PRSC_TXCKS4,		4
	.EQU	T4_PRSC_TXCKS3,		3
	.EQU	T4_PRSC_TXCKS2,		2
	.EQU	T4_PRSC_TXCKS1,		1
	.EQU	T4_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T4_PPX,			0x40000290
//  0x4000 0290  T4_PPX   Bits-------------------------------------
	.EQU	T4_PPX_PPX15,		15
	.EQU	T4_PPX_PPX14,		14
	.EQU	T4_PPX_PPX13,		13
	.EQU	T4_PPX_PPX12,		12
	.EQU	T4_PPX_PPX11,		11
	.EQU	T4_PPX_PPX10,		10
	.EQU	T4_PPX_PPX9,		9
	.EQU	T4_PPX_PPX8,		8
	.EQU	T4_PPX_PPX7,		7
	.EQU	T4_PPX_PPX6,		6
	.EQU	T4_PPX_PPX5,		5
	.EQU	T4_PPX_PPX4,		4
	.EQU	T4_PPX_PPX3,		3
	.EQU	T4_PPX_PPX2,		2
	.EQU	T4_PPX_PPX1,		1
	.EQU	T4_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T4_UDTIMx,		0x40000294
//  0x4000 0294  T4_UDTIMx   Bits-------------------------------------
	.EQU	T4_UDTIMx_TXUD7,		7
	.EQU	T4_UDTIMx_TXUD6,		6
	.EQU	T4_UDTIMx_TXUD5,		5
	.EQU	T4_UDTIMx_TXUD4,		4
	.EQU	T4_UDTIMx_TXUD3,		3
	.EQU	T4_UDTIMx_TXUD2,		2
	.EQU	T4_UDTIMx_TXUD1,		1
	.EQU	T4_UDTIMx_TXUD0,		0
//  register-------------------------------------
	.EQU	CCP4_C1,		0x400002A0
//  0x4000 02A0  CCP4_C1   Bits-------------------------------------
	.EQU	CCP4_C1_CCPXCY15,		15
	.EQU	CCP4_C1_CCPXCY14,		14
	.EQU	CCP4_C1_CCPXCY13,		13
	.EQU	CCP4_C1_CCPXCY12,		12
	.EQU	CCP4_C1_CCPXCY11,		11
	.EQU	CCP4_C1_CCPXCY10,		10
	.EQU	CCP4_C1_CCPXCY9,		9
	.EQU	CCP4_C1_CCPXCY8,		8
	.EQU	CCP4_C1_CCPXCY7,		7
	.EQU	CCP4_C1_CCPXCY6,		6
	.EQU	CCP4_C1_CCPXCY5,		5
	.EQU	CCP4_C1_CCPXCY4,		4
	.EQU	CCP4_C1_CCPXCY3,		3
	.EQU	CCP4_C1_CCPXCY2,		2
	.EQU	CCP4_C1_CCPXCY1,		1
	.EQU	CCP4_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP4_C2,		0x400002A4
//  0x4000 02A4  CCP4_C2   Bits-------------------------------------
	.EQU	CCP4_C2_CCPXCY15,		15
	.EQU	CCP4_C2_CCPXCY14,		14
	.EQU	CCP4_C2_CCPXCY13,		13
	.EQU	CCP4_C2_CCPXCY12,		12
	.EQU	CCP4_C2_CCPXCY11,		11
	.EQU	CCP4_C2_CCPXCY10,		10
	.EQU	CCP4_C2_CCPXCY9,		9
	.EQU	CCP4_C2_CCPXCY8,		8
	.EQU	CCP4_C2_CCPXCY7,		7
	.EQU	CCP4_C2_CCPXCY6,		6
	.EQU	CCP4_C2_CCPXCY5,		5
	.EQU	CCP4_C2_CCPXCY4,		4
	.EQU	CCP4_C2_CCPXCY3,		3
	.EQU	CCP4_C2_CCPXCY2,		2
	.EQU	CCP4_C2_CCPXCY1,		1
	.EQU	CCP4_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP4_C3,		0x400002A8
//  0x4000 02A8  CCP4_C3   Bits-------------------------------------
	.EQU	CCP4_C3_CCPXCY15,		15
	.EQU	CCP4_C3_CCPXCY14,		14
	.EQU	CCP4_C3_CCPXCY13,		13
	.EQU	CCP4_C3_CCPXCY12,		12
	.EQU	CCP4_C3_CCPXCY11,		11
	.EQU	CCP4_C3_CCPXCY10,		10
	.EQU	CCP4_C3_CCPXCY9,		9
	.EQU	CCP4_C3_CCPXCY8,		8
	.EQU	CCP4_C3_CCPXCY7,		7
	.EQU	CCP4_C3_CCPXCY6,		6
	.EQU	CCP4_C3_CCPXCY5,		5
	.EQU	CCP4_C3_CCPXCY4,		4
	.EQU	CCP4_C3_CCPXCY3,		3
	.EQU	CCP4_C3_CCPXCY2,		2
	.EQU	CCP4_C3_CCPXCY1,		1
	.EQU	CCP4_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP4_C4,		0x400002AC
//  0x4000 02AC  CCP4_C4   Bits-------------------------------------
	.EQU	CCP4_C4_CCPXCY15,		15
	.EQU	CCP4_C4_CCPXCY14,		14
	.EQU	CCP4_C4_CCPXCY13,		13
	.EQU	CCP4_C4_CCPXCY12,		12
	.EQU	CCP4_C4_CCPXCY11,		11
	.EQU	CCP4_C4_CCPXCY10,		10
	.EQU	CCP4_C4_CCPXCY9,		9
	.EQU	CCP4_C4_CCPXCY8,		8
	.EQU	CCP4_C4_CCPXCY7,		7
	.EQU	CCP4_C4_CCPXCY6,		6
	.EQU	CCP4_C4_CCPXCY5,		5
	.EQU	CCP4_C4_CCPXCY4,		4
	.EQU	CCP4_C4_CCPXCY3,		3
	.EQU	CCP4_C4_CCPXCY2,		2
	.EQU	CCP4_C4_CCPXCY1,		1
	.EQU	CCP4_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP4_SRIC,		0x400002B0
//  0x4000 02B0  CCP4_SRIC   Bits-------------------------------------
	.EQU	CCP4_SRIC_TXIC,		6
	.EQU	CCP4_SRIC_TXUIC,		5
	.EQU	CCP4_SRIC_TXTIC,		4
	.EQU	CCP4_SRIC_CC4IC,		3
	.EQU	CCP4_SRIC_CC3IC,		2
	.EQU	CCP4_SRIC_CC2IC,		1
	.EQU	CCP4_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP4_DF,		0x400002B4
//  0x4000 02B4  CCP4_DF   Bits-------------------------------------
	.EQU	CCP4_DF_TXUDF,		5
	.EQU	CCP4_DF_TXTDF,		4
	.EQU	CCP4_DF_CC4DF,		3
	.EQU	CCP4_DF_CC3DF,		2
	.EQU	CCP4_DF_CC2DF,		1
	.EQU	CCP4_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP4_CTL1,		0x400002C0
//  0x4000 02C0  CCP4_CTL1   Bits-------------------------------------
	.EQU	CCP4_CTL1_CH4M3,		15
	.EQU	CCP4_CTL1_CH4M2,		14
	.EQU	CCP4_CTL1_CH4M1,		13
	.EQU	CCP4_CTL1_CH4M0,		12
	.EQU	CCP4_CTL1_CH3M3,		11
	.EQU	CCP4_CTL1_CH3M2,		10
	.EQU	CCP4_CTL1_CH3M1,		9
	.EQU	CCP4_CTL1_CH3M0,		8
	.EQU	CCP4_CTL1_CH2M3,		7
	.EQU	CCP4_CTL1_CH2M2,		6
	.EQU	CCP4_CTL1_CH2M1,		5
	.EQU	CCP4_CTL1_CH2M0,		4
	.EQU	CCP4_CTL1_CH1M3,		3
	.EQU	CCP4_CTL1_CH1M2,		2
	.EQU	CCP4_CTL1_CH1M1,		1
	.EQU	CCP4_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP4_R1,		0x400002C4
//  0x4000 02C4  CCP4_R1   Bits-------------------------------------
	.EQU	CCP4_R1_CCPXRY15,		15
	.EQU	CCP4_R1_CCPXRY14,		14
	.EQU	CCP4_R1_CCPXRY13,		13
	.EQU	CCP4_R1_CCPXRY12,		12
	.EQU	CCP4_R1_CCPXRY11,		11
	.EQU	CCP4_R1_CCPXRY10,		10
	.EQU	CCP4_R1_CCPXRY9,		9
	.EQU	CCP4_R1_CCPXRY8,		8
	.EQU	CCP4_R1_CCPXRY7,		7
	.EQU	CCP4_R1_CCPXRY6,		6
	.EQU	CCP4_R1_CCPXRY5,		5
	.EQU	CCP4_R1_CCPXRY4,		4
	.EQU	CCP4_R1_CCPXRY3,		3
	.EQU	CCP4_R1_CCPXRY2,		2
	.EQU	CCP4_R1_CCPXRY1,		1
	.EQU	CCP4_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP4_R2,		0x400002C8
//  0x4000 02C8  CCP4_R2   Bits-------------------------------------
	.EQU	CCP4_R2_CCPXRY15,		15
	.EQU	CCP4_R2_CCPXRY14,		14
	.EQU	CCP4_R2_CCPXRY13,		13
	.EQU	CCP4_R2_CCPXRY12,		12
	.EQU	CCP4_R2_CCPXRY11,		11
	.EQU	CCP4_R2_CCPXRY10,		10
	.EQU	CCP4_R2_CCPXRY9,		9
	.EQU	CCP4_R2_CCPXRY8,		8
	.EQU	CCP4_R2_CCPXRY7,		7
	.EQU	CCP4_R2_CCPXRY6,		6
	.EQU	CCP4_R2_CCPXRY5,		5
	.EQU	CCP4_R2_CCPXRY4,		4
	.EQU	CCP4_R2_CCPXRY3,		3
	.EQU	CCP4_R2_CCPXRY2,		2
	.EQU	CCP4_R2_CCPXRY1,		1
	.EQU	CCP4_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP4_R3,		0x400002CC
//  0x4000 02CC  CCP4_R3   Bits-------------------------------------
	.EQU	CCP4_R3_CCPXRY15,		15
	.EQU	CCP4_R3_CCPXRY14,		14
	.EQU	CCP4_R3_CCPXRY13,		13
	.EQU	CCP4_R3_CCPXRY12,		12
	.EQU	CCP4_R3_CCPXRY11,		11
	.EQU	CCP4_R3_CCPXRY10,		10
	.EQU	CCP4_R3_CCPXRY9,		9
	.EQU	CCP4_R3_CCPXRY8,		8
	.EQU	CCP4_R3_CCPXRY7,		7
	.EQU	CCP4_R3_CCPXRY6,		6
	.EQU	CCP4_R3_CCPXRY5,		5
	.EQU	CCP4_R3_CCPXRY4,		4
	.EQU	CCP4_R3_CCPXRY3,		3
	.EQU	CCP4_R3_CCPXRY2,		2
	.EQU	CCP4_R3_CCPXRY1,		1
	.EQU	CCP4_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP4_R4,		0x400002D0
//  0x4000 02D0  CCP4_R4   Bits-------------------------------------
	.EQU	CCP4_R4_CCPXRY15,		15
	.EQU	CCP4_R4_CCPXRY14,		14
	.EQU	CCP4_R4_CCPXRY13,		13
	.EQU	CCP4_R4_CCPXRY12,		12
	.EQU	CCP4_R4_CCPXRY11,		11
	.EQU	CCP4_R4_CCPXRY10,		10
	.EQU	CCP4_R4_CCPXRY9,		9
	.EQU	CCP4_R4_CCPXRY8,		8
	.EQU	CCP4_R4_CCPXRY7,		7
	.EQU	CCP4_R4_CCPXRY6,		6
	.EQU	CCP4_R4_CCPXRY5,		5
	.EQU	CCP4_R4_CCPXRY4,		4
	.EQU	CCP4_R4_CCPXRY3,		3
	.EQU	CCP4_R4_CCPXRY2,		2
	.EQU	CCP4_R4_CCPXRY1,		1
	.EQU	CCP4_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP4_CTL2,		0x400002D4
//  0x4000 02D4  CCP4_CTL2   Bits-------------------------------------
	.EQU	CCP4_CTL2_PXOC4CE,		15
	.EQU	CCP4_CTL2_PXOC3CE,		14
	.EQU	CCP4_CTL2_PXOC2CE,		13
	.EQU	CCP4_CTL2_PXOC1CE,		12
	.EQU	CCP4_CTL2_PXASS1,		11
	.EQU	CCP4_CTL2_PXASS0,		10
	.EQU	CCP4_CTL2_TCKSEL1,		9
	.EQU	CCP4_CTL2_TCKSEL0,		8
	.EQU	CCP4_CTL2_PXOC4_1,		7
	.EQU	CCP4_CTL2_PXOC4_0,		6
	.EQU	CCP4_CTL2_PXOC3_1,		5
	.EQU	CCP4_CTL2_PXOC3_0,		4
	.EQU	CCP4_CTL2_PXOC2_1,		3
	.EQU	CCP4_CTL2_PXOC2_0,		2
	.EQU	CCP4_CTL2_PXOC1_1,		1
	.EQU	CCP4_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP4_CTL3,		0x400002D8
//  0x4000 02D8  CCP4_CTL3   Bits-------------------------------------
	.EQU	CCP4_CTL3_PXSPMST,		15
	.EQU	CCP4_CTL3_PXPWMI,		14
	.EQU	CCP4_CTL3_PXXORM,		13
	.EQU	CCP4_CTL3_PXSPM,		12
	.EQU	CCP4_CTL3_TXTDE,		11
	.EQU	CCP4_CTL3_CC4DE,		10
	.EQU	CCP4_CTL3_CC3DE,		9
	.EQU	CCP4_CTL3_CC2DE,		8
	.EQU	CCP4_CTL3_CC1DE,		7
	.EQU	CCP4_CTL3_TXUDE,		6
	.EQU	CCP4_CTL3_TXUIE,		5
	.EQU	CCP4_CTL3_TXTIE,		4
	.EQU	CCP4_CTL3_CC4IE,		3
	.EQU	CCP4_CTL3_CC3IE,		2
	.EQU	CCP4_CTL3_CC2IE,		1
	.EQU	CCP4_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP4_EGIF,		0x400002DC
//  0x4000 02DC  CCP4_EGIF   Bits-------------------------------------
	.EQU	CCP4_EGIF_POSSEL,		13
	.EQU	CCP4_EGIF_PXSEL,		12
	.EQU	CCP4_EGIF_TXUIF,		11
	.EQU	CCP4_EGIF_TXTIF,		10
	.EQU	CCP4_EGIF_CC4IF,		9
	.EQU	CCP4_EGIF_CC3IF,		8
	.EQU	CCP4_EGIF_CC2IF,		7
	.EQU	CCP4_EGIF_CC1IF,		6
	.EQU	CCP4_EGIF_TXTRG,		5
	.EQU	CCP4_EGIF_CC4G,		4
	.EQU	CCP4_EGIF_CC3G,		3
	.EQU	CCP4_EGIF_CC2G,		2
	.EQU	CCP4_EGIF_CC1G,		1
	.EQU	CCP4_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	T5_CNT,			0x40000300
//  0x4000 0300  T5_CNT   Bits-------------------------------------
	.EQU	T5_CNT_TXCNT15,		15
	.EQU	T5_CNT_TXCNT14,		14
	.EQU	T5_CNT_TXCNT13,		13
	.EQU	T5_CNT_TXCNT12,		12
	.EQU	T5_CNT_TXCNT11,		11
	.EQU	T5_CNT_TXCNT10,		10
	.EQU	T5_CNT_TXCNT9,		9
	.EQU	T5_CNT_TXCNT8,		8
	.EQU	T5_CNT_TXCNT7,		7
	.EQU	T5_CNT_TXCNT6,		6
	.EQU	T5_CNT_TXCNT5,		5
	.EQU	T5_CNT_TXCNT4,		4
	.EQU	T5_CNT_TXCNT3,		3
	.EQU	T5_CNT_TXCNT2,		2
	.EQU	T5_CNT_TXCNT1,		1
	.EQU	T5_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T6_CNT,			0x40000304
//  0x4000 0304  T6_CNT   Bits-------------------------------------
	.EQU	T6_CNT_TZCNT15,		15
	.EQU	T6_CNT_TZCNT14,		14
	.EQU	T6_CNT_TZCNT13,		13
	.EQU	T6_CNT_TZCNT12,		12
	.EQU	T6_CNT_TZCNT11,		11
	.EQU	T6_CNT_TZCNT10,		10
	.EQU	T6_CNT_TZCNT9,		9
	.EQU	T6_CNT_TZCNT8,		8
	.EQU	T6_CNT_TZCNT7,		7
	.EQU	T6_CNT_TZCNT6,		6
	.EQU	T6_CNT_TZCNT5,		5
	.EQU	T6_CNT_TZCNT4,		4
	.EQU	T6_CNT_TZCNT3,		3
	.EQU	T6_CNT_TZCNT2,		2
	.EQU	T6_CNT_TZCNT1,		1
	.EQU	T6_CNT_TZCNT0,		0
//  register-------------------------------------
	.EQU	T5_PPX,			0x40000308
//  0x4000 0308  T5_PPX   Bits-------------------------------------
	.EQU	T5_PPX_PPX15,		15
	.EQU	T5_PPX_PPX14,		14
	.EQU	T5_PPX_PPX13,		13
	.EQU	T5_PPX_PPX12,		12
	.EQU	T5_PPX_PPX11,		11
	.EQU	T5_PPX_PPX10,		10
	.EQU	T5_PPX_PPX9,		9
	.EQU	T5_PPX_PPX8,		8
	.EQU	T5_PPX_PPX7,		7
	.EQU	T5_PPX_PPX6,		6
	.EQU	T5_PPX_PPX5,		5
	.EQU	T5_PPX_PPX4,		4
	.EQU	T5_PPX_PPX3,		3
	.EQU	T5_PPX_PPX2,		2
	.EQU	T5_PPX_PPX1,		1
	.EQU	T5_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T6_PPZ,			0x4000030C
//  0x4000 030C  T6_PPZ   Bits-------------------------------------
	.EQU	T6_PPZ_PPZ15,		15
	.EQU	T6_PPZ_PPZ14,		14
	.EQU	T6_PPZ_PPZ13,		13
	.EQU	T6_PPZ_PPZ12,		12
	.EQU	T6_PPZ_PPZ11,		11
	.EQU	T6_PPZ_PPZ10,		10
	.EQU	T6_PPZ_PPZ9,		9
	.EQU	T6_PPZ_PPZ8,		8
	.EQU	T6_PPZ_PPZ7,		7
	.EQU	T6_PPZ_PPZ6,		6
	.EQU	T6_PPZ_PPZ5,		5
	.EQU	T6_PPZ_PPZ4,		4
	.EQU	T6_PPZ_PPZ3,		3
	.EQU	T6_PPZ_PPZ2,		2
	.EQU	T6_PPZ_PPZ1,		1
	.EQU	T6_PPZ_PPZ0,		0
//  register-------------------------------------
	.EQU	T5_PRSC,		0x40000310
//  0x4000 0310  T5_PRSC   Bits-------------------------------------
	.EQU	T5_PRSC_TXCKS15,		15
	.EQU	T5_PRSC_TXCKS14,		14
	.EQU	T5_PRSC_TXCKS13,		13
	.EQU	T5_PRSC_TXCKS12,		12
	.EQU	T5_PRSC_TXCKS11,		11
	.EQU	T5_PRSC_TXCKS10,		10
	.EQU	T5_PRSC_TXCKS9,		9
	.EQU	T5_PRSC_TXCKS8,		8
	.EQU	T5_PRSC_TXCKS7,		7
	.EQU	T5_PRSC_TXCKS6,		6
	.EQU	T5_PRSC_TXCKS5,		5
	.EQU	T5_PRSC_TXCKS4,		4
	.EQU	T5_PRSC_TXCKS3,		3
	.EQU	T5_PRSC_TXCKS2,		2
	.EQU	T5_PRSC_TXCKS1,		1
	.EQU	T5_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T6_PRSC,		0x40000314
//  0x4000 0314  T6_PRSC   Bits-------------------------------------
	.EQU	T6_PRSC_TZCKS15,		15
	.EQU	T6_PRSC_TZCKS14,		14
	.EQU	T6_PRSC_TZCKS13,		13
	.EQU	T6_PRSC_TZCKS12,		12
	.EQU	T6_PRSC_TZCKS11,		11
	.EQU	T6_PRSC_TZCKS10,		10
	.EQU	T6_PRSC_TZCKS9,		9
	.EQU	T6_PRSC_TZCKS8,		8
	.EQU	T6_PRSC_TZCKS7,		7
	.EQU	T6_PRSC_TZCKS6,		6
	.EQU	T6_PRSC_TZCKS5,		5
	.EQU	T6_PRSC_TZCKS4,		4
	.EQU	T6_PRSC_TZCKS3,		3
	.EQU	T6_PRSC_TZCKS2,		2
	.EQU	T6_PRSC_TZCKS1,		1
	.EQU	T6_PRSC_TZCKS0,		0
//  register-------------------------------------
	.EQU	T5_CCR0,		0x40000318
//  0x4000 0318  T5_CCR0   Bits-------------------------------------
	.EQU	T5_CCR0_TXCCR0_15,		15
	.EQU	T5_CCR0_TXCCR0_14,		14
	.EQU	T5_CCR0_TXCCR0_13,		13
	.EQU	T5_CCR0_TXCCR0_12,		12
	.EQU	T5_CCR0_TXCCR0_11,		11
	.EQU	T5_CCR0_TXCCR0_10,		10
	.EQU	T5_CCR0_TXCCR0_9,		9
	.EQU	T5_CCR0_TXCCR0_8,		8
	.EQU	T5_CCR0_TXCCR0_7,		7
	.EQU	T5_CCR0_TXCCR0_6,		6
	.EQU	T5_CCR0_TXCCR0_5,		5
	.EQU	T5_CCR0_TXCCR0_4,		4
	.EQU	T5_CCR0_TXCCR0_3,		3
	.EQU	T5_CCR0_TXCCR0_2,		2
	.EQU	T5_CCR0_TXCCR0_1,		1
	.EQU	T5_CCR0_TXCCR0_0,		0
//  register-------------------------------------
	.EQU	T5_CCR1,		0x4000031C
//  0x4000 031C  T5_CCR1   Bits-------------------------------------
	.EQU	T5_CCR1_TXCCR1_15,		15
	.EQU	T5_CCR1_TXCCR1_14,		14
	.EQU	T5_CCR1_TXCCR1_13,		13
	.EQU	T5_CCR1_TXCCR1_12,		12
	.EQU	T5_CCR1_TXCCR1_11,		11
	.EQU	T5_CCR1_TXCCR1_10,		10
	.EQU	T5_CCR1_TXCCR1_9,		9
	.EQU	T5_CCR1_TXCCR1_8,		8
	.EQU	T5_CCR1_TXCCR1_7,		7
	.EQU	T5_CCR1_TXCCR1_6,		6
	.EQU	T5_CCR1_TXCCR1_5,		5
	.EQU	T5_CCR1_TXCCR1_4,		4
	.EQU	T5_CCR1_TXCCR1_3,		3
	.EQU	T5_CCR1_TXCCR1_2,		2
	.EQU	T5_CCR1_TXCCR1_1,		1
	.EQU	T5_CCR1_TXCCR1_0,		0
//  register-------------------------------------
	.EQU	T6_CCR0,		0x40000320
//  0x4000 0320  T6_CCR0   Bits-------------------------------------
	.EQU	T6_CCR0_TZCCR0_15,		15
	.EQU	T6_CCR0_TZCCR0_14,		14
	.EQU	T6_CCR0_TZCCR0_13,		13
	.EQU	T6_CCR0_TZCCR0_12,		12
	.EQU	T6_CCR0_TZCCR0_11,		11
	.EQU	T6_CCR0_TZCCR0_10,		10
	.EQU	T6_CCR0_TZCCR0_9,		9
	.EQU	T6_CCR0_TZCCR0_8,		8
	.EQU	T6_CCR0_TZCCR0_7,		7
	.EQU	T6_CCR0_TZCCR0_6,		6
	.EQU	T6_CCR0_TZCCR0_5,		5
	.EQU	T6_CCR0_TZCCR0_4,		4
	.EQU	T6_CCR0_TZCCR0_3,		3
	.EQU	T6_CCR0_TZCCR0_2,		2
	.EQU	T6_CCR0_TZCCR0_1,		1
	.EQU	T6_CCR0_TZCCR0_0,		0
//  register-------------------------------------
	.EQU	T5_CTL,			0x40000324
//  0x4000 0324  T5_CTL   Bits-------------------------------------
	.EQU	T5_CTL_TXCMS2,		15
	.EQU	T5_CTL_TXCMS1,		14
	.EQU	T5_CTL_TXCMS0,		13
	.EQU	T5_CTL_TXOFS1,		12
	.EQU	T5_CTL_TXOFS0,		11
	.EQU	T5_CTL_TXADAUTO,		10
	.EQU	T5_CTL_TXCLK1,		9
	.EQU	T5_CTL_TXCLK0,		8
	.EQU	T5_CTL_TXDIR,		7
	.EQU	T5_CTL_TXCKBS3,		6
	.EQU	T5_CTL_TXCKBS2,		5
	.EQU	T5_CTL_TXCKBS1,		4
	.EQU	T5_CTL_TXCKBS0,		3
	.EQU	T5_CTL_TXEN,		2
	.EQU	T5_CTL_TXSY,		1
	.EQU	T5_CTL_TXCS,		0
//  register-------------------------------------
	.EQU	T6_CTL,			0x40000328
//  0x4000 0328  T6_CTL   Bits-------------------------------------
	.EQU	T6_CTL_TZCMS2,		15
	.EQU	T6_CTL_TZCMS1,		14
	.EQU	T6_CTL_TZCMS0,		13
	.EQU	T6_CTL_TZOFS1,		12
	.EQU	T6_CTL_TZOFS0,		11
	.EQU	T6_CTL_TZADAUTO,		10
	.EQU	T6_CTL_TZCLK1,		9
	.EQU	T6_CTL_TZCLK0,		8
	.EQU	T6_CTL_TZDIR,		7
	.EQU	T6_CTL_TZCKBS3,		6
	.EQU	T6_CTL_TZCKBS2,		5
	.EQU	T6_CTL_TZCKBS1,		4
	.EQU	T6_CTL_TZCKBS0,		3
	.EQU	T6_CTL_TZEN,		2
	.EQU	T6_CTL_TZSY,		1
	.EQU	T6_CTL_TZCS,		0
//  register-------------------------------------
	.EQU	ECCP5_PDCTL,	0x4000032C
//  0x4000 032C  ECCP5_PDCTL   Bits-------------------------------------
	.EQU	ECCP5_PDCTL_CPD2,		14
	.EQU	ECCP5_PDCTL_CPD1,		13
	.EQU	ECCP5_PDCTL_CPD0,		12
	.EQU	ECCP5_PDCTL_RDA2,		10
	.EQU	ECCP5_PDCTL_RDA1,		9
	.EQU	ECCP5_PDCTL_RDA0,		8
	.EQU	ECCP5_PDCTL_SMPEN,		7
	.EQU	ECCP5_PDCTL_TI2EN,		5
	.EQU	ECCP5_PDCTL_TI1EN,		4
	.EQU	ECCP5_PDCTL_TI0EN,		3
	.EQU	ECCP5_PDCTL_CMPE,		2
	.EQU	ECCP5_PDCTL_CPE1,		1
	.EQU	ECCP5_PDCTL_CPE0,		0
//  register-------------------------------------
	.EQU	ECCP5_PXASCTL,	0x40000330
//  0x4000 0330  ECCP5_PXASCTL   Bits-------------------------------------
	.EQU	ECCP5_PXASCTL_TZBKINS,		5
	.EQU	ECCP5_PXASCTL_TXBKINS,		4
	.EQU	ECCP5_PXASCTL_TZPXPASS1,		3
	.EQU	ECCP5_PXASCTL_TZPXPASS0,		2
	.EQU	ECCP5_PXASCTL_TXPXPASS1,		1
	.EQU	ECCP5_PXASCTL_TXPXPASS0,		0
//  register-------------------------------------
	.EQU	T5_CCTCTL,		0x40000334
//  0x4000 0334  T5_CCTCTL   Bits-------------------------------------
	.EQU	T5_CCTCTL_TXCKSEL1,		13
	.EQU	T5_CCTCTL_TXCKSEL0,		12
	.EQU	T5_CCTCTL_CCTSEL1,		3
	.EQU	T5_CCTCTL_CCTSEL0,		2
	.EQU	T5_CCTCTL_CRSET,		1
	.EQU	T5_CCTCTL_CCTEN,		0
//  register-------------------------------------
	.EQU	T6_CCTCTL,		0x40000338
//  0x4000 0338  T6_CCTCTL   Bits-------------------------------------
	.EQU	T6_CCTCTL_TZCKSEL1,		13
	.EQU	T6_CCTCTL_TZCKSEL0,		12
	.EQU	T6_CCTCTL_CCTSEL1,		3
	.EQU	T6_CCTCTL_CCTSEL0,		2
	.EQU	T6_CCTCTL_CRSET,		1
	.EQU	T6_CCTCTL_CCTEN,		0
//  register-------------------------------------
	.EQU	ECCP5_COMH1,	0x40000340
//  0x4000 0340  ECCP5_COMH1   Bits-------------------------------------
	.EQU	ECCP5_COMH1_COMH15,		15
	.EQU	ECCP5_COMH1_COMH14,		14
	.EQU	ECCP5_COMH1_COMH13,		13
	.EQU	ECCP5_COMH1_COMH12,		12
	.EQU	ECCP5_COMH1_COMH11,		11
	.EQU	ECCP5_COMH1_COMH10,		10
	.EQU	ECCP5_COMH1_COMH9,		9
	.EQU	ECCP5_COMH1_COMH8,		8
	.EQU	ECCP5_COMH1_COMH7,		7
	.EQU	ECCP5_COMH1_COMH6,		6
	.EQU	ECCP5_COMH1_COMH5,		5
	.EQU	ECCP5_COMH1_COMH4,		4
	.EQU	ECCP5_COMH1_COMH3,		3
	.EQU	ECCP5_COMH1_COMH2,		2
	.EQU	ECCP5_COMH1_COMH1,		1
	.EQU	ECCP5_COMH1_COMH0,		0
//  register-------------------------------------
	.EQU	ECCP5_COMH2,	0x40000350
//  0x4000 0350  ECCP5_COMH2   Bits-------------------------------------
	.EQU	ECCP5_COMH2_COMH15,		15
	.EQU	ECCP5_COMH2_COMH14,		14
	.EQU	ECCP5_COMH2_COMH13,		13
	.EQU	ECCP5_COMH2_COMH12,		12
	.EQU	ECCP5_COMH2_COMH11,		11
	.EQU	ECCP5_COMH2_COMH10,		10
	.EQU	ECCP5_COMH2_COMH9,		9
	.EQU	ECCP5_COMH2_COMH8,		8
	.EQU	ECCP5_COMH2_COMH7,		7
	.EQU	ECCP5_COMH2_COMH6,		6
	.EQU	ECCP5_COMH2_COMH5,		5
	.EQU	ECCP5_COMH2_COMH4,		4
	.EQU	ECCP5_COMH2_COMH3,		3
	.EQU	ECCP5_COMH2_COMH2,		2
	.EQU	ECCP5_COMH2_COMH1,		1
	.EQU	ECCP5_COMH2_COMH0,		0
//  register-------------------------------------
	.EQU	ECCP5_COMH3,	0x40000360
//  0x4000 0360  ECCP5_COMH3   Bits-------------------------------------
	.EQU	ECCP5_COMH3_COMH15,		15
	.EQU	ECCP5_COMH3_COMH14,		14
	.EQU	ECCP5_COMH3_COMH13,		13
	.EQU	ECCP5_COMH3_COMH12,		12
	.EQU	ECCP5_COMH3_COMH11,		11
	.EQU	ECCP5_COMH3_COMH10,		10
	.EQU	ECCP5_COMH3_COMH9,		9
	.EQU	ECCP5_COMH3_COMH8,		8
	.EQU	ECCP5_COMH3_COMH7,		7
	.EQU	ECCP5_COMH3_COMH6,		6
	.EQU	ECCP5_COMH3_COMH5,		5
	.EQU	ECCP5_COMH3_COMH4,		4
	.EQU	ECCP5_COMH3_COMH3,		3
	.EQU	ECCP5_COMH3_COMH2,		2
	.EQU	ECCP5_COMH3_COMH1,		1
	.EQU	ECCP5_COMH3_COMH0,		0
//  register-------------------------------------
	.EQU	ECCP5_COMH4,	0x40000370
//  0x4000 0370  ECCP5_COMH4   Bits-------------------------------------
	.EQU	ECCP5_COMH4_COMH15,		15
	.EQU	ECCP5_COMH4_COMH14,		14
	.EQU	ECCP5_COMH4_COMH13,		13
	.EQU	ECCP5_COMH4_COMH12,		12
	.EQU	ECCP5_COMH4_COMH11,		11
	.EQU	ECCP5_COMH4_COMH10,		10
	.EQU	ECCP5_COMH4_COMH9,		9
	.EQU	ECCP5_COMH4_COMH8,		8
	.EQU	ECCP5_COMH4_COMH7,		7
	.EQU	ECCP5_COMH4_COMH6,		6
	.EQU	ECCP5_COMH4_COMH5,		5
	.EQU	ECCP5_COMH4_COMH4,		4
	.EQU	ECCP5_COMH4_COMH3,		3
	.EQU	ECCP5_COMH4_COMH2,		2
	.EQU	ECCP5_COMH4_COMH1,		1
	.EQU	ECCP5_COMH4_COMH0,		0
//  register-------------------------------------
	.EQU	ECCP5_COML1,	0x40000344
//  0x4000 0344  ECCP5_COML1   Bits-------------------------------------
	.EQU	ECCP5_COML1_COML15,		15
	.EQU	ECCP5_COML1_COML14,		14
	.EQU	ECCP5_COML1_COML13,		13
	.EQU	ECCP5_COML1_COML12,		12
	.EQU	ECCP5_COML1_COML11,		11
	.EQU	ECCP5_COML1_COML10,		10
	.EQU	ECCP5_COML1_COML9,		9
	.EQU	ECCP5_COML1_COML8,		8
	.EQU	ECCP5_COML1_COML7,		7
	.EQU	ECCP5_COML1_COML6,		6
	.EQU	ECCP5_COML1_COML5,		5
	.EQU	ECCP5_COML1_COML4,		4
	.EQU	ECCP5_COML1_COML3,		3
	.EQU	ECCP5_COML1_COML2,		2
	.EQU	ECCP5_COML1_COML1,		1
	.EQU	ECCP5_COML1_COML0,		0
//  register-------------------------------------
	.EQU	ECCP5_COML2,	0x40000354
//  0x4000 0354  ECCP5_COML2   Bits-------------------------------------
	.EQU	ECCP5_COML2_COML15,		15
	.EQU	ECCP5_COML2_COML14,		14
	.EQU	ECCP5_COML2_COML13,		13
	.EQU	ECCP5_COML2_COML12,		12
	.EQU	ECCP5_COML2_COML11,		11
	.EQU	ECCP5_COML2_COML10,		10
	.EQU	ECCP5_COML2_COML9,		9
	.EQU	ECCP5_COML2_COML8,		8
	.EQU	ECCP5_COML2_COML7,		7
	.EQU	ECCP5_COML2_COML6,		6
	.EQU	ECCP5_COML2_COML5,		5
	.EQU	ECCP5_COML2_COML4,		4
	.EQU	ECCP5_COML2_COML3,		3
	.EQU	ECCP5_COML2_COML2,		2
	.EQU	ECCP5_COML2_COML1,		1
	.EQU	ECCP5_COML2_COML0,		0
//  register-------------------------------------
	.EQU	ECCP5_COML3,	0x40000364
//  0x4000 0364  ECCP5_COML3   Bits-------------------------------------
	.EQU	ECCP5_COML3_COML15,		15
	.EQU	ECCP5_COML3_COML14,		14
	.EQU	ECCP5_COML3_COML13,		13
	.EQU	ECCP5_COML3_COML12,		12
	.EQU	ECCP5_COML3_COML11,		11
	.EQU	ECCP5_COML3_COML10,		10
	.EQU	ECCP5_COML3_COML9,		9
	.EQU	ECCP5_COML3_COML8,		8
	.EQU	ECCP5_COML3_COML7,		7
	.EQU	ECCP5_COML3_COML6,		6
	.EQU	ECCP5_COML3_COML5,		5
	.EQU	ECCP5_COML3_COML4,		4
	.EQU	ECCP5_COML3_COML3,		3
	.EQU	ECCP5_COML3_COML2,		2
	.EQU	ECCP5_COML3_COML1,		1
	.EQU	ECCP5_COML3_COML0,		0
//  register-------------------------------------
	.EQU	ECCP5_COML4,	0x40000374
//  0x4000 0374  ECCP5_COML4   Bits-------------------------------------
	.EQU	ECCP5_COML4_COML15,		15
	.EQU	ECCP5_COML4_COML14,		14
	.EQU	ECCP5_COML4_COML13,		13
	.EQU	ECCP5_COML4_COML12,		12
	.EQU	ECCP5_COML4_COML11,		11
	.EQU	ECCP5_COML4_COML10,		10
	.EQU	ECCP5_COML4_COML9,		9
	.EQU	ECCP5_COML4_COML8,		8
	.EQU	ECCP5_COML4_COML7,		7
	.EQU	ECCP5_COML4_COML6,		6
	.EQU	ECCP5_COML4_COML5,		5
	.EQU	ECCP5_COML4_COML4,		4
	.EQU	ECCP5_COML4_COML3,		3
	.EQU	ECCP5_COML4_COML2,		2
	.EQU	ECCP5_COML4_COML1,		1
	.EQU	ECCP5_COML4_COML0,		0
//  register-------------------------------------
	.EQU	ECCP5_FAUCTL1,	0x40000348
//  0x4000 0348  ECCP5_FAUCTL1   Bits-------------------------------------
	.EQU	ECCP5_FAUCTL1_TRST,		14
	.EQU	ECCP5_FAUCTL1_FINV1,		13
	.EQU	ECCP5_FAUCTL1_FINV0,		12
	.EQU	ECCP5_FAUCTL1_FVAL2,		11
	.EQU	ECCP5_FAUCTL1_FVAL1,		10
	.EQU	ECCP5_FAUCTL1_FVAL0,		9
	.EQU	ECCP5_FAUCTL1_FAUIF,		8
	.EQU	ECCP5_FAUCTL1_FAUIC,		7
	.EQU	ECCP5_FAUCTL1_FAUIE,		6
	.EQU	ECCP5_FAUCTL1_FLTEN,		5
	.EQU	ECCP5_FAUCTL1_FLTP3,		4
	.EQU	ECCP5_FAUCTL1_FLTP2,		3
	.EQU	ECCP5_FAUCTL1_FLTP1,		2
	.EQU	ECCP5_FAUCTL1_FLTP0,		1
	.EQU	ECCP5_FAUCTL1_FAUEN,		0
//  register-------------------------------------
	.EQU	ECCP5_FAUCTL2,	0x40000358
//  0x4000 0358  ECCP5_FAUCTL2   Bits-------------------------------------
	.EQU	ECCP5_FAUCTL2_TRST,		14
	.EQU	ECCP5_FAUCTL2_FINV1,		13
	.EQU	ECCP5_FAUCTL2_FINV0,		12
	.EQU	ECCP5_FAUCTL2_FVAL2,		11
	.EQU	ECCP5_FAUCTL2_FVAL1,		10
	.EQU	ECCP5_FAUCTL2_FVAL0,		9
	.EQU	ECCP5_FAUCTL2_FAUIF,		8
	.EQU	ECCP5_FAUCTL2_FAUIC,		7
	.EQU	ECCP5_FAUCTL2_FAUIE,		6
	.EQU	ECCP5_FAUCTL2_FLTEN,		5
	.EQU	ECCP5_FAUCTL2_FLTP3,		4
	.EQU	ECCP5_FAUCTL2_FLTP2,		3
	.EQU	ECCP5_FAUCTL2_FLTP1,		2
	.EQU	ECCP5_FAUCTL2_FLTP0,		1
	.EQU	ECCP5_FAUCTL2_FAUEN,		0
//  register-------------------------------------
	.EQU	ECCP5_FAUCTL3,	0x40000368
//  0x4000 0368  ECCP5_FAUCTL3   Bits-------------------------------------
	.EQU	ECCP5_FAUCTL3_TRST,		14
	.EQU	ECCP5_FAUCTL3_FINV1,		13
	.EQU	ECCP5_FAUCTL3_FINV0,		12
	.EQU	ECCP5_FAUCTL3_FVAL2,		11
	.EQU	ECCP5_FAUCTL3_FVAL1,		10
	.EQU	ECCP5_FAUCTL3_FVAL0,		9
	.EQU	ECCP5_FAUCTL3_FAUIF,		8
	.EQU	ECCP5_FAUCTL3_FAUIC,		7
	.EQU	ECCP5_FAUCTL3_FAUIE,		6
	.EQU	ECCP5_FAUCTL3_FLTEN,		5
	.EQU	ECCP5_FAUCTL3_FLTP3,		4
	.EQU	ECCP5_FAUCTL3_FLTP2,		3
	.EQU	ECCP5_FAUCTL3_FLTP1,		2
	.EQU	ECCP5_FAUCTL3_FLTP0,		1
	.EQU	ECCP5_FAUCTL3_FAUEN,		0
//  register-------------------------------------
	.EQU	ECCP5_FAUCTL4,	0x40000378
//  0x4000 0378  ECCP5_FAUCTL4   Bits-------------------------------------
	.EQU	ECCP5_FAUCTL4_TRST,		14
	.EQU	ECCP5_FAUCTL4_FINV1,		13
	.EQU	ECCP5_FAUCTL4_FINV0,		12
	.EQU	ECCP5_FAUCTL4_FVAL2,		11
	.EQU	ECCP5_FAUCTL4_FVAL1,		10
	.EQU	ECCP5_FAUCTL4_FVAL0,		9
	.EQU	ECCP5_FAUCTL4_FAUIF,		8
	.EQU	ECCP5_FAUCTL4_FAUIC,		7
	.EQU	ECCP5_FAUCTL4_FAUIE,		6
	.EQU	ECCP5_FAUCTL4_FLTEN,		5
	.EQU	ECCP5_FAUCTL4_FLTP3,		4
	.EQU	ECCP5_FAUCTL4_FLTP2,		3
	.EQU	ECCP5_FAUCTL4_FLTP1,		2
	.EQU	ECCP5_FAUCTL4_FLTP0,		1
	.EQU	ECCP5_FAUCTL4_FAUEN,		0
//  register-------------------------------------
	.EQU	ECCP5_DITCTL,	0x4000034C
//  0x4000 034C  ECCP5_DITCTL   Bits-------------------------------------
	.EQU	ECCP5_DITCTL_DCOMEN,		7
	.EQU	ECCP5_DITCTL_DPEEN,		6
	.EQU	ECCP5_DITCTL_DEDEN,		5
	.EQU	ECCP5_DITCTL_FRCVAL4,		4
	.EQU	ECCP5_DITCTL_FRCVAL3,		3
	.EQU	ECCP5_DITCTL_FRCVAL2,		2
	.EQU	ECCP5_DITCTL_FRCVAL1,		1
	.EQU	ECCP5_DITCTL_FRCVAL0,		0
//  register-------------------------------------
	.EQU	ECCP5_CCRCTL,	0x4000035C
//  0x4000 035C  ECCP5_CCRCTL   Bits-------------------------------------
	.EQU	ECCP5_CCRCTL_TZCCR0SEL,		5
	.EQU	ECCP5_CCRCTL_TXCCR1SEL,		4
	.EQU	ECCP5_CCRCTL_TXCCR0SEL,		3
	.EQU	ECCP5_CCRCTL_TZCCR0SEN,		2
	.EQU	ECCP5_CCRCTL_TXCCR1SEN,		1
	.EQU	ECCP5_CCRCTL_TXCCR0SEN,		0
//  register-------------------------------------
	.EQU	ECCP5_CTL1,	0x40000380
//  0x4000 0380  ECCP5_CTL1   Bits-------------------------------------
	.EQU	ECCP5_CTL1_CH4M3,		15
	.EQU	ECCP5_CTL1_CH4M2,		14
	.EQU	ECCP5_CTL1_CH4M1,		13
	.EQU	ECCP5_CTL1_CH4M0,		12
	.EQU	ECCP5_CTL1_CH3M3,		11
	.EQU	ECCP5_CTL1_CH3M2,		10
	.EQU	ECCP5_CTL1_CH3M1,		9
	.EQU	ECCP5_CTL1_CH3M0,		8
	.EQU	ECCP5_CTL1_CH2M3,		7
	.EQU	ECCP5_CTL1_CH2M2,		6
	.EQU	ECCP5_CTL1_CH2M1,		5
	.EQU	ECCP5_CTL1_CH2M0,		4
	.EQU	ECCP5_CTL1_CH1M3,		3
	.EQU	ECCP5_CTL1_CH1M2,		2
	.EQU	ECCP5_CTL1_CH1M1,		1
	.EQU	ECCP5_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	ECCP5_R1,		0x40000384
//  0x4000 0384  ECCP5_R1   Bits-------------------------------------
	.EQU	ECCP5_R1_ECCPXRY15,		15
	.EQU	ECCP5_R1_ECCPXRY14,		14
	.EQU	ECCP5_R1_ECCPXRY13,		13
	.EQU	ECCP5_R1_ECCPXRY12,		12
	.EQU	ECCP5_R1_ECCPXRY11,		11
	.EQU	ECCP5_R1_ECCPXRY10,		10
	.EQU	ECCP5_R1_ECCPXRY9,		9
	.EQU	ECCP5_R1_ECCPXRY8,		8
	.EQU	ECCP5_R1_ECCPXRY7,		7
	.EQU	ECCP5_R1_ECCPXRY6,		6
	.EQU	ECCP5_R1_ECCPXRY5,		5
	.EQU	ECCP5_R1_ECCPXRY4,		4
	.EQU	ECCP5_R1_ECCPXRY3,		3
	.EQU	ECCP5_R1_ECCPXRY2,		2
	.EQU	ECCP5_R1_ECCPXRY1,		1
	.EQU	ECCP5_R1_ECCPXRY0,		0
//  register-------------------------------------
	.EQU	ECCP5_R2,		0x40000388
//  0x4000 0388  ECCP5_R2   Bits-------------------------------------
	.EQU	ECCP5_R2_ECCPXRY15,		15
	.EQU	ECCP5_R2_ECCPXRY14,		14
	.EQU	ECCP5_R2_ECCPXRY13,		13
	.EQU	ECCP5_R2_ECCPXRY12,		12
	.EQU	ECCP5_R2_ECCPXRY11,		11
	.EQU	ECCP5_R2_ECCPXRY10,		10
	.EQU	ECCP5_R2_ECCPXRY9,		9
	.EQU	ECCP5_R2_ECCPXRY8,		8
	.EQU	ECCP5_R2_ECCPXRY7,		7
	.EQU	ECCP5_R2_ECCPXRY6,		6
	.EQU	ECCP5_R2_ECCPXRY5,		5
	.EQU	ECCP5_R2_ECCPXRY4,		4
	.EQU	ECCP5_R2_ECCPXRY3,		3
	.EQU	ECCP5_R2_ECCPXRY2,		2
	.EQU	ECCP5_R2_ECCPXRY1,		1
	.EQU	ECCP5_R2_ECCPXRY0,		0
//  register-------------------------------------
	.EQU	ECCP5_R3,		0x4000038C
//  0x4000 038C  ECCP5_R3   Bits-------------------------------------
	.EQU	ECCP5_R3_ECCPXRY15,		15
	.EQU	ECCP5_R3_ECCPXRY14,		14
	.EQU	ECCP5_R3_ECCPXRY13,		13
	.EQU	ECCP5_R3_ECCPXRY12,		12
	.EQU	ECCP5_R3_ECCPXRY11,		11
	.EQU	ECCP5_R3_ECCPXRY10,		10
	.EQU	ECCP5_R3_ECCPXRY9,		9
	.EQU	ECCP5_R3_ECCPXRY8,		8
	.EQU	ECCP5_R3_ECCPXRY7,		7
	.EQU	ECCP5_R3_ECCPXRY6,		6
	.EQU	ECCP5_R3_ECCPXRY5,		5
	.EQU	ECCP5_R3_ECCPXRY4,		4
	.EQU	ECCP5_R3_ECCPXRY3,		3
	.EQU	ECCP5_R3_ECCPXRY2,		2
	.EQU	ECCP5_R3_ECCPXRY1,		1
	.EQU	ECCP5_R3_ECCPXRY0,		0
//  register-------------------------------------
	.EQU	ECCP5_R4,		0x40000390
//  0x4000 0390  ECCP5_R4   Bits-------------------------------------
	.EQU	ECCP5_R4_ECCPXRY15,		15
	.EQU	ECCP5_R4_ECCPXRY14,		14
	.EQU	ECCP5_R4_ECCPXRY13,		13
	.EQU	ECCP5_R4_ECCPXRY12,		12
	.EQU	ECCP5_R4_ECCPXRY11,		11
	.EQU	ECCP5_R4_ECCPXRY10,		10
	.EQU	ECCP5_R4_ECCPXRY9,		9
	.EQU	ECCP5_R4_ECCPXRY8,		8
	.EQU	ECCP5_R4_ECCPXRY7,		7
	.EQU	ECCP5_R4_ECCPXRY6,		6
	.EQU	ECCP5_R4_ECCPXRY5,		5
	.EQU	ECCP5_R4_ECCPXRY4,		4
	.EQU	ECCP5_R4_ECCPXRY3,		3
	.EQU	ECCP5_R4_ECCPXRY2,		2
	.EQU	ECCP5_R4_ECCPXRY1,		1
	.EQU	ECCP5_R4_ECCPXRY0,		0
//  register-------------------------------------
	.EQU	ECCP5_PXUDCTL,	0x40000394
//  0x4000 0394  ECCP5_PXUDCTL   Bits-------------------------------------
	.EQU	ECCP5_PXUDCTL_TZIFUDREN,		10
	.EQU	ECCP5_PXUDCTL_TZUDR,		9
	.EQU	ECCP5_PXUDCTL_TXIFUDREN,		8
	.EQU	ECCP5_PXUDCTL_TXUDR,		7
	.EQU	ECCP5_PXUDCTL_PXMPEN,		6
	.EQU	ECCP5_PXUDCTL_PXUDEVT3,		5
	.EQU	ECCP5_PXUDCTL_PXUDEVT2,		4
	.EQU	ECCP5_PXUDCTL_PXUDEVT1,		3
	.EQU	ECCP5_PXUDCTL_PXUDEVT0,		2
	.EQU	ECCP5_PXUDCTL_PXUDEN1,		1
	.EQU	ECCP5_PXUDCTL_PXUDEN0,		0
//  register-------------------------------------
	.EQU	ECCP5_CTL2,	0x40000398
//  0x4000 0398  ECCP5_CTL2   Bits-------------------------------------
	.EQU	ECCP5_CTL2_TZSMS2,		15
	.EQU	ECCP5_CTL2_TZSMS1,		14
	.EQU	ECCP5_CTL2_TZSMS0,		13
	.EQU	ECCP5_CTL2_PXPWMI,		12
	.EQU	ECCP5_CTL2_PXXORM,		11
	.EQU	ECCP5_CTL2_PXSPM,		10
	.EQU	ECCP5_CTL2_TXMSSYNC,		9
	.EQU	ECCP5_CTL2_TXTS2,		8
	.EQU	ECCP5_CTL2_TXTS1,		7
	.EQU	ECCP5_CTL2_TXTS0,		6
	.EQU	ECCP5_CTL2_TXSMS2,		5
	.EQU	ECCP5_CTL2_TXSMS1,		4
	.EQU	ECCP5_CTL2_TXSMS0,		3
	.EQU	ECCP5_CTL2_TXMMS2,		2
	.EQU	ECCP5_CTL2_TXMMS1,		1
	.EQU	ECCP5_CTL2_TXMMS0,		0
//  register-------------------------------------
	.EQU	ECCP5_PXDTCTL,	0x4000039C
//  0x4000 039C  ECCP5_PXDTCTL   Bits-------------------------------------
	.EQU	ECCP5_PXDTCTL_PXDC7,		15
	.EQU	ECCP5_PXDTCTL_PXDC6,		14
	.EQU	ECCP5_PXDTCTL_PXDC5,		13
	.EQU	ECCP5_PXDTCTL_PXDC4,		12
	.EQU	ECCP5_PXDTCTL_PXDC3,		11
	.EQU	ECCP5_PXDTCTL_PXDC2,		10
	.EQU	ECCP5_PXDTCTL_PXDC1,		9
	.EQU	ECCP5_PXDTCTL_PXDC0,		8
	.EQU	ECCP5_PXDTCTL_PZDC7,		7
	.EQU	ECCP5_PXDTCTL_PZDC6,		6
	.EQU	ECCP5_PXDTCTL_PZDC5,		5
	.EQU	ECCP5_PXDTCTL_PZDC4,		4
	.EQU	ECCP5_PXDTCTL_PZDC3,		3
	.EQU	ECCP5_PXDTCTL_PZDC2,		2
	.EQU	ECCP5_PXDTCTL_PZDC1,		1
	.EQU	ECCP5_PXDTCTL_PZDC0,		0
//  register-------------------------------------
	.EQU	ECCP5_PWMXOC,	0x400003A0
//  0x4000 03A0  ECCP5_PWMXOC   Bits-------------------------------------
	.EQU	ECCP5_PWMXOC_PXOC4H1,		15
	.EQU	ECCP5_PWMXOC_PXOC4H0,		14
	.EQU	ECCP5_PWMXOC_PXOC4L1,		13
	.EQU	ECCP5_PWMXOC_PXOC4L0,		12
	.EQU	ECCP5_PWMXOC_PXOC3H1,		11
	.EQU	ECCP5_PWMXOC_PXOC3H0,		10
	.EQU	ECCP5_PWMXOC_PXOC3L1,		9
	.EQU	ECCP5_PWMXOC_PXOC3L0,		8
	.EQU	ECCP5_PWMXOC_PXOC2H1,		7
	.EQU	ECCP5_PWMXOC_PXOC2H0,		6
	.EQU	ECCP5_PWMXOC_PXOC2L1,		5
	.EQU	ECCP5_PWMXOC_PXOC2L0,		4
	.EQU	ECCP5_PWMXOC_PXOC1H1,		3
	.EQU	ECCP5_PWMXOC_PXOC1H0,		2
	.EQU	ECCP5_PWMXOC_PXOC1L1,		1
	.EQU	ECCP5_PWMXOC_PXOC1L0,		0
//  register-------------------------------------
	.EQU	ECCP5_PXATRCTL,	0x400003A4
//  0x4000 03A4  ECCP5_PXATRCTL   Bits-------------------------------------
	.EQU	ECCP5_PXATRCTL_PXCH4MOD,		11
	.EQU	ECCP5_PXATRCTL_PXCH3MOD,		10
	.EQU	ECCP5_PXATRCTL_PXCH2MOD,		9
	.EQU	ECCP5_PXATRCTL_PXCH1MOD,		8
//  register-------------------------------------
	.EQU	ECCP5_PXASCTL0,	0x400003A8
//  0x4000 03A8  ECCP5_PXASCTL0   Bits-------------------------------------
	.EQU	ECCP5_PXASCTL0_PXASE4,		11
	.EQU	ECCP5_PXASCTL0_PXASE3,		10
	.EQU	ECCP5_PXASCTL0_PXASE2,		9
	.EQU	ECCP5_PXASCTL0_PXASE1,		8
	.EQU	ECCP5_PXASCTL0_PXASS4_1,		7
	.EQU	ECCP5_PXASCTL0_PXASS4_0,		6
	.EQU	ECCP5_PXASCTL0_PXASS3_1,		5
	.EQU	ECCP5_PXASCTL0_PXASS3_0,		4
	.EQU	ECCP5_PXASCTL0_PXASS2_1,		3
	.EQU	ECCP5_PXASCTL0_PXASS2_0,		2
	.EQU	ECCP5_PXASCTL0_PXASS1_1,		1
	.EQU	ECCP5_PXASCTL0_PXASS1_0,		0
//  register-------------------------------------
	.EQU	ECCP5_PXASCTL1,	0x400003AC
//  0x4000 03AC  ECCP5_PXASCTL1   Bits-------------------------------------
	.EQU	ECCP5_PXASCTL1_PXSS4H1,		15
	.EQU	ECCP5_PXASCTL1_PXSS4H0,		14
	.EQU	ECCP5_PXASCTL1_PXSS4L1,		13
	.EQU	ECCP5_PXASCTL1_PXSS4L0,		12
	.EQU	ECCP5_PXASCTL1_PXSS3H1,		11
	.EQU	ECCP5_PXASCTL1_PXSS3H0,		10
	.EQU	ECCP5_PXASCTL1_PXSS3L1,		9
	.EQU	ECCP5_PXASCTL1_PXSS3L0,		8
	.EQU	ECCP5_PXASCTL1_PXSS2H1,		7
	.EQU	ECCP5_PXASCTL1_PXSS2H0,		6
	.EQU	ECCP5_PXASCTL1_PXSS2L1,		5
	.EQU	ECCP5_PXASCTL1_PXSS2L0,		4
	.EQU	ECCP5_PXASCTL1_PXSS1H1,		3
	.EQU	ECCP5_PXASCTL1_PXSS1H0,		2
	.EQU	ECCP5_PXASCTL1_PXSS1L1,		1
	.EQU	ECCP5_PXASCTL1_PXSS1L0,		0
//  register-------------------------------------
	.EQU	ECCP5_ZPDCTL0,	0x400003B0
//  0x4000 03B0  ECCP5_ZPDCTL0   Bits-------------------------------------
	.EQU	ECCP5_ZPDCTL0_ZCLK3,		11
	.EQU	ECCP5_ZPDCTL0_ZCLK2,		10
	.EQU	ECCP5_ZPDCTL0_ZCLK1,		9
	.EQU	ECCP5_ZPDCTL0_ZCLK0,		8
	.EQU	ECCP5_ZPDCTL0_ZPD4TWIN,		7
	.EQU	ECCP5_ZPDCTL0_ZPD3TWIN,		6
	.EQU	ECCP5_ZPDCTL0_ZPD2TWIN,		5
	.EQU	ECCP5_ZPDCTL0_ZPD1TWIN,		4
	.EQU	ECCP5_ZPDCTL0_ZPD4FLAG,		3
	.EQU	ECCP5_ZPDCTL0_ZPD3FLAG,		2
	.EQU	ECCP5_ZPDCTL0_ZPD2FLAG,		1
	.EQU	ECCP5_ZPDCTL0_ZPD1FLAG,		0
//  register-------------------------------------
	.EQU	ECCP5_ZPDCTL1,	0x400003B4
//  0x4000 03B4  ECCP5_ZPDCTL1   Bits-------------------------------------
	.EQU	ECCP5_ZPDCTL1_ZPD4EN,		15
	.EQU	ECCP5_ZPDCTL1_ZPD3EN,		14
	.EQU	ECCP5_ZPDCTL1_ZPD2EN,		13
	.EQU	ECCP5_ZPDCTL1_ZPD1EN,		12
	.EQU	ECCP5_ZPDCTL1_ZPD4S2,		11
	.EQU	ECCP5_ZPDCTL1_ZPD4S1,		10
	.EQU	ECCP5_ZPDCTL1_ZPD4S0,		9
	.EQU	ECCP5_ZPDCTL1_ZPD3S2,		8
	.EQU	ECCP5_ZPDCTL1_ZPD3S1,		7
	.EQU	ECCP5_ZPDCTL1_ZPD3S0,		6
	.EQU	ECCP5_ZPDCTL1_ZPD2S2,		5
	.EQU	ECCP5_ZPDCTL1_ZPD2S1,		4
	.EQU	ECCP5_ZPDCTL1_ZPD2S0,		3
	.EQU	ECCP5_ZPDCTL1_ZPD1S2,		2
	.EQU	ECCP5_ZPDCTL1_ZPD1S1,		1
	.EQU	ECCP5_ZPDCTL1_ZPD1S0,		0
//  register-------------------------------------
	.EQU	ECCP5_ZPDPORT,	0x400003B8
//  0x4000 03B8  ECCP5_ZPDPORT   Bits-------------------------------------
	.EQU	ECCP5_ZPDPORT_ZPORT7,		7
	.EQU	ECCP5_ZPDPORT_ZPORT6,		6
	.EQU	ECCP5_ZPDPORT_ZPORT5,		5
	.EQU	ECCP5_ZPDPORT_ZPORT4,		4
	.EQU	ECCP5_ZPDPORT_ZPORT3,		3
	.EQU	ECCP5_ZPDPORT_ZPORT2,		2
	.EQU	ECCP5_ZPDPORT_ZPORT1,		1
	.EQU	ECCP5_ZPDPORT_ZPORT0,		0
//  register-------------------------------------
	.EQU	ECCP5_IE,		0x400003BC
//  0x4000 03BC  ECCP5_IE   Bits-------------------------------------
	.EQU	ECCP5_IE_PDIE,		10
	.EQU	ECCP5_IE_CPIE,		9
	.EQU	ECCP5_IE_TXUIE,		8
	.EQU	ECCP5_IE_TZUIE,		7
	.EQU	ECCP5_IE_TXIE,		6
	.EQU	ECCP5_IE_TZIE,		5
	.EQU	ECCP5_IE_TXTIE,		4
	.EQU	ECCP5_IE_CC4IE,		3
	.EQU	ECCP5_IE_CC3IE,		2
	.EQU	ECCP5_IE_CC2IE,		1
	.EQU	ECCP5_IE_CC1IE,		0
//  register-------------------------------------
	.EQU	ECCP5_EGIF,	0x400003C0
//  0x4000 03C0  ECCP5_EGIF   Bits-------------------------------------
	.EQU	ECCP5_EGIF_PDIF,		15
	.EQU	ECCP5_EGIF_TXUIF,		14
	.EQU	ECCP5_EGIF_TZUIF,		13
	.EQU	ECCP5_EGIF_TXIF,		12
	.EQU	ECCP5_EGIF_TZIF,		11
	.EQU	ECCP5_EGIF_TXTIF,		10
	.EQU	ECCP5_EGIF_CC4IF,		9
	.EQU	ECCP5_EGIF_CC3IF,		8
	.EQU	ECCP5_EGIF_CC2IF,		7
	.EQU	ECCP5_EGIF_CC1IF,		6
	.EQU	ECCP5_EGIF_TXTRG,		5
	.EQU	ECCP5_EGIF_CC4G,		4
	.EQU	ECCP5_EGIF_CC3G,		3
	.EQU	ECCP5_EGIF_CC2G,		2
	.EQU	ECCP5_EGIF_CC1G,		1
	.EQU	ECCP5_EGIF_CPIF,		0
//  register-------------------------------------
	.EQU	T5_UDTIMX,		0x400003C4
//  0x4000 03C4  T5_UDTIMX   Bits-------------------------------------
	.EQU	T5_UDTIMX_UDCNT7,		7
	.EQU	T5_UDTIMX_UDCNT6,		6
	.EQU	T5_UDTIMX_UDCNT5,		5
	.EQU	T5_UDTIMX_UDCNT4,		4
	.EQU	T5_UDTIMX_UDCNT3,		3
	.EQU	T5_UDTIMX_UDCNT2,		2
	.EQU	T5_UDTIMX_UDCNT1,		1
	.EQU	T5_UDTIMX_UDCNT0,		0
//  register-------------------------------------
	.EQU	T6_UDTIMZ,		0x400003C8
//  0x4000 03C8  T6_UDTIMZ   Bits-------------------------------------
	.EQU	T6_UDTIMZ_UDCNT7,		7
	.EQU	T6_UDTIMZ_UDCNT6,		6
	.EQU	T6_UDTIMZ_UDCNT5,		5
	.EQU	T6_UDTIMZ_UDCNT4,		4
	.EQU	T6_UDTIMZ_UDCNT3,		3
	.EQU	T6_UDTIMZ_UDCNT2,		2
	.EQU	T6_UDTIMZ_UDCNT1,		1
	.EQU	T6_UDTIMZ_UDCNT0,		0
//  register-------------------------------------
	.EQU	ECCP5_DF,		0x400003CC
//  0x4000 03CC  ECCP5_DF   Bits-------------------------------------
	.EQU	ECCP5_DF_TXUDF,		7
	.EQU	ECCP5_DF_TZUDF,		6
	.EQU	ECCP5_DF_TRIGDF,		5
	.EQU	ECCP5_DF_CLSDF,		4
	.EQU	ECCP5_DF_CH4DF,		3
	.EQU	ECCP5_DF_CH3DF,		2
	.EQU	ECCP5_DF_CH2DF,		1
	.EQU	ECCP5_DF_CH1DF,		0
//  register-------------------------------------
	.EQU	ECCP5_C1,		0x400003D0
//  0x4000 03D0  ECCP5_C1   Bits-------------------------------------
	.EQU	ECCP5_C1_ECCPXCY15,		15
	.EQU	ECCP5_C1_ECCPXCY14,		14
	.EQU	ECCP5_C1_ECCPXCY13,		13
	.EQU	ECCP5_C1_ECCPXCY12,		12
	.EQU	ECCP5_C1_ECCPXCY11,		11
	.EQU	ECCP5_C1_ECCPXCY10,		10
	.EQU	ECCP5_C1_ECCPXCY9,		9
	.EQU	ECCP5_C1_ECCPXCY8,		8
	.EQU	ECCP5_C1_ECCPXCY7,		7
	.EQU	ECCP5_C1_ECCPXCY6,		6
	.EQU	ECCP5_C1_ECCPXCY5,		5
	.EQU	ECCP5_C1_ECCPXCY4,		4
	.EQU	ECCP5_C1_ECCPXCY3,		3
	.EQU	ECCP5_C1_ECCPXCY2,		2
	.EQU	ECCP5_C1_ECCPXCY1,		1
	.EQU	ECCP5_C1_ECCPXCY0,		0
//  register-------------------------------------
	.EQU	ECCP5_C2,		0x400003D4
//  0x4000 03D4  ECCP5_C2   Bits-------------------------------------
	.EQU	ECCP5_C2_ECCPXCY15,		15
	.EQU	ECCP5_C2_ECCPXCY14,		14
	.EQU	ECCP5_C2_ECCPXCY13,		13
	.EQU	ECCP5_C2_ECCPXCY12,		12
	.EQU	ECCP5_C2_ECCPXCY11,		11
	.EQU	ECCP5_C2_ECCPXCY10,		10
	.EQU	ECCP5_C2_ECCPXCY9,		9
	.EQU	ECCP5_C2_ECCPXCY8,		8
	.EQU	ECCP5_C2_ECCPXCY7,		7
	.EQU	ECCP5_C2_ECCPXCY6,		6
	.EQU	ECCP5_C2_ECCPXCY5,		5
	.EQU	ECCP5_C2_ECCPXCY4,		4
	.EQU	ECCP5_C2_ECCPXCY3,		3
	.EQU	ECCP5_C2_ECCPXCY2,		2
	.EQU	ECCP5_C2_ECCPXCY1,		1
	.EQU	ECCP5_C2_ECCPXCY0,		0
//  register-------------------------------------
	.EQU	ECCP5_C3,		0x400003D8
//  0x4000 03D8  ECCP5_C3   Bits-------------------------------------
	.EQU	ECCP5_C3_ECCPXCY15,		15
	.EQU	ECCP5_C3_ECCPXCY14,		14
	.EQU	ECCP5_C3_ECCPXCY13,		13
	.EQU	ECCP5_C3_ECCPXCY12,		12
	.EQU	ECCP5_C3_ECCPXCY11,		11
	.EQU	ECCP5_C3_ECCPXCY10,		10
	.EQU	ECCP5_C3_ECCPXCY9,		9
	.EQU	ECCP5_C3_ECCPXCY8,		8
	.EQU	ECCP5_C3_ECCPXCY7,		7
	.EQU	ECCP5_C3_ECCPXCY6,		6
	.EQU	ECCP5_C3_ECCPXCY5,		5
	.EQU	ECCP5_C3_ECCPXCY4,		4
	.EQU	ECCP5_C3_ECCPXCY3,		3
	.EQU	ECCP5_C3_ECCPXCY2,		2
	.EQU	ECCP5_C3_ECCPXCY1,		1
	.EQU	ECCP5_C3_ECCPXCY0,		0
//  register-------------------------------------
	.EQU	ECCP5_C4,		0x400003DC
//  0x4000 03DC  ECCP5_C4   Bits-------------------------------------
	.EQU	ECCP5_C4_ECCPXCY15,		15
	.EQU	ECCP5_C4_ECCPXCY14,		14
	.EQU	ECCP5_C4_ECCPXCY13,		13
	.EQU	ECCP5_C4_ECCPXCY12,		12
	.EQU	ECCP5_C4_ECCPXCY11,		11
	.EQU	ECCP5_C4_ECCPXCY10,		10
	.EQU	ECCP5_C4_ECCPXCY9,		9
	.EQU	ECCP5_C4_ECCPXCY8,		8
	.EQU	ECCP5_C4_ECCPXCY7,		7
	.EQU	ECCP5_C4_ECCPXCY6,		6
	.EQU	ECCP5_C4_ECCPXCY5,		5
	.EQU	ECCP5_C4_ECCPXCY4,		4
	.EQU	ECCP5_C4_ECCPXCY3,		3
	.EQU	ECCP5_C4_ECCPXCY2,		2
	.EQU	ECCP5_C4_ECCPXCY1,		1
	.EQU	ECCP5_C4_ECCPXCY0,		0
//  register-------------------------------------
	.EQU	ECCP5_DE,		0x400003E4
//  0x4000 03E4  ECCP5_DE   Bits-------------------------------------
	.EQU	ECCP5_DE_TXUDE,		7
	.EQU	ECCP5_DE_TZUDE,		6
	.EQU	ECCP5_DE_TXTDE,		5
	.EQU	ECCP5_DE_CLSDE,		4
	.EQU	ECCP5_DE_CH4DE,		3
	.EQU	ECCP5_DE_CH3DE,		2
	.EQU	ECCP5_DE_CH2DE,		1
	.EQU	ECCP5_DE_CH1DE,		0
//  register-------------------------------------
	.EQU	ECCP5_SRIC,	0x400003E8
//  0x4000 03E8  ECCP5_SRIC   Bits-------------------------------------
	.EQU	ECCP5_SRIC_PDIC,		10
	.EQU	ECCP5_SRIC_CPIC,		9
	.EQU	ECCP5_SRIC_TXUIC,		8
	.EQU	ECCP5_SRIC_TZUIC,		7
	.EQU	ECCP5_SRIC_TXIC,		6
	.EQU	ECCP5_SRIC_TZIC,		5
	.EQU	ECCP5_SRIC_TXTIC,		4
	.EQU	ECCP5_SRIC_CC4IC,		3
	.EQU	ECCP5_SRIC_CC3IC,		2
	.EQU	ECCP5_SRIC_CC2IC,		1
	.EQU	ECCP5_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	ECCP5_CTL3,	0x400003EC
//  0x4000 03EC  ECCP5_CTL3   Bits-------------------------------------
	.EQU	ECCP5_CTL3_TRGSEL1,		14
	.EQU	ECCP5_CTL3_TRGSEL0,		13
	.EQU	ECCP5_CTL3_CH3HM,		12
	.EQU	ECCP5_CTL3_CH2HM,		11
	.EQU	ECCP5_CTL3_CH1HM,		10
	.EQU	ECCP5_CTL3_CH0HM,		9
	.EQU	ECCP5_CTL3_CAPTST,		6
	.EQU	ECCP5_CTL3_COMINV1,		5
	.EQU	ECCP5_CTL3_COMINV0,		4
	.EQU	ECCP5_CTL3_COMBEN,		3
	.EQU	ECCP5_CTL3_PXRSEN,		2
	.EQU	ECCP5_CTL3_TUNITE,		1
	.EQU	ECCP5_CTL3_PXSPMST,		0
//  register-------------------------------------
	.EQU	QEI0_CTL0,		0x40000500
//  0x4000 0500  QEI0_CTL0   Bits-------------------------------------
	.EQU	QEI0_CTL0_LPCLK,		11
	.EQU	QEI0_CTL0_TXIF,		10
	.EQU	QEI0_CTL0_PHEIF,		9
	.EQU	QEI0_CTL0_CNTERRIF,		8
	.EQU	QEI0_CTL0_QEIMOD2,		7
	.EQU	QEI0_CTL0_QEIMOD1,		6
	.EQU	QEI0_CTL0_QEIMOD0,		5
	.EQU	QEI0_CTL0_INDRES,		4
	.EQU	QEI0_CTL0_TXCS,		3
	.EQU	QEI0_CTL0_INDEX,		2
	.EQU	QEI0_CTL0_TXDIROUT,		1
	.EQU	QEI0_CTL0_TXDIR,		0
//  register-------------------------------------
	.EQU	QEI0_CTL1,		0x40000504
//  0x4000 0504  QEI0_CTL1   Bits-------------------------------------
	.EQU	QEI0_CTL1_PHSEL3,		12
	.EQU	QEI0_CTL1_PHSEL2,		11
	.EQU	QEI0_CTL1_PHSEL1,		10
	.EQU	QEI0_CTL1_PHSEL0,		9
	.EQU	QEI0_CTL1_PHDFEN,		8
	.EQU	QEI0_CTL1_MODEN,		7
	.EQU	QEI0_CTL1_QEICLK1,		6
	.EQU	QEI0_CTL1_QEICLK0,		5
	.EQU	QEI0_CTL1_QEIOUT,		4
	.EQU	QEI0_CTL1_QEICK2,		3
	.EQU	QEI0_CTL1_QEICK1,		2
	.EQU	QEI0_CTL1_QEICK0,		1
	.EQU	QEI0_CTL1_SWPAB,		0
//  register-------------------------------------
	.EQU	T7_CNT,			0x40000508
//  0x4000 0508  T7_CNT   Bits-------------------------------------
	.EQU	T7_CNT_TXCNT15,		15
	.EQU	T7_CNT_TXCNT14,		14
	.EQU	T7_CNT_TXCNT13,		13
	.EQU	T7_CNT_TXCNT12,		12
	.EQU	T7_CNT_TXCNT11,		11
	.EQU	T7_CNT_TXCNT10,		10
	.EQU	T7_CNT_TXCNT9,		9
	.EQU	T7_CNT_TXCNT8,		8
	.EQU	T7_CNT_TXCNT7,		7
	.EQU	T7_CNT_TXCNT6,		6
	.EQU	T7_CNT_TXCNT5,		5
	.EQU	T7_CNT_TXCNT4,		4
	.EQU	T7_CNT_TXCNT3,		3
	.EQU	T7_CNT_TXCNT2,		2
	.EQU	T7_CNT_TXCNT1,		1
	.EQU	T7_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T7_PPX,			0x4000050C
//  0x4000 050C  T7_PPX   Bits-------------------------------------
	.EQU	T7_PPX_PPX15,		15
	.EQU	T7_PPX_PPX14,		14
	.EQU	T7_PPX_PPX13,		13
	.EQU	T7_PPX_PPX12,		12
	.EQU	T7_PPX_PPX11,		11
	.EQU	T7_PPX_PPX10,		10
	.EQU	T7_PPX_PPX9,		9
	.EQU	T7_PPX_PPX8,		8
	.EQU	T7_PPX_PPX7,		7
	.EQU	T7_PPX_PPX6,		6
	.EQU	T7_PPX_PPX5,		5
	.EQU	T7_PPX_PPX4,		4
	.EQU	T7_PPX_PPX3,		3
	.EQU	T7_PPX_PPX2,		2
	.EQU	T7_PPX_PPX1,		1
	.EQU	T7_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T7_PRSC,		0x40000510
//  0x4000 0510  T7_PRSC   Bits-------------------------------------
	.EQU	T7_PRSC_TXPRSC15,		15
	.EQU	T7_PRSC_TXPRSC14,		14
	.EQU	T7_PRSC_TXPRSC13,		13
	.EQU	T7_PRSC_TXPRSC12,		12
	.EQU	T7_PRSC_TXPRSC11,		11
	.EQU	T7_PRSC_TXPRSC10,		10
	.EQU	T7_PRSC_TXPRSC9,		9
	.EQU	T7_PRSC_TXPRSC8,		8
	.EQU	T7_PRSC_TXPRSC7,		7
	.EQU	T7_PRSC_TXPRSC6,		6
	.EQU	T7_PRSC_TXPRSC5,		5
	.EQU	T7_PRSC_TXPRSC4,		4
	.EQU	T7_PRSC_TXPRSC3,		3
	.EQU	T7_PRSC_TXPRSC2,		2
	.EQU	T7_PRSC_TXPRSC1,		1
	.EQU	T7_PRSC_TXPRSC0,		0
//  register-------------------------------------
	.EQU	QEI0_DIER,		0x40000514
//  0x4000 0514  QEI0_DIER   Bits-------------------------------------
	.EQU	QEI0_DIER_TXIC,		5
	.EQU	QEI0_DIER_PHEIC,		4
	.EQU	QEI0_DIER_CNTERRIC,		3
	.EQU	QEI0_DIER_TXIE,		2
	.EQU	QEI0_DIER_PHEIE,		1
	.EQU	QEI0_DIER_CNTERRIE,		0
//  register-------------------------------------
	.EQU	ADC0_CTL0,		0x40000580
//  0x4000 0580  ADC0_CTL0   Bits-------------------------------------
	.EQU	ADC0_CTL0_WDSCH,		31
	.EQU	ADC0_CTL0_HPWDEN,		30
	.EQU	ADC0_CTL0_WDEN,		29
	.EQU	ADC0_CTL0_DSNUM2,		28
	.EQU	ADC0_CTL0_DSNUM1,		27
	.EQU	ADC0_CTL0_DSNUM0,		26
	.EQU	ADC0_CTL0_HP3DMAEN,		25
	.EQU	ADC0_CTL0_HP2DMAEN,		24
	.EQU	ADC0_CTL0_HP1DMAEN,		23
	.EQU	ADC0_CTL0_HP0DMAEN,		22
	.EQU	ADC0_CTL0_HPDSEN,		21
	.EQU	ADC0_CTL0_DSEN,		20
	.EQU	ADC0_CTL0_HPAUTO,		19
	.EQU	ADC0_CTL0_CONT,		18
	.EQU	ADC0_CTL0_SCANEN,		17
	.EQU	ADC0_CTL0_BOSSSELCOMP,		16
	.EQU	ADC0_CTL0_BOSSSEL,		15
	.EQU	ADC0_CTL0_TRIMIBIAS,		14
	.EQU	ADC0_CTL0_NDMAEN,		13
	.EQU	ADC0_CTL0_ADCCLKS2,		10
	.EQU	ADC0_CTL0_ADCCLKS1,		9
	.EQU	ADC0_CTL0_ADCCLKS0,		8
	.EQU	ADC0_CTL0_LR,		3
	.EQU	ADC0_CTL0_CLKS1,		2
	.EQU	ADC0_CTL0_CLKS0,		1
	.EQU	ADC0_CTL0_EN,		0
//  register-------------------------------------
	.EQU	ADC0_CTL1,		0x40000584
//  0x4000 0584  ADC0_CTL1   Bits-------------------------------------
	.EQU	ADC0_CTL1_DOUMOD3,		31
	.EQU	ADC0_CTL1_DOUMOD2,		30
	.EQU	ADC0_CTL1_DOUMOD1,		29
	.EQU	ADC0_CTL1_DOUMOD0,		28
	.EQU	ADC0_CTL1_HPEXTEN,		27
	.EQU	ADC0_CTL1_HCH6,		26
	.EQU	ADC0_CTL1_HCH5,		25
	.EQU	ADC0_CTL1_HCH4,		24
	.EQU	ADC0_CTL1_HCH3,		23
	.EQU	ADC0_CTL1_HCH2,		22
	.EQU	ADC0_CTL1_HCH1,		21
	.EQU	ADC0_CTL1_HCH0,		20
	.EQU	ADC0_CTL1_REF2,		19
	.EQU	ADC0_CTL1_REF1,		18
	.EQU	ADC0_CTL1_REF0,		17
	.EQU	ADC0_CTL1_EXTEN,		11
	.EQU	ADC0_CTL1_NCH6,		10
	.EQU	ADC0_CTL1_NCH5,		9
	.EQU	ADC0_CTL1_NCH4,		8
	.EQU	ADC0_CTL1_NCH3,		7
	.EQU	ADC0_CTL1_NCH2,		6
	.EQU	ADC0_CTL1_NCH1,		5
	.EQU	ADC0_CTL1_NCH0,		4
	.EQU	ADC0_CTL1_HPSTART,		3
	.EQU	ADC0_CTL1_START,		2
//  register-------------------------------------
	.EQU	ADC0_SCANSQ0,	0x40000588
//  0x4000 0588  ADC0_SCANSQ0   Bits-------------------------------------
	.EQU	ADC0_SCANSQ0_SSQ3_7,		31
	.EQU	ADC0_SCANSQ0_SSQ3_6,		30
	.EQU	ADC0_SCANSQ0_SSQ3_5,		29
	.EQU	ADC0_SCANSQ0_SSQ3_4,		28
	.EQU	ADC0_SCANSQ0_SSQ3_3,		27
	.EQU	ADC0_SCANSQ0_SSQ3_2,		26
	.EQU	ADC0_SCANSQ0_SSQ3_1,		25
	.EQU	ADC0_SCANSQ0_SSQ3_0,		24
	.EQU	ADC0_SCANSQ0_SSQ2_7,		23
	.EQU	ADC0_SCANSQ0_SSQ2_6,		22
	.EQU	ADC0_SCANSQ0_SSQ2_5,		21
	.EQU	ADC0_SCANSQ0_SSQ2_4,		20
	.EQU	ADC0_SCANSQ0_SSQ2_3,		19
	.EQU	ADC0_SCANSQ0_SSQ2_2,		18
	.EQU	ADC0_SCANSQ0_SSQ2_1,		17
	.EQU	ADC0_SCANSQ0_SSQ2_0,		16
	.EQU	ADC0_SCANSQ0_SSQ1_7,		15
	.EQU	ADC0_SCANSQ0_SSQ1_6,		14
	.EQU	ADC0_SCANSQ0_SSQ1_5,		13
	.EQU	ADC0_SCANSQ0_SSQ1_4,		12
	.EQU	ADC0_SCANSQ0_SSQ1_3,		11
	.EQU	ADC0_SCANSQ0_SSQ1_2,		10
	.EQU	ADC0_SCANSQ0_SSQ1_1,		9
	.EQU	ADC0_SCANSQ0_SSQ1_0,		8
	.EQU	ADC0_SCANSQ0_SSQ0_7,		7
	.EQU	ADC0_SCANSQ0_SSQ0_6,		6
	.EQU	ADC0_SCANSQ0_SSQ0_5,		5
	.EQU	ADC0_SCANSQ0_SSQ0_4,		4
	.EQU	ADC0_SCANSQ0_SSQ0_3,		3
	.EQU	ADC0_SCANSQ0_SSQ0_2,		2
	.EQU	ADC0_SCANSQ0_SSQ0_1,		1
	.EQU	ADC0_SCANSQ0_SSQ0_0,		0
//  register-------------------------------------
	.EQU	ADC0_SCANSQ1,	0x4000058C
//  0x4000 058C  ADC0_SCANSQ1   Bits-------------------------------------
	.EQU	ADC0_SCANSQ1_SSQ7_7,		31
	.EQU	ADC0_SCANSQ1_SSQ7_6,		30
	.EQU	ADC0_SCANSQ1_SSQ7_5,		29
	.EQU	ADC0_SCANSQ1_SSQ7_4,		28
	.EQU	ADC0_SCANSQ1_SSQ7_3,		27
	.EQU	ADC0_SCANSQ1_SSQ7_2,		26
	.EQU	ADC0_SCANSQ1_SSQ7_1,		25
	.EQU	ADC0_SCANSQ1_SSQ7_0,		24
	.EQU	ADC0_SCANSQ1_SSQ6_7,		23
	.EQU	ADC0_SCANSQ1_SSQ6_6,		22
	.EQU	ADC0_SCANSQ1_SSQ6_5,		21
	.EQU	ADC0_SCANSQ1_SSQ6_4,		20
	.EQU	ADC0_SCANSQ1_SSQ6_3,		19
	.EQU	ADC0_SCANSQ1_SSQ6_2,		18
	.EQU	ADC0_SCANSQ1_SSQ6_1,		17
	.EQU	ADC0_SCANSQ1_SSQ6_0,		16
	.EQU	ADC0_SCANSQ1_SSQ5_7,		15
	.EQU	ADC0_SCANSQ1_SSQ5_6,		14
	.EQU	ADC0_SCANSQ1_SSQ5_5,		13
	.EQU	ADC0_SCANSQ1_SSQ5_4,		12
	.EQU	ADC0_SCANSQ1_SSQ5_3,		11
	.EQU	ADC0_SCANSQ1_SSQ5_2,		10
	.EQU	ADC0_SCANSQ1_SSQ5_1,		9
	.EQU	ADC0_SCANSQ1_SSQ5_0,		8
	.EQU	ADC0_SCANSQ1_SSQ4_7,		7
	.EQU	ADC0_SCANSQ1_SSQ4_6,		6
	.EQU	ADC0_SCANSQ1_SSQ4_5,		5
	.EQU	ADC0_SCANSQ1_SSQ4_4,		4
	.EQU	ADC0_SCANSQ1_SSQ4_3,		3
	.EQU	ADC0_SCANSQ1_SSQ4_2,		2
	.EQU	ADC0_SCANSQ1_SSQ4_1,		1
	.EQU	ADC0_SCANSQ1_SSQ4_0,		0
//  register-------------------------------------
	.EQU	ADC0_SCANSQ2,	0x40000590
//  0x4000 0590  ADC0_SCANSQ2   Bits-------------------------------------
	.EQU	ADC0_SCANSQ2_SSQ11_7,		31
	.EQU	ADC0_SCANSQ2_SSQ11_6,		30
	.EQU	ADC0_SCANSQ2_SSQ11_5,		29
	.EQU	ADC0_SCANSQ2_SSQ11_4,		28
	.EQU	ADC0_SCANSQ2_SSQ11_3,		27
	.EQU	ADC0_SCANSQ2_SSQ11_2,		26
	.EQU	ADC0_SCANSQ2_SSQ11_1,		25
	.EQU	ADC0_SCANSQ2_SSQ11_0,		24
	.EQU	ADC0_SCANSQ2_SSQ10_7,		23
	.EQU	ADC0_SCANSQ2_SSQ10_6,		22
	.EQU	ADC0_SCANSQ2_SSQ10_5,		21
	.EQU	ADC0_SCANSQ2_SSQ10_4,		20
	.EQU	ADC0_SCANSQ2_SSQ10_3,		19
	.EQU	ADC0_SCANSQ2_SSQ10_2,		18
	.EQU	ADC0_SCANSQ2_SSQ10_1,		17
	.EQU	ADC0_SCANSQ2_SSQ10_0,		16
	.EQU	ADC0_SCANSQ2_SSQ9_7,		15
	.EQU	ADC0_SCANSQ2_SSQ9_6,		14
	.EQU	ADC0_SCANSQ2_SSQ9_5,		13
	.EQU	ADC0_SCANSQ2_SSQ9_4,		12
	.EQU	ADC0_SCANSQ2_SSQ9_3,		11
	.EQU	ADC0_SCANSQ2_SSQ9_2,		10
	.EQU	ADC0_SCANSQ2_SSQ9_1,		9
	.EQU	ADC0_SCANSQ2_SSQ9_0,		8
	.EQU	ADC0_SCANSQ2_SSQ8_7,		7
	.EQU	ADC0_SCANSQ2_SSQ8_6,		6
	.EQU	ADC0_SCANSQ2_SSQ8_5,		5
	.EQU	ADC0_SCANSQ2_SSQ8_4,		4
	.EQU	ADC0_SCANSQ2_SSQ8_3,		3
	.EQU	ADC0_SCANSQ2_SSQ8_2,		2
	.EQU	ADC0_SCANSQ2_SSQ8_1,		1
	.EQU	ADC0_SCANSQ2_SSQ8_0,		0
//  register-------------------------------------
	.EQU	ADC0_SCANSQ3,	0x400005C4
//  0x4000 05C4  ADC0_SCANSQ3   Bits-------------------------------------
	.EQU	ADC0_SCANSQ3_SSQ15_7,		31
	.EQU	ADC0_SCANSQ3_SSQ15_6,		30
	.EQU	ADC0_SCANSQ3_SSQ15_5,		29
	.EQU	ADC0_SCANSQ3_SSQ15_4,		28
	.EQU	ADC0_SCANSQ3_SSQ15_3,		27
	.EQU	ADC0_SCANSQ3_SSQ15_2,		26
	.EQU	ADC0_SCANSQ3_SSQ15_1,		25
	.EQU	ADC0_SCANSQ3_SSQ15_0,		24
	.EQU	ADC0_SCANSQ3_SSQ14_7,		23
	.EQU	ADC0_SCANSQ3_SSQ14_6,		22
	.EQU	ADC0_SCANSQ3_SSQ14_5,		21
	.EQU	ADC0_SCANSQ3_SSQ14_4,		20
	.EQU	ADC0_SCANSQ3_SSQ14_3,		19
	.EQU	ADC0_SCANSQ3_SSQ14_2,		18
	.EQU	ADC0_SCANSQ3_SSQ14_1,		17
	.EQU	ADC0_SCANSQ3_SSQ14_0,		16
	.EQU	ADC0_SCANSQ3_SSQ13_7,		15
	.EQU	ADC0_SCANSQ3_SSQ13_6,		14
	.EQU	ADC0_SCANSQ3_SSQ13_5,		13
	.EQU	ADC0_SCANSQ3_SSQ13_4,		12
	.EQU	ADC0_SCANSQ3_SSQ13_3,		11
	.EQU	ADC0_SCANSQ3_SSQ13_2,		10
	.EQU	ADC0_SCANSQ3_SSQ13_1,		9
	.EQU	ADC0_SCANSQ3_SSQ13_0,		8
	.EQU	ADC0_SCANSQ3_SSQ12_7,		7
	.EQU	ADC0_SCANSQ3_SSQ12_6,		6
	.EQU	ADC0_SCANSQ3_SSQ12_5,		5
	.EQU	ADC0_SCANSQ3_SSQ12_4,		4
	.EQU	ADC0_SCANSQ3_SSQ12_3,		3
	.EQU	ADC0_SCANSQ3_SSQ12_2,		2
	.EQU	ADC0_SCANSQ3_SSQ12_1,		1
	.EQU	ADC0_SCANSQ3_SSQ12_0,		0
//  register-------------------------------------
	.EQU	ADC0_HSCANSQ,	0x40000594
//  0x4000 0594  ADC0_HSCANSQ   Bits-------------------------------------
	.EQU	ADC0_HSCANSQ_HSSQ3_7,		31
	.EQU	ADC0_HSCANSQ_HSSQ3_6,		30
	.EQU	ADC0_HSCANSQ_HSSQ3_5,		29
	.EQU	ADC0_HSCANSQ_HSSQ3_4,		28
	.EQU	ADC0_HSCANSQ_HSSQ3_3,		27
	.EQU	ADC0_HSCANSQ_HSSQ3_2,		26
	.EQU	ADC0_HSCANSQ_HSSQ3_1,		25
	.EQU	ADC0_HSCANSQ_HSSQ3_0,		24
	.EQU	ADC0_HSCANSQ_HSSQ2_7,		23
	.EQU	ADC0_HSCANSQ_HSSQ2_6,		22
	.EQU	ADC0_HSCANSQ_HSSQ2_5,		21
	.EQU	ADC0_HSCANSQ_HSSQ2_4,		20
	.EQU	ADC0_HSCANSQ_HSSQ2_3,		19
	.EQU	ADC0_HSCANSQ_HSSQ2_2,		18
	.EQU	ADC0_HSCANSQ_HSSQ2_1,		17
	.EQU	ADC0_HSCANSQ_HSSQ2_0,		16
	.EQU	ADC0_HSCANSQ_HSSQ1_7,		15
	.EQU	ADC0_HSCANSQ_HSSQ1_6,		14
	.EQU	ADC0_HSCANSQ_HSSQ1_5,		13
	.EQU	ADC0_HSCANSQ_HSSQ1_4,		12
	.EQU	ADC0_HSCANSQ_HSSQ1_3,		11
	.EQU	ADC0_HSCANSQ_HSSQ1_2,		10
	.EQU	ADC0_HSCANSQ_HSSQ1_1,		9
	.EQU	ADC0_HSCANSQ_HSSQ1_0,		8
	.EQU	ADC0_HSCANSQ_HSSQ0_7,		7
	.EQU	ADC0_HSCANSQ_HSSQ0_6,		6
	.EQU	ADC0_HSCANSQ_HSSQ0_5,		5
	.EQU	ADC0_HSCANSQ_HSSQ0_4,		4
	.EQU	ADC0_HSCANSQ_HSSQ0_3,		3
	.EQU	ADC0_HSCANSQ_HSSQ0_2,		2
	.EQU	ADC0_HSCANSQ_HSSQ0_1,		1
	.EQU	ADC0_HSCANSQ_HSSQ0_0,		0
//  register-------------------------------------
	.EQU	ADC0_WDH,		0x40000598
//  0x4000 0598  ADC0_WDH   Bits-------------------------------------
	.EQU	ADC0_WDH_WDH11,		11
	.EQU	ADC0_WDH_WDH10,		10
	.EQU	ADC0_WDH_WDH9,		9
	.EQU	ADC0_WDH_WDH8,		8
	.EQU	ADC0_WDH_WDH7,		7
	.EQU	ADC0_WDH_WDH6,		6
	.EQU	ADC0_WDH_WDH5,		5
	.EQU	ADC0_WDH_WDH4,		4
	.EQU	ADC0_WDH_WDH3,		3
	.EQU	ADC0_WDH_WDH2,		2
	.EQU	ADC0_WDH_WDH1,		1
	.EQU	ADC0_WDH_WDH0,		0
//  register-------------------------------------
	.EQU	ADC0_WDL,		0x4000059C
//  0x4000 059C  ADC0_WDL   Bits-------------------------------------
	.EQU	ADC0_WDL_WDL11,		11
	.EQU	ADC0_WDL_WDL10,		10
	.EQU	ADC0_WDL_WDL9,		9
	.EQU	ADC0_WDL_WDL8,		8
	.EQU	ADC0_WDL_WDL7,		7
	.EQU	ADC0_WDL_WDL6,		6
	.EQU	ADC0_WDL_WDL5,		5
	.EQU	ADC0_WDL_WDL4,		4
	.EQU	ADC0_WDL_WDL3,		3
	.EQU	ADC0_WDL_WDL2,		2
	.EQU	ADC0_WDL_WDL1,		1
	.EQU	ADC0_WDL_WDL0,		0
//  register-------------------------------------
	.EQU	ADC0_DATA,		0x400005A0
//  0x4000 05A0  ADC0_DATA   Bits-------------------------------------
	.EQU	ADC0_DATA_DATA15,		15
	.EQU	ADC0_DATA_DATA14,		14
	.EQU	ADC0_DATA_DATA13,		13
	.EQU	ADC0_DATA_DATA12,		12
	.EQU	ADC0_DATA_DATA11,		11
	.EQU	ADC0_DATA_DATA10,		10
	.EQU	ADC0_DATA_DATA9,		9
	.EQU	ADC0_DATA_DATA8,		8
	.EQU	ADC0_DATA_DATA7,		7
	.EQU	ADC0_DATA_DATA6,		6
	.EQU	ADC0_DATA_DATA5,		5
	.EQU	ADC0_DATA_DATA4,		4
	.EQU	ADC0_DATA_DATA3,		3
	.EQU	ADC0_DATA_DATA2,		2
	.EQU	ADC0_DATA_DATA1,		1
	.EQU	ADC0_DATA_DATA0,		0
//  register-------------------------------------
	.EQU	ADC0_HPDATA0,	0x400005A4
//  0x4000 05A4  ADC0_HPDATA0   Bits-------------------------------------
	.EQU	ADC0_HPDATA0_HPDATA15,		15
	.EQU	ADC0_HPDATA0_HPDATA14,		14
	.EQU	ADC0_HPDATA0_HPDATA13,		13
	.EQU	ADC0_HPDATA0_HPDATA12,		12
	.EQU	ADC0_HPDATA0_HPDATA11,		11
	.EQU	ADC0_HPDATA0_HPDATA10,		10
	.EQU	ADC0_HPDATA0_HPDATA9,		9
	.EQU	ADC0_HPDATA0_HPDATA8,		8
	.EQU	ADC0_HPDATA0_HPDATA7,		7
	.EQU	ADC0_HPDATA0_HPDATA6,		6
	.EQU	ADC0_HPDATA0_HPDATA5,		5
	.EQU	ADC0_HPDATA0_HPDATA4,		4
	.EQU	ADC0_HPDATA0_HPDATA3,		3
	.EQU	ADC0_HPDATA0_HPDATA2,		2
	.EQU	ADC0_HPDATA0_HPDATA1,		1
	.EQU	ADC0_HPDATA0_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC0_HPDATA1,	0x400005A8
//  0x4000 05A8  ADC0_HPDATA1   Bits-------------------------------------
	.EQU	ADC0_HPDATA1_HPDATA15,		15
	.EQU	ADC0_HPDATA1_HPDATA14,		14
	.EQU	ADC0_HPDATA1_HPDATA13,		13
	.EQU	ADC0_HPDATA1_HPDATA12,		12
	.EQU	ADC0_HPDATA1_HPDATA11,		11
	.EQU	ADC0_HPDATA1_HPDATA10,		10
	.EQU	ADC0_HPDATA1_HPDATA9,		9
	.EQU	ADC0_HPDATA1_HPDATA8,		8
	.EQU	ADC0_HPDATA1_HPDATA7,		7
	.EQU	ADC0_HPDATA1_HPDATA6,		6
	.EQU	ADC0_HPDATA1_HPDATA5,		5
	.EQU	ADC0_HPDATA1_HPDATA4,		4
	.EQU	ADC0_HPDATA1_HPDATA3,		3
	.EQU	ADC0_HPDATA1_HPDATA2,		2
	.EQU	ADC0_HPDATA1_HPDATA1,		1
	.EQU	ADC0_HPDATA1_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC0_HPDATA2,	0x400005AC
//  0x4000 05AC  ADC0_HPDATA2   Bits-------------------------------------
	.EQU	ADC0_HPDATA2_HPDATA15,		15
	.EQU	ADC0_HPDATA2_HPDATA14,		14
	.EQU	ADC0_HPDATA2_HPDATA13,		13
	.EQU	ADC0_HPDATA2_HPDATA12,		12
	.EQU	ADC0_HPDATA2_HPDATA11,		11
	.EQU	ADC0_HPDATA2_HPDATA10,		10
	.EQU	ADC0_HPDATA2_HPDATA9,		9
	.EQU	ADC0_HPDATA2_HPDATA8,		8
	.EQU	ADC0_HPDATA2_HPDATA7,		7
	.EQU	ADC0_HPDATA2_HPDATA6,		6
	.EQU	ADC0_HPDATA2_HPDATA5,		5
	.EQU	ADC0_HPDATA2_HPDATA4,		4
	.EQU	ADC0_HPDATA2_HPDATA3,		3
	.EQU	ADC0_HPDATA2_HPDATA2,		2
	.EQU	ADC0_HPDATA2_HPDATA1,		1
	.EQU	ADC0_HPDATA2_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC0_HPDATA3,	0x400005B0
//  0x4000 05B0  ADC0_HPDATA3   Bits-------------------------------------
	.EQU	ADC0_HPDATA3_HPDATA15,		15
	.EQU	ADC0_HPDATA3_HPDATA14,		14
	.EQU	ADC0_HPDATA3_HPDATA13,		13
	.EQU	ADC0_HPDATA3_HPDATA12,		12
	.EQU	ADC0_HPDATA3_HPDATA11,		11
	.EQU	ADC0_HPDATA3_HPDATA10,		10
	.EQU	ADC0_HPDATA3_HPDATA9,		9
	.EQU	ADC0_HPDATA3_HPDATA8,		8
	.EQU	ADC0_HPDATA3_HPDATA7,		7
	.EQU	ADC0_HPDATA3_HPDATA6,		6
	.EQU	ADC0_HPDATA3_HPDATA5,		5
	.EQU	ADC0_HPDATA3_HPDATA4,		4
	.EQU	ADC0_HPDATA3_HPDATA3,		3
	.EQU	ADC0_HPDATA3_HPDATA2,		2
	.EQU	ADC0_HPDATA3_HPDATA1,		1
	.EQU	ADC0_HPDATA3_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC0_HPDOFF0,	0x400005B4
//  0x4000 05B4  ADC0_HPDOFF0   Bits-------------------------------------
	.EQU	ADC0_HPDOFF0_HPDOFF11,		11
	.EQU	ADC0_HPDOFF0_HPDOFF10,		10
	.EQU	ADC0_HPDOFF0_HPDOFF9,		9
	.EQU	ADC0_HPDOFF0_HPDOFF8,		8
	.EQU	ADC0_HPDOFF0_HPDOFF7,		7
	.EQU	ADC0_HPDOFF0_HPDOFF6,		6
	.EQU	ADC0_HPDOFF0_HPDOFF5,		5
	.EQU	ADC0_HPDOFF0_HPDOFF4,		4
	.EQU	ADC0_HPDOFF0_HPDOFF3,		3
	.EQU	ADC0_HPDOFF0_HPDOFF2,		2
	.EQU	ADC0_HPDOFF0_HPDOFF1,		1
	.EQU	ADC0_HPDOFF0_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC0_HPDOFF1,	0x400005B8
//  0x4000 05B8  ADC0_HPDOFF1   Bits-------------------------------------
	.EQU	ADC0_HPDOFF1_HPDOFF11,		11
	.EQU	ADC0_HPDOFF1_HPDOFF10,		10
	.EQU	ADC0_HPDOFF1_HPDOFF9,		9
	.EQU	ADC0_HPDOFF1_HPDOFF8,		8
	.EQU	ADC0_HPDOFF1_HPDOFF7,		7
	.EQU	ADC0_HPDOFF1_HPDOFF6,		6
	.EQU	ADC0_HPDOFF1_HPDOFF5,		5
	.EQU	ADC0_HPDOFF1_HPDOFF4,		4
	.EQU	ADC0_HPDOFF1_HPDOFF3,		3
	.EQU	ADC0_HPDOFF1_HPDOFF2,		2
	.EQU	ADC0_HPDOFF1_HPDOFF1,		1
	.EQU	ADC0_HPDOFF1_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC0_HPDOFF2,	0x400005BC
//  0x4000 05BC  ADC0_HPDOFF2   Bits-------------------------------------
	.EQU	ADC0_HPDOFF2_HPDOFF11,		11
	.EQU	ADC0_HPDOFF2_HPDOFF10,		10
	.EQU	ADC0_HPDOFF2_HPDOFF9,		9
	.EQU	ADC0_HPDOFF2_HPDOFF8,		8
	.EQU	ADC0_HPDOFF2_HPDOFF7,		7
	.EQU	ADC0_HPDOFF2_HPDOFF6,		6
	.EQU	ADC0_HPDOFF2_HPDOFF5,		5
	.EQU	ADC0_HPDOFF2_HPDOFF4,		4
	.EQU	ADC0_HPDOFF2_HPDOFF3,		3
	.EQU	ADC0_HPDOFF2_HPDOFF2,		2
	.EQU	ADC0_HPDOFF2_HPDOFF1,		1
	.EQU	ADC0_HPDOFF2_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC0_HPDOFF3,	0x400005C0
//  0x4000 05C0  ADC0_HPDOFF3   Bits-------------------------------------
	.EQU	ADC0_HPDOFF3_HPDOFF11,		11
	.EQU	ADC0_HPDOFF3_HPDOFF10,		10
	.EQU	ADC0_HPDOFF3_HPDOFF9,		9
	.EQU	ADC0_HPDOFF3_HPDOFF8,		8
	.EQU	ADC0_HPDOFF3_HPDOFF7,		7
	.EQU	ADC0_HPDOFF3_HPDOFF6,		6
	.EQU	ADC0_HPDOFF3_HPDOFF5,		5
	.EQU	ADC0_HPDOFF3_HPDOFF4,		4
	.EQU	ADC0_HPDOFF3_HPDOFF3,		3
	.EQU	ADC0_HPDOFF3_HPDOFF2,		2
	.EQU	ADC0_HPDOFF3_HPDOFF1,		1
	.EQU	ADC0_HPDOFF3_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC0_STATE,	0x400005D0
//  0x4000 05D0  ADC0_STATE   Bits-------------------------------------
	.EQU	ADC0_STATE_TRIMERROR1,		31
	.EQU	ADC0_STATE_TRIMERROR0,		30
	.EQU	ADC0_STATE_TRIMIBIASOPA,		27
	.EQU	ADC0_STATE_CCR2H,		19
	.EQU	ADC0_STATE_CCR2N,		18
	.EQU	ADC0_STATE_CCR1H,		17
	.EQU	ADC0_STATE_CCR1N,		16
	.EQU	ADC0_STATE_CCR0H,		15
	.EQU	ADC0_STATE_CCR0N,		14
	.EQU	ADC0_STATE_EOCIE,		13
	.EQU	ADC0_STATE_EOCIC,		12
	.EQU	ADC0_STATE_EOCIF,		11
	.EQU	ADC0_STATE_WDIE,		10
	.EQU	ADC0_STATE_HPENDIE,		9
	.EQU	ADC0_STATE_ENDIE,		8
	.EQU	ADC0_STATE_WDIC,		7
	.EQU	ADC0_STATE_HPENDIC,		6
	.EQU	ADC0_STATE_ENDIC,		5
	.EQU	ADC0_STATE_WDIF,		4
	.EQU	ADC0_STATE_HPENDIF,		3
	.EQU	ADC0_STATE_ENDIF,		2
	.EQU	ADC0_STATE_HPSTARTIF,		1
	.EQU	ADC0_STATE_STARTIF,		0
//  register-------------------------------------
	.EQU	ADC0_DELAY,	0x400005D4
//  0x4000 05D4  ADC0_DELAY   Bits-------------------------------------
	.EQU	ADC0_DELAY_FDELAY5,		5
	.EQU	ADC0_DELAY_FDELAY4,		4
	.EQU	ADC0_DELAY_FDELAY3,		3
	.EQU	ADC0_DELAY_FDELAY2,		2
	.EQU	ADC0_DELAY_FDELAY1,		1
	.EQU	ADC0_DELAY_FDELAY0,		0
//  register-------------------------------------
	.EQU	ADC0_SCANCTL,	0x400005D8
//  0x4000 05D8  ADC0_SCANCTL   Bits-------------------------------------
	.EQU	ADC0_SCANCTL_SAMSEL3,		27
	.EQU	ADC0_SCANCTL_SAMSEL2,		26
	.EQU	ADC0_SCANCTL_SAMSEL1,		25
	.EQU	ADC0_SCANCTL_SAMSEL0,		24
	.EQU	ADC0_SCANCTL_WDCH6,		22
	.EQU	ADC0_SCANCTL_WDCH5,		21
	.EQU	ADC0_SCANCTL_WDCH4,		20
	.EQU	ADC0_SCANCTL_WDCH3,		19
	.EQU	ADC0_SCANCTL_WDCH2,		18
	.EQU	ADC0_SCANCTL_WDCH1,		17
	.EQU	ADC0_SCANCTL_WDCH0,		16
	.EQU	ADC0_SCANCTL_HSLEN1,		5
	.EQU	ADC0_SCANCTL_HSLEN0,		4
	.EQU	ADC0_SCANCTL_SLEN3,		3
	.EQU	ADC0_SCANCTL_SLEN2,		2
	.EQU	ADC0_SCANCTL_SLEN1,		1
	.EQU	ADC0_SCANCTL_SLEN0,		0
//  register-------------------------------------
	.EQU	ADC1_CTL0,		0x40000600
//  0x4000 0600  ADC1_CTL0   Bits-------------------------------------
	.EQU	ADC1_CTL0_WDSCH,		31
	.EQU	ADC1_CTL0_HPWDEN,		30
	.EQU	ADC1_CTL0_WDEN,		29
	.EQU	ADC1_CTL0_DSNUM2,		28
	.EQU	ADC1_CTL0_DSNUM1,		27
	.EQU	ADC1_CTL0_DSNUM0,		26
	.EQU	ADC1_CTL0_HP3DMAEN,		25
	.EQU	ADC1_CTL0_HP2DMAEN,		24
	.EQU	ADC1_CTL0_HP1DMAEN,		23
	.EQU	ADC1_CTL0_HP0DMAEN,		22
	.EQU	ADC1_CTL0_HPDSEN,		21
	.EQU	ADC1_CTL0_DSEN,		20
	.EQU	ADC1_CTL0_HPAUTO,		19
	.EQU	ADC1_CTL0_CONT,		18
	.EQU	ADC1_CTL0_SCANEN,		17
	.EQU	ADC1_CTL0_BOSSSELCOMP,		16
	.EQU	ADC1_CTL0_BOSSSEL,		15
	.EQU	ADC1_CTL0_TRIMIBIAS,		14
	.EQU	ADC1_CTL0_NDMAEN,		13
	.EQU	ADC1_CTL0_ADCCLKS2,		10
	.EQU	ADC1_CTL0_ADCCLKS1,		9
	.EQU	ADC1_CTL0_ADCCLKS0,		8
	.EQU	ADC1_CTL0_LR,		3
	.EQU	ADC1_CTL0_CLKS1,		2
	.EQU	ADC1_CTL0_CLKS0,		1
	.EQU	ADC1_CTL0_EN,		0
//  register-------------------------------------
	.EQU	ADC1_CTL1,		0x40000604
//  0x4000 0604  ADC1_CTL1   Bits-------------------------------------
	.EQU	ADC1_CTL1_DOUMOD3,		31
	.EQU	ADC1_CTL1_DOUMOD2,		30
	.EQU	ADC1_CTL1_DOUMOD1,		29
	.EQU	ADC1_CTL1_DOUMOD0,		28
	.EQU	ADC1_CTL1_HPEXTEN,		27
	.EQU	ADC1_CTL1_HCH6,		26
	.EQU	ADC1_CTL1_HCH5,		25
	.EQU	ADC1_CTL1_HCH4,		24
	.EQU	ADC1_CTL1_HCH3,		23
	.EQU	ADC1_CTL1_HCH2,		22
	.EQU	ADC1_CTL1_HCH1,		21
	.EQU	ADC1_CTL1_HCH0,		20
	.EQU	ADC1_CTL1_REF2,		19
	.EQU	ADC1_CTL1_REF1,		18
	.EQU	ADC1_CTL1_REF0,		17
	.EQU	ADC1_CTL1_EXTEN,		11
	.EQU	ADC1_CTL1_NCH6,		10
	.EQU	ADC1_CTL1_NCH5,		9
	.EQU	ADC1_CTL1_NCH4,		8
	.EQU	ADC1_CTL1_NCH3,		7
	.EQU	ADC1_CTL1_NCH2,		6
	.EQU	ADC1_CTL1_NCH1,		5
	.EQU	ADC1_CTL1_NCH0,		4
	.EQU	ADC1_CTL1_HPSTART,		3
	.EQU	ADC1_CTL1_START,		2
//  register-------------------------------------
	.EQU	ADC1_SCANSQ0,	0x40000608
//  0x4000 0608  ADC1_SCANSQ0   Bits-------------------------------------
	.EQU	ADC1_SCANSQ0_SSQ3_7,		31
	.EQU	ADC1_SCANSQ0_SSQ3_6,		30
	.EQU	ADC1_SCANSQ0_SSQ3_5,		29
	.EQU	ADC1_SCANSQ0_SSQ3_4,		28
	.EQU	ADC1_SCANSQ0_SSQ3_3,		27
	.EQU	ADC1_SCANSQ0_SSQ3_2,		26
	.EQU	ADC1_SCANSQ0_SSQ3_1,		25
	.EQU	ADC1_SCANSQ0_SSQ3_0,		24
	.EQU	ADC1_SCANSQ0_SSQ2_7,		23
	.EQU	ADC1_SCANSQ0_SSQ2_6,		22
	.EQU	ADC1_SCANSQ0_SSQ2_5,		21
	.EQU	ADC1_SCANSQ0_SSQ2_4,		20
	.EQU	ADC1_SCANSQ0_SSQ2_3,		19
	.EQU	ADC1_SCANSQ0_SSQ2_2,		18
	.EQU	ADC1_SCANSQ0_SSQ2_1,		17
	.EQU	ADC1_SCANSQ0_SSQ2_0,		16
	.EQU	ADC1_SCANSQ0_SSQ1_7,		15
	.EQU	ADC1_SCANSQ0_SSQ1_6,		14
	.EQU	ADC1_SCANSQ0_SSQ1_5,		13
	.EQU	ADC1_SCANSQ0_SSQ1_4,		12
	.EQU	ADC1_SCANSQ0_SSQ1_3,		11
	.EQU	ADC1_SCANSQ0_SSQ1_2,		10
	.EQU	ADC1_SCANSQ0_SSQ1_1,		9
	.EQU	ADC1_SCANSQ0_SSQ1_0,		8
	.EQU	ADC1_SCANSQ0_SSQ0_7,		7
	.EQU	ADC1_SCANSQ0_SSQ0_6,		6
	.EQU	ADC1_SCANSQ0_SSQ0_5,		5
	.EQU	ADC1_SCANSQ0_SSQ0_4,		4
	.EQU	ADC1_SCANSQ0_SSQ0_3,		3
	.EQU	ADC1_SCANSQ0_SSQ0_2,		2
	.EQU	ADC1_SCANSQ0_SSQ0_1,		1
	.EQU	ADC1_SCANSQ0_SSQ0_0,		0
//  register-------------------------------------
	.EQU	ADC1_SCANSQ1,	0x4000060C
//  0x4000 060C  ADC1_SCANSQ1   Bits-------------------------------------
	.EQU	ADC1_SCANSQ1_SSQ7_7,		31
	.EQU	ADC1_SCANSQ1_SSQ7_6,		30
	.EQU	ADC1_SCANSQ1_SSQ7_5,		29
	.EQU	ADC1_SCANSQ1_SSQ7_4,		28
	.EQU	ADC1_SCANSQ1_SSQ7_3,		27
	.EQU	ADC1_SCANSQ1_SSQ7_2,		26
	.EQU	ADC1_SCANSQ1_SSQ7_1,		25
	.EQU	ADC1_SCANSQ1_SSQ7_0,		24
	.EQU	ADC1_SCANSQ1_SSQ6_7,		23
	.EQU	ADC1_SCANSQ1_SSQ6_6,		22
	.EQU	ADC1_SCANSQ1_SSQ6_5,		21
	.EQU	ADC1_SCANSQ1_SSQ6_4,		20
	.EQU	ADC1_SCANSQ1_SSQ6_3,		19
	.EQU	ADC1_SCANSQ1_SSQ6_2,		18
	.EQU	ADC1_SCANSQ1_SSQ6_1,		17
	.EQU	ADC1_SCANSQ1_SSQ6_0,		16
	.EQU	ADC1_SCANSQ1_SSQ5_7,		15
	.EQU	ADC1_SCANSQ1_SSQ5_6,		14
	.EQU	ADC1_SCANSQ1_SSQ5_5,		13
	.EQU	ADC1_SCANSQ1_SSQ5_4,		12
	.EQU	ADC1_SCANSQ1_SSQ5_3,		11
	.EQU	ADC1_SCANSQ1_SSQ5_2,		10
	.EQU	ADC1_SCANSQ1_SSQ5_1,		9
	.EQU	ADC1_SCANSQ1_SSQ5_0,		8
	.EQU	ADC1_SCANSQ1_SSQ4_7,		7
	.EQU	ADC1_SCANSQ1_SSQ4_6,		6
	.EQU	ADC1_SCANSQ1_SSQ4_5,		5
	.EQU	ADC1_SCANSQ1_SSQ4_4,		4
	.EQU	ADC1_SCANSQ1_SSQ4_3,		3
	.EQU	ADC1_SCANSQ1_SSQ4_2,		2
	.EQU	ADC1_SCANSQ1_SSQ4_1,		1
	.EQU	ADC1_SCANSQ1_SSQ4_0,		0
//  register-------------------------------------
	.EQU	ADC1_SCANSQ2,	0x40000610
//  0x4000 0610  ADC1_SCANSQ2   Bits-------------------------------------
	.EQU	ADC1_SCANSQ2_SSQ11_7,		31
	.EQU	ADC1_SCANSQ2_SSQ11_6,		30
	.EQU	ADC1_SCANSQ2_SSQ11_5,		29
	.EQU	ADC1_SCANSQ2_SSQ11_4,		28
	.EQU	ADC1_SCANSQ2_SSQ11_3,		27
	.EQU	ADC1_SCANSQ2_SSQ11_2,		26
	.EQU	ADC1_SCANSQ2_SSQ11_1,		25
	.EQU	ADC1_SCANSQ2_SSQ11_0,		24
	.EQU	ADC1_SCANSQ2_SSQ10_7,		23
	.EQU	ADC1_SCANSQ2_SSQ10_6,		22
	.EQU	ADC1_SCANSQ2_SSQ10_5,		21
	.EQU	ADC1_SCANSQ2_SSQ10_4,		20
	.EQU	ADC1_SCANSQ2_SSQ10_3,		19
	.EQU	ADC1_SCANSQ2_SSQ10_2,		18
	.EQU	ADC1_SCANSQ2_SSQ10_1,		17
	.EQU	ADC1_SCANSQ2_SSQ10_0,		16
	.EQU	ADC1_SCANSQ2_SSQ9_7,		15
	.EQU	ADC1_SCANSQ2_SSQ9_6,		14
	.EQU	ADC1_SCANSQ2_SSQ9_5,		13
	.EQU	ADC1_SCANSQ2_SSQ9_4,		12
	.EQU	ADC1_SCANSQ2_SSQ9_3,		11
	.EQU	ADC1_SCANSQ2_SSQ9_2,		10
	.EQU	ADC1_SCANSQ2_SSQ9_1,		9
	.EQU	ADC1_SCANSQ2_SSQ9_0,		8
	.EQU	ADC1_SCANSQ2_SSQ8_7,		7
	.EQU	ADC1_SCANSQ2_SSQ8_6,		6
	.EQU	ADC1_SCANSQ2_SSQ8_5,		5
	.EQU	ADC1_SCANSQ2_SSQ8_4,		4
	.EQU	ADC1_SCANSQ2_SSQ8_3,		3
	.EQU	ADC1_SCANSQ2_SSQ8_2,		2
	.EQU	ADC1_SCANSQ2_SSQ8_1,		1
	.EQU	ADC1_SCANSQ2_SSQ8_0,		0
//  register-------------------------------------
	.EQU	ADC1_SCANSQ3,	0x40000644
//  0x4000 0644  ADC1_SCANSQ3   Bits-------------------------------------
	.EQU	ADC1_SCANSQ3_SSQ15_7,		31
	.EQU	ADC1_SCANSQ3_SSQ15_6,		30
	.EQU	ADC1_SCANSQ3_SSQ15_5,		29
	.EQU	ADC1_SCANSQ3_SSQ15_4,		28
	.EQU	ADC1_SCANSQ3_SSQ15_3,		27
	.EQU	ADC1_SCANSQ3_SSQ15_2,		26
	.EQU	ADC1_SCANSQ3_SSQ15_1,		25
	.EQU	ADC1_SCANSQ3_SSQ15_0,		24
	.EQU	ADC1_SCANSQ3_SSQ14_7,		23
	.EQU	ADC1_SCANSQ3_SSQ14_6,		22
	.EQU	ADC1_SCANSQ3_SSQ14_5,		21
	.EQU	ADC1_SCANSQ3_SSQ14_4,		20
	.EQU	ADC1_SCANSQ3_SSQ14_3,		19
	.EQU	ADC1_SCANSQ3_SSQ14_2,		18
	.EQU	ADC1_SCANSQ3_SSQ14_1,		17
	.EQU	ADC1_SCANSQ3_SSQ14_0,		16
	.EQU	ADC1_SCANSQ3_SSQ13_7,		15
	.EQU	ADC1_SCANSQ3_SSQ13_6,		14
	.EQU	ADC1_SCANSQ3_SSQ13_5,		13
	.EQU	ADC1_SCANSQ3_SSQ13_4,		12
	.EQU	ADC1_SCANSQ3_SSQ13_3,		11
	.EQU	ADC1_SCANSQ3_SSQ13_2,		10
	.EQU	ADC1_SCANSQ3_SSQ13_1,		9
	.EQU	ADC1_SCANSQ3_SSQ13_0,		8
	.EQU	ADC1_SCANSQ3_SSQ12_7,		7
	.EQU	ADC1_SCANSQ3_SSQ12_6,		6
	.EQU	ADC1_SCANSQ3_SSQ12_5,		5
	.EQU	ADC1_SCANSQ3_SSQ12_4,		4
	.EQU	ADC1_SCANSQ3_SSQ12_3,		3
	.EQU	ADC1_SCANSQ3_SSQ12_2,		2
	.EQU	ADC1_SCANSQ3_SSQ12_1,		1
	.EQU	ADC1_SCANSQ3_SSQ12_0,		0
//  register-------------------------------------
	.EQU	ADC1_HSCANSQ,	0x40000614
//  0x4000 0614  ADC1_HSCANSQ   Bits-------------------------------------
	.EQU	ADC1_HSCANSQ_HSSQ3_7,		31
	.EQU	ADC1_HSCANSQ_HSSQ3_6,		30
	.EQU	ADC1_HSCANSQ_HSSQ3_5,		29
	.EQU	ADC1_HSCANSQ_HSSQ3_4,		28
	.EQU	ADC1_HSCANSQ_HSSQ3_3,		27
	.EQU	ADC1_HSCANSQ_HSSQ3_2,		26
	.EQU	ADC1_HSCANSQ_HSSQ3_1,		25
	.EQU	ADC1_HSCANSQ_HSSQ3_0,		24
	.EQU	ADC1_HSCANSQ_HSSQ2_7,		23
	.EQU	ADC1_HSCANSQ_HSSQ2_6,		22
	.EQU	ADC1_HSCANSQ_HSSQ2_5,		21
	.EQU	ADC1_HSCANSQ_HSSQ2_4,		20
	.EQU	ADC1_HSCANSQ_HSSQ2_3,		19
	.EQU	ADC1_HSCANSQ_HSSQ2_2,		18
	.EQU	ADC1_HSCANSQ_HSSQ2_1,		17
	.EQU	ADC1_HSCANSQ_HSSQ2_0,		16
	.EQU	ADC1_HSCANSQ_HSSQ1_7,		15
	.EQU	ADC1_HSCANSQ_HSSQ1_6,		14
	.EQU	ADC1_HSCANSQ_HSSQ1_5,		13
	.EQU	ADC1_HSCANSQ_HSSQ1_4,		12
	.EQU	ADC1_HSCANSQ_HSSQ1_3,		11
	.EQU	ADC1_HSCANSQ_HSSQ1_2,		10
	.EQU	ADC1_HSCANSQ_HSSQ1_1,		9
	.EQU	ADC1_HSCANSQ_HSSQ1_0,		8
	.EQU	ADC1_HSCANSQ_HSSQ0_7,		7
	.EQU	ADC1_HSCANSQ_HSSQ0_6,		6
	.EQU	ADC1_HSCANSQ_HSSQ0_5,		5
	.EQU	ADC1_HSCANSQ_HSSQ0_4,		4
	.EQU	ADC1_HSCANSQ_HSSQ0_3,		3
	.EQU	ADC1_HSCANSQ_HSSQ0_2,		2
	.EQU	ADC1_HSCANSQ_HSSQ0_1,		1
	.EQU	ADC1_HSCANSQ_HSSQ0_0,		0
//  register-------------------------------------
	.EQU	ADC1_WDH,		0x40000618
//  0x4000 0618  ADC1_WDH   Bits-------------------------------------
	.EQU	ADC1_WDH_WDH11,		11
	.EQU	ADC1_WDH_WDH10,		10
	.EQU	ADC1_WDH_WDH9,		9
	.EQU	ADC1_WDH_WDH8,		8
	.EQU	ADC1_WDH_WDH7,		7
	.EQU	ADC1_WDH_WDH6,		6
	.EQU	ADC1_WDH_WDH5,		5
	.EQU	ADC1_WDH_WDH4,		4
	.EQU	ADC1_WDH_WDH3,		3
	.EQU	ADC1_WDH_WDH2,		2
	.EQU	ADC1_WDH_WDH1,		1
	.EQU	ADC1_WDH_WDH0,		0
//  register-------------------------------------
	.EQU	ADC1_WDL,		0x4000061C
//  0x4000 061C  ADC1_WDL   Bits-------------------------------------
	.EQU	ADC1_WDL_WDL11,		11
	.EQU	ADC1_WDL_WDL10,		10
	.EQU	ADC1_WDL_WDL9,		9
	.EQU	ADC1_WDL_WDL8,		8
	.EQU	ADC1_WDL_WDL7,		7
	.EQU	ADC1_WDL_WDL6,		6
	.EQU	ADC1_WDL_WDL5,		5
	.EQU	ADC1_WDL_WDL4,		4
	.EQU	ADC1_WDL_WDL3,		3
	.EQU	ADC1_WDL_WDL2,		2
	.EQU	ADC1_WDL_WDL1,		1
	.EQU	ADC1_WDL_WDL0,		0
//  register-------------------------------------
	.EQU	ADC1_DATA,		0x40000620
//  0x4000 0620  ADC1_DATA   Bits-------------------------------------
	.EQU	ADC1_DATA_DATA15,		15
	.EQU	ADC1_DATA_DATA14,		14
	.EQU	ADC1_DATA_DATA13,		13
	.EQU	ADC1_DATA_DATA12,		12
	.EQU	ADC1_DATA_DATA11,		11
	.EQU	ADC1_DATA_DATA10,		10
	.EQU	ADC1_DATA_DATA9,		9
	.EQU	ADC1_DATA_DATA8,		8
	.EQU	ADC1_DATA_DATA7,		7
	.EQU	ADC1_DATA_DATA6,		6
	.EQU	ADC1_DATA_DATA5,		5
	.EQU	ADC1_DATA_DATA4,		4
	.EQU	ADC1_DATA_DATA3,		3
	.EQU	ADC1_DATA_DATA2,		2
	.EQU	ADC1_DATA_DATA1,		1
	.EQU	ADC1_DATA_DATA0,		0
//  register-------------------------------------
	.EQU	ADC1_HPDATA0,	0x40000624
//  0x4000 0624  ADC1_HPDATA0   Bits-------------------------------------
	.EQU	ADC1_HPDATA0_HPDATA15,		15
	.EQU	ADC1_HPDATA0_HPDATA14,		14
	.EQU	ADC1_HPDATA0_HPDATA13,		13
	.EQU	ADC1_HPDATA0_HPDATA12,		12
	.EQU	ADC1_HPDATA0_HPDATA11,		11
	.EQU	ADC1_HPDATA0_HPDATA10,		10
	.EQU	ADC1_HPDATA0_HPDATA9,		9
	.EQU	ADC1_HPDATA0_HPDATA8,		8
	.EQU	ADC1_HPDATA0_HPDATA7,		7
	.EQU	ADC1_HPDATA0_HPDATA6,		6
	.EQU	ADC1_HPDATA0_HPDATA5,		5
	.EQU	ADC1_HPDATA0_HPDATA4,		4
	.EQU	ADC1_HPDATA0_HPDATA3,		3
	.EQU	ADC1_HPDATA0_HPDATA2,		2
	.EQU	ADC1_HPDATA0_HPDATA1,		1
	.EQU	ADC1_HPDATA0_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC1_HPDATA1,	0x40000628
//  0x4000 0628  ADC1_HPDATA1   Bits-------------------------------------
	.EQU	ADC1_HPDATA1_HPDATA15,		15
	.EQU	ADC1_HPDATA1_HPDATA14,		14
	.EQU	ADC1_HPDATA1_HPDATA13,		13
	.EQU	ADC1_HPDATA1_HPDATA12,		12
	.EQU	ADC1_HPDATA1_HPDATA11,		11
	.EQU	ADC1_HPDATA1_HPDATA10,		10
	.EQU	ADC1_HPDATA1_HPDATA9,		9
	.EQU	ADC1_HPDATA1_HPDATA8,		8
	.EQU	ADC1_HPDATA1_HPDATA7,		7
	.EQU	ADC1_HPDATA1_HPDATA6,		6
	.EQU	ADC1_HPDATA1_HPDATA5,		5
	.EQU	ADC1_HPDATA1_HPDATA4,		4
	.EQU	ADC1_HPDATA1_HPDATA3,		3
	.EQU	ADC1_HPDATA1_HPDATA2,		2
	.EQU	ADC1_HPDATA1_HPDATA1,		1
	.EQU	ADC1_HPDATA1_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC1_HPDATA2,	0x4000062C
//  0x4000 062C  ADC1_HPDATA2   Bits-------------------------------------
	.EQU	ADC1_HPDATA2_HPDATA15,		15
	.EQU	ADC1_HPDATA2_HPDATA14,		14
	.EQU	ADC1_HPDATA2_HPDATA13,		13
	.EQU	ADC1_HPDATA2_HPDATA12,		12
	.EQU	ADC1_HPDATA2_HPDATA11,		11
	.EQU	ADC1_HPDATA2_HPDATA10,		10
	.EQU	ADC1_HPDATA2_HPDATA9,		9
	.EQU	ADC1_HPDATA2_HPDATA8,		8
	.EQU	ADC1_HPDATA2_HPDATA7,		7
	.EQU	ADC1_HPDATA2_HPDATA6,		6
	.EQU	ADC1_HPDATA2_HPDATA5,		5
	.EQU	ADC1_HPDATA2_HPDATA4,		4
	.EQU	ADC1_HPDATA2_HPDATA3,		3
	.EQU	ADC1_HPDATA2_HPDATA2,		2
	.EQU	ADC1_HPDATA2_HPDATA1,		1
	.EQU	ADC1_HPDATA2_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC1_HPDATA3,	0x40000630
//  0x4000 0630  ADC1_HPDATA3   Bits-------------------------------------
	.EQU	ADC1_HPDATA3_HPDATA15,		15
	.EQU	ADC1_HPDATA3_HPDATA14,		14
	.EQU	ADC1_HPDATA3_HPDATA13,		13
	.EQU	ADC1_HPDATA3_HPDATA12,		12
	.EQU	ADC1_HPDATA3_HPDATA11,		11
	.EQU	ADC1_HPDATA3_HPDATA10,		10
	.EQU	ADC1_HPDATA3_HPDATA9,		9
	.EQU	ADC1_HPDATA3_HPDATA8,		8
	.EQU	ADC1_HPDATA3_HPDATA7,		7
	.EQU	ADC1_HPDATA3_HPDATA6,		6
	.EQU	ADC1_HPDATA3_HPDATA5,		5
	.EQU	ADC1_HPDATA3_HPDATA4,		4
	.EQU	ADC1_HPDATA3_HPDATA3,		3
	.EQU	ADC1_HPDATA3_HPDATA2,		2
	.EQU	ADC1_HPDATA3_HPDATA1,		1
	.EQU	ADC1_HPDATA3_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC1_HPDOFF0,	0x40000634
//  0x4000 0634  ADC1_HPDOFF0   Bits-------------------------------------
	.EQU	ADC1_HPDOFF0_HPDOFF11,		11
	.EQU	ADC1_HPDOFF0_HPDOFF10,		10
	.EQU	ADC1_HPDOFF0_HPDOFF9,		9
	.EQU	ADC1_HPDOFF0_HPDOFF8,		8
	.EQU	ADC1_HPDOFF0_HPDOFF7,		7
	.EQU	ADC1_HPDOFF0_HPDOFF6,		6
	.EQU	ADC1_HPDOFF0_HPDOFF5,		5
	.EQU	ADC1_HPDOFF0_HPDOFF4,		4
	.EQU	ADC1_HPDOFF0_HPDOFF3,		3
	.EQU	ADC1_HPDOFF0_HPDOFF2,		2
	.EQU	ADC1_HPDOFF0_HPDOFF1,		1
	.EQU	ADC1_HPDOFF0_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC1_HPDOFF1,	0x40000638
//  0x4000 0638  ADC1_HPDOFF1   Bits-------------------------------------
	.EQU	ADC1_HPDOFF1_HPDOFF11,		11
	.EQU	ADC1_HPDOFF1_HPDOFF10,		10
	.EQU	ADC1_HPDOFF1_HPDOFF9,		9
	.EQU	ADC1_HPDOFF1_HPDOFF8,		8
	.EQU	ADC1_HPDOFF1_HPDOFF7,		7
	.EQU	ADC1_HPDOFF1_HPDOFF6,		6
	.EQU	ADC1_HPDOFF1_HPDOFF5,		5
	.EQU	ADC1_HPDOFF1_HPDOFF4,		4
	.EQU	ADC1_HPDOFF1_HPDOFF3,		3
	.EQU	ADC1_HPDOFF1_HPDOFF2,		2
	.EQU	ADC1_HPDOFF1_HPDOFF1,		1
	.EQU	ADC1_HPDOFF1_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC1_HPDOFF2,	0x4000063C
//  0x4000 063C  ADC1_HPDOFF2   Bits-------------------------------------
	.EQU	ADC1_HPDOFF2_HPDOFF11,		11
	.EQU	ADC1_HPDOFF2_HPDOFF10,		10
	.EQU	ADC1_HPDOFF2_HPDOFF9,		9
	.EQU	ADC1_HPDOFF2_HPDOFF8,		8
	.EQU	ADC1_HPDOFF2_HPDOFF7,		7
	.EQU	ADC1_HPDOFF2_HPDOFF6,		6
	.EQU	ADC1_HPDOFF2_HPDOFF5,		5
	.EQU	ADC1_HPDOFF2_HPDOFF4,		4
	.EQU	ADC1_HPDOFF2_HPDOFF3,		3
	.EQU	ADC1_HPDOFF2_HPDOFF2,		2
	.EQU	ADC1_HPDOFF2_HPDOFF1,		1
	.EQU	ADC1_HPDOFF2_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC1_HPDOFF3,	0x40000640
//  0x4000 0640  ADC1_HPDOFF3   Bits-------------------------------------
	.EQU	ADC1_HPDOFF3_HPDOFF11,		11
	.EQU	ADC1_HPDOFF3_HPDOFF10,		10
	.EQU	ADC1_HPDOFF3_HPDOFF9,		9
	.EQU	ADC1_HPDOFF3_HPDOFF8,		8
	.EQU	ADC1_HPDOFF3_HPDOFF7,		7
	.EQU	ADC1_HPDOFF3_HPDOFF6,		6
	.EQU	ADC1_HPDOFF3_HPDOFF5,		5
	.EQU	ADC1_HPDOFF3_HPDOFF4,		4
	.EQU	ADC1_HPDOFF3_HPDOFF3,		3
	.EQU	ADC1_HPDOFF3_HPDOFF2,		2
	.EQU	ADC1_HPDOFF3_HPDOFF1,		1
	.EQU	ADC1_HPDOFF3_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC1_STATE,	0x40000650
//  0x4000 0650  ADC1_STATE   Bits-------------------------------------
	.EQU	ADC1_STATE_TRIMERROR1,		31
	.EQU	ADC1_STATE_TRIMERROR0,		30
	.EQU	ADC1_STATE_TRIMIBIASOPA,		27
	.EQU	ADC1_STATE_CCR2H,		19
	.EQU	ADC1_STATE_CCR2N,		18
	.EQU	ADC1_STATE_CCR1H,		17
	.EQU	ADC1_STATE_CCR1N,		16
	.EQU	ADC1_STATE_CCR0H,		15
	.EQU	ADC1_STATE_CCR0N,		14
	.EQU	ADC1_STATE_EOCIE,		13
	.EQU	ADC1_STATE_EOCIC,		12
	.EQU	ADC1_STATE_EOCIF,		11
	.EQU	ADC1_STATE_WDIE,		10
	.EQU	ADC1_STATE_HPENDIE,		9
	.EQU	ADC1_STATE_ENDIE,		8
	.EQU	ADC1_STATE_WDIC,		7
	.EQU	ADC1_STATE_HPENDIC,		6
	.EQU	ADC1_STATE_ENDIC,		5
	.EQU	ADC1_STATE_WDIF,		4
	.EQU	ADC1_STATE_HPENDIF,		3
	.EQU	ADC1_STATE_ENDIF,		2
	.EQU	ADC1_STATE_HPSTARTIF,		1
	.EQU	ADC1_STATE_STARTIF,		0
//  register-------------------------------------
	.EQU	ADC1_SCANCTL,	0x40000658
//  0x4000 0658  ADC1_SCANCTL   Bits-------------------------------------
	.EQU	ADC1_SCANCTL_SAMSEL3,		27
	.EQU	ADC1_SCANCTL_SAMSEL2,		26
	.EQU	ADC1_SCANCTL_SAMSEL1,		25
	.EQU	ADC1_SCANCTL_SAMSEL0,		24
	.EQU	ADC1_SCANCTL_WDCH6,		22
	.EQU	ADC1_SCANCTL_WDCH5,		21
	.EQU	ADC1_SCANCTL_WDCH4,		20
	.EQU	ADC1_SCANCTL_WDCH3,		19
	.EQU	ADC1_SCANCTL_WDCH2,		18
	.EQU	ADC1_SCANCTL_WDCH1,		17
	.EQU	ADC1_SCANCTL_WDCH0,		16
	.EQU	ADC1_SCANCTL_HSLEN1,		5
	.EQU	ADC1_SCANCTL_HSLEN0,		4
	.EQU	ADC1_SCANCTL_SLEN3,		3
	.EQU	ADC1_SCANCTL_SLEN2,		2
	.EQU	ADC1_SCANCTL_SLEN1,		1
	.EQU	ADC1_SCANCTL_SLEN0,		0
//  register-------------------------------------
	.EQU	ADC2_CTL0,		0x40000680
//  0x4000 0680  ADC2_CTL0   Bits-------------------------------------
	.EQU	ADC2_CTL0_WDSCH,		31
	.EQU	ADC2_CTL0_HPWDEN,		30
	.EQU	ADC2_CTL0_WDEN,		29
	.EQU	ADC2_CTL0_DSNUM2,		28
	.EQU	ADC2_CTL0_DSNUM1,		27
	.EQU	ADC2_CTL0_DSNUM0,		26
	.EQU	ADC2_CTL0_HP3DMAEN,		25
	.EQU	ADC2_CTL0_HP2DMAEN,		24
	.EQU	ADC2_CTL0_HP1DMAEN,		23
	.EQU	ADC2_CTL0_HP0DMAEN,		22
	.EQU	ADC2_CTL0_HPDSEN,		21
	.EQU	ADC2_CTL0_DSEN,		20
	.EQU	ADC2_CTL0_HPAUTO,		19
	.EQU	ADC2_CTL0_CONT,		18
	.EQU	ADC2_CTL0_SCANEN,		17
	.EQU	ADC2_CTL0_BOSSSELCOMP,		16
	.EQU	ADC2_CTL0_BOSSSEL,		15
	.EQU	ADC2_CTL0_TRIMIBIAS,		14
	.EQU	ADC2_CTL0_NDMAEN,		13
	.EQU	ADC2_CTL0_ADCCLKS2,		10
	.EQU	ADC2_CTL0_ADCCLKS1,		9
	.EQU	ADC2_CTL0_ADCCLKS0,		8
	.EQU	ADC2_CTL0_LR,		3
	.EQU	ADC2_CTL0_CLKS1,		2
	.EQU	ADC2_CTL0_CLKS0,		1
	.EQU	ADC2_CTL0_EN,		0
//  register-------------------------------------
	.EQU	ADC2_CTL1,		0x40000684
//  0x4000 0684  ADC2_CTL1   Bits-------------------------------------
	.EQU	ADC2_CTL1_DOUMOD3,		31
	.EQU	ADC2_CTL1_DOUMOD2,		30
	.EQU	ADC2_CTL1_DOUMOD1,		29
	.EQU	ADC2_CTL1_DOUMOD0,		28
	.EQU	ADC2_CTL1_HPEXTEN,		27
	.EQU	ADC2_CTL1_HCH6,		26
	.EQU	ADC2_CTL1_HCH5,		25
	.EQU	ADC2_CTL1_HCH4,		24
	.EQU	ADC2_CTL1_HCH3,		23
	.EQU	ADC2_CTL1_HCH2,		22
	.EQU	ADC2_CTL1_HCH1,		21
	.EQU	ADC2_CTL1_HCH0,		20
	.EQU	ADC2_CTL1_REF2,		19
	.EQU	ADC2_CTL1_REF1,		18
	.EQU	ADC2_CTL1_REF0,		17
	.EQU	ADC2_CTL1_EXTEN,		11
	.EQU	ADC2_CTL1_NCH6,		10
	.EQU	ADC2_CTL1_NCH5,		9
	.EQU	ADC2_CTL1_NCH4,		8
	.EQU	ADC2_CTL1_NCH3,		7
	.EQU	ADC2_CTL1_NCH2,		6
	.EQU	ADC2_CTL1_NCH1,		5
	.EQU	ADC2_CTL1_NCH0,		4
	.EQU	ADC2_CTL1_HPSTART,		3
	.EQU	ADC2_CTL1_START,		2
//  register-------------------------------------
	.EQU	ADC2_SCANSQ0,	0x40000688
//  0x4000 0688  ADC2_SCANSQ0   Bits-------------------------------------
	.EQU	ADC2_SCANSQ0_SSQ3_7,		31
	.EQU	ADC2_SCANSQ0_SSQ3_6,		30
	.EQU	ADC2_SCANSQ0_SSQ3_5,		29
	.EQU	ADC2_SCANSQ0_SSQ3_4,		28
	.EQU	ADC2_SCANSQ0_SSQ3_3,		27
	.EQU	ADC2_SCANSQ0_SSQ3_2,		26
	.EQU	ADC2_SCANSQ0_SSQ3_1,		25
	.EQU	ADC2_SCANSQ0_SSQ3_0,		24
	.EQU	ADC2_SCANSQ0_SSQ2_7,		23
	.EQU	ADC2_SCANSQ0_SSQ2_6,		22
	.EQU	ADC2_SCANSQ0_SSQ2_5,		21
	.EQU	ADC2_SCANSQ0_SSQ2_4,		20
	.EQU	ADC2_SCANSQ0_SSQ2_3,		19
	.EQU	ADC2_SCANSQ0_SSQ2_2,		18
	.EQU	ADC2_SCANSQ0_SSQ2_1,		17
	.EQU	ADC2_SCANSQ0_SSQ2_0,		16
	.EQU	ADC2_SCANSQ0_SSQ1_7,		15
	.EQU	ADC2_SCANSQ0_SSQ1_6,		14
	.EQU	ADC2_SCANSQ0_SSQ1_5,		13
	.EQU	ADC2_SCANSQ0_SSQ1_4,		12
	.EQU	ADC2_SCANSQ0_SSQ1_3,		11
	.EQU	ADC2_SCANSQ0_SSQ1_2,		10
	.EQU	ADC2_SCANSQ0_SSQ1_1,		9
	.EQU	ADC2_SCANSQ0_SSQ1_0,		8
	.EQU	ADC2_SCANSQ0_SSQ0_7,		7
	.EQU	ADC2_SCANSQ0_SSQ0_6,		6
	.EQU	ADC2_SCANSQ0_SSQ0_5,		5
	.EQU	ADC2_SCANSQ0_SSQ0_4,		4
	.EQU	ADC2_SCANSQ0_SSQ0_3,		3
	.EQU	ADC2_SCANSQ0_SSQ0_2,		2
	.EQU	ADC2_SCANSQ0_SSQ0_1,		1
	.EQU	ADC2_SCANSQ0_SSQ0_0,		0
//  register-------------------------------------
	.EQU	ADC2_SCANSQ1,	0x4000068C
//  0x4000 068C  ADC2_SCANSQ1   Bits-------------------------------------
	.EQU	ADC2_SCANSQ1_SSQ7_7,		31
	.EQU	ADC2_SCANSQ1_SSQ7_6,		30
	.EQU	ADC2_SCANSQ1_SSQ7_5,		29
	.EQU	ADC2_SCANSQ1_SSQ7_4,		28
	.EQU	ADC2_SCANSQ1_SSQ7_3,		27
	.EQU	ADC2_SCANSQ1_SSQ7_2,		26
	.EQU	ADC2_SCANSQ1_SSQ7_1,		25
	.EQU	ADC2_SCANSQ1_SSQ7_0,		24
	.EQU	ADC2_SCANSQ1_SSQ6_7,		23
	.EQU	ADC2_SCANSQ1_SSQ6_6,		22
	.EQU	ADC2_SCANSQ1_SSQ6_5,		21
	.EQU	ADC2_SCANSQ1_SSQ6_4,		20
	.EQU	ADC2_SCANSQ1_SSQ6_3,		19
	.EQU	ADC2_SCANSQ1_SSQ6_2,		18
	.EQU	ADC2_SCANSQ1_SSQ6_1,		17
	.EQU	ADC2_SCANSQ1_SSQ6_0,		16
	.EQU	ADC2_SCANSQ1_SSQ5_7,		15
	.EQU	ADC2_SCANSQ1_SSQ5_6,		14
	.EQU	ADC2_SCANSQ1_SSQ5_5,		13
	.EQU	ADC2_SCANSQ1_SSQ5_4,		12
	.EQU	ADC2_SCANSQ1_SSQ5_3,		11
	.EQU	ADC2_SCANSQ1_SSQ5_2,		10
	.EQU	ADC2_SCANSQ1_SSQ5_1,		9
	.EQU	ADC2_SCANSQ1_SSQ5_0,		8
	.EQU	ADC2_SCANSQ1_SSQ4_7,		7
	.EQU	ADC2_SCANSQ1_SSQ4_6,		6
	.EQU	ADC2_SCANSQ1_SSQ4_5,		5
	.EQU	ADC2_SCANSQ1_SSQ4_4,		4
	.EQU	ADC2_SCANSQ1_SSQ4_3,		3
	.EQU	ADC2_SCANSQ1_SSQ4_2,		2
	.EQU	ADC2_SCANSQ1_SSQ4_1,		1
	.EQU	ADC2_SCANSQ1_SSQ4_0,		0
//  register-------------------------------------
	.EQU	ADC2_SCANSQ2,	0x40000690
//  0x4000 0690  ADC2_SCANSQ2   Bits-------------------------------------
	.EQU	ADC2_SCANSQ2_SSQ11_7,		31
	.EQU	ADC2_SCANSQ2_SSQ11_6,		30
	.EQU	ADC2_SCANSQ2_SSQ11_5,		29
	.EQU	ADC2_SCANSQ2_SSQ11_4,		28
	.EQU	ADC2_SCANSQ2_SSQ11_3,		27
	.EQU	ADC2_SCANSQ2_SSQ11_2,		26
	.EQU	ADC2_SCANSQ2_SSQ11_1,		25
	.EQU	ADC2_SCANSQ2_SSQ11_0,		24
	.EQU	ADC2_SCANSQ2_SSQ10_7,		23
	.EQU	ADC2_SCANSQ2_SSQ10_6,		22
	.EQU	ADC2_SCANSQ2_SSQ10_5,		21
	.EQU	ADC2_SCANSQ2_SSQ10_4,		20
	.EQU	ADC2_SCANSQ2_SSQ10_3,		19
	.EQU	ADC2_SCANSQ2_SSQ10_2,		18
	.EQU	ADC2_SCANSQ2_SSQ10_1,		17
	.EQU	ADC2_SCANSQ2_SSQ10_0,		16
	.EQU	ADC2_SCANSQ2_SSQ9_7,		15
	.EQU	ADC2_SCANSQ2_SSQ9_6,		14
	.EQU	ADC2_SCANSQ2_SSQ9_5,		13
	.EQU	ADC2_SCANSQ2_SSQ9_4,		12
	.EQU	ADC2_SCANSQ2_SSQ9_3,		11
	.EQU	ADC2_SCANSQ2_SSQ9_2,		10
	.EQU	ADC2_SCANSQ2_SSQ9_1,		9
	.EQU	ADC2_SCANSQ2_SSQ9_0,		8
	.EQU	ADC2_SCANSQ2_SSQ8_7,		7
	.EQU	ADC2_SCANSQ2_SSQ8_6,		6
	.EQU	ADC2_SCANSQ2_SSQ8_5,		5
	.EQU	ADC2_SCANSQ2_SSQ8_4,		4
	.EQU	ADC2_SCANSQ2_SSQ8_3,		3
	.EQU	ADC2_SCANSQ2_SSQ8_2,		2
	.EQU	ADC2_SCANSQ2_SSQ8_1,		1
	.EQU	ADC2_SCANSQ2_SSQ8_0,		0
//  register-------------------------------------
	.EQU	ADC2_SCANSQ3,	0x400006C4
//  0x4000 06C4  ADC2_SCANSQ3   Bits-------------------------------------
	.EQU	ADC2_SCANSQ3_SSQ15_7,		31
	.EQU	ADC2_SCANSQ3_SSQ15_6,		30
	.EQU	ADC2_SCANSQ3_SSQ15_5,		29
	.EQU	ADC2_SCANSQ3_SSQ15_4,		28
	.EQU	ADC2_SCANSQ3_SSQ15_3,		27
	.EQU	ADC2_SCANSQ3_SSQ15_2,		26
	.EQU	ADC2_SCANSQ3_SSQ15_1,		25
	.EQU	ADC2_SCANSQ3_SSQ15_0,		24
	.EQU	ADC2_SCANSQ3_SSQ14_7,		23
	.EQU	ADC2_SCANSQ3_SSQ14_6,		22
	.EQU	ADC2_SCANSQ3_SSQ14_5,		21
	.EQU	ADC2_SCANSQ3_SSQ14_4,		20
	.EQU	ADC2_SCANSQ3_SSQ14_3,		19
	.EQU	ADC2_SCANSQ3_SSQ14_2,		18
	.EQU	ADC2_SCANSQ3_SSQ14_1,		17
	.EQU	ADC2_SCANSQ3_SSQ14_0,		16
	.EQU	ADC2_SCANSQ3_SSQ13_7,		15
	.EQU	ADC2_SCANSQ3_SSQ13_6,		14
	.EQU	ADC2_SCANSQ3_SSQ13_5,		13
	.EQU	ADC2_SCANSQ3_SSQ13_4,		12
	.EQU	ADC2_SCANSQ3_SSQ13_3,		11
	.EQU	ADC2_SCANSQ3_SSQ13_2,		10
	.EQU	ADC2_SCANSQ3_SSQ13_1,		9
	.EQU	ADC2_SCANSQ3_SSQ13_0,		8
	.EQU	ADC2_SCANSQ3_SSQ12_7,		7
	.EQU	ADC2_SCANSQ3_SSQ12_6,		6
	.EQU	ADC2_SCANSQ3_SSQ12_5,		5
	.EQU	ADC2_SCANSQ3_SSQ12_4,		4
	.EQU	ADC2_SCANSQ3_SSQ12_3,		3
	.EQU	ADC2_SCANSQ3_SSQ12_2,		2
	.EQU	ADC2_SCANSQ3_SSQ12_1,		1
	.EQU	ADC2_SCANSQ3_SSQ12_0,		0
//  register-------------------------------------
	.EQU	ADC2_HSCANSQ,	0x40000694
//  0x4000 0694  ADC2_HSCANSQ   Bits-------------------------------------
	.EQU	ADC2_HSCANSQ_HSSQ3_7,		31
	.EQU	ADC2_HSCANSQ_HSSQ3_6,		30
	.EQU	ADC2_HSCANSQ_HSSQ3_5,		29
	.EQU	ADC2_HSCANSQ_HSSQ3_4,		28
	.EQU	ADC2_HSCANSQ_HSSQ3_3,		27
	.EQU	ADC2_HSCANSQ_HSSQ3_2,		26
	.EQU	ADC2_HSCANSQ_HSSQ3_1,		25
	.EQU	ADC2_HSCANSQ_HSSQ3_0,		24
	.EQU	ADC2_HSCANSQ_HSSQ2_7,		23
	.EQU	ADC2_HSCANSQ_HSSQ2_6,		22
	.EQU	ADC2_HSCANSQ_HSSQ2_5,		21
	.EQU	ADC2_HSCANSQ_HSSQ2_4,		20
	.EQU	ADC2_HSCANSQ_HSSQ2_3,		19
	.EQU	ADC2_HSCANSQ_HSSQ2_2,		18
	.EQU	ADC2_HSCANSQ_HSSQ2_1,		17
	.EQU	ADC2_HSCANSQ_HSSQ2_0,		16
	.EQU	ADC2_HSCANSQ_HSSQ1_7,		15
	.EQU	ADC2_HSCANSQ_HSSQ1_6,		14
	.EQU	ADC2_HSCANSQ_HSSQ1_5,		13
	.EQU	ADC2_HSCANSQ_HSSQ1_4,		12
	.EQU	ADC2_HSCANSQ_HSSQ1_3,		11
	.EQU	ADC2_HSCANSQ_HSSQ1_2,		10
	.EQU	ADC2_HSCANSQ_HSSQ1_1,		9
	.EQU	ADC2_HSCANSQ_HSSQ1_0,		8
	.EQU	ADC2_HSCANSQ_HSSQ0_7,		7
	.EQU	ADC2_HSCANSQ_HSSQ0_6,		6
	.EQU	ADC2_HSCANSQ_HSSQ0_5,		5
	.EQU	ADC2_HSCANSQ_HSSQ0_4,		4
	.EQU	ADC2_HSCANSQ_HSSQ0_3,		3
	.EQU	ADC2_HSCANSQ_HSSQ0_2,		2
	.EQU	ADC2_HSCANSQ_HSSQ0_1,		1
	.EQU	ADC2_HSCANSQ_HSSQ0_0,		0
//  register-------------------------------------
	.EQU	ADC2_WDH,		0x40000698
//  0x4000 0698  ADC2_WDH   Bits-------------------------------------
	.EQU	ADC2_WDH_WDH11,		11
	.EQU	ADC2_WDH_WDH10,		10
	.EQU	ADC2_WDH_WDH9,		9
	.EQU	ADC2_WDH_WDH8,		8
	.EQU	ADC2_WDH_WDH7,		7
	.EQU	ADC2_WDH_WDH6,		6
	.EQU	ADC2_WDH_WDH5,		5
	.EQU	ADC2_WDH_WDH4,		4
	.EQU	ADC2_WDH_WDH3,		3
	.EQU	ADC2_WDH_WDH2,		2
	.EQU	ADC2_WDH_WDH1,		1
	.EQU	ADC2_WDH_WDH0,		0
//  register-------------------------------------
	.EQU	ADC2_WDL,		0x4000069C
//  0x4000 069C  ADC2_WDL   Bits-------------------------------------
	.EQU	ADC2_WDL_WDL11,		11
	.EQU	ADC2_WDL_WDL10,		10
	.EQU	ADC2_WDL_WDL9,		9
	.EQU	ADC2_WDL_WDL8,		8
	.EQU	ADC2_WDL_WDL7,		7
	.EQU	ADC2_WDL_WDL6,		6
	.EQU	ADC2_WDL_WDL5,		5
	.EQU	ADC2_WDL_WDL4,		4
	.EQU	ADC2_WDL_WDL3,		3
	.EQU	ADC2_WDL_WDL2,		2
	.EQU	ADC2_WDL_WDL1,		1
	.EQU	ADC2_WDL_WDL0,		0
//  register-------------------------------------
	.EQU	ADC2_DATA,		0x400006A0
//  0x4000 06A0  ADC2_DATA   Bits-------------------------------------
	.EQU	ADC2_DATA_DATA15,		15
	.EQU	ADC2_DATA_DATA14,		14
	.EQU	ADC2_DATA_DATA13,		13
	.EQU	ADC2_DATA_DATA12,		12
	.EQU	ADC2_DATA_DATA11,		11
	.EQU	ADC2_DATA_DATA10,		10
	.EQU	ADC2_DATA_DATA9,		9
	.EQU	ADC2_DATA_DATA8,		8
	.EQU	ADC2_DATA_DATA7,		7
	.EQU	ADC2_DATA_DATA6,		6
	.EQU	ADC2_DATA_DATA5,		5
	.EQU	ADC2_DATA_DATA4,		4
	.EQU	ADC2_DATA_DATA3,		3
	.EQU	ADC2_DATA_DATA2,		2
	.EQU	ADC2_DATA_DATA1,		1
	.EQU	ADC2_DATA_DATA0,		0
//  register-------------------------------------
	.EQU	ADC2_HPDATA0,	0x400006A4
//  0x4000 06A4  ADC2_HPDATA0   Bits-------------------------------------
	.EQU	ADC2_HPDATA0_HPDATA15,		15
	.EQU	ADC2_HPDATA0_HPDATA14,		14
	.EQU	ADC2_HPDATA0_HPDATA13,		13
	.EQU	ADC2_HPDATA0_HPDATA12,		12
	.EQU	ADC2_HPDATA0_HPDATA11,		11
	.EQU	ADC2_HPDATA0_HPDATA10,		10
	.EQU	ADC2_HPDATA0_HPDATA9,		9
	.EQU	ADC2_HPDATA0_HPDATA8,		8
	.EQU	ADC2_HPDATA0_HPDATA7,		7
	.EQU	ADC2_HPDATA0_HPDATA6,		6
	.EQU	ADC2_HPDATA0_HPDATA5,		5
	.EQU	ADC2_HPDATA0_HPDATA4,		4
	.EQU	ADC2_HPDATA0_HPDATA3,		3
	.EQU	ADC2_HPDATA0_HPDATA2,		2
	.EQU	ADC2_HPDATA0_HPDATA1,		1
	.EQU	ADC2_HPDATA0_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC2_HPDATA1,	0x400006A8
//  0x4000 06A8  ADC2_HPDATA1   Bits-------------------------------------
	.EQU	ADC2_HPDATA1_HPDATA15,		15
	.EQU	ADC2_HPDATA1_HPDATA14,		14
	.EQU	ADC2_HPDATA1_HPDATA13,		13
	.EQU	ADC2_HPDATA1_HPDATA12,		12
	.EQU	ADC2_HPDATA1_HPDATA11,		11
	.EQU	ADC2_HPDATA1_HPDATA10,		10
	.EQU	ADC2_HPDATA1_HPDATA9,		9
	.EQU	ADC2_HPDATA1_HPDATA8,		8
	.EQU	ADC2_HPDATA1_HPDATA7,		7
	.EQU	ADC2_HPDATA1_HPDATA6,		6
	.EQU	ADC2_HPDATA1_HPDATA5,		5
	.EQU	ADC2_HPDATA1_HPDATA4,		4
	.EQU	ADC2_HPDATA1_HPDATA3,		3
	.EQU	ADC2_HPDATA1_HPDATA2,		2
	.EQU	ADC2_HPDATA1_HPDATA1,		1
	.EQU	ADC2_HPDATA1_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC2_HPDATA2,	0x400006AC
//  0x4000 06AC  ADC2_HPDATA2   Bits-------------------------------------
	.EQU	ADC2_HPDATA2_HPDATA15,		15
	.EQU	ADC2_HPDATA2_HPDATA14,		14
	.EQU	ADC2_HPDATA2_HPDATA13,		13
	.EQU	ADC2_HPDATA2_HPDATA12,		12
	.EQU	ADC2_HPDATA2_HPDATA11,		11
	.EQU	ADC2_HPDATA2_HPDATA10,		10
	.EQU	ADC2_HPDATA2_HPDATA9,		9
	.EQU	ADC2_HPDATA2_HPDATA8,		8
	.EQU	ADC2_HPDATA2_HPDATA7,		7
	.EQU	ADC2_HPDATA2_HPDATA6,		6
	.EQU	ADC2_HPDATA2_HPDATA5,		5
	.EQU	ADC2_HPDATA2_HPDATA4,		4
	.EQU	ADC2_HPDATA2_HPDATA3,		3
	.EQU	ADC2_HPDATA2_HPDATA2,		2
	.EQU	ADC2_HPDATA2_HPDATA1,		1
	.EQU	ADC2_HPDATA2_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC2_HPDATA3,	0x400006B0
//  0x4000 06B0  ADC2_HPDATA3   Bits-------------------------------------
	.EQU	ADC2_HPDATA3_HPDATA15,		15
	.EQU	ADC2_HPDATA3_HPDATA14,		14
	.EQU	ADC2_HPDATA3_HPDATA13,		13
	.EQU	ADC2_HPDATA3_HPDATA12,		12
	.EQU	ADC2_HPDATA3_HPDATA11,		11
	.EQU	ADC2_HPDATA3_HPDATA10,		10
	.EQU	ADC2_HPDATA3_HPDATA9,		9
	.EQU	ADC2_HPDATA3_HPDATA8,		8
	.EQU	ADC2_HPDATA3_HPDATA7,		7
	.EQU	ADC2_HPDATA3_HPDATA6,		6
	.EQU	ADC2_HPDATA3_HPDATA5,		5
	.EQU	ADC2_HPDATA3_HPDATA4,		4
	.EQU	ADC2_HPDATA3_HPDATA3,		3
	.EQU	ADC2_HPDATA3_HPDATA2,		2
	.EQU	ADC2_HPDATA3_HPDATA1,		1
	.EQU	ADC2_HPDATA3_HPDATA0,		0
//  register-------------------------------------
	.EQU	ADC2_HPDOFF0,	0x400006B4
//  0x4000 06B4  ADC2_HPDOFF0   Bits-------------------------------------
	.EQU	ADC2_HPDOFF0_HPDOFF11,		11
	.EQU	ADC2_HPDOFF0_HPDOFF10,		10
	.EQU	ADC2_HPDOFF0_HPDOFF9,		9
	.EQU	ADC2_HPDOFF0_HPDOFF8,		8
	.EQU	ADC2_HPDOFF0_HPDOFF7,		7
	.EQU	ADC2_HPDOFF0_HPDOFF6,		6
	.EQU	ADC2_HPDOFF0_HPDOFF5,		5
	.EQU	ADC2_HPDOFF0_HPDOFF4,		4
	.EQU	ADC2_HPDOFF0_HPDOFF3,		3
	.EQU	ADC2_HPDOFF0_HPDOFF2,		2
	.EQU	ADC2_HPDOFF0_HPDOFF1,		1
	.EQU	ADC2_HPDOFF0_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC2_HPDOFF1,	0x400006B8
//  0x4000 06B8  ADC2_HPDOFF1   Bits-------------------------------------
	.EQU	ADC2_HPDOFF1_HPDOFF11,		11
	.EQU	ADC2_HPDOFF1_HPDOFF10,		10
	.EQU	ADC2_HPDOFF1_HPDOFF9,		9
	.EQU	ADC2_HPDOFF1_HPDOFF8,		8
	.EQU	ADC2_HPDOFF1_HPDOFF7,		7
	.EQU	ADC2_HPDOFF1_HPDOFF6,		6
	.EQU	ADC2_HPDOFF1_HPDOFF5,		5
	.EQU	ADC2_HPDOFF1_HPDOFF4,		4
	.EQU	ADC2_HPDOFF1_HPDOFF3,		3
	.EQU	ADC2_HPDOFF1_HPDOFF2,		2
	.EQU	ADC2_HPDOFF1_HPDOFF1,		1
	.EQU	ADC2_HPDOFF1_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC2_HPDOFF2,	0x400006BC
//  0x4000 06BC  ADC2_HPDOFF2   Bits-------------------------------------
	.EQU	ADC2_HPDOFF2_HPDOFF11,		11
	.EQU	ADC2_HPDOFF2_HPDOFF10,		10
	.EQU	ADC2_HPDOFF2_HPDOFF9,		9
	.EQU	ADC2_HPDOFF2_HPDOFF8,		8
	.EQU	ADC2_HPDOFF2_HPDOFF7,		7
	.EQU	ADC2_HPDOFF2_HPDOFF6,		6
	.EQU	ADC2_HPDOFF2_HPDOFF5,		5
	.EQU	ADC2_HPDOFF2_HPDOFF4,		4
	.EQU	ADC2_HPDOFF2_HPDOFF3,		3
	.EQU	ADC2_HPDOFF2_HPDOFF2,		2
	.EQU	ADC2_HPDOFF2_HPDOFF1,		1
	.EQU	ADC2_HPDOFF2_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC2_HPDOFF3,	0x400006C0
//  0x4000 06C0  ADC2_HPDOFF3   Bits-------------------------------------
	.EQU	ADC2_HPDOFF3_HPDOFF11,		11
	.EQU	ADC2_HPDOFF3_HPDOFF10,		10
	.EQU	ADC2_HPDOFF3_HPDOFF9,		9
	.EQU	ADC2_HPDOFF3_HPDOFF8,		8
	.EQU	ADC2_HPDOFF3_HPDOFF7,		7
	.EQU	ADC2_HPDOFF3_HPDOFF6,		6
	.EQU	ADC2_HPDOFF3_HPDOFF5,		5
	.EQU	ADC2_HPDOFF3_HPDOFF4,		4
	.EQU	ADC2_HPDOFF3_HPDOFF3,		3
	.EQU	ADC2_HPDOFF3_HPDOFF2,		2
	.EQU	ADC2_HPDOFF3_HPDOFF1,		1
	.EQU	ADC2_HPDOFF3_HPDOFF0,		0
//  register-------------------------------------
	.EQU	ADC2_STATE,	0x400006D0
//  0x4000 06D0  ADC2_STATE   Bits-------------------------------------
	.EQU	ADC2_STATE_TRIMERROR1,		31
	.EQU	ADC2_STATE_TRIMERROR0,		30
	.EQU	ADC2_STATE_TRIMIBIASOPA,		27
	.EQU	ADC2_STATE_CCR2H,		19
	.EQU	ADC2_STATE_CCR2N,		18
	.EQU	ADC2_STATE_CCR1H,		17
	.EQU	ADC2_STATE_CCR1N,		16
	.EQU	ADC2_STATE_CCR0H,		15
	.EQU	ADC2_STATE_CCR0N,		14
	.EQU	ADC2_STATE_EOCIE,		13
	.EQU	ADC2_STATE_EOCIC,		12
	.EQU	ADC2_STATE_EOCIF,		11
	.EQU	ADC2_STATE_WDIE,		10
	.EQU	ADC2_STATE_HPENDIE,		9
	.EQU	ADC2_STATE_ENDIE,		8
	.EQU	ADC2_STATE_WDIC,		7
	.EQU	ADC2_STATE_HPENDIC,		6
	.EQU	ADC2_STATE_ENDIC,		5
	.EQU	ADC2_STATE_WDIF,		4
	.EQU	ADC2_STATE_HPENDIF,		3
	.EQU	ADC2_STATE_ENDIF,		2
	.EQU	ADC2_STATE_HPSTARTIF,		1
	.EQU	ADC2_STATE_STARTIF,		0
//  register-------------------------------------
	.EQU	ADC2_SCANCTL,	0x400006D8
//  0x4000 06D8  ADC2_SCANCTL   Bits-------------------------------------
	.EQU	ADC2_SCANCTL_SAMSEL3,		27
	.EQU	ADC2_SCANCTL_SAMSEL2,		26
	.EQU	ADC2_SCANCTL_SAMSEL1,		25
	.EQU	ADC2_SCANCTL_SAMSEL0,		24
	.EQU	ADC2_SCANCTL_WDCH6,		22
	.EQU	ADC2_SCANCTL_WDCH5,		21
	.EQU	ADC2_SCANCTL_WDCH4,		20
	.EQU	ADC2_SCANCTL_WDCH3,		19
	.EQU	ADC2_SCANCTL_WDCH2,		18
	.EQU	ADC2_SCANCTL_WDCH1,		17
	.EQU	ADC2_SCANCTL_WDCH0,		16
	.EQU	ADC2_SCANCTL_HSLEN1,		5
	.EQU	ADC2_SCANCTL_HSLEN0,		4
	.EQU	ADC2_SCANCTL_SLEN3,		3
	.EQU	ADC2_SCANCTL_SLEN2,		2
	.EQU	ADC2_SCANCTL_SLEN1,		1
	.EQU	ADC2_SCANCTL_SLEN0,		0
//  register-------------------------------------
	.EQU	DAC0_CTL,		0x40000700
//  0x4000 0700  DAC0_CTL   Bits-------------------------------------
	.EQU	DAC0_CTL_DF,		15
	.EQU	DAC0_CTL_SWTRIG,		14
	.EQU	DAC0_CTL_MAS3,		13
	.EQU	DAC0_CTL_MAS2,		12
	.EQU	DAC0_CTL_MAS1,		11
	.EQU	DAC0_CTL_MAS0,		10
	.EQU	DAC0_CTL_WAVE1,		9
	.EQU	DAC0_CTL_WAVE0,		8
	.EQU	DAC0_CTL_TREVT3,		7
	.EQU	DAC0_CTL_TREVT2,		6
	.EQU	DAC0_CTL_TREVT1,		5
	.EQU	DAC0_CTL_TREVT0,		4
	.EQU	DAC0_CTL_TRIGEN,		3
	.EQU	DAC0_CTL_DE,		1
	.EQU	DAC0_CTL_EN,		0
//  register-------------------------------------
	.EQU	DAC0_DAHD,		0x40000704
//  0x4000 0704  DAC0_DAHD   Bits-------------------------------------
	.EQU	DAC0_DAHD_DAHD11,		11
	.EQU	DAC0_DAHD_DAHD10,		10
	.EQU	DAC0_DAHD_DAHD9,		9
	.EQU	DAC0_DAHD_DAHD8,		8
	.EQU	DAC0_DAHD_DAHD7,		7
	.EQU	DAC0_DAHD_DAHD6,		6
	.EQU	DAC0_DAHD_DAHD5,		5
	.EQU	DAC0_DAHD_DAHD4,		4
	.EQU	DAC0_DAHD_DAHD3,		3
	.EQU	DAC0_DAHD_DAHD2,		2
	.EQU	DAC0_DAHD_DAHD1,		1
	.EQU	DAC0_DAHD_DAHD0,		0
//  register-------------------------------------
	.EQU	DAC0_DATA,		0x40000708
//  0x4000 0708  DAC0_DATA   Bits-------------------------------------
	.EQU	DAC0_DATA_DATA11,		11
	.EQU	DAC0_DATA_DATA10,		10
	.EQU	DAC0_DATA_DATA9,		9
	.EQU	DAC0_DATA_DATA8,		8
	.EQU	DAC0_DATA_DATA7,		7
	.EQU	DAC0_DATA_DATA6,		6
	.EQU	DAC0_DATA_DATA5,		5
	.EQU	DAC0_DATA_DATA4,		4
	.EQU	DAC0_DATA_DATA3,		3
	.EQU	DAC0_DATA_DATA2,		2
	.EQU	DAC0_DATA_DATA1,		1
	.EQU	DAC0_DATA_DATA0,		0
//  register-------------------------------------
	.EQU	DAC0_CTL1,		0x4000070C
//  0x4000 070C  DAC0_CTL1   Bits-------------------------------------
	.EQU	DAC0_CTL1_CLKDIV2,		11
	.EQU	DAC0_CTL1_CLKDIV1,		10
	.EQU	DAC0_CTL1_CLKDIV0,		9
	.EQU	DAC0_CTL1_DACOUTIOEN,		8
	.EQU	DAC0_CTL1_BUFEN,		6
	.EQU	DAC0_CTL1_CLK1,		5
	.EQU	DAC0_CTL1_CLK0,		4
	.EQU	DAC0_CTL1_RFS1,		2
	.EQU	DAC0_CTL1_RFS0,		1
	.EQU	DAC0_CTL1_SEL,		0
//  register-------------------------------------
	.EQU	DAC0_CAL,		0x40000714
//  0x4000 0714  DAC0_CAL   Bits-------------------------------------
	.EQU	DAC0_CAL_TRIMPPOL,		30
	.EQU	DAC0_CAL_TRIMP5,		29
	.EQU	DAC0_CAL_TRIMP4,		28
	.EQU	DAC0_CAL_TRIMP3,		27
	.EQU	DAC0_CAL_TRIMP2,		26
	.EQU	DAC0_CAL_TRIMP1,		25
	.EQU	DAC0_CAL_TRIMP0,		24
	.EQU	DAC0_CAL_TRIMNPOL,		22
	.EQU	DAC0_CAL_TRIMN5,		21
	.EQU	DAC0_CAL_TRIMN4,		20
	.EQU	DAC0_CAL_TRIMN3,		19
	.EQU	DAC0_CAL_TRIMN2,		18
	.EQU	DAC0_CAL_TRIMN1,		17
	.EQU	DAC0_CAL_TRIMN0,		16
	.EQU	DAC0_CAL_TRIMSTATE,		15
	.EQU	DAC0_CAL_TRIMHI,		14
	.EQU	DAC0_CAL_TRIMLO,		13
//  register-------------------------------------
	.EQU	DAC1_CTL,		0x40000780
//  0x4000 0780  DAC1_CTL   Bits-------------------------------------
	.EQU	DAC1_CTL_DF,		15
	.EQU	DAC1_CTL_SWTRIG,		14
	.EQU	DAC1_CTL_MAS3,		13
	.EQU	DAC1_CTL_MAS2,		12
	.EQU	DAC1_CTL_MAS1,		11
	.EQU	DAC1_CTL_MAS0,		10
	.EQU	DAC1_CTL_WAVE1,		9
	.EQU	DAC1_CTL_WAVE0,		8
	.EQU	DAC1_CTL_TREVT3,		7
	.EQU	DAC1_CTL_TREVT2,		6
	.EQU	DAC1_CTL_TREVT1,		5
	.EQU	DAC1_CTL_TREVT0,		4
	.EQU	DAC1_CTL_TRIGEN,		3
	.EQU	DAC1_CTL_DE,		1
	.EQU	DAC1_CTL_EN,		0
//  register-------------------------------------
	.EQU	DAC1_DAHD,		0x40000784
//  0x4000 0784  DAC1_DAHD   Bits-------------------------------------
	.EQU	DAC1_DAHD_DAHD11,		11
	.EQU	DAC1_DAHD_DAHD10,		10
	.EQU	DAC1_DAHD_DAHD9,		9
	.EQU	DAC1_DAHD_DAHD8,		8
	.EQU	DAC1_DAHD_DAHD7,		7
	.EQU	DAC1_DAHD_DAHD6,		6
	.EQU	DAC1_DAHD_DAHD5,		5
	.EQU	DAC1_DAHD_DAHD4,		4
	.EQU	DAC1_DAHD_DAHD3,		3
	.EQU	DAC1_DAHD_DAHD2,		2
	.EQU	DAC1_DAHD_DAHD1,		1
	.EQU	DAC1_DAHD_DAHD0,		0
//  register-------------------------------------
	.EQU	DAC1_DATA,		0x40000788
//  0x4000 0788  DAC1_DATA   Bits-------------------------------------
	.EQU	DAC1_DATA_DATA11,		11
	.EQU	DAC1_DATA_DATA10,		10
	.EQU	DAC1_DATA_DATA9,		9
	.EQU	DAC1_DATA_DATA8,		8
	.EQU	DAC1_DATA_DATA7,		7
	.EQU	DAC1_DATA_DATA6,		6
	.EQU	DAC1_DATA_DATA5,		5
	.EQU	DAC1_DATA_DATA4,		4
	.EQU	DAC1_DATA_DATA3,		3
	.EQU	DAC1_DATA_DATA2,		2
	.EQU	DAC1_DATA_DATA1,		1
	.EQU	DAC1_DATA_DATA0,		0
//  register-------------------------------------
	.EQU	DAC1_CTL1,		0x4000078C
//  0x4000 078C  DAC1_CTL1   Bits-------------------------------------
	.EQU	DAC1_CTL1_CLKDIV2,		11
	.EQU	DAC1_CTL1_CLKDIV1,		10
	.EQU	DAC1_CTL1_CLKDIV0,		9
	.EQU	DAC1_CTL1_DACOUTIOEN,		8
	.EQU	DAC1_CTL1_BUFEN,		6
	.EQU	DAC1_CTL1_CLK1,		5
	.EQU	DAC1_CTL1_CLK0,		4
	.EQU	DAC1_CTL1_RFS1,		2
	.EQU	DAC1_CTL1_RFS0,		1
	.EQU	DAC1_CTL1_SEL,		0
//  register-------------------------------------
	.EQU	DAC1_CAL,		0x40000794
//  0x4000 0794  DAC1_CAL   Bits-------------------------------------
	.EQU	DAC1_CAL_TRIMPPOL,		30
	.EQU	DAC1_CAL_TRIMP5,		29
	.EQU	DAC1_CAL_TRIMP4,		28
	.EQU	DAC1_CAL_TRIMP3,		27
	.EQU	DAC1_CAL_TRIMP2,		26
	.EQU	DAC1_CAL_TRIMP1,		25
	.EQU	DAC1_CAL_TRIMP0,		24
	.EQU	DAC1_CAL_TRIMNPOL,		22
	.EQU	DAC1_CAL_TRIMN5,		21
	.EQU	DAC1_CAL_TRIMN4,		20
	.EQU	DAC1_CAL_TRIMN3,		19
	.EQU	DAC1_CAL_TRIMN2,		18
	.EQU	DAC1_CAL_TRIMN1,		17
	.EQU	DAC1_CAL_TRIMN0,		16
	.EQU	DAC1_CAL_TRIMSTATE,		15
	.EQU	DAC1_CAL_TRIMHI,		14
	.EQU	DAC1_CAL_TRIMLO,		13
//  register-------------------------------------
	.EQU	DAC2_CTL,		0x40001D80
//  0x4000 1D80  DAC2_CTL   Bits-------------------------------------
	.EQU	DAC2_CTL_DF,		15
	.EQU	DAC2_CTL_SWTRIG,		14
	.EQU	DAC2_CTL_MAS3,		13
	.EQU	DAC2_CTL_MAS2,		12
	.EQU	DAC2_CTL_MAS1,		11
	.EQU	DAC2_CTL_MAS0,		10
	.EQU	DAC2_CTL_WAVE1,		9
	.EQU	DAC2_CTL_WAVE0,		8
	.EQU	DAC2_CTL_TREVT3,		7
	.EQU	DAC2_CTL_TREVT2,		6
	.EQU	DAC2_CTL_TREVT1,		5
	.EQU	DAC2_CTL_TREVT0,		4
	.EQU	DAC2_CTL_TRIGEN,		3
	.EQU	DAC2_CTL_DE,		1
	.EQU	DAC2_CTL_EN,		0
//  register-------------------------------------
	.EQU	DAC2_DAHD,		0x40001D84
//  0x4000 1D84  DAC2_DAHD   Bits-------------------------------------
	.EQU	DAC2_DAHD_DAHD11,		11
	.EQU	DAC2_DAHD_DAHD10,		10
	.EQU	DAC2_DAHD_DAHD9,		9
	.EQU	DAC2_DAHD_DAHD8,		8
	.EQU	DAC2_DAHD_DAHD7,		7
	.EQU	DAC2_DAHD_DAHD6,		6
	.EQU	DAC2_DAHD_DAHD5,		5
	.EQU	DAC2_DAHD_DAHD4,		4
	.EQU	DAC2_DAHD_DAHD3,		3
	.EQU	DAC2_DAHD_DAHD2,		2
	.EQU	DAC2_DAHD_DAHD1,		1
	.EQU	DAC2_DAHD_DAHD0,		0
//  register-------------------------------------
	.EQU	DAC2_DATA,		0x40001D88
//  0x4000 1D88  DAC2_DATA   Bits-------------------------------------
	.EQU	DAC2_DATA_DATA11,		11
	.EQU	DAC2_DATA_DATA10,		10
	.EQU	DAC2_DATA_DATA9,		9
	.EQU	DAC2_DATA_DATA8,		8
	.EQU	DAC2_DATA_DATA7,		7
	.EQU	DAC2_DATA_DATA6,		6
	.EQU	DAC2_DATA_DATA5,		5
	.EQU	DAC2_DATA_DATA4,		4
	.EQU	DAC2_DATA_DATA3,		3
	.EQU	DAC2_DATA_DATA2,		2
	.EQU	DAC2_DATA_DATA1,		1
	.EQU	DAC2_DATA_DATA0,		0
//  register-------------------------------------
	.EQU	DAC2_CTL1,		0x40001D8C
//  0x4000 1D8C  DAC2_CTL1   Bits-------------------------------------
	.EQU	DAC2_CTL1_CLKDIV2,		11
	.EQU	DAC2_CTL1_CLKDIV1,		10
	.EQU	DAC2_CTL1_CLKDIV0,		9
	.EQU	DAC2_CTL1_BUFEN,		6
	.EQU	DAC2_CTL1_CLK1,		5
	.EQU	DAC2_CTL1_CLK0,		4
	.EQU	DAC2_CTL1_RFS1,		2
	.EQU	DAC2_CTL1_RFS0,		1
	.EQU	DAC2_CTL1_SEL,		0
//  register-------------------------------------
	.EQU	DAC2_CAL,		0x40001D94
//  0x4000 1D94  DAC2_CAL   Bits-------------------------------------
	.EQU	DAC2_CAL_TRIMPPOL,		30
	.EQU	DAC2_CAL_TRIMP5,		29
	.EQU	DAC2_CAL_TRIMP4,		28
	.EQU	DAC2_CAL_TRIMP3,		27
	.EQU	DAC2_CAL_TRIMP2,		26
	.EQU	DAC2_CAL_TRIMP1,		25
	.EQU	DAC2_CAL_TRIMP0,		24
	.EQU	DAC2_CAL_TRIMNPOL,		22
	.EQU	DAC2_CAL_TRIMN5,		21
	.EQU	DAC2_CAL_TRIMN4,		20
	.EQU	DAC2_CAL_TRIMN3,		19
	.EQU	DAC2_CAL_TRIMN2,		18
	.EQU	DAC2_CAL_TRIMN1,		17
	.EQU	DAC2_CAL_TRIMN0,		16
	.EQU	DAC2_CAL_TRIMSTATE,		15
	.EQU	DAC2_CAL_TRIMHI,		14
	.EQU	DAC2_CAL_TRIMLO,		13
	.EQU	DAC2_CAL_TP1,		2
	.EQU	DAC2_CAL_TP0,		1
	.EQU	DAC2_CAL_TPEN,		0
//  register-------------------------------------
	.EQU	DAC3_CTL,		0x40001E00
//  0x4000 1E00  DAC3_CTL   Bits-------------------------------------
	.EQU	DAC3_CTL_DF,		15
	.EQU	DAC3_CTL_SWTRIG,		14
	.EQU	DAC3_CTL_MAS3,		13
	.EQU	DAC3_CTL_MAS2,		12
	.EQU	DAC3_CTL_MAS1,		11
	.EQU	DAC3_CTL_MAS0,		10
	.EQU	DAC3_CTL_WAVE1,		9
	.EQU	DAC3_CTL_WAVE0,		8
	.EQU	DAC3_CTL_TREVT3,		7
	.EQU	DAC3_CTL_TREVT2,		6
	.EQU	DAC3_CTL_TREVT1,		5
	.EQU	DAC3_CTL_TREVT0,		4
	.EQU	DAC3_CTL_TRIGEN,		3
	.EQU	DAC3_CTL_DE,		1
	.EQU	DAC3_CTL_EN,		0
//  register-------------------------------------
	.EQU	DAC3_DAHD,		0x40001E04
//  0x4000 1E04  DAC3_DAHD   Bits-------------------------------------
	.EQU	DAC3_DAHD_DAHD11,		11
	.EQU	DAC3_DAHD_DAHD10,		10
	.EQU	DAC3_DAHD_DAHD9,		9
	.EQU	DAC3_DAHD_DAHD8,		8
	.EQU	DAC3_DAHD_DAHD7,		7
	.EQU	DAC3_DAHD_DAHD6,		6
	.EQU	DAC3_DAHD_DAHD5,		5
	.EQU	DAC3_DAHD_DAHD4,		4
	.EQU	DAC3_DAHD_DAHD3,		3
	.EQU	DAC3_DAHD_DAHD2,		2
	.EQU	DAC3_DAHD_DAHD1,		1
	.EQU	DAC3_DAHD_DAHD0,		0
//  register-------------------------------------
	.EQU	DAC3_DATA,		0x40001E08
//  0x4000 1E08  DAC3_DATA   Bits-------------------------------------
	.EQU	DAC3_DATA_DATA11,		11
	.EQU	DAC3_DATA_DATA10,		10
	.EQU	DAC3_DATA_DATA9,		9
	.EQU	DAC3_DATA_DATA8,		8
	.EQU	DAC3_DATA_DATA7,		7
	.EQU	DAC3_DATA_DATA6,		6
	.EQU	DAC3_DATA_DATA5,		5
	.EQU	DAC3_DATA_DATA4,		4
	.EQU	DAC3_DATA_DATA3,		3
	.EQU	DAC3_DATA_DATA2,		2
	.EQU	DAC3_DATA_DATA1,		1
	.EQU	DAC3_DATA_DATA0,		0
//  register-------------------------------------
	.EQU	DAC3_CTL1,		0x40001E0C
//  0x4000 1E0C  DAC3_CTL1   Bits-------------------------------------
	.EQU	DAC3_CTL1_CLKDIV2,		11
	.EQU	DAC3_CTL1_CLKDIV1,		10
	.EQU	DAC3_CTL1_CLKDIV0,		9
	.EQU	DAC3_CTL1_BUFEN,		6
	.EQU	DAC3_CTL1_CLK1,		5
	.EQU	DAC3_CTL1_CLK0,		4
	.EQU	DAC3_CTL1_RFS1,		2
	.EQU	DAC3_CTL1_RFS0,		1
	.EQU	DAC3_CTL1_SEL,		0
//  register-------------------------------------
	.EQU	DAC3_CAL,		0x40001E14
//  0x4000 1E14  DAC3_CAL   Bits-------------------------------------
	.EQU	DAC3_CAL_TRIMPPOL,		30
	.EQU	DAC3_CAL_TRIMP5,		29
	.EQU	DAC3_CAL_TRIMP4,		28
	.EQU	DAC3_CAL_TRIMP3,		27
	.EQU	DAC3_CAL_TRIMP2,		26
	.EQU	DAC3_CAL_TRIMP1,		25
	.EQU	DAC3_CAL_TRIMP0,		24
	.EQU	DAC3_CAL_TRIMNPOL,		22
	.EQU	DAC3_CAL_TRIMN5,		21
	.EQU	DAC3_CAL_TRIMN4,		20
	.EQU	DAC3_CAL_TRIMN3,		19
	.EQU	DAC3_CAL_TRIMN2,		18
	.EQU	DAC3_CAL_TRIMN1,		17
	.EQU	DAC3_CAL_TRIMN0,		16
	.EQU	DAC3_CAL_TRIMSTATE,		15
	.EQU	DAC3_CAL_TRIMHI,		14
	.EQU	DAC3_CAL_TRIMLO,		13
//  register-------------------------------------
	.EQU	CMP_CTL0,		0x40000800
//  0x4000 0800  CMP_CTL0   Bits-------------------------------------
	.EQU	CMP_CTL0_PMOD3,		31
	.EQU	CMP_CTL0_PMOD2,		30
	.EQU	CMP_CTL0_PMOD1,		29
	.EQU	CMP_CTL0_PMOD0,		28
	.EQU	CMP_CTL0_NMOD3,		27
	.EQU	CMP_CTL0_NMOD2,		26
	.EQU	CMP_CTL0_NMOD1,		25
	.EQU	CMP_CTL0_NMOD0,		24
	.EQU	CMP_CTL0_IFFEN,		19
	.EQU	CMP_CTL0_IFREN,		18
	.EQU	CMP_CTL0_FLTCS1,		17
	.EQU	CMP_CTL0_FLTCS0,		16
	.EQU	CMP_CTL0_FLTDIV7,		15
	.EQU	CMP_CTL0_FLTDIV6,		14
	.EQU	CMP_CTL0_FLTDIV5,		13
	.EQU	CMP_CTL0_FLTDIV4,		12
	.EQU	CMP_CTL0_FLTDIV3,		11
	.EQU	CMP_CTL0_FLTDIV2,		10
	.EQU	CMP_CTL0_FLTDIV1,		9
	.EQU	CMP_CTL0_FLTDIV0,		8
	.EQU	CMP_CTL0_WINCLKSEL,		7
	.EQU	CMP_CTL0_FLTCNT2,		6
	.EQU	CMP_CTL0_FLTCNT1,		5
	.EQU	CMP_CTL0_FLTCNT0,		4
	.EQU	CMP_CTL0_FLTEN,		3
	.EQU	CMP_CTL0_WINEN,		2
	.EQU	CMP_CTL0_POL,		1
//  register-------------------------------------
	.EQU	CMP_CTL1,		0x40000804
//  0x4000 0804  CMP_CTL1   Bits-------------------------------------
	.EQU	CMP_CTL1_PMOD3,		31
	.EQU	CMP_CTL1_PMOD2,		30
	.EQU	CMP_CTL1_PMOD1,		29
	.EQU	CMP_CTL1_PMOD0,		28
	.EQU	CMP_CTL1_NMOD3,		27
	.EQU	CMP_CTL1_NMOD2,		26
	.EQU	CMP_CTL1_NMOD1,		25
	.EQU	CMP_CTL1_NMOD0,		24
	.EQU	CMP_CTL1_IFFEN,		19
	.EQU	CMP_CTL1_IFREN,		18
	.EQU	CMP_CTL1_FLTCS1,		17
	.EQU	CMP_CTL1_FLTCS0,		16
	.EQU	CMP_CTL1_FLTDIV7,		15
	.EQU	CMP_CTL1_FLTDIV6,		14
	.EQU	CMP_CTL1_FLTDIV5,		13
	.EQU	CMP_CTL1_FLTDIV4,		12
	.EQU	CMP_CTL1_FLTDIV3,		11
	.EQU	CMP_CTL1_FLTDIV2,		10
	.EQU	CMP_CTL1_FLTDIV1,		9
	.EQU	CMP_CTL1_FLTDIV0,		8
	.EQU	CMP_CTL1_WINCLKSEL,		7
	.EQU	CMP_CTL1_FLTCNT2,		6
	.EQU	CMP_CTL1_FLTCNT1,		5
	.EQU	CMP_CTL1_FLTCNT0,		4
	.EQU	CMP_CTL1_FLTEN,		3
	.EQU	CMP_CTL1_WINEN,		2
	.EQU	CMP_CTL1_POL,		1
//  register-------------------------------------
	.EQU	CMP_CTL2,		0x40000808
//  0x4000 0808  CMP_CTL2   Bits-------------------------------------
	.EQU	CMP_CTL2_PMOD3,		31
	.EQU	CMP_CTL2_PMOD2,		30
	.EQU	CMP_CTL2_PMOD1,		29
	.EQU	CMP_CTL2_PMOD0,		28
	.EQU	CMP_CTL2_NMOD3,		27
	.EQU	CMP_CTL2_NMOD2,		26
	.EQU	CMP_CTL2_NMOD1,		25
	.EQU	CMP_CTL2_NMOD0,		24
	.EQU	CMP_CTL2_IFFEN,		19
	.EQU	CMP_CTL2_IFREN,		18
	.EQU	CMP_CTL2_FLTCS1,		17
	.EQU	CMP_CTL2_FLTCS0,		16
	.EQU	CMP_CTL2_FLTDIV7,		15
	.EQU	CMP_CTL2_FLTDIV6,		14
	.EQU	CMP_CTL2_FLTDIV5,		13
	.EQU	CMP_CTL2_FLTDIV4,		12
	.EQU	CMP_CTL2_FLTDIV3,		11
	.EQU	CMP_CTL2_FLTDIV2,		10
	.EQU	CMP_CTL2_FLTDIV1,		9
	.EQU	CMP_CTL2_FLTDIV0,		8
	.EQU	CMP_CTL2_WINCLKSEL,		7
	.EQU	CMP_CTL2_FLTCNT2,		6
	.EQU	CMP_CTL2_FLTCNT1,		5
	.EQU	CMP_CTL2_FLTCNT0,		4
	.EQU	CMP_CTL2_FLTEN,		3
	.EQU	CMP_CTL2_WINEN,		2
	.EQU	CMP_CTL2_POL,		1
//  register-------------------------------------
	.EQU	CMP_CTL3,		0x4000080C
//  0x4000 080C  CMP_CTL3   Bits-------------------------------------
	.EQU	CMP_CTL3_PMOD3,		31
	.EQU	CMP_CTL3_PMOD2,		30
	.EQU	CMP_CTL3_PMOD1,		29
	.EQU	CMP_CTL3_PMOD0,		28
	.EQU	CMP_CTL3_NMOD2,		27
	.EQU	CMP_CTL3_NMOD1,		26
	.EQU	CMP_CTL3_NMOD0,		25
	.EQU	CMP_CTL3_CMP3PSEL,		23
	.EQU	CMP_CTL3_IFFEN,		19
	.EQU	CMP_CTL3_IFREN,		18
	.EQU	CMP_CTL3_FLTCS1,		17
	.EQU	CMP_CTL3_FLTCS0,		16
	.EQU	CMP_CTL3_FLTDIV7,		15
	.EQU	CMP_CTL3_FLTDIV6,		14
	.EQU	CMP_CTL3_FLTDIV5,		13
	.EQU	CMP_CTL3_FLTDIV4,		12
	.EQU	CMP_CTL3_FLTDIV3,		11
	.EQU	CMP_CTL3_FLTDIV2,		10
	.EQU	CMP_CTL3_FLTDIV1,		9
	.EQU	CMP_CTL3_FLTDIV0,		8
	.EQU	CMP_CTL3_WINCLKSEL,		7
	.EQU	CMP_CTL3_FLTCNT2,		6
	.EQU	CMP_CTL3_FLTCNT1,		5
	.EQU	CMP_CTL3_FLTCNT0,		4
	.EQU	CMP_CTL3_FLTEN,		3
	.EQU	CMP_CTL3_WINEN,		2
	.EQU	CMP_CTL3_POL,		1
	.EQU	CMP_CTL3_EN,		0
//  register-------------------------------------
	.EQU	CMP_CTL4,		0x40000810
//  0x4000 0810  CMP_CTL4   Bits-------------------------------------
	.EQU	CMP_CTL4_C3OUT,		31
	.EQU	CMP_CTL4_C2OUT,		30
	.EQU	CMP_CTL4_C1OUT,		29
	.EQU	CMP_CTL4_C0OUT,		28
	.EQU	CMP_CTL4_C3IF,		27
	.EQU	CMP_CTL4_C2IF,		26
	.EQU	CMP_CTL4_C1IF,		25
	.EQU	CMP_CTL4_C0IF,		24
	.EQU	CMP_CTL4_CIFMS,		23
	.EQU	CMP_CTL4_PWMCMP,		22
	.EQU	CMP_CTL4_CMPOUTASEL1,		21
	.EQU	CMP_CTL4_CMPOUTASEL0,		20
	.EQU	CMP_CTL4_C3IC,		19
	.EQU	CMP_CTL4_C2IC,		18
	.EQU	CMP_CTL4_C1IC,		17
	.EQU	CMP_CTL4_C0IC,		16
	.EQU	CMP_CTL4_C3IE,		15
	.EQU	CMP_CTL4_C2IE,		14
	.EQU	CMP_CTL4_C1IE,		13
	.EQU	CMP_CTL4_C0IE,		12
	.EQU	CMP_CTL4_IOEN,		10
	.EQU	CMP_CTL4_CMPOUTDSEL1,		9
	.EQU	CMP_CTL4_CMPOUTDSEL0,		8
	.EQU	CMP_CTL4_DELAYVOL1,		7
	.EQU	CMP_CTL4_DELAYVOL0,		6
	.EQU	CMP_CTL4_HALLSEL,		5
	.EQU	CMP_CTL4_BEMFEN,		4
	.EQU	CMP_CTL4_FLTINSEL,		3
	.EQU	CMP_CTL4_C2EN,		2
	.EQU	CMP_CTL4_C1EN,		1
	.EQU	CMP_CTL4_C0EN,		0
//  register-------------------------------------
	.EQU	CMP_CTL5,		0x40000814
//  0x4000 0814  CMP_CTL5   Bits-------------------------------------
	.EQU	CMP_CTL5_INSCM,		31
	.EQU	CMP_CTL5_MOTORSEL,		30
	.EQU	CMP_CTL5_C0PSEL1,		29
	.EQU	CMP_CTL5_C0PSEL0,		28
	.EQU	CMP_CTL5_CMPLPEN,		8
	.EQU	CMP_CTL5_C3TRGSEL1,		7
	.EQU	CMP_CTL5_C3TRGSEL0,		6
	.EQU	CMP_CTL5_C2TRGSEL1,		5
	.EQU	CMP_CTL5_C2TRGSEL0,		4
	.EQU	CMP_CTL5_C1TRGSEL1,		3
	.EQU	CMP_CTL5_C1TRGSEL0,		2
	.EQU	CMP_CTL5_C0TRGSEL1,		1
	.EQU	CMP_CTL5_C0TRGSEL0,		0
//  register-------------------------------------
	.EQU	CMP_TRIM0,		0x40000818
//  0x4000 0818  CMP_TRIM0   Bits-------------------------------------
	.EQU	CMP_TRIM0_CMPTRIMHIGHEN,		31
	.EQU	CMP_TRIM0_CMPTRIMLOWEN,		30
	.EQU	CMP_TRIM0_C0TRIMP5,		13
	.EQU	CMP_TRIM0_C0TRIMP4,		12
	.EQU	CMP_TRIM0_C0TRIMP3,		11
	.EQU	CMP_TRIM0_C0TRIMP2,		10
	.EQU	CMP_TRIM0_C0TRIMP1,		9
	.EQU	CMP_TRIM0_C0TRIMP0,		8
	.EQU	CMP_TRIM0_C0TRIMPPOL,		7
	.EQU	CMP_TRIM0_C0TRIMN5,		6
	.EQU	CMP_TRIM0_C0TRIMN4,		5
	.EQU	CMP_TRIM0_C0TRIMN3,		4
	.EQU	CMP_TRIM0_C0TRIMN2,		3
	.EQU	CMP_TRIM0_C0TRIMN1,		2
	.EQU	CMP_TRIM0_C0TRIMN0,		1
	.EQU	CMP_TRIM0_C0TRIMNPOL,		0
//  register-------------------------------------
	.EQU	CMP_TRIM1,		0x4000081C
//  0x4000 081C  CMP_TRIM1   Bits-------------------------------------
	.EQU	CMP_TRIM1_C1TRIMP5,		13
	.EQU	CMP_TRIM1_C1TRIMP4,		12
	.EQU	CMP_TRIM1_C1TRIMP3,		11
	.EQU	CMP_TRIM1_C1TRIMP2,		10
	.EQU	CMP_TRIM1_C1TRIMP1,		9
	.EQU	CMP_TRIM1_C1TRIMP0,		8
	.EQU	CMP_TRIM1_C1TRIMPPOL,		7
	.EQU	CMP_TRIM1_C1TRIMN5,		6
	.EQU	CMP_TRIM1_C1TRIMN4,		5
	.EQU	CMP_TRIM1_C1TRIMN3,		4
	.EQU	CMP_TRIM1_C1TRIMN2,		3
	.EQU	CMP_TRIM1_C1TRIMN1,		2
	.EQU	CMP_TRIM1_C1TRIMN0,		1
	.EQU	CMP_TRIM1_C1TRIMNPOL,		0
//  register-------------------------------------
	.EQU	CMP_TRIM2,		0x40000820
//  0x4000 0820  CMP_TRIM2   Bits-------------------------------------
	.EQU	CMP_TRIM2_C2TRIMP5,		13
	.EQU	CMP_TRIM2_C2TRIMP4,		12
	.EQU	CMP_TRIM2_C2TRIMP3,		11
	.EQU	CMP_TRIM2_C2TRIMP2,		10
	.EQU	CMP_TRIM2_C2TRIMP1,		9
	.EQU	CMP_TRIM2_C2TRIMP0,		8
	.EQU	CMP_TRIM2_C2TRIMPPOL,		7
	.EQU	CMP_TRIM2_C2TRIMN5,		6
	.EQU	CMP_TRIM2_C2TRIMN4,		5
	.EQU	CMP_TRIM2_C2TRIMN3,		4
	.EQU	CMP_TRIM2_C2TRIMN2,		3
	.EQU	CMP_TRIM2_C2TRIMN1,		2
	.EQU	CMP_TRIM2_C2TRIMN0,		1
	.EQU	CMP_TRIM2_C2TRIMNPOL,		0
//  register-------------------------------------
	.EQU	CMP_TRIM3,		0x40000824
//  0x4000 0824  CMP_TRIM3   Bits-------------------------------------
	.EQU	CMP_TRIM3_C3TRIMP5,		13
	.EQU	CMP_TRIM3_C3TRIMP4,		12
	.EQU	CMP_TRIM3_C3TRIMP3,		11
	.EQU	CMP_TRIM3_C3TRIMP2,		10
	.EQU	CMP_TRIM3_C3TRIMP1,		9
	.EQU	CMP_TRIM3_C3TRIMP0,		8
	.EQU	CMP_TRIM3_C3TRIMPPOL,		7
	.EQU	CMP_TRIM3_C3TRIMN5,		6
	.EQU	CMP_TRIM3_C3TRIMN4,		5
	.EQU	CMP_TRIM3_C3TRIMN3,		4
	.EQU	CMP_TRIM3_C3TRIMN2,		3
	.EQU	CMP_TRIM3_C3TRIMN1,		2
	.EQU	CMP_TRIM3_C3TRIMN0,		1
	.EQU	CMP_TRIM3_C3TRIMNPOL,		0
//  register-------------------------------------
	.EQU	T0_CNT,			0x40000880
//  0x4000 0880  T0_CNT   Bits-------------------------------------
	.EQU	T0_CNT_TXCNT15,		15
	.EQU	T0_CNT_TXCNT14,		14
	.EQU	T0_CNT_TXCNT13,		13
	.EQU	T0_CNT_TXCNT12,		12
	.EQU	T0_CNT_TXCNT11,		11
	.EQU	T0_CNT_TXCNT10,		10
	.EQU	T0_CNT_TXCNT9,		9
	.EQU	T0_CNT_TXCNT8,		8
	.EQU	T0_CNT_TXCNT7,		7
	.EQU	T0_CNT_TXCNT6,		6
	.EQU	T0_CNT_TXCNT5,		5
	.EQU	T0_CNT_TXCNT4,		4
	.EQU	T0_CNT_TXCNT3,		3
	.EQU	T0_CNT_TXCNT2,		2
	.EQU	T0_CNT_TXCNT1,		1
	.EQU	T0_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T0_CTL1,		0x40000884
//  0x4000 0884  T0_CTL1   Bits-------------------------------------
	.EQU	T0_CTL1_TXIF,		13
	.EQU	T0_CTL1_TXIE,		12
	.EQU	T0_CTL1_TXCMS2,		10
	.EQU	T0_CTL1_TXCMS1,		9
	.EQU	T0_CTL1_TXCMS0,		8
	.EQU	T0_CTL1_TXDIR,		7
	.EQU	T0_CTL1_TXCLK1,		6
	.EQU	T0_CTL1_TXCLK0,		5
	.EQU	T0_CTL1_TXSY,		3
	.EQU	T0_CTL1_TXCS,		1
	.EQU	T0_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T0_CTL2,		0x40000888
//  0x4000 0888  T0_CTL2   Bits-------------------------------------
	.EQU	T0_CTL2_TRGSEL1,		15
	.EQU	T0_CTL2_TRGSEL0,		14
	.EQU	T0_CTL2_TXUR,		13
	.EQU	T0_CTL2_TXMSSYNC,		12
	.EQU	T0_CTL2_TXTS3,		11
	.EQU	T0_CTL2_TXTS2,		10
	.EQU	T0_CTL2_TXTS1,		9
	.EQU	T0_CTL2_TXTS0,		8
	.EQU	T0_CTL2_TXSMS2,		7
	.EQU	T0_CTL2_TXSMS1,		6
	.EQU	T0_CTL2_TXSMS0,		5
	.EQU	T0_CTL2_TXMMS2,		4
	.EQU	T0_CTL2_TXMMS1,		3
	.EQU	T0_CTL2_TXMMS0,		2
	.EQU	T0_CTL2_TXUDEVT,		1
	.EQU	T0_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T0_PRSC,		0x4000088C
//  0x4000 088C  T0_PRSC   Bits-------------------------------------
	.EQU	T0_PRSC_TXCKS15,		15
	.EQU	T0_PRSC_TXCKS14,		14
	.EQU	T0_PRSC_TXCKS13,		13
	.EQU	T0_PRSC_TXCKS12,		12
	.EQU	T0_PRSC_TXCKS11,		11
	.EQU	T0_PRSC_TXCKS10,		10
	.EQU	T0_PRSC_TXCKS9,		9
	.EQU	T0_PRSC_TXCKS8,		8
	.EQU	T0_PRSC_TXCKS7,		7
	.EQU	T0_PRSC_TXCKS6,		6
	.EQU	T0_PRSC_TXCKS5,		5
	.EQU	T0_PRSC_TXCKS4,		4
	.EQU	T0_PRSC_TXCKS3,		3
	.EQU	T0_PRSC_TXCKS2,		2
	.EQU	T0_PRSC_TXCKS1,		1
	.EQU	T0_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T0_PPX,			0x40000890
//  0x4000 0890  T0_PPX   Bits-------------------------------------
	.EQU	T0_PPX_PPX15,		15
	.EQU	T0_PPX_PPX14,		14
	.EQU	T0_PPX_PPX13,		13
	.EQU	T0_PPX_PPX12,		12
	.EQU	T0_PPX_PPX11,		11
	.EQU	T0_PPX_PPX10,		10
	.EQU	T0_PPX_PPX9,		9
	.EQU	T0_PPX_PPX8,		8
	.EQU	T0_PPX_PPX7,		7
	.EQU	T0_PPX_PPX6,		6
	.EQU	T0_PPX_PPX5,		5
	.EQU	T0_PPX_PPX4,		4
	.EQU	T0_PPX_PPX3,		3
	.EQU	T0_PPX_PPX2,		2
	.EQU	T0_PPX_PPX1,		1
	.EQU	T0_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T0_UDTIMx,		0x40000894
//  0x4000 0894  T0_UDTIMx   Bits-------------------------------------
	.EQU	T0_UDTIMx_TXUD7,		7
	.EQU	T0_UDTIMx_TXUD6,		6
	.EQU	T0_UDTIMx_TXUD5,		5
	.EQU	T0_UDTIMx_TXUD4,		4
	.EQU	T0_UDTIMx_TXUD3,		3
	.EQU	T0_UDTIMx_TXUD2,		2
	.EQU	T0_UDTIMx_TXUD1,		1
	.EQU	T0_UDTIMx_TXUD0,		0
//  register-------------------------------------
	.EQU	CCP0_C1,		0x400008A0
//  0x4000 08A0  CCP0_C1   Bits-------------------------------------
	.EQU	CCP0_C1_CCPXCY15,		15
	.EQU	CCP0_C1_CCPXCY14,		14
	.EQU	CCP0_C1_CCPXCY13,		13
	.EQU	CCP0_C1_CCPXCY12,		12
	.EQU	CCP0_C1_CCPXCY11,		11
	.EQU	CCP0_C1_CCPXCY10,		10
	.EQU	CCP0_C1_CCPXCY9,		9
	.EQU	CCP0_C1_CCPXCY8,		8
	.EQU	CCP0_C1_CCPXCY7,		7
	.EQU	CCP0_C1_CCPXCY6,		6
	.EQU	CCP0_C1_CCPXCY5,		5
	.EQU	CCP0_C1_CCPXCY4,		4
	.EQU	CCP0_C1_CCPXCY3,		3
	.EQU	CCP0_C1_CCPXCY2,		2
	.EQU	CCP0_C1_CCPXCY1,		1
	.EQU	CCP0_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP0_C2,		0x400008A4
//  0x4000 08A4  CCP0_C2   Bits-------------------------------------
	.EQU	CCP0_C2_CCPXCY15,		15
	.EQU	CCP0_C2_CCPXCY14,		14
	.EQU	CCP0_C2_CCPXCY13,		13
	.EQU	CCP0_C2_CCPXCY12,		12
	.EQU	CCP0_C2_CCPXCY11,		11
	.EQU	CCP0_C2_CCPXCY10,		10
	.EQU	CCP0_C2_CCPXCY9,		9
	.EQU	CCP0_C2_CCPXCY8,		8
	.EQU	CCP0_C2_CCPXCY7,		7
	.EQU	CCP0_C2_CCPXCY6,		6
	.EQU	CCP0_C2_CCPXCY5,		5
	.EQU	CCP0_C2_CCPXCY4,		4
	.EQU	CCP0_C2_CCPXCY3,		3
	.EQU	CCP0_C2_CCPXCY2,		2
	.EQU	CCP0_C2_CCPXCY1,		1
	.EQU	CCP0_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP0_C3,		0x400008A8
//  0x4000 08A8  CCP0_C3   Bits-------------------------------------
	.EQU	CCP0_C3_CCPXCY15,		15
	.EQU	CCP0_C3_CCPXCY14,		14
	.EQU	CCP0_C3_CCPXCY13,		13
	.EQU	CCP0_C3_CCPXCY12,		12
	.EQU	CCP0_C3_CCPXCY11,		11
	.EQU	CCP0_C3_CCPXCY10,		10
	.EQU	CCP0_C3_CCPXCY9,		9
	.EQU	CCP0_C3_CCPXCY8,		8
	.EQU	CCP0_C3_CCPXCY7,		7
	.EQU	CCP0_C3_CCPXCY6,		6
	.EQU	CCP0_C3_CCPXCY5,		5
	.EQU	CCP0_C3_CCPXCY4,		4
	.EQU	CCP0_C3_CCPXCY3,		3
	.EQU	CCP0_C3_CCPXCY2,		2
	.EQU	CCP0_C3_CCPXCY1,		1
	.EQU	CCP0_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP0_C4,		0x400008AC
//  0x4000 08AC  CCP0_C4   Bits-------------------------------------
	.EQU	CCP0_C4_CCPXCY15,		15
	.EQU	CCP0_C4_CCPXCY14,		14
	.EQU	CCP0_C4_CCPXCY13,		13
	.EQU	CCP0_C4_CCPXCY12,		12
	.EQU	CCP0_C4_CCPXCY11,		11
	.EQU	CCP0_C4_CCPXCY10,		10
	.EQU	CCP0_C4_CCPXCY9,		9
	.EQU	CCP0_C4_CCPXCY8,		8
	.EQU	CCP0_C4_CCPXCY7,		7
	.EQU	CCP0_C4_CCPXCY6,		6
	.EQU	CCP0_C4_CCPXCY5,		5
	.EQU	CCP0_C4_CCPXCY4,		4
	.EQU	CCP0_C4_CCPXCY3,		3
	.EQU	CCP0_C4_CCPXCY2,		2
	.EQU	CCP0_C4_CCPXCY1,		1
	.EQU	CCP0_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP0_SRIC,		0x400008B0
//  0x4000 08B0  CCP0_SRIC   Bits-------------------------------------
	.EQU	CCP0_SRIC_TXIC,		6
	.EQU	CCP0_SRIC_TXUIC,		5
	.EQU	CCP0_SRIC_TXTIC,		4
	.EQU	CCP0_SRIC_CC4IC,		3
	.EQU	CCP0_SRIC_CC3IC,		2
	.EQU	CCP0_SRIC_CC2IC,		1
	.EQU	CCP0_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP0_DF,		0x400008B4
//  0x4000 08B4  CCP0_DF   Bits-------------------------------------
	.EQU	CCP0_DF_TXUDF,		5
	.EQU	CCP0_DF_TXTDF,		4
	.EQU	CCP0_DF_CC4DF,		3
	.EQU	CCP0_DF_CC3DF,		2
	.EQU	CCP0_DF_CC2DF,		1
	.EQU	CCP0_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP0_CTL1,		0x400008C0
//  0x4000 08C0  CCP0_CTL1   Bits-------------------------------------
	.EQU	CCP0_CTL1_CH4M3,		15
	.EQU	CCP0_CTL1_CH4M2,		14
	.EQU	CCP0_CTL1_CH4M1,		13
	.EQU	CCP0_CTL1_CH4M0,		12
	.EQU	CCP0_CTL1_CH3M3,		11
	.EQU	CCP0_CTL1_CH3M2,		10
	.EQU	CCP0_CTL1_CH3M1,		9
	.EQU	CCP0_CTL1_CH3M0,		8
	.EQU	CCP0_CTL1_CH2M3,		7
	.EQU	CCP0_CTL1_CH2M2,		6
	.EQU	CCP0_CTL1_CH2M1,		5
	.EQU	CCP0_CTL1_CH2M0,		4
	.EQU	CCP0_CTL1_CH1M3,		3
	.EQU	CCP0_CTL1_CH1M2,		2
	.EQU	CCP0_CTL1_CH1M1,		1
	.EQU	CCP0_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP0_R1,		0x400008C4
//  0x4000 08C4  CCP0_R1   Bits-------------------------------------
	.EQU	CCP0_R1_CCPXRY15,		15
	.EQU	CCP0_R1_CCPXRY14,		14
	.EQU	CCP0_R1_CCPXRY13,		13
	.EQU	CCP0_R1_CCPXRY12,		12
	.EQU	CCP0_R1_CCPXRY11,		11
	.EQU	CCP0_R1_CCPXRY10,		10
	.EQU	CCP0_R1_CCPXRY9,		9
	.EQU	CCP0_R1_CCPXRY8,		8
	.EQU	CCP0_R1_CCPXRY7,		7
	.EQU	CCP0_R1_CCPXRY6,		6
	.EQU	CCP0_R1_CCPXRY5,		5
	.EQU	CCP0_R1_CCPXRY4,		4
	.EQU	CCP0_R1_CCPXRY3,		3
	.EQU	CCP0_R1_CCPXRY2,		2
	.EQU	CCP0_R1_CCPXRY1,		1
	.EQU	CCP0_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP0_R2,		0x400008C8
//  0x4000 08C8  CCP0_R2   Bits-------------------------------------
	.EQU	CCP0_R2_CCPXRY15,		15
	.EQU	CCP0_R2_CCPXRY14,		14
	.EQU	CCP0_R2_CCPXRY13,		13
	.EQU	CCP0_R2_CCPXRY12,		12
	.EQU	CCP0_R2_CCPXRY11,		11
	.EQU	CCP0_R2_CCPXRY10,		10
	.EQU	CCP0_R2_CCPXRY9,		9
	.EQU	CCP0_R2_CCPXRY8,		8
	.EQU	CCP0_R2_CCPXRY7,		7
	.EQU	CCP0_R2_CCPXRY6,		6
	.EQU	CCP0_R2_CCPXRY5,		5
	.EQU	CCP0_R2_CCPXRY4,		4
	.EQU	CCP0_R2_CCPXRY3,		3
	.EQU	CCP0_R2_CCPXRY2,		2
	.EQU	CCP0_R2_CCPXRY1,		1
	.EQU	CCP0_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP0_R3,		0x400008CC
//  0x4000 08CC  CCP0_R3   Bits-------------------------------------
	.EQU	CCP0_R3_CCPXRY15,		15
	.EQU	CCP0_R3_CCPXRY14,		14
	.EQU	CCP0_R3_CCPXRY13,		13
	.EQU	CCP0_R3_CCPXRY12,		12
	.EQU	CCP0_R3_CCPXRY11,		11
	.EQU	CCP0_R3_CCPXRY10,		10
	.EQU	CCP0_R3_CCPXRY9,		9
	.EQU	CCP0_R3_CCPXRY8,		8
	.EQU	CCP0_R3_CCPXRY7,		7
	.EQU	CCP0_R3_CCPXRY6,		6
	.EQU	CCP0_R3_CCPXRY5,		5
	.EQU	CCP0_R3_CCPXRY4,		4
	.EQU	CCP0_R3_CCPXRY3,		3
	.EQU	CCP0_R3_CCPXRY2,		2
	.EQU	CCP0_R3_CCPXRY1,		1
	.EQU	CCP0_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP0_R4,		0x400008D0
//  0x4000 08D0  CCP0_R4   Bits-------------------------------------
	.EQU	CCP0_R4_CCPXRY15,		15
	.EQU	CCP0_R4_CCPXRY14,		14
	.EQU	CCP0_R4_CCPXRY13,		13
	.EQU	CCP0_R4_CCPXRY12,		12
	.EQU	CCP0_R4_CCPXRY11,		11
	.EQU	CCP0_R4_CCPXRY10,		10
	.EQU	CCP0_R4_CCPXRY9,		9
	.EQU	CCP0_R4_CCPXRY8,		8
	.EQU	CCP0_R4_CCPXRY7,		7
	.EQU	CCP0_R4_CCPXRY6,		6
	.EQU	CCP0_R4_CCPXRY5,		5
	.EQU	CCP0_R4_CCPXRY4,		4
	.EQU	CCP0_R4_CCPXRY3,		3
	.EQU	CCP0_R4_CCPXRY2,		2
	.EQU	CCP0_R4_CCPXRY1,		1
	.EQU	CCP0_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP0_CTL2,		0x400008D4
//  0x4000 08D4  CCP0_CTL2   Bits-------------------------------------
	.EQU	CCP0_CTL2_PXOC4CE,		15
	.EQU	CCP0_CTL2_PXOC3CE,		14
	.EQU	CCP0_CTL2_PXOC2CE,		13
	.EQU	CCP0_CTL2_PXOC1CE,		12
	.EQU	CCP0_CTL2_PXASS1,		11
	.EQU	CCP0_CTL2_PXASS0,		10
	.EQU	CCP0_CTL2_TCKSEL1,		9
	.EQU	CCP0_CTL2_TCKSEL0,		8
	.EQU	CCP0_CTL2_PXOC4_1,		7
	.EQU	CCP0_CTL2_PXOC4_0,		6
	.EQU	CCP0_CTL2_PXOC3_1,		5
	.EQU	CCP0_CTL2_PXOC3_0,		4
	.EQU	CCP0_CTL2_PXOC2_1,		3
	.EQU	CCP0_CTL2_PXOC2_0,		2
	.EQU	CCP0_CTL2_PXOC1_1,		1
	.EQU	CCP0_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP0_CTL3,		0x400008D8
//  0x4000 08D8  CCP0_CTL3   Bits-------------------------------------
	.EQU	CCP0_CTL3_PXSPMST,		15
	.EQU	CCP0_CTL3_PXPWMI,		14
	.EQU	CCP0_CTL3_PXXORM,		13
	.EQU	CCP0_CTL3_PXSPM,		12
	.EQU	CCP0_CTL3_TXTDE,		11
	.EQU	CCP0_CTL3_CC4DE,		10
	.EQU	CCP0_CTL3_CC3DE,		9
	.EQU	CCP0_CTL3_CC2DE,		8
	.EQU	CCP0_CTL3_CC1DE,		7
	.EQU	CCP0_CTL3_TXUDE,		6
	.EQU	CCP0_CTL3_TXUIE,		5
	.EQU	CCP0_CTL3_TXTIE,		4
	.EQU	CCP0_CTL3_CC4IE,		3
	.EQU	CCP0_CTL3_CC3IE,		2
	.EQU	CCP0_CTL3_CC2IE,		1
	.EQU	CCP0_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP0_EGIF,		0x400008DC
//  0x4000 08DC  CCP0_EGIF   Bits-------------------------------------
	.EQU	CCP0_EGIF_POSSEL,		13
	.EQU	CCP0_EGIF_PXSEL,		12
	.EQU	CCP0_EGIF_TXUIF,		11
	.EQU	CCP0_EGIF_TXTIF,		10
	.EQU	CCP0_EGIF_CC4IF,		9
	.EQU	CCP0_EGIF_CC3IF,		8
	.EQU	CCP0_EGIF_CC2IF,		7
	.EQU	CCP0_EGIF_CC1IF,		6
	.EQU	CCP0_EGIF_TXTRG,		5
	.EQU	CCP0_EGIF_CC4G,		4
	.EQU	CCP0_EGIF_CC3G,		3
	.EQU	CCP0_EGIF_CC2G,		2
	.EQU	CCP0_EGIF_CC1G,		1
	.EQU	CCP0_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	USART0_CTLR,	0x40000980
//  0x4000 0980  USART0_CTLR   Bits-------------------------------------
	.EQU	USART0_CTLR_SLMEN,		31
	.EQU	USART0_CTLR_RESHD,		30
	.EQU	USART0_CTLR_IRDAEN,		29
	.EQU	USART0_CTLR_BKPWS,		26
	.EQU	USART0_CTLR_RTSE,		25
	.EQU	USART0_CTLR_CTSE,		24
	.EQU	USART0_CTLR_TRGSEL1,		23
	.EQU	USART0_CTLR_TRGSEL0,		22
	.EQU	USART0_CTLR_DT9EN,		21
	.EQU	USART0_CTLR_PARM,		20
	.EQU	USART0_CTLR_TX9SEL,		19
	.EQU	USART0_CTLR_STPW,		18
	.EQU	USART0_CTLR_TIDLEEN,		17
	.EQU	USART0_CTLR_RXEN,		16
	.EQU	USART0_CTLR_TXEN,		15
	.EQU	USART0_CTLR_SYNC,		14
	.EQU	USART0_CTLR_SENDB,		13
	.EQU	USART0_CTLR_RIDLES,		12
	.EQU	USART0_CTLR_ABRDEN,		11
	.EQU	USART0_CTLR_ADREN,		9
	.EQU	USART0_CTLR_CSRS,		8
	.EQU	USART0_CTLR_WUEN,		7
	.EQU	USART0_CTLR_DINV,		6
	.EQU	USART0_CTLR_RCONV,		5
	.EQU	USART0_CTLR_TCONV,		4
	.EQU	USART0_CTLR_SCKPS,		3
	.EQU	USART0_CTLR_BRCKS1,		2
	.EQU	USART0_CTLR_BRCKS0,		1
	.EQU	USART0_CTLR_USARTEN,		0
//  register-------------------------------------
	.EQU	USART0_BRGR,	0x40000984
//  0x4000 0984  USART0_BRGR   Bits-------------------------------------
	.EQU	USART0_BRGR_BRGF2_3,		23
	.EQU	USART0_BRGR_BRGF2_2,		22
	.EQU	USART0_BRGR_BRGF2_1,		21
	.EQU	USART0_BRGR_BRGF2_0,		20
	.EQU	USART0_BRGR_BRGF1_3,		19
	.EQU	USART0_BRGR_BRGF1_2,		18
	.EQU	USART0_BRGR_BRGF1_1,		17
	.EQU	USART0_BRGR_BRGF1_0,		16
	.EQU	USART0_BRGR_BRGM15,		15
	.EQU	USART0_BRGR_BRGM14,		14
	.EQU	USART0_BRGR_BRGM13,		13
	.EQU	USART0_BRGR_BRGM12,		12
	.EQU	USART0_BRGR_BRGM11,		11
	.EQU	USART0_BRGR_BRGM10,		10
	.EQU	USART0_BRGR_BRGM9,		9
	.EQU	USART0_BRGR_BRGM8,		8
	.EQU	USART0_BRGR_BRGM7,		7
	.EQU	USART0_BRGR_BRGM6,		6
	.EQU	USART0_BRGR_BRGM5,		5
	.EQU	USART0_BRGR_BRGM4,		4
	.EQU	USART0_BRGR_BRGM3,		3
	.EQU	USART0_BRGR_BRGM2,		2
	.EQU	USART0_BRGR_BRGM1,		1
	.EQU	USART0_BRGR_BRGM0,		0
//  register-------------------------------------
	.EQU	USART0_STR,	0x40000988
//  0x4000 0988  USART0_STR   Bits-------------------------------------
	.EQU	USART0_STR_TX0SEL,		31
	.EQU	USART0_STR_TX1SEL,		30
	.EQU	USART0_STR_RXDSEL,		29
	.EQU	USART0_STR_CTSSEL,		28
	.EQU	USART0_STR_TFEIF1,		27
	.EQU	USART0_STR_IDLEIC,		26
	.EQU	USART0_STR_UADMIC,		25
	.EQU	USART0_STR_CTSIC,		24
	.EQU	USART0_STR_REIC,		23
	.EQU	USART0_STR_TEIC,		22
	.EQU	USART0_STR_WUIC,		21
	.EQU	USART0_STR_ABTOIC,		20
	.EQU	USART0_STR_BRIC,		19
	.EQU	USART0_STR_FREIC,		18
	.EQU	USART0_STR_PAREIC,		17
	.EQU	USART0_STR_OVFEIC,		16
	.EQU	USART0_STR_IDLFIF,		15
	.EQU	USART0_STR_UADMIF,		14
	.EQU	USART0_STR_TXEIF,		13
	.EQU	USART0_STR_TFEIF,		12
	.EQU	USART0_STR_RDRIF,		11
	.EQU	USART0_STR_TXFR,		10
	.EQU	USART0_STR_RCFR,		9
	.EQU	USART0_STR_CTSIF,		8
	.EQU	USART0_STR_REIF,		7
	.EQU	USART0_STR_TEIF,		6
	.EQU	USART0_STR_WUIF,		5
	.EQU	USART0_STR_ABTOIF,		4
	.EQU	USART0_STR_BRIF,		3
	.EQU	USART0_STR_FREIF,		2
	.EQU	USART0_STR_PAREIF,		1
	.EQU	USART0_STR_OVFEIF,		0
//  register-------------------------------------
	.EQU	USART0_TBUFR,	0x4000098C
//  0x4000 098C  USART0_TBUFR   Bits-------------------------------------
	.EQU	USART0_TBUFR_TBUF7,		7
	.EQU	USART0_TBUFR_TBUF6,		6
	.EQU	USART0_TBUFR_TBUF5,		5
	.EQU	USART0_TBUFR_TBUF4,		4
	.EQU	USART0_TBUFR_TBUF3,		3
	.EQU	USART0_TBUFR_TBUF2,		2
	.EQU	USART0_TBUFR_TBUF1,		1
	.EQU	USART0_TBUFR_TBUF0,		0
//  register-------------------------------------
	.EQU	USART0_RBUFR,	0x4000098C
//  0x4000 098C  USART0_RBUFR   Bits-------------------------------------
	.EQU	USART0_RBUFR_RBUF8,		8
	.EQU	USART0_RBUFR_RBUF7,		7
	.EQU	USART0_RBUFR_RBUF6,		6
	.EQU	USART0_RBUFR_RBUF5,		5
	.EQU	USART0_RBUFR_RBUF4,		4
	.EQU	USART0_RBUFR_RBUF3,		3
	.EQU	USART0_RBUFR_RBUF2,		2
	.EQU	USART0_RBUFR_RBUF1,		1
	.EQU	USART0_RBUFR_RBUF0,		0
//  register-------------------------------------
	.EQU	USART0_U7816R,	0x40000990
//  0x4000 0990  USART0_U7816R   Bits-------------------------------------
	.EQU	USART0_U7816R_EGT7,		31
	.EQU	USART0_U7816R_EGT6,		30
	.EQU	USART0_U7816R_EGT5,		29
	.EQU	USART0_U7816R_EGT4,		28
	.EQU	USART0_U7816R_EGT3,		27
	.EQU	USART0_U7816R_EGT2,		26
	.EQU	USART0_U7816R_EGT1,		25
	.EQU	USART0_U7816R_EGT0,		24
	.EQU	USART0_U7816R_CLKDIV7,		22
	.EQU	USART0_U7816R_CLKDIV6,		21
	.EQU	USART0_U7816R_CLKDIV5,		20
	.EQU	USART0_U7816R_CLKDIV4,		19
	.EQU	USART0_U7816R_CLKDIV3,		18
	.EQU	USART0_U7816R_CLKDIV2,		17
	.EQU	USART0_U7816R_CLKDIV1,		16
	.EQU	USART0_U7816R_CLKDIV0,		15
	.EQU	USART0_U7816R_TREPMS,		14
	.EQU	USART0_U7816R_RXRE1,		13
	.EQU	USART0_U7816R_RXRE0,		12
	.EQU	USART0_U7816R_TXRE1,		11
	.EQU	USART0_U7816R_TXRE0,		10
	.EQU	USART0_U7816R_RREPEN,		9
	.EQU	USART0_U7816R_TREPEN,		8
	.EQU	USART0_U7816R_BGTEN,		5
	.EQU	USART0_U7816R_PSEL,		4
	.EQU	USART0_U7816R_ERSW1,		3
	.EQU	USART0_U7816R_ERSW0,		2
	.EQU	USART0_U7816R_CLKOUT,		1
//  register-------------------------------------
	.EQU	USART0_IER,	0x40000994
//  0x4000 0994  USART0_IER   Bits-------------------------------------
	.EQU	USART0_IER_UADMIE,		18
	.EQU	USART0_IER_UTXDE,		17
	.EQU	USART0_IER_URCDE,		16
	.EQU	USART0_IER_IDLEIE,		12
	.EQU	USART0_IER_TXEIE,		11
	.EQU	USART0_IER_TFEIE,		10
	.EQU	USART0_IER_RDRIE,		9
	.EQU	USART0_IER_CTSIE,		8
	.EQU	USART0_IER_REIE,		7
	.EQU	USART0_IER_TEIE,		6
	.EQU	USART0_IER_WUIE,		5
	.EQU	USART0_IER_ABTOIE,		4
	.EQU	USART0_IER_BRIE,		3
	.EQU	USART0_IER_FREIE,		2
	.EQU	USART0_IER_PAREIE,		1
	.EQU	USART0_IER_OVFEIE,		0
//  register-------------------------------------
	.EQU	USART0_ADM,	0x40000998
//  0x4000 0998  USART0_ADM   Bits-------------------------------------
	.EQU	USART0_ADM_ADM7,		7
	.EQU	USART0_ADM_ADM6,		6
	.EQU	USART0_ADM_ADM5,		5
	.EQU	USART0_ADM_ADM4,		4
	.EQU	USART0_ADM_ADM3,		3
	.EQU	USART0_ADM_ADM2,		2
	.EQU	USART0_ADM_ADM1,		1
	.EQU	USART0_ADM_ADM0,		0
//  register-------------------------------------
	.EQU	USART1_CTLR,	0x40000A00
//  0x4000 0A00  USART1_CTLR   Bits-------------------------------------
	.EQU	USART1_CTLR_SLMEN,		31
	.EQU	USART1_CTLR_RESHD,		30
	.EQU	USART1_CTLR_IRDAEN,		29
	.EQU	USART1_CTLR_BKPWS,		26
	.EQU	USART1_CTLR_RTSE,		25
	.EQU	USART1_CTLR_CTSE,		24
	.EQU	USART1_CTLR_TRGSEL1,		23
	.EQU	USART1_CTLR_TRGSEL0,		22
	.EQU	USART1_CTLR_DT9EN,		21
	.EQU	USART1_CTLR_PARM,		20
	.EQU	USART1_CTLR_TX9SEL,		19
	.EQU	USART1_CTLR_STPW,		18
	.EQU	USART1_CTLR_TIDLEEN,		17
	.EQU	USART1_CTLR_RXEN,		16
	.EQU	USART1_CTLR_TXEN,		15
	.EQU	USART1_CTLR_SYNC,		14
	.EQU	USART1_CTLR_SENDB,		13
	.EQU	USART1_CTLR_RIDLES,		12
	.EQU	USART1_CTLR_ABRDEN,		11
	.EQU	USART1_CTLR_ADREN,		9
	.EQU	USART1_CTLR_CSRS,		8
	.EQU	USART1_CTLR_WUEN,		7
	.EQU	USART1_CTLR_DINV,		6
	.EQU	USART1_CTLR_RCONV,		5
	.EQU	USART1_CTLR_TCONV,		4
	.EQU	USART1_CTLR_SCKPS,		3
	.EQU	USART1_CTLR_BRCKS1,		2
	.EQU	USART1_CTLR_BRCKS0,		1
	.EQU	USART1_CTLR_USARTEN,		0
//  register-------------------------------------
	.EQU	USART1_BRGR,	0x40000A04
//  0x4000 0A04  USART1_BRGR   Bits-------------------------------------
	.EQU	USART1_BRGR_BRGF2_3,		23
	.EQU	USART1_BRGR_BRGF2_2,		22
	.EQU	USART1_BRGR_BRGF2_1,		21
	.EQU	USART1_BRGR_BRGF2_0,		20
	.EQU	USART1_BRGR_BRGF1_3,		19
	.EQU	USART1_BRGR_BRGF1_2,		18
	.EQU	USART1_BRGR_BRGF1_1,		17
	.EQU	USART1_BRGR_BRGF1_0,		16
	.EQU	USART1_BRGR_BRGM15,		15
	.EQU	USART1_BRGR_BRGM14,		14
	.EQU	USART1_BRGR_BRGM13,		13
	.EQU	USART1_BRGR_BRGM12,		12
	.EQU	USART1_BRGR_BRGM11,		11
	.EQU	USART1_BRGR_BRGM10,		10
	.EQU	USART1_BRGR_BRGM9,		9
	.EQU	USART1_BRGR_BRGM8,		8
	.EQU	USART1_BRGR_BRGM7,		7
	.EQU	USART1_BRGR_BRGM6,		6
	.EQU	USART1_BRGR_BRGM5,		5
	.EQU	USART1_BRGR_BRGM4,		4
	.EQU	USART1_BRGR_BRGM3,		3
	.EQU	USART1_BRGR_BRGM2,		2
	.EQU	USART1_BRGR_BRGM1,		1
	.EQU	USART1_BRGR_BRGM0,		0
//  register-------------------------------------
	.EQU	USART1_STR,	0x40000A08
//  0x4000 0A08  USART1_STR   Bits-------------------------------------
	.EQU	USART1_STR_TX0SEL,		31
	.EQU	USART1_STR_TX1SEL,		30
	.EQU	USART1_STR_RXDSEL,		29
	.EQU	USART1_STR_CTSSEL,		28
	.EQU	USART1_STR_TFEIF1,		27
	.EQU	USART1_STR_IDLEIC,		26
	.EQU	USART1_STR_UADMIC,		25
	.EQU	USART1_STR_CTSIC,		24
	.EQU	USART1_STR_REIC,		23
	.EQU	USART1_STR_TEIC,		22
	.EQU	USART1_STR_WUIC,		21
	.EQU	USART1_STR_ABTOIC,		20
	.EQU	USART1_STR_BRIC,		19
	.EQU	USART1_STR_FREIC,		18
	.EQU	USART1_STR_PAREIC,		17
	.EQU	USART1_STR_OVFEIC,		16
	.EQU	USART1_STR_IDLFIF,		15
	.EQU	USART1_STR_UADMIF,		14
	.EQU	USART1_STR_TXEIF,		13
	.EQU	USART1_STR_TFEIF,		12
	.EQU	USART1_STR_RDRIF,		11
	.EQU	USART1_STR_TXFR,		10
	.EQU	USART1_STR_RCFR,		9
	.EQU	USART1_STR_CTSIF,		8
	.EQU	USART1_STR_REIF,		7
	.EQU	USART1_STR_TEIF,		6
	.EQU	USART1_STR_WUIF,		5
	.EQU	USART1_STR_ABTOIF,		4
	.EQU	USART1_STR_BRIF,		3
	.EQU	USART1_STR_FREIF,		2
	.EQU	USART1_STR_PAREIF,		1
	.EQU	USART1_STR_OVFEIF,		0
//  register-------------------------------------
	.EQU	USART1_TBUFR,	0x40000A0C
//  0x4000 0A0C  USART1_TBUFR   Bits-------------------------------------
	.EQU	USART1_TBUFR_TBUF7,		7
	.EQU	USART1_TBUFR_TBUF6,		6
	.EQU	USART1_TBUFR_TBUF5,		5
	.EQU	USART1_TBUFR_TBUF4,		4
	.EQU	USART1_TBUFR_TBUF3,		3
	.EQU	USART1_TBUFR_TBUF2,		2
	.EQU	USART1_TBUFR_TBUF1,		1
	.EQU	USART1_TBUFR_TBUF0,		0
//  register-------------------------------------
	.EQU	USART1_RBUFR,	0x40000A0C
//  0x4000 0A0C  USART1_RBUFR   Bits-------------------------------------
	.EQU	USART1_RBUFR_RBUF8,		8
	.EQU	USART1_RBUFR_RBUF7,		7
	.EQU	USART1_RBUFR_RBUF6,		6
	.EQU	USART1_RBUFR_RBUF5,		5
	.EQU	USART1_RBUFR_RBUF4,		4
	.EQU	USART1_RBUFR_RBUF3,		3
	.EQU	USART1_RBUFR_RBUF2,		2
	.EQU	USART1_RBUFR_RBUF1,		1
	.EQU	USART1_RBUFR_RBUF0,		0
//  register-------------------------------------
	.EQU	USART1_U7816R,	0x40000A10
//  0x4000 0A10  USART1_U7816R   Bits-------------------------------------
	.EQU	USART1_U7816R_EGT7,		31
	.EQU	USART1_U7816R_EGT6,		30
	.EQU	USART1_U7816R_EGT5,		29
	.EQU	USART1_U7816R_EGT4,		28
	.EQU	USART1_U7816R_EGT3,		27
	.EQU	USART1_U7816R_EGT2,		26
	.EQU	USART1_U7816R_EGT1,		25
	.EQU	USART1_U7816R_EGT0,		24
	.EQU	USART1_U7816R_CLKDIV7,		22
	.EQU	USART1_U7816R_CLKDIV6,		21
	.EQU	USART1_U7816R_CLKDIV5,		20
	.EQU	USART1_U7816R_CLKDIV4,		19
	.EQU	USART1_U7816R_CLKDIV3,		18
	.EQU	USART1_U7816R_CLKDIV2,		17
	.EQU	USART1_U7816R_CLKDIV1,		16
	.EQU	USART1_U7816R_CLKDIV0,		15
	.EQU	USART1_U7816R_TREPMS,		14
	.EQU	USART1_U7816R_RXRE1,		13
	.EQU	USART1_U7816R_RXRE0,		12
	.EQU	USART1_U7816R_TXRE1,		11
	.EQU	USART1_U7816R_TXRE0,		10
	.EQU	USART1_U7816R_RREPEN,		9
	.EQU	USART1_U7816R_TREPEN,		8
	.EQU	USART1_U7816R_BGTEN,		5
	.EQU	USART1_U7816R_PSEL,		4
	.EQU	USART1_U7816R_ERSW1,		3
	.EQU	USART1_U7816R_ERSW0,		2
	.EQU	USART1_U7816R_CLKOUT,		1
//  register-------------------------------------
	.EQU	USART1_IER,	0x40000A14
//  0x4000 0A14  USART1_IER   Bits-------------------------------------
	.EQU	USART1_IER_UADMIE,		18
	.EQU	USART1_IER_UTXDE,		17
	.EQU	USART1_IER_URCDE,		16
	.EQU	USART1_IER_IDLEIE,		12
	.EQU	USART1_IER_TXEIE,		11
	.EQU	USART1_IER_TFEIE,		10
	.EQU	USART1_IER_RDRIE,		9
	.EQU	USART1_IER_CTSIE,		8
	.EQU	USART1_IER_REIE,		7
	.EQU	USART1_IER_TEIE,		6
	.EQU	USART1_IER_WUIE,		5
	.EQU	USART1_IER_ABTOIE,		4
	.EQU	USART1_IER_BRIE,		3
	.EQU	USART1_IER_FREIE,		2
	.EQU	USART1_IER_PAREIE,		1
	.EQU	USART1_IER_OVFEIE,		0
//  register-------------------------------------
	.EQU	USART1_ADM,	0x40000A18
//  0x4000 0A18  USART1_ADM   Bits-------------------------------------
	.EQU	USART1_ADM_ADM7,		7
	.EQU	USART1_ADM_ADM6,		6
	.EQU	USART1_ADM_ADM5,		5
	.EQU	USART1_ADM_ADM4,		4
	.EQU	USART1_ADM_ADM3,		3
	.EQU	USART1_ADM_ADM2,		2
	.EQU	USART1_ADM_ADM1,		1
	.EQU	USART1_ADM_ADM0,		0
//  register-------------------------------------
	.EQU	USART2_CTLR,	0x40000A80
//  0x4000 0A80  USART2_CTLR   Bits-------------------------------------
	.EQU	USART2_CTLR_SLMEN,		31
	.EQU	USART2_CTLR_RESHD,		30
	.EQU	USART2_CTLR_IRDAEN,		29
	.EQU	USART2_CTLR_BKPWS,		26
	.EQU	USART2_CTLR_RTSE,		25
	.EQU	USART2_CTLR_CTSE,		24
	.EQU	USART2_CTLR_TRGSEL1,		23
	.EQU	USART2_CTLR_TRGSEL0,		22
	.EQU	USART2_CTLR_DT9EN,		21
	.EQU	USART2_CTLR_PARM,		20
	.EQU	USART2_CTLR_TX9SEL,		19
	.EQU	USART2_CTLR_STPW,		18
	.EQU	USART2_CTLR_TIDLEEN,		17
	.EQU	USART2_CTLR_RXEN,		16
	.EQU	USART2_CTLR_TXEN,		15
	.EQU	USART2_CTLR_SYNC,		14
	.EQU	USART2_CTLR_SENDB,		13
	.EQU	USART2_CTLR_RIDLES,		12
	.EQU	USART2_CTLR_ABRDEN,		11
	.EQU	USART2_CTLR_ADREN,		9
	.EQU	USART2_CTLR_CSRS,		8
	.EQU	USART2_CTLR_WUEN,		7
	.EQU	USART2_CTLR_DINV,		6
	.EQU	USART2_CTLR_RCONV,		5
	.EQU	USART2_CTLR_TCONV,		4
	.EQU	USART2_CTLR_SCKPS,		3
	.EQU	USART2_CTLR_BRCKS1,		2
	.EQU	USART2_CTLR_BRCKS0,		1
	.EQU	USART2_CTLR_USARTEN,		0
//  register-------------------------------------
	.EQU	USART2_BRGR,	0x40000A84
//  0x4000 0A84  USART2_BRGR   Bits-------------------------------------
	.EQU	USART2_BRGR_BRGF2_3,		23
	.EQU	USART2_BRGR_BRGF2_2,		22
	.EQU	USART2_BRGR_BRGF2_1,		21
	.EQU	USART2_BRGR_BRGF2_0,		20
	.EQU	USART2_BRGR_BRGF1_3,		19
	.EQU	USART2_BRGR_BRGF1_2,		18
	.EQU	USART2_BRGR_BRGF1_1,		17
	.EQU	USART2_BRGR_BRGF1_0,		16
	.EQU	USART2_BRGR_BRGM15,		15
	.EQU	USART2_BRGR_BRGM14,		14
	.EQU	USART2_BRGR_BRGM13,		13
	.EQU	USART2_BRGR_BRGM12,		12
	.EQU	USART2_BRGR_BRGM11,		11
	.EQU	USART2_BRGR_BRGM10,		10
	.EQU	USART2_BRGR_BRGM9,		9
	.EQU	USART2_BRGR_BRGM8,		8
	.EQU	USART2_BRGR_BRGM7,		7
	.EQU	USART2_BRGR_BRGM6,		6
	.EQU	USART2_BRGR_BRGM5,		5
	.EQU	USART2_BRGR_BRGM4,		4
	.EQU	USART2_BRGR_BRGM3,		3
	.EQU	USART2_BRGR_BRGM2,		2
	.EQU	USART2_BRGR_BRGM1,		1
	.EQU	USART2_BRGR_BRGM0,		0
//  register-------------------------------------
	.EQU	USART2_STR,	0x40000A88
//  0x4000 0A88  USART2_STR   Bits-------------------------------------
	.EQU	USART2_STR_TX0SEL,		31
	.EQU	USART2_STR_TX1SEL,		30
	.EQU	USART2_STR_RXDSEL,		29
	.EQU	USART2_STR_CTSSEL,		28
	.EQU	USART2_STR_TFEIF1,		27
	.EQU	USART2_STR_IDLEIC,		26
	.EQU	USART2_STR_UADMIC,		25
	.EQU	USART2_STR_CTSIC,		24
	.EQU	USART2_STR_REIC,		23
	.EQU	USART2_STR_TEIC,		22
	.EQU	USART2_STR_WUIC,		21
	.EQU	USART2_STR_ABTOIC,		20
	.EQU	USART2_STR_BRIC,		19
	.EQU	USART2_STR_FREIC,		18
	.EQU	USART2_STR_PAREIC,		17
	.EQU	USART2_STR_OVFEIC,		16
	.EQU	USART2_STR_IDLFIF,		15
	.EQU	USART2_STR_UADMIF,		14
	.EQU	USART2_STR_TXEIF,		13
	.EQU	USART2_STR_TFEIF,		12
	.EQU	USART2_STR_RDRIF,		11
	.EQU	USART2_STR_TXFR,		10
	.EQU	USART2_STR_RCFR,		9
	.EQU	USART2_STR_CTSIF,		8
	.EQU	USART2_STR_REIF,		7
	.EQU	USART2_STR_TEIF,		6
	.EQU	USART2_STR_WUIF,		5
	.EQU	USART2_STR_ABTOIF,		4
	.EQU	USART2_STR_BRIF,		3
	.EQU	USART2_STR_FREIF,		2
	.EQU	USART2_STR_PAREIF,		1
	.EQU	USART2_STR_OVFEIF,		0
//  register-------------------------------------
	.EQU	USART2_TBUFR,	0x40000A8C
//  0x4000 0A8C  USART2_TBUFR   Bits-------------------------------------
	.EQU	USART2_TBUFR_TBUF7,		7
	.EQU	USART2_TBUFR_TBUF6,		6
	.EQU	USART2_TBUFR_TBUF5,		5
	.EQU	USART2_TBUFR_TBUF4,		4
	.EQU	USART2_TBUFR_TBUF3,		3
	.EQU	USART2_TBUFR_TBUF2,		2
	.EQU	USART2_TBUFR_TBUF1,		1
	.EQU	USART2_TBUFR_TBUF0,		0
//  register-------------------------------------
	.EQU	USART2_RBUFR,	0x40000A8C
//  0x4000 0A8C  USART2_RBUFR   Bits-------------------------------------
	.EQU	USART2_RBUFR_RBUF8,		8
	.EQU	USART2_RBUFR_RBUF7,		7
	.EQU	USART2_RBUFR_RBUF6,		6
	.EQU	USART2_RBUFR_RBUF5,		5
	.EQU	USART2_RBUFR_RBUF4,		4
	.EQU	USART2_RBUFR_RBUF3,		3
	.EQU	USART2_RBUFR_RBUF2,		2
	.EQU	USART2_RBUFR_RBUF1,		1
	.EQU	USART2_RBUFR_RBUF0,		0
//  register-------------------------------------
	.EQU	USART2_U7816R,	0x40000A90
//  0x4000 0A90  USART2_U7816R   Bits-------------------------------------
	.EQU	USART2_U7816R_EGT7,		31
	.EQU	USART2_U7816R_EGT6,		30
	.EQU	USART2_U7816R_EGT5,		29
	.EQU	USART2_U7816R_EGT4,		28
	.EQU	USART2_U7816R_EGT3,		27
	.EQU	USART2_U7816R_EGT2,		26
	.EQU	USART2_U7816R_EGT1,		25
	.EQU	USART2_U7816R_EGT0,		24
	.EQU	USART2_U7816R_CLKDIV7,		22
	.EQU	USART2_U7816R_CLKDIV6,		21
	.EQU	USART2_U7816R_CLKDIV5,		20
	.EQU	USART2_U7816R_CLKDIV4,		19
	.EQU	USART2_U7816R_CLKDIV3,		18
	.EQU	USART2_U7816R_CLKDIV2,		17
	.EQU	USART2_U7816R_CLKDIV1,		16
	.EQU	USART2_U7816R_CLKDIV0,		15
	.EQU	USART2_U7816R_TREPMS,		14
	.EQU	USART2_U7816R_RXRE1,		13
	.EQU	USART2_U7816R_RXRE0,		12
	.EQU	USART2_U7816R_TXRE1,		11
	.EQU	USART2_U7816R_TXRE0,		10
	.EQU	USART2_U7816R_RREPEN,		9
	.EQU	USART2_U7816R_TREPEN,		8
	.EQU	USART2_U7816R_BGTEN,		5
	.EQU	USART2_U7816R_PSEL,		4
	.EQU	USART2_U7816R_ERSW1,		3
	.EQU	USART2_U7816R_ERSW0,		2
	.EQU	USART2_U7816R_CLKOUT,		1
//  register-------------------------------------
	.EQU	USART2_IER,	0x40000A94
//  0x4000 0A94  USART2_IER   Bits-------------------------------------
	.EQU	USART2_IER_UADMIE,		18
	.EQU	USART2_IER_UTXDE,		17
	.EQU	USART2_IER_URCDE,		16
	.EQU	USART2_IER_IDLEIE,		12
	.EQU	USART2_IER_TXEIE,		11
	.EQU	USART2_IER_TFEIE,		10
	.EQU	USART2_IER_RDRIE,		9
	.EQU	USART2_IER_CTSIE,		8
	.EQU	USART2_IER_REIE,		7
	.EQU	USART2_IER_TEIE,		6
	.EQU	USART2_IER_WUIE,		5
	.EQU	USART2_IER_ABTOIE,		4
	.EQU	USART2_IER_BRIE,		3
	.EQU	USART2_IER_FREIE,		2
	.EQU	USART2_IER_PAREIE,		1
	.EQU	USART2_IER_OVFEIE,		0
//  register-------------------------------------
	.EQU	USART2_ADM,	0x40000A98
//  0x4000 0A98  USART2_ADM   Bits-------------------------------------
	.EQU	USART2_ADM_ADM7,		7
	.EQU	USART2_ADM_ADM6,		6
	.EQU	USART2_ADM_ADM5,		5
	.EQU	USART2_ADM_ADM4,		4
	.EQU	USART2_ADM_ADM3,		3
	.EQU	USART2_ADM_ADM2,		2
	.EQU	USART2_ADM_ADM1,		1
	.EQU	USART2_ADM_ADM0,		0
//  register-------------------------------------
	.EQU	USART4_CTLR,	0x40000B80
//  0x4000 0B80  USART4_CTLR   Bits-------------------------------------
	.EQU	USART4_CTLR_SLMEN,		31
	.EQU	USART4_CTLR_RESHD,		30
	.EQU	USART4_CTLR_IRDAEN,		29
	.EQU	USART4_CTLR_BKPWS,		26
	.EQU	USART4_CTLR_RTSE,		25
	.EQU	USART4_CTLR_CTSE,		24
	.EQU	USART4_CTLR_TRGSEL1,		23
	.EQU	USART4_CTLR_TRGSEL0,		22
	.EQU	USART4_CTLR_DT9EN,		21
	.EQU	USART4_CTLR_PARM,		20
	.EQU	USART4_CTLR_TX9SEL,		19
	.EQU	USART4_CTLR_STPW,		18
	.EQU	USART4_CTLR_TIDLEEN,		17
	.EQU	USART4_CTLR_RXEN,		16
	.EQU	USART4_CTLR_TXEN,		15
	.EQU	USART4_CTLR_SYNC,		14
	.EQU	USART4_CTLR_SENDB,		13
	.EQU	USART4_CTLR_RIDLES,		12
	.EQU	USART4_CTLR_ABRDEN,		11
	.EQU	USART4_CTLR_ADREN,		9
	.EQU	USART4_CTLR_CSRS,		8
	.EQU	USART4_CTLR_WUEN,		7
	.EQU	USART4_CTLR_DINV,		6
	.EQU	USART4_CTLR_RCONV,		5
	.EQU	USART4_CTLR_TCONV,		4
	.EQU	USART4_CTLR_SCKPS,		3
	.EQU	USART4_CTLR_BRCKS1,		2
	.EQU	USART4_CTLR_BRCKS0,		1
	.EQU	USART4_CTLR_USARTEN,		0
//  register-------------------------------------
	.EQU	USART4_BRGR,	0x40000B84
//  0x4000 0B84  USART4_BRGR   Bits-------------------------------------
	.EQU	USART4_BRGR_BRGF2_3,		23
	.EQU	USART4_BRGR_BRGF2_2,		22
	.EQU	USART4_BRGR_BRGF2_1,		21
	.EQU	USART4_BRGR_BRGF2_0,		20
	.EQU	USART4_BRGR_BRGF1_3,		19
	.EQU	USART4_BRGR_BRGF1_2,		18
	.EQU	USART4_BRGR_BRGF1_1,		17
	.EQU	USART4_BRGR_BRGF1_0,		16
	.EQU	USART4_BRGR_BRGM15,		15
	.EQU	USART4_BRGR_BRGM14,		14
	.EQU	USART4_BRGR_BRGM13,		13
	.EQU	USART4_BRGR_BRGM12,		12
	.EQU	USART4_BRGR_BRGM11,		11
	.EQU	USART4_BRGR_BRGM10,		10
	.EQU	USART4_BRGR_BRGM9,		9
	.EQU	USART4_BRGR_BRGM8,		8
	.EQU	USART4_BRGR_BRGM7,		7
	.EQU	USART4_BRGR_BRGM6,		6
	.EQU	USART4_BRGR_BRGM5,		5
	.EQU	USART4_BRGR_BRGM4,		4
	.EQU	USART4_BRGR_BRGM3,		3
	.EQU	USART4_BRGR_BRGM2,		2
	.EQU	USART4_BRGR_BRGM1,		1
	.EQU	USART4_BRGR_BRGM0,		0
//  register-------------------------------------
	.EQU	USART4_STR,	0x40000B88
//  0x4000 0B88  USART4_STR   Bits-------------------------------------
	.EQU	USART4_STR_TX0SEL,		31
	.EQU	USART4_STR_TX1SEL,		30
	.EQU	USART4_STR_RXDSEL,		29
	.EQU	USART4_STR_CTSSEL,		28
	.EQU	USART4_STR_TFEIF1,		27
	.EQU	USART4_STR_IDLEIC,		26
	.EQU	USART4_STR_UADMIC,		25
	.EQU	USART4_STR_CTSIC,		24
	.EQU	USART4_STR_REIC,		23
	.EQU	USART4_STR_TEIC,		22
	.EQU	USART4_STR_WUIC,		21
	.EQU	USART4_STR_ABTOIC,		20
	.EQU	USART4_STR_BRIC,		19
	.EQU	USART4_STR_FREIC,		18
	.EQU	USART4_STR_PAREIC,		17
	.EQU	USART4_STR_OVFEIC,		16
	.EQU	USART4_STR_IDLFIF,		15
	.EQU	USART4_STR_UADMIF,		14
	.EQU	USART4_STR_TXEIF,		13
	.EQU	USART4_STR_TFEIF,		12
	.EQU	USART4_STR_RDRIF,		11
	.EQU	USART4_STR_TXFR,		10
	.EQU	USART4_STR_RCFR,		9
	.EQU	USART4_STR_CTSIF,		8
	.EQU	USART4_STR_REIF,		7
	.EQU	USART4_STR_TEIF,		6
	.EQU	USART4_STR_WUIF,		5
	.EQU	USART4_STR_ABTOIF,		4
	.EQU	USART4_STR_BRIF,		3
	.EQU	USART4_STR_FREIF,		2
	.EQU	USART4_STR_PAREIF,		1
	.EQU	USART4_STR_OVFEIF,		0
//  register-------------------------------------
	.EQU	USART4_TBUFR,	0x40000B8C
//  0x4000 0B8C  USART4_TBUFR   Bits-------------------------------------
	.EQU	USART4_TBUFR_TBUF7,		7
	.EQU	USART4_TBUFR_TBUF6,		6
	.EQU	USART4_TBUFR_TBUF5,		5
	.EQU	USART4_TBUFR_TBUF4,		4
	.EQU	USART4_TBUFR_TBUF3,		3
	.EQU	USART4_TBUFR_TBUF2,		2
	.EQU	USART4_TBUFR_TBUF1,		1
	.EQU	USART4_TBUFR_TBUF0,		0
//  register-------------------------------------
	.EQU	USART4_RBUFR,	0x40000B8C
//  0x4000 0B8C  USART4_RBUFR   Bits-------------------------------------
	.EQU	USART4_RBUFR_RBUF8,		8
	.EQU	USART4_RBUFR_RBUF7,		7
	.EQU	USART4_RBUFR_RBUF6,		6
	.EQU	USART4_RBUFR_RBUF5,		5
	.EQU	USART4_RBUFR_RBUF4,		4
	.EQU	USART4_RBUFR_RBUF3,		3
	.EQU	USART4_RBUFR_RBUF2,		2
	.EQU	USART4_RBUFR_RBUF1,		1
	.EQU	USART4_RBUFR_RBUF0,		0
//  register-------------------------------------
	.EQU	USART4_U7816R,	0x40000B90
//  0x4000 0B90  USART4_U7816R   Bits-------------------------------------
	.EQU	USART4_U7816R_EGT7,		31
	.EQU	USART4_U7816R_EGT6,		30
	.EQU	USART4_U7816R_EGT5,		29
	.EQU	USART4_U7816R_EGT4,		28
	.EQU	USART4_U7816R_EGT3,		27
	.EQU	USART4_U7816R_EGT2,		26
	.EQU	USART4_U7816R_EGT1,		25
	.EQU	USART4_U7816R_EGT0,		24
	.EQU	USART4_U7816R_CLKDIV7,		22
	.EQU	USART4_U7816R_CLKDIV6,		21
	.EQU	USART4_U7816R_CLKDIV5,		20
	.EQU	USART4_U7816R_CLKDIV4,		19
	.EQU	USART4_U7816R_CLKDIV3,		18
	.EQU	USART4_U7816R_CLKDIV2,		17
	.EQU	USART4_U7816R_CLKDIV1,		16
	.EQU	USART4_U7816R_CLKDIV0,		15
	.EQU	USART4_U7816R_TREPMS,		14
	.EQU	USART4_U7816R_RXRE1,		13
	.EQU	USART4_U7816R_RXRE0,		12
	.EQU	USART4_U7816R_TXRE1,		11
	.EQU	USART4_U7816R_TXRE0,		10
	.EQU	USART4_U7816R_RREPEN,		9
	.EQU	USART4_U7816R_TREPEN,		8
	.EQU	USART4_U7816R_BGTEN,		5
	.EQU	USART4_U7816R_PSEL,		4
	.EQU	USART4_U7816R_ERSW1,		3
	.EQU	USART4_U7816R_ERSW0,		2
	.EQU	USART4_U7816R_CLKOUT,		1
//  register-------------------------------------
	.EQU	USART4_IER,	0x40000B94
//  0x4000 0B94  USART4_IER   Bits-------------------------------------
	.EQU	USART4_IER_UADMIE,		18
	.EQU	USART4_IER_UTXDE,		17
	.EQU	USART4_IER_URCDE,		16
	.EQU	USART4_IER_IDLEIE,		12
	.EQU	USART4_IER_TXEIE,		11
	.EQU	USART4_IER_TFEIE,		10
	.EQU	USART4_IER_RDRIE,		9
	.EQU	USART4_IER_CTSIE,		8
	.EQU	USART4_IER_REIE,		7
	.EQU	USART4_IER_TEIE,		6
	.EQU	USART4_IER_WUIE,		5
	.EQU	USART4_IER_ABTOIE,		4
	.EQU	USART4_IER_BRIE,		3
	.EQU	USART4_IER_FREIE,		2
	.EQU	USART4_IER_PAREIE,		1
	.EQU	USART4_IER_OVFEIE,		0
//  register-------------------------------------
	.EQU	USART4_ADM,	0x40000B98
//  0x4000 0B98  USART4_ADM   Bits-------------------------------------
	.EQU	USART4_ADM_ADM7,		7
	.EQU	USART4_ADM_ADM6,		6
	.EQU	USART4_ADM_ADM5,		5
	.EQU	USART4_ADM_ADM4,		4
	.EQU	USART4_ADM_ADM3,		3
	.EQU	USART4_ADM_ADM2,		2
	.EQU	USART4_ADM_ADM1,		1
	.EQU	USART4_ADM_ADM0,		0
//  register-------------------------------------
	.EQU	SPI0_BRGR,		0x40000C00
//  0x4000 0C00  SPI0_BRGR   Bits-------------------------------------
	.EQU	SPI0_BRGR_I2SODD,		25
	.EQU	SPI0_BRGR_MCKEN,		24
	.EQU	SPI0_BRGR_I2SDIV7,		23
	.EQU	SPI0_BRGR_I2SDIV6,		22
	.EQU	SPI0_BRGR_I2SDIV5,		21
	.EQU	SPI0_BRGR_I2SDIV4,		20
	.EQU	SPI0_BRGR_I2SDIV3,		19
	.EQU	SPI0_BRGR_I2SDIV2,		18
	.EQU	SPI0_BRGR_I2SDIV1,		17
	.EQU	SPI0_BRGR_I2SDIV0,		16
	.EQU	SPI0_BRGR_SPIBRG15,		15
	.EQU	SPI0_BRGR_SPIBRG14,		14
	.EQU	SPI0_BRGR_SPIBRG13,		13
	.EQU	SPI0_BRGR_SPIBRG12,		12
	.EQU	SPI0_BRGR_SPIBRG11,		11
	.EQU	SPI0_BRGR_SPIBRG10,		10
	.EQU	SPI0_BRGR_SPIBRG9,		9
	.EQU	SPI0_BRGR_SPIBRG8,		8
	.EQU	SPI0_BRGR_SPIBRG7,		7
	.EQU	SPI0_BRGR_SPIBRG6,		6
	.EQU	SPI0_BRGR_SPIBRG5,		5
	.EQU	SPI0_BRGR_SPIBRG4,		4
	.EQU	SPI0_BRGR_SPIBRG3,		3
	.EQU	SPI0_BRGR_SPIBRG2,		2
	.EQU	SPI0_BRGR_SPIBRG1,		1
	.EQU	SPI0_BRGR_SPIBRG0,		0
//  register-------------------------------------
	.EQU	SPI0_CTLR,		0x40000C04
//  0x4000 0C04  SPI0_CTLR   Bits-------------------------------------
	.EQU	SPI0_CTLR_PCMCKP,		27
	.EQU	SPI0_CTLR_I2SCKS1,		26
	.EQU	SPI0_CTLR_I2SCKS0,		25
	.EQU	SPI0_CTLR_PCMS,		24
	.EQU	SPI0_CTLR_I2SSS1,		23
	.EQU	SPI0_CTLR_I2SSS0,		22
	.EQU	SPI0_CTLR_I2SMC1,		21
	.EQU	SPI0_CTLR_I2SMC0,		20
	.EQU	SPI0_CTLR_MCKOS,		18
	.EQU	SPI0_CTLR_I2SMD,		16
	.EQU	SPI0_CTLR_SSEL1,		15
	.EQU	SPI0_CTLR_SSEL0,		14
	.EQU	SPI0_CTLR_SPIBS1,		13
	.EQU	SPI0_CTLR_SPIBS0,		12
	.EQU	SPI0_CTLR_SPICKE,		9
	.EQU	SPI0_CTLR_SPICKP,		8
	.EQU	SPI0_CTLR_SPIIOS,		7
	.EQU	SPI0_CTLR_SPIDS,		6
	.EQU	SPI0_CTLR_SPICKS1,		5
	.EQU	SPI0_CTLR_SPICKS0,		4
	.EQU	SPI0_CTLR_SPIMS2,		3
	.EQU	SPI0_CTLR_SPIMS1,		2
	.EQU	SPI0_CTLR_SPIMS0,		1
	.EQU	SPI0_CTLR_SPIEN,		0
//  register-------------------------------------
	.EQU	SPI0_BUFR,		0x40000C08
//  0x4000 0C08  SPI0_BUFR   Bits-------------------------------------
	.EQU	SPI0_BUFR_SPIBUF31,		31
	.EQU	SPI0_BUFR_SPIBUF30,		30
	.EQU	SPI0_BUFR_SPIBUF29,		29
	.EQU	SPI0_BUFR_SPIBUF28,		28
	.EQU	SPI0_BUFR_SPIBUF27,		27
	.EQU	SPI0_BUFR_SPIBUF26,		26
	.EQU	SPI0_BUFR_SPIBUF25,		25
	.EQU	SPI0_BUFR_SPIBUF24,		24
	.EQU	SPI0_BUFR_SPIBUF23,		23
	.EQU	SPI0_BUFR_SPIBUF22,		22
	.EQU	SPI0_BUFR_SPIBUF21,		21
	.EQU	SPI0_BUFR_SPIBUF20,		20
	.EQU	SPI0_BUFR_SPIBUF19,		19
	.EQU	SPI0_BUFR_SPIBUF18,		18
	.EQU	SPI0_BUFR_SPIBUF17,		17
	.EQU	SPI0_BUFR_SPIBUF16,		16
	.EQU	SPI0_BUFR_SPIBUF15,		15
	.EQU	SPI0_BUFR_SPIBUF14,		14
	.EQU	SPI0_BUFR_SPIBUF13,		13
	.EQU	SPI0_BUFR_SPIBUF12,		12
	.EQU	SPI0_BUFR_SPIBUF11,		11
	.EQU	SPI0_BUFR_SPIBUF10,		10
	.EQU	SPI0_BUFR_SPIBUF9,		9
	.EQU	SPI0_BUFR_SPIBUF8,		8
	.EQU	SPI0_BUFR_SPIBUF7,		7
	.EQU	SPI0_BUFR_SPIBUF6,		6
	.EQU	SPI0_BUFR_SPIBUF5,		5
	.EQU	SPI0_BUFR_SPIBUF4,		4
	.EQU	SPI0_BUFR_SPIBUF3,		3
	.EQU	SPI0_BUFR_SPIBUF2,		2
	.EQU	SPI0_BUFR_SPIBUF1,		1
	.EQU	SPI0_BUFR_SPIBUF0,		0
//  register-------------------------------------
	.EQU	SPI0_STR,		0x40000C0C
//  0x4000 0C0C  SPI0_STR   Bits-------------------------------------
	.EQU	SPI0_STR_STXDE,		21
	.EQU	SPI0_STR_SRCDE,		20
	.EQU	SPI0_STR_UDRIC,		18
	.EQU	SPI0_STR_TOVFIC,		17
	.EQU	SPI0_STR_ROVFIC,		16
	.EQU	SPI0_STR_TNEIE,		15
	.EQU	SPI0_STR_RNEIE,		14
	.EQU	SPI0_STR_TOVFIE,		13
	.EQU	SPI0_STR_ROVFIE,		12
	.EQU	SPI0_STR_UDRIE,		11
	.EQU	SPI0_STR_UDRIF,		6
	.EQU	SPI0_STR_TOVFIF,		5
	.EQU	SPI0_STR_ROVFIF,		4
	.EQU	SPI0_STR_CHSIDE,		3
	.EQU	SPI0_STR_TNE,		2
	.EQU	SPI0_STR_RNE,		1
	.EQU	SPI0_STR_SPIBUSY,		0
//  register-------------------------------------
	.EQU	SPI1_BRGR,		0x40000C80
//  0x4000 0C80  SPI1_BRGR   Bits-------------------------------------
	.EQU	SPI1_BRGR_I2SODD,		25
	.EQU	SPI1_BRGR_MCKEN,		24
	.EQU	SPI1_BRGR_I2SDIV7,		23
	.EQU	SPI1_BRGR_I2SDIV6,		22
	.EQU	SPI1_BRGR_I2SDIV5,		21
	.EQU	SPI1_BRGR_I2SDIV4,		20
	.EQU	SPI1_BRGR_I2SDIV3,		19
	.EQU	SPI1_BRGR_I2SDIV2,		18
	.EQU	SPI1_BRGR_I2SDIV1,		17
	.EQU	SPI1_BRGR_I2SDIV0,		16
	.EQU	SPI1_BRGR_SPIBRG15,		15
	.EQU	SPI1_BRGR_SPIBRG14,		14
	.EQU	SPI1_BRGR_SPIBRG13,		13
	.EQU	SPI1_BRGR_SPIBRG12,		12
	.EQU	SPI1_BRGR_SPIBRG11,		11
	.EQU	SPI1_BRGR_SPIBRG10,		10
	.EQU	SPI1_BRGR_SPIBRG9,		9
	.EQU	SPI1_BRGR_SPIBRG8,		8
	.EQU	SPI1_BRGR_SPIBRG7,		7
	.EQU	SPI1_BRGR_SPIBRG6,		6
	.EQU	SPI1_BRGR_SPIBRG5,		5
	.EQU	SPI1_BRGR_SPIBRG4,		4
	.EQU	SPI1_BRGR_SPIBRG3,		3
	.EQU	SPI1_BRGR_SPIBRG2,		2
	.EQU	SPI1_BRGR_SPIBRG1,		1
	.EQU	SPI1_BRGR_SPIBRG0,		0
//  register-------------------------------------
	.EQU	SPI1_CTLR,		0x40000C84
//  0x4000 0C84  SPI1_CTLR   Bits-------------------------------------
	.EQU	SPI1_CTLR_PCMCKP,		27
	.EQU	SPI1_CTLR_I2SCKS1,		26
	.EQU	SPI1_CTLR_I2SCKS0,		25
	.EQU	SPI1_CTLR_PCMS,		24
	.EQU	SPI1_CTLR_I2SSS1,		23
	.EQU	SPI1_CTLR_I2SSS0,		22
	.EQU	SPI1_CTLR_I2SMC1,		21
	.EQU	SPI1_CTLR_I2SMC0,		20
	.EQU	SPI1_CTLR_MCKOS,		18
	.EQU	SPI1_CTLR_I2SMD,		16
	.EQU	SPI1_CTLR_SSEL1,		15
	.EQU	SPI1_CTLR_SSEL0,		14
	.EQU	SPI1_CTLR_SPIBS1,		13
	.EQU	SPI1_CTLR_SPIBS0,		12
	.EQU	SPI1_CTLR_SPICKE,		9
	.EQU	SPI1_CTLR_SPICKP,		8
	.EQU	SPI1_CTLR_SPIIOS,		7
	.EQU	SPI1_CTLR_SPIDS,		6
	.EQU	SPI1_CTLR_SPICKS1,		5
	.EQU	SPI1_CTLR_SPICKS0,		4
	.EQU	SPI1_CTLR_SPIMS2,		3
	.EQU	SPI1_CTLR_SPIMS1,		2
	.EQU	SPI1_CTLR_SPIMS0,		1
	.EQU	SPI1_CTLR_SPIEN,		0
//  register-------------------------------------
	.EQU	SPI1_BUFR,		0x40000C88
//  0x4000 0C88  SPI1_BUFR   Bits-------------------------------------
	.EQU	SPI1_BUFR_SPIBUF31,		31
	.EQU	SPI1_BUFR_SPIBUF30,		30
	.EQU	SPI1_BUFR_SPIBUF29,		29
	.EQU	SPI1_BUFR_SPIBUF28,		28
	.EQU	SPI1_BUFR_SPIBUF27,		27
	.EQU	SPI1_BUFR_SPIBUF26,		26
	.EQU	SPI1_BUFR_SPIBUF25,		25
	.EQU	SPI1_BUFR_SPIBUF24,		24
	.EQU	SPI1_BUFR_SPIBUF23,		23
	.EQU	SPI1_BUFR_SPIBUF22,		22
	.EQU	SPI1_BUFR_SPIBUF21,		21
	.EQU	SPI1_BUFR_SPIBUF20,		20
	.EQU	SPI1_BUFR_SPIBUF19,		19
	.EQU	SPI1_BUFR_SPIBUF18,		18
	.EQU	SPI1_BUFR_SPIBUF17,		17
	.EQU	SPI1_BUFR_SPIBUF16,		16
	.EQU	SPI1_BUFR_SPIBUF15,		15
	.EQU	SPI1_BUFR_SPIBUF14,		14
	.EQU	SPI1_BUFR_SPIBUF13,		13
	.EQU	SPI1_BUFR_SPIBUF12,		12
	.EQU	SPI1_BUFR_SPIBUF11,		11
	.EQU	SPI1_BUFR_SPIBUF10,		10
	.EQU	SPI1_BUFR_SPIBUF9,		9
	.EQU	SPI1_BUFR_SPIBUF8,		8
	.EQU	SPI1_BUFR_SPIBUF7,		7
	.EQU	SPI1_BUFR_SPIBUF6,		6
	.EQU	SPI1_BUFR_SPIBUF5,		5
	.EQU	SPI1_BUFR_SPIBUF4,		4
	.EQU	SPI1_BUFR_SPIBUF3,		3
	.EQU	SPI1_BUFR_SPIBUF2,		2
	.EQU	SPI1_BUFR_SPIBUF1,		1
	.EQU	SPI1_BUFR_SPIBUF0,		0
//  register-------------------------------------
	.EQU	SPI1_STR,		0x40000C8C
//  0x4000 0C8C  SPI1_STR   Bits-------------------------------------
	.EQU	SPI1_STR_STXDE,		21
	.EQU	SPI1_STR_SRCDE,		20
	.EQU	SPI1_STR_UDRIC,		18
	.EQU	SPI1_STR_TOVFIC,		17
	.EQU	SPI1_STR_ROVFIC,		16
	.EQU	SPI1_STR_TNEIE,		15
	.EQU	SPI1_STR_RNEIE,		14
	.EQU	SPI1_STR_TOVFIE,		13
	.EQU	SPI1_STR_ROVFIE,		12
	.EQU	SPI1_STR_UDRIE,		11
	.EQU	SPI1_STR_UDRIF,		6
	.EQU	SPI1_STR_TOVFIF,		5
	.EQU	SPI1_STR_ROVFIF,		4
	.EQU	SPI1_STR_CHSIDE,		3
	.EQU	SPI1_STR_TNE,		2
	.EQU	SPI1_STR_RNE,		1
	.EQU	SPI1_STR_SPIBUSY,		0
//  register-------------------------------------
	.EQU	I2C0_CTLR,		0x40000D00
//  0x4000 0D00  I2C0_CTLR   Bits-------------------------------------
	.EQU	I2C0_CTLR_ADRL,		31
	.EQU	I2C0_CTLR_ALERT,		27
	.EQU	I2C0_CTLR_ARPEN,		26
	.EQU	I2C0_CTLR_SMBT,		25
	.EQU	I2C0_CTLR_SMBUS,		24
	.EQU	I2C0_CTLR_NMENA,		22
	.EQU	I2C0_CTLR_ENASCL,		21
	.EQU	I2C0_CTLR_MTHALL,		20
	.EQU	I2C0_CTLR_I2CCKDIV1,		19
	.EQU	I2C0_CTLR_I2CCKDIV0,		18
	.EQU	I2C0_CTLR_I2CCKS1,		17
	.EQU	I2C0_CTLR_I2CCKS0,		16
	.EQU	I2C0_CTLR_A10MSKEN,		15
	.EQU	I2C0_CTLR_GCEN,		14
	.EQU	I2C0_CTLR_ACKDT,		13
	.EQU	I2C0_CTLR_ACKEN,		12
	.EQU	I2C0_CTLR_SCLNOSTR,		11
	.EQU	I2C0_CTLR_PEN,		10
	.EQU	I2C0_CTLR_SEN,		8
	.EQU	I2C0_CTLR_DHCNT3,		7
	.EQU	I2C0_CTLR_DHCNT2,		6
	.EQU	I2C0_CTLR_DHCNT1,		5
	.EQU	I2C0_CTLR_DHCNT0,		4
	.EQU	I2C0_CTLR_BADR10,		1
	.EQU	I2C0_CTLR_I2CEN,		0
//  register-------------------------------------
	.EQU	I2C0_SR,		0x40000D04
//  0x4000 0D04  I2C0_SR   Bits-------------------------------------
	.EQU	I2C0_SR_BUSY,		20
	.EQU	I2C0_SR_OVERIF,		19
	.EQU	I2C0_SR_BERRIF,		18
	.EQU	I2C0_SR_ITXDF,		17
	.EQU	I2C0_SR_IRCDF,		16
	.EQU	I2C0_SR_TXBE,		13
	.EQU	I2C0_SR_RCBF,		12
	.EQU	I2C0_SR_ISIF,		11
	.EQU	I2C0_SR_SMBDIF,		10
	.EQU	I2C0_SR_SMBHIF,		9
	.EQU	I2C0_SR_SMBAIF,		8
	.EQU	I2C0_SR_RNW,		7
	.EQU	I2C0_SR_ARBLIF,		6
	.EQU	I2C0_SR_AFIF,		5
	.EQU	I2C0_SR_DATA,		4
	.EQU	I2C0_SR_ADD10,		3
	.EQU	I2C0_SR_ADDR,		2
	.EQU	I2C0_SR_PIF,		1
	.EQU	I2C0_SR_SIF,		0
//  register-------------------------------------
	.EQU	I2C0_BUFR,		0x40000D08
//  0x4000 0D08  I2C0_BUFR   Bits-------------------------------------
	.EQU	I2C0_BUFR_I2CBUF9,		9
	.EQU	I2C0_BUFR_I2CBUF8,		8
	.EQU	I2C0_BUFR_I2CBUF7,		7
	.EQU	I2C0_BUFR_I2CBUF6,		6
	.EQU	I2C0_BUFR_I2CBUF5,		5
	.EQU	I2C0_BUFR_I2CBUF4,		4
	.EQU	I2C0_BUFR_I2CBUF3,		3
	.EQU	I2C0_BUFR_I2CBUF2,		2
	.EQU	I2C0_BUFR_I2CBUF1,		1
	.EQU	I2C0_BUFR_I2CBUF0,		0
//  register-------------------------------------
	.EQU	I2C0_ADDR0,	0x40000D0C
//  0x4000 0D0C  I2C0_ADDR0   Bits-------------------------------------
	.EQU	I2C0_ADDR0_I2CMSK9,		25
	.EQU	I2C0_ADDR0_I2CMSK8,		24
	.EQU	I2C0_ADDR0_I2CMSK7,		23
	.EQU	I2C0_ADDR0_I2CMSK6,		22
	.EQU	I2C0_ADDR0_I2CMSK5,		21
	.EQU	I2C0_ADDR0_I2CMSK4,		20
	.EQU	I2C0_ADDR0_I2CMSK3,		19
	.EQU	I2C0_ADDR0_I2CMSK2,		18
	.EQU	I2C0_ADDR0_I2CMSK1,		17
	.EQU	I2C0_ADDR0_I2CMSK0,		16
	.EQU	I2C0_ADDR0_I2CADD9,		9
	.EQU	I2C0_ADDR0_I2CADD8,		8
	.EQU	I2C0_ADDR0_I2CADD7,		7
	.EQU	I2C0_ADDR0_I2CADD6,		6
	.EQU	I2C0_ADDR0_I2CADD5,		5
	.EQU	I2C0_ADDR0_I2CADD4,		4
	.EQU	I2C0_ADDR0_I2CADD3,		3
	.EQU	I2C0_ADDR0_I2CADD2,		2
	.EQU	I2C0_ADDR0_I2CADD1,		1
	.EQU	I2C0_ADDR0_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C0_BRGR,		0x40000D10
//  0x4000 0D10  I2C0_BRGR   Bits-------------------------------------
	.EQU	I2C0_BRGR_I2CBRGL15,		31
	.EQU	I2C0_BRGR_I2CBRGL14,		30
	.EQU	I2C0_BRGR_I2CBRGL13,		29
	.EQU	I2C0_BRGR_I2CBRGL12,		28
	.EQU	I2C0_BRGR_I2CBRGL11,		27
	.EQU	I2C0_BRGR_I2CBRGL10,		26
	.EQU	I2C0_BRGR_I2CBRGL9,		25
	.EQU	I2C0_BRGR_I2CBRGL8,		24
	.EQU	I2C0_BRGR_I2CBRGL7,		23
	.EQU	I2C0_BRGR_I2CBRGL6,		22
	.EQU	I2C0_BRGR_I2CBRGL5,		21
	.EQU	I2C0_BRGR_I2CBRGL4,		20
	.EQU	I2C0_BRGR_I2CBRGL3,		19
	.EQU	I2C0_BRGR_I2CBRGL2,		18
	.EQU	I2C0_BRGR_I2CBRGL1,		17
	.EQU	I2C0_BRGR_I2CBRGL0,		16
	.EQU	I2C0_BRGR_I2CBRGH15,		15
	.EQU	I2C0_BRGR_I2CBRGH14,		14
	.EQU	I2C0_BRGR_I2CBRGH13,		13
	.EQU	I2C0_BRGR_I2CBRGH12,		12
	.EQU	I2C0_BRGR_I2CBRGH11,		11
	.EQU	I2C0_BRGR_I2CBRGH10,		10
	.EQU	I2C0_BRGR_I2CBRGH9,		9
	.EQU	I2C0_BRGR_I2CBRGH8,		8
	.EQU	I2C0_BRGR_I2CBRGH7,		7
	.EQU	I2C0_BRGR_I2CBRGH6,		6
	.EQU	I2C0_BRGR_I2CBRGH5,		5
	.EQU	I2C0_BRGR_I2CBRGH4,		4
	.EQU	I2C0_BRGR_I2CBRGH3,		3
	.EQU	I2C0_BRGR_I2CBRGH2,		2
	.EQU	I2C0_BRGR_I2CBRGH1,		1
	.EQU	I2C0_BRGR_I2CBRGH0,		0
//  register-------------------------------------
	.EQU	I2C0_ADDR1,	0x40000D14
//  0x4000 0D14  I2C0_ADDR1   Bits-------------------------------------
	.EQU	I2C0_ADDR1_I2CMSK9,		25
	.EQU	I2C0_ADDR1_I2CMSK8,		24
	.EQU	I2C0_ADDR1_I2CMSK7,		23
	.EQU	I2C0_ADDR1_I2CMSK6,		22
	.EQU	I2C0_ADDR1_I2CMSK5,		21
	.EQU	I2C0_ADDR1_I2CMSK4,		20
	.EQU	I2C0_ADDR1_I2CMSK3,		19
	.EQU	I2C0_ADDR1_I2CMSK2,		18
	.EQU	I2C0_ADDR1_I2CMSK1,		17
	.EQU	I2C0_ADDR1_I2CMSK0,		16
	.EQU	I2C0_ADDR1_I2CADD9,		9
	.EQU	I2C0_ADDR1_I2CADD8,		8
	.EQU	I2C0_ADDR1_I2CADD7,		7
	.EQU	I2C0_ADDR1_I2CADD6,		6
	.EQU	I2C0_ADDR1_I2CADD5,		5
	.EQU	I2C0_ADDR1_I2CADD4,		4
	.EQU	I2C0_ADDR1_I2CADD3,		3
	.EQU	I2C0_ADDR1_I2CADD2,		2
	.EQU	I2C0_ADDR1_I2CADD1,		1
	.EQU	I2C0_ADDR1_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C0_ADDR2,	0x40000D18
//  0x4000 0D18  I2C0_ADDR2   Bits-------------------------------------
	.EQU	I2C0_ADDR2_I2CMSK9,		25
	.EQU	I2C0_ADDR2_I2CMSK8,		24
	.EQU	I2C0_ADDR2_I2CMSK7,		23
	.EQU	I2C0_ADDR2_I2CMSK6,		22
	.EQU	I2C0_ADDR2_I2CMSK5,		21
	.EQU	I2C0_ADDR2_I2CMSK4,		20
	.EQU	I2C0_ADDR2_I2CMSK3,		19
	.EQU	I2C0_ADDR2_I2CMSK2,		18
	.EQU	I2C0_ADDR2_I2CMSK1,		17
	.EQU	I2C0_ADDR2_I2CMSK0,		16
	.EQU	I2C0_ADDR2_I2CADD9,		9
	.EQU	I2C0_ADDR2_I2CADD8,		8
	.EQU	I2C0_ADDR2_I2CADD7,		7
	.EQU	I2C0_ADDR2_I2CADD6,		6
	.EQU	I2C0_ADDR2_I2CADD5,		5
	.EQU	I2C0_ADDR2_I2CADD4,		4
	.EQU	I2C0_ADDR2_I2CADD3,		3
	.EQU	I2C0_ADDR2_I2CADD2,		2
	.EQU	I2C0_ADDR2_I2CADD1,		1
	.EQU	I2C0_ADDR2_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C0_ADDR3,	0x40000D1C
//  0x4000 0D1C  I2C0_ADDR3   Bits-------------------------------------
	.EQU	I2C0_ADDR3_I2CMSK9,		25
	.EQU	I2C0_ADDR3_I2CMSK8,		24
	.EQU	I2C0_ADDR3_I2CMSK7,		23
	.EQU	I2C0_ADDR3_I2CMSK6,		22
	.EQU	I2C0_ADDR3_I2CMSK5,		21
	.EQU	I2C0_ADDR3_I2CMSK4,		20
	.EQU	I2C0_ADDR3_I2CMSK3,		19
	.EQU	I2C0_ADDR3_I2CMSK2,		18
	.EQU	I2C0_ADDR3_I2CMSK1,		17
	.EQU	I2C0_ADDR3_I2CMSK0,		16
	.EQU	I2C0_ADDR3_I2CADD9,		9
	.EQU	I2C0_ADDR3_I2CADD8,		8
	.EQU	I2C0_ADDR3_I2CADD7,		7
	.EQU	I2C0_ADDR3_I2CADD6,		6
	.EQU	I2C0_ADDR3_I2CADD5,		5
	.EQU	I2C0_ADDR3_I2CADD4,		4
	.EQU	I2C0_ADDR3_I2CADD3,		3
	.EQU	I2C0_ADDR3_I2CADD2,		2
	.EQU	I2C0_ADDR3_I2CADD1,		1
	.EQU	I2C0_ADDR3_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C0_IER,		0x40000D20
//  0x4000 0D20  I2C0_IER   Bits-------------------------------------
	.EQU	I2C0_IER_OVERIE,		19
	.EQU	I2C0_IER_BERRIE,		18
	.EQU	I2C0_IER_ITXDE,		17
	.EQU	I2C0_IER_IRCDE,		16
	.EQU	I2C0_IER_ISIE,		11
	.EQU	I2C0_IER_SMBDIE,		10
	.EQU	I2C0_IER_SMBHIE,		9
	.EQU	I2C0_IER_SMBAIE,		8
	.EQU	I2C0_IER_ARBLIE,		6
	.EQU	I2C0_IER_AFIE,		5
	.EQU	I2C0_IER_PIE,		1
	.EQU	I2C0_IER_SIE,		0
//  register-------------------------------------
	.EQU	I2C1_CTLR,		0x40000D80
//  0x4000 0D80  I2C1_CTLR   Bits-------------------------------------
	.EQU	I2C1_CTLR_ADRL,		31
	.EQU	I2C1_CTLR_ALERT,		27
	.EQU	I2C1_CTLR_ARPEN,		26
	.EQU	I2C1_CTLR_SMBT,		25
	.EQU	I2C1_CTLR_SMBUS,		24
	.EQU	I2C1_CTLR_NMENA,		22
	.EQU	I2C1_CTLR_ENASCL,		21
	.EQU	I2C1_CTLR_MTHALL,		20
	.EQU	I2C1_CTLR_I2CCKDIV1,		19
	.EQU	I2C1_CTLR_I2CCKDIV0,		18
	.EQU	I2C1_CTLR_I2CCKS1,		17
	.EQU	I2C1_CTLR_I2CCKS0,		16
	.EQU	I2C1_CTLR_A10MSKEN,		15
	.EQU	I2C1_CTLR_GCEN,		14
	.EQU	I2C1_CTLR_ACKDT,		13
	.EQU	I2C1_CTLR_ACKEN,		12
	.EQU	I2C1_CTLR_SCLNOSTR,		11
	.EQU	I2C1_CTLR_PEN,		10
	.EQU	I2C1_CTLR_SEN,		8
	.EQU	I2C1_CTLR_DHCNT3,		7
	.EQU	I2C1_CTLR_DHCNT2,		6
	.EQU	I2C1_CTLR_DHCNT1,		5
	.EQU	I2C1_CTLR_DHCNT0,		4
	.EQU	I2C1_CTLR_BADR10,		1
	.EQU	I2C1_CTLR_I2CEN,		0
//  register-------------------------------------
	.EQU	I2C1_SR,		0x40000D84
//  0x4000 0D84  I2C1_SR   Bits-------------------------------------
	.EQU	I2C1_SR_BUSY,		20
	.EQU	I2C1_SR_OVERIF,		19
	.EQU	I2C1_SR_BERRIF,		18
	.EQU	I2C1_SR_ITXDF,		17
	.EQU	I2C1_SR_IRCDF,		16
	.EQU	I2C1_SR_TXBE,		13
	.EQU	I2C1_SR_RCBF,		12
	.EQU	I2C1_SR_ISIF,		11
	.EQU	I2C1_SR_SMBDIF,		10
	.EQU	I2C1_SR_SMBHIF,		9
	.EQU	I2C1_SR_SMBAIF,		8
	.EQU	I2C1_SR_RNW,		7
	.EQU	I2C1_SR_ARBLIF,		6
	.EQU	I2C1_SR_AFIF,		5
	.EQU	I2C1_SR_DATA,		4
	.EQU	I2C1_SR_ADD10,		3
	.EQU	I2C1_SR_ADDR,		2
	.EQU	I2C1_SR_PIF,		1
	.EQU	I2C1_SR_SIF,		0
//  register-------------------------------------
	.EQU	I2C1_BUFR,		0x40000D88
//  0x4000 0D88  I2C1_BUFR   Bits-------------------------------------
	.EQU	I2C1_BUFR_I2CBUF9,		9
	.EQU	I2C1_BUFR_I2CBUF8,		8
	.EQU	I2C1_BUFR_I2CBUF7,		7
	.EQU	I2C1_BUFR_I2CBUF6,		6
	.EQU	I2C1_BUFR_I2CBUF5,		5
	.EQU	I2C1_BUFR_I2CBUF4,		4
	.EQU	I2C1_BUFR_I2CBUF3,		3
	.EQU	I2C1_BUFR_I2CBUF2,		2
	.EQU	I2C1_BUFR_I2CBUF1,		1
	.EQU	I2C1_BUFR_I2CBUF0,		0
//  register-------------------------------------
	.EQU	I2C1_ADDR0,	0x40000D8C
//  0x4000 0D8C  I2C1_ADDR0   Bits-------------------------------------
	.EQU	I2C1_ADDR0_I2CMSK9,		25
	.EQU	I2C1_ADDR0_I2CMSK8,		24
	.EQU	I2C1_ADDR0_I2CMSK7,		23
	.EQU	I2C1_ADDR0_I2CMSK6,		22
	.EQU	I2C1_ADDR0_I2CMSK5,		21
	.EQU	I2C1_ADDR0_I2CMSK4,		20
	.EQU	I2C1_ADDR0_I2CMSK3,		19
	.EQU	I2C1_ADDR0_I2CMSK2,		18
	.EQU	I2C1_ADDR0_I2CMSK1,		17
	.EQU	I2C1_ADDR0_I2CMSK0,		16
	.EQU	I2C1_ADDR0_I2CADD9,		9
	.EQU	I2C1_ADDR0_I2CADD8,		8
	.EQU	I2C1_ADDR0_I2CADD7,		7
	.EQU	I2C1_ADDR0_I2CADD6,		6
	.EQU	I2C1_ADDR0_I2CADD5,		5
	.EQU	I2C1_ADDR0_I2CADD4,		4
	.EQU	I2C1_ADDR0_I2CADD3,		3
	.EQU	I2C1_ADDR0_I2CADD2,		2
	.EQU	I2C1_ADDR0_I2CADD1,		1
	.EQU	I2C1_ADDR0_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C1_BRGR,		0x40000D90
//  0x4000 0D90  I2C1_BRGR   Bits-------------------------------------
	.EQU	I2C1_BRGR_I2CBRGL15,		31
	.EQU	I2C1_BRGR_I2CBRGL14,		30
	.EQU	I2C1_BRGR_I2CBRGL13,		29
	.EQU	I2C1_BRGR_I2CBRGL12,		28
	.EQU	I2C1_BRGR_I2CBRGL11,		27
	.EQU	I2C1_BRGR_I2CBRGL10,		26
	.EQU	I2C1_BRGR_I2CBRGL9,		25
	.EQU	I2C1_BRGR_I2CBRGL8,		24
	.EQU	I2C1_BRGR_I2CBRGL7,		23
	.EQU	I2C1_BRGR_I2CBRGL6,		22
	.EQU	I2C1_BRGR_I2CBRGL5,		21
	.EQU	I2C1_BRGR_I2CBRGL4,		20
	.EQU	I2C1_BRGR_I2CBRGL3,		19
	.EQU	I2C1_BRGR_I2CBRGL2,		18
	.EQU	I2C1_BRGR_I2CBRGL1,		17
	.EQU	I2C1_BRGR_I2CBRGL0,		16
	.EQU	I2C1_BRGR_I2CBRGH15,		15
	.EQU	I2C1_BRGR_I2CBRGH14,		14
	.EQU	I2C1_BRGR_I2CBRGH13,		13
	.EQU	I2C1_BRGR_I2CBRGH12,		12
	.EQU	I2C1_BRGR_I2CBRGH11,		11
	.EQU	I2C1_BRGR_I2CBRGH10,		10
	.EQU	I2C1_BRGR_I2CBRGH9,		9
	.EQU	I2C1_BRGR_I2CBRGH8,		8
	.EQU	I2C1_BRGR_I2CBRGH7,		7
	.EQU	I2C1_BRGR_I2CBRGH6,		6
	.EQU	I2C1_BRGR_I2CBRGH5,		5
	.EQU	I2C1_BRGR_I2CBRGH4,		4
	.EQU	I2C1_BRGR_I2CBRGH3,		3
	.EQU	I2C1_BRGR_I2CBRGH2,		2
	.EQU	I2C1_BRGR_I2CBRGH1,		1
	.EQU	I2C1_BRGR_I2CBRGH0,		0
//  register-------------------------------------
	.EQU	I2C1_ADDR1,	0x40000D94
//  0x4000 0D94  I2C1_ADDR1   Bits-------------------------------------
	.EQU	I2C1_ADDR1_I2CMSK9,		25
	.EQU	I2C1_ADDR1_I2CMSK8,		24
	.EQU	I2C1_ADDR1_I2CMSK7,		23
	.EQU	I2C1_ADDR1_I2CMSK6,		22
	.EQU	I2C1_ADDR1_I2CMSK5,		21
	.EQU	I2C1_ADDR1_I2CMSK4,		20
	.EQU	I2C1_ADDR1_I2CMSK3,		19
	.EQU	I2C1_ADDR1_I2CMSK2,		18
	.EQU	I2C1_ADDR1_I2CMSK1,		17
	.EQU	I2C1_ADDR1_I2CMSK0,		16
	.EQU	I2C1_ADDR1_I2CADD9,		9
	.EQU	I2C1_ADDR1_I2CADD8,		8
	.EQU	I2C1_ADDR1_I2CADD7,		7
	.EQU	I2C1_ADDR1_I2CADD6,		6
	.EQU	I2C1_ADDR1_I2CADD5,		5
	.EQU	I2C1_ADDR1_I2CADD4,		4
	.EQU	I2C1_ADDR1_I2CADD3,		3
	.EQU	I2C1_ADDR1_I2CADD2,		2
	.EQU	I2C1_ADDR1_I2CADD1,		1
	.EQU	I2C1_ADDR1_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C1_ADDR2,	0x40000D98
//  0x4000 0D98  I2C1_ADDR2   Bits-------------------------------------
	.EQU	I2C1_ADDR2_I2CMSK9,		25
	.EQU	I2C1_ADDR2_I2CMSK8,		24
	.EQU	I2C1_ADDR2_I2CMSK7,		23
	.EQU	I2C1_ADDR2_I2CMSK6,		22
	.EQU	I2C1_ADDR2_I2CMSK5,		21
	.EQU	I2C1_ADDR2_I2CMSK4,		20
	.EQU	I2C1_ADDR2_I2CMSK3,		19
	.EQU	I2C1_ADDR2_I2CMSK2,		18
	.EQU	I2C1_ADDR2_I2CMSK1,		17
	.EQU	I2C1_ADDR2_I2CMSK0,		16
	.EQU	I2C1_ADDR2_I2CADD9,		9
	.EQU	I2C1_ADDR2_I2CADD8,		8
	.EQU	I2C1_ADDR2_I2CADD7,		7
	.EQU	I2C1_ADDR2_I2CADD6,		6
	.EQU	I2C1_ADDR2_I2CADD5,		5
	.EQU	I2C1_ADDR2_I2CADD4,		4
	.EQU	I2C1_ADDR2_I2CADD3,		3
	.EQU	I2C1_ADDR2_I2CADD2,		2
	.EQU	I2C1_ADDR2_I2CADD1,		1
	.EQU	I2C1_ADDR2_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C1_ADDR3,	0x40000D9C
//  0x4000 0D9C  I2C1_ADDR3   Bits-------------------------------------
	.EQU	I2C1_ADDR3_I2CMSK9,		25
	.EQU	I2C1_ADDR3_I2CMSK8,		24
	.EQU	I2C1_ADDR3_I2CMSK7,		23
	.EQU	I2C1_ADDR3_I2CMSK6,		22
	.EQU	I2C1_ADDR3_I2CMSK5,		21
	.EQU	I2C1_ADDR3_I2CMSK4,		20
	.EQU	I2C1_ADDR3_I2CMSK3,		19
	.EQU	I2C1_ADDR3_I2CMSK2,		18
	.EQU	I2C1_ADDR3_I2CMSK1,		17
	.EQU	I2C1_ADDR3_I2CMSK0,		16
	.EQU	I2C1_ADDR3_I2CADD9,		9
	.EQU	I2C1_ADDR3_I2CADD8,		8
	.EQU	I2C1_ADDR3_I2CADD7,		7
	.EQU	I2C1_ADDR3_I2CADD6,		6
	.EQU	I2C1_ADDR3_I2CADD5,		5
	.EQU	I2C1_ADDR3_I2CADD4,		4
	.EQU	I2C1_ADDR3_I2CADD3,		3
	.EQU	I2C1_ADDR3_I2CADD2,		2
	.EQU	I2C1_ADDR3_I2CADD1,		1
	.EQU	I2C1_ADDR3_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C1_IER,		0x40000DA0
//  0x4000 0DA0  I2C1_IER   Bits-------------------------------------
	.EQU	I2C1_IER_OVERIE,		19
	.EQU	I2C1_IER_BERRIE,		18
	.EQU	I2C1_IER_ITXDE,		17
	.EQU	I2C1_IER_IRCDE,		16
	.EQU	I2C1_IER_ISIE,		11
	.EQU	I2C1_IER_SMBDIE,		10
	.EQU	I2C1_IER_SMBHIE,		9
	.EQU	I2C1_IER_SMBAIE,		8
	.EQU	I2C1_IER_ARBLIE,		6
	.EQU	I2C1_IER_AFIE,		5
	.EQU	I2C1_IER_PIE,		1
	.EQU	I2C1_IER_SIE,		0
//  register-------------------------------------
	.EQU	I2C2_CTLR,		0x40000E00
//  0x4000 0E00  I2C2_CTLR   Bits-------------------------------------
	.EQU	I2C2_CTLR_ADRL,		31
	.EQU	I2C2_CTLR_ALERT,		27
	.EQU	I2C2_CTLR_ARPEN,		26
	.EQU	I2C2_CTLR_SMBT,		25
	.EQU	I2C2_CTLR_SMBUS,		24
	.EQU	I2C2_CTLR_NMENA,		22
	.EQU	I2C2_CTLR_ENASCL,		21
	.EQU	I2C2_CTLR_MTHALL,		20
	.EQU	I2C2_CTLR_I2CCKDIV1,		19
	.EQU	I2C2_CTLR_I2CCKDIV0,		18
	.EQU	I2C2_CTLR_I2CCKS1,		17
	.EQU	I2C2_CTLR_I2CCKS0,		16
	.EQU	I2C2_CTLR_A10MSKEN,		15
	.EQU	I2C2_CTLR_GCEN,		14
	.EQU	I2C2_CTLR_ACKDT,		13
	.EQU	I2C2_CTLR_ACKEN,		12
	.EQU	I2C2_CTLR_SCLNOSTR,		11
	.EQU	I2C2_CTLR_PEN,		10
	.EQU	I2C2_CTLR_SEN,		8
	.EQU	I2C2_CTLR_DHCNT3,		7
	.EQU	I2C2_CTLR_DHCNT2,		6
	.EQU	I2C2_CTLR_DHCNT1,		5
	.EQU	I2C2_CTLR_DHCNT0,		4
	.EQU	I2C2_CTLR_BADR10,		1
	.EQU	I2C2_CTLR_I2CEN,		0
//  register-------------------------------------
	.EQU	I2C2_SR,		0x40000E04
//  0x4000 0E04  I2C2_SR   Bits-------------------------------------
	.EQU	I2C2_SR_BUSY,		20
	.EQU	I2C2_SR_OVERIF,		19
	.EQU	I2C2_SR_BERRIF,		18
	.EQU	I2C2_SR_ITXDF,		17
	.EQU	I2C2_SR_IRCDF,		16
	.EQU	I2C2_SR_TXBE,		13
	.EQU	I2C2_SR_RCBF,		12
	.EQU	I2C2_SR_ISIF,		11
	.EQU	I2C2_SR_SMBDIF,		10
	.EQU	I2C2_SR_SMBHIF,		9
	.EQU	I2C2_SR_SMBAIF,		8
	.EQU	I2C2_SR_RNW,		7
	.EQU	I2C2_SR_ARBLIF,		6
	.EQU	I2C2_SR_AFIF,		5
	.EQU	I2C2_SR_DATA,		4
	.EQU	I2C2_SR_ADD10,		3
	.EQU	I2C2_SR_ADDR,		2
	.EQU	I2C2_SR_PIF,		1
	.EQU	I2C2_SR_SIF,		0
//  register-------------------------------------
	.EQU	I2C2_BUFR,		0x40000E08
//  0x4000 0E08  I2C2_BUFR   Bits-------------------------------------
	.EQU	I2C2_BUFR_I2CBUF9,		9
	.EQU	I2C2_BUFR_I2CBUF8,		8
	.EQU	I2C2_BUFR_I2CBUF7,		7
	.EQU	I2C2_BUFR_I2CBUF6,		6
	.EQU	I2C2_BUFR_I2CBUF5,		5
	.EQU	I2C2_BUFR_I2CBUF4,		4
	.EQU	I2C2_BUFR_I2CBUF3,		3
	.EQU	I2C2_BUFR_I2CBUF2,		2
	.EQU	I2C2_BUFR_I2CBUF1,		1
	.EQU	I2C2_BUFR_I2CBUF0,		0
//  register-------------------------------------
	.EQU	I2C2_ADDR0,	0x40000E0C
//  0x4000 0E0C  I2C2_ADDR0   Bits-------------------------------------
	.EQU	I2C2_ADDR0_I2CMSK9,		25
	.EQU	I2C2_ADDR0_I2CMSK8,		24
	.EQU	I2C2_ADDR0_I2CMSK7,		23
	.EQU	I2C2_ADDR0_I2CMSK6,		22
	.EQU	I2C2_ADDR0_I2CMSK5,		21
	.EQU	I2C2_ADDR0_I2CMSK4,		20
	.EQU	I2C2_ADDR0_I2CMSK3,		19
	.EQU	I2C2_ADDR0_I2CMSK2,		18
	.EQU	I2C2_ADDR0_I2CMSK1,		17
	.EQU	I2C2_ADDR0_I2CMSK0,		16
	.EQU	I2C2_ADDR0_I2CADD9,		9
	.EQU	I2C2_ADDR0_I2CADD8,		8
	.EQU	I2C2_ADDR0_I2CADD7,		7
	.EQU	I2C2_ADDR0_I2CADD6,		6
	.EQU	I2C2_ADDR0_I2CADD5,		5
	.EQU	I2C2_ADDR0_I2CADD4,		4
	.EQU	I2C2_ADDR0_I2CADD3,		3
	.EQU	I2C2_ADDR0_I2CADD2,		2
	.EQU	I2C2_ADDR0_I2CADD1,		1
	.EQU	I2C2_ADDR0_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C2_BRGR,		0x40000E10
//  0x4000 0E10  I2C2_BRGR   Bits-------------------------------------
	.EQU	I2C2_BRGR_I2CBRGL15,		31
	.EQU	I2C2_BRGR_I2CBRGL14,		30
	.EQU	I2C2_BRGR_I2CBRGL13,		29
	.EQU	I2C2_BRGR_I2CBRGL12,		28
	.EQU	I2C2_BRGR_I2CBRGL11,		27
	.EQU	I2C2_BRGR_I2CBRGL10,		26
	.EQU	I2C2_BRGR_I2CBRGL9,		25
	.EQU	I2C2_BRGR_I2CBRGL8,		24
	.EQU	I2C2_BRGR_I2CBRGL7,		23
	.EQU	I2C2_BRGR_I2CBRGL6,		22
	.EQU	I2C2_BRGR_I2CBRGL5,		21
	.EQU	I2C2_BRGR_I2CBRGL4,		20
	.EQU	I2C2_BRGR_I2CBRGL3,		19
	.EQU	I2C2_BRGR_I2CBRGL2,		18
	.EQU	I2C2_BRGR_I2CBRGL1,		17
	.EQU	I2C2_BRGR_I2CBRGL0,		16
	.EQU	I2C2_BRGR_I2CBRGH15,		15
	.EQU	I2C2_BRGR_I2CBRGH14,		14
	.EQU	I2C2_BRGR_I2CBRGH13,		13
	.EQU	I2C2_BRGR_I2CBRGH12,		12
	.EQU	I2C2_BRGR_I2CBRGH11,		11
	.EQU	I2C2_BRGR_I2CBRGH10,		10
	.EQU	I2C2_BRGR_I2CBRGH9,		9
	.EQU	I2C2_BRGR_I2CBRGH8,		8
	.EQU	I2C2_BRGR_I2CBRGH7,		7
	.EQU	I2C2_BRGR_I2CBRGH6,		6
	.EQU	I2C2_BRGR_I2CBRGH5,		5
	.EQU	I2C2_BRGR_I2CBRGH4,		4
	.EQU	I2C2_BRGR_I2CBRGH3,		3
	.EQU	I2C2_BRGR_I2CBRGH2,		2
	.EQU	I2C2_BRGR_I2CBRGH1,		1
	.EQU	I2C2_BRGR_I2CBRGH0,		0
//  register-------------------------------------
	.EQU	I2C2_ADDR1,	0x40000E14
//  0x4000 0E14  I2C2_ADDR1   Bits-------------------------------------
	.EQU	I2C2_ADDR1_I2CMSK9,		25
	.EQU	I2C2_ADDR1_I2CMSK8,		24
	.EQU	I2C2_ADDR1_I2CMSK7,		23
	.EQU	I2C2_ADDR1_I2CMSK6,		22
	.EQU	I2C2_ADDR1_I2CMSK5,		21
	.EQU	I2C2_ADDR1_I2CMSK4,		20
	.EQU	I2C2_ADDR1_I2CMSK3,		19
	.EQU	I2C2_ADDR1_I2CMSK2,		18
	.EQU	I2C2_ADDR1_I2CMSK1,		17
	.EQU	I2C2_ADDR1_I2CMSK0,		16
	.EQU	I2C2_ADDR1_I2CADD9,		9
	.EQU	I2C2_ADDR1_I2CADD8,		8
	.EQU	I2C2_ADDR1_I2CADD7,		7
	.EQU	I2C2_ADDR1_I2CADD6,		6
	.EQU	I2C2_ADDR1_I2CADD5,		5
	.EQU	I2C2_ADDR1_I2CADD4,		4
	.EQU	I2C2_ADDR1_I2CADD3,		3
	.EQU	I2C2_ADDR1_I2CADD2,		2
	.EQU	I2C2_ADDR1_I2CADD1,		1
	.EQU	I2C2_ADDR1_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C2_ADDR2,	0x40000E18
//  0x4000 0E18  I2C2_ADDR2   Bits-------------------------------------
	.EQU	I2C2_ADDR2_I2CMSK9,		25
	.EQU	I2C2_ADDR2_I2CMSK8,		24
	.EQU	I2C2_ADDR2_I2CMSK7,		23
	.EQU	I2C2_ADDR2_I2CMSK6,		22
	.EQU	I2C2_ADDR2_I2CMSK5,		21
	.EQU	I2C2_ADDR2_I2CMSK4,		20
	.EQU	I2C2_ADDR2_I2CMSK3,		19
	.EQU	I2C2_ADDR2_I2CMSK2,		18
	.EQU	I2C2_ADDR2_I2CMSK1,		17
	.EQU	I2C2_ADDR2_I2CMSK0,		16
	.EQU	I2C2_ADDR2_I2CADD9,		9
	.EQU	I2C2_ADDR2_I2CADD8,		8
	.EQU	I2C2_ADDR2_I2CADD7,		7
	.EQU	I2C2_ADDR2_I2CADD6,		6
	.EQU	I2C2_ADDR2_I2CADD5,		5
	.EQU	I2C2_ADDR2_I2CADD4,		4
	.EQU	I2C2_ADDR2_I2CADD3,		3
	.EQU	I2C2_ADDR2_I2CADD2,		2
	.EQU	I2C2_ADDR2_I2CADD1,		1
	.EQU	I2C2_ADDR2_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C2_ADDR3,	0x40000E1C
//  0x4000 0E1C  I2C2_ADDR3   Bits-------------------------------------
	.EQU	I2C2_ADDR3_I2CMSK9,		25
	.EQU	I2C2_ADDR3_I2CMSK8,		24
	.EQU	I2C2_ADDR3_I2CMSK7,		23
	.EQU	I2C2_ADDR3_I2CMSK6,		22
	.EQU	I2C2_ADDR3_I2CMSK5,		21
	.EQU	I2C2_ADDR3_I2CMSK4,		20
	.EQU	I2C2_ADDR3_I2CMSK3,		19
	.EQU	I2C2_ADDR3_I2CMSK2,		18
	.EQU	I2C2_ADDR3_I2CMSK1,		17
	.EQU	I2C2_ADDR3_I2CMSK0,		16
	.EQU	I2C2_ADDR3_I2CADD9,		9
	.EQU	I2C2_ADDR3_I2CADD8,		8
	.EQU	I2C2_ADDR3_I2CADD7,		7
	.EQU	I2C2_ADDR3_I2CADD6,		6
	.EQU	I2C2_ADDR3_I2CADD5,		5
	.EQU	I2C2_ADDR3_I2CADD4,		4
	.EQU	I2C2_ADDR3_I2CADD3,		3
	.EQU	I2C2_ADDR3_I2CADD2,		2
	.EQU	I2C2_ADDR3_I2CADD1,		1
	.EQU	I2C2_ADDR3_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C2_IER,		0x40000E20
//  0x4000 0E20  I2C2_IER   Bits-------------------------------------
	.EQU	I2C2_IER_OVERIE,		19
	.EQU	I2C2_IER_BERRIE,		18
	.EQU	I2C2_IER_ITXDE,		17
	.EQU	I2C2_IER_IRCDE,		16
	.EQU	I2C2_IER_ISIE,		11
	.EQU	I2C2_IER_SMBDIE,		10
	.EQU	I2C2_IER_SMBHIE,		9
	.EQU	I2C2_IER_SMBAIE,		8
	.EQU	I2C2_IER_ARBLIE,		6
	.EQU	I2C2_IER_AFIE,		5
	.EQU	I2C2_IER_PIE,		1
	.EQU	I2C2_IER_SIE,		0
//  register-------------------------------------
	.EQU	RTC_CR,			0x40000F00
//  0x4000 0F00  RTC_CR   Bits-------------------------------------
	.EQU	RTC_CR_RTCCAL7,		31
	.EQU	RTC_CR_RTCCAL6,		30
	.EQU	RTC_CR_RTCCAL5,		29
	.EQU	RTC_CR_RTCCAL4,		28
	.EQU	RTC_CR_RTCCAL3,		27
	.EQU	RTC_CR_RTCCAL2,		26
	.EQU	RTC_CR_RTCCAL1,		25
	.EQU	RTC_CR_RTCCAL0,		24
	.EQU	RTC_CR_LPPINEN,		23
	.EQU	RTC_CR_TSEDGE,		22
	.EQU	RTC_CR_TSEN,		21
	.EQU	RTC_CR_ADD1H,		20
	.EQU	RTC_CR_SUB1H,		19
	.EQU	RTC_CR_RTCTT2,		18
	.EQU	RTC_CR_RTCTT1,		17
	.EQU	RTC_CR_RTCTT0,		16
	.EQU	RTC_CR_RTCCLKS1,		15
	.EQU	RTC_CR_RTCCLKS0,		14
	.EQU	RTC_CR_RTCTSCH5,		13
	.EQU	RTC_CR_RTCTSCH4,		12
	.EQU	RTC_CR_RTCTSCH3,		11
	.EQU	RTC_CR_RTCTSCH2,		10
	.EQU	RTC_CR_RTCTSCH1,		9
	.EQU	RTC_CR_RTCTSCH0,		8
	.EQU	RTC_CR_RESET,		6
	.EQU	RTC_CR_LIF,		5
	.EQU	RTC_CR_HT,			4
	.EQU	RTC_CR_CNF,		3
	.EQU	RTC_CR_RTOFF,		2
	.EQU	RTC_CR_LD,			1
	.EQU	RTC_CR_RTCEN,		0
//  register-------------------------------------
	.EQU	RTC_ALRA,		0x40000F04
//  0x4000 0F04  RTC_ALRA   Bits-------------------------------------
	.EQU	RTC_ALRA_ALRENA,		31
	.EQU	RTC_ALRA_AWENA,		27
	.EQU	RTC_ALRA_ALRWA2,		26
	.EQU	RTC_ALRA_ALRWA1,		25
	.EQU	RTC_ALRA_ALRWA0,		24
	.EQU	RTC_ALRA_AHENA,		23
	.EQU	RTC_ALRA_AMPMA,		22
	.EQU	RTC_ALRA_ALRHA5,		21
	.EQU	RTC_ALRA_ALRHA4,		20
	.EQU	RTC_ALRA_ALRHA3,		19
	.EQU	RTC_ALRA_ALRHA2,		18
	.EQU	RTC_ALRA_ALRHA1,		17
	.EQU	RTC_ALRA_ALRHA0,		16
	.EQU	RTC_ALRA_AMENA,		15
	.EQU	RTC_ALRA_ALRMA6,		14
	.EQU	RTC_ALRA_ALRMA5,		13
	.EQU	RTC_ALRA_ALRMA4,		12
	.EQU	RTC_ALRA_ALRMA3,		11
	.EQU	RTC_ALRA_ALRMA2,		10
	.EQU	RTC_ALRA_ALRMA1,		9
	.EQU	RTC_ALRA_ALRMA0,		8
	.EQU	RTC_ALRA_ASENA,		7
	.EQU	RTC_ALRA_ALRSA6,		6
	.EQU	RTC_ALRA_ALRSA5,		5
	.EQU	RTC_ALRA_ALRSA4,		4
	.EQU	RTC_ALRA_ALRSA3,		3
	.EQU	RTC_ALRA_ALRSA2,		2
	.EQU	RTC_ALRA_ALRSA1,		1
	.EQU	RTC_ALRA_ALRSA0,		0
//  register-------------------------------------
	.EQU	RTC_TMR,		0x40000F08
//  0x4000 0F08  RTC_TMR   Bits-------------------------------------
	.EQU	RTC_TMR_WEK2,		26
	.EQU	RTC_TMR_WEK1,		25
	.EQU	RTC_TMR_WEK0,		24
	.EQU	RTC_TMR_AMPM,		22
	.EQU	RTC_TMR_HOUR5,		21
	.EQU	RTC_TMR_HOUR4,		20
	.EQU	RTC_TMR_HOUR3,		19
	.EQU	RTC_TMR_HOUR2,		18
	.EQU	RTC_TMR_HOUR1,		17
	.EQU	RTC_TMR_HOUR0,		16
	.EQU	RTC_TMR_MIN6,		14
	.EQU	RTC_TMR_MIN5,		13
	.EQU	RTC_TMR_MIN4,		12
	.EQU	RTC_TMR_MIN3,		11
	.EQU	RTC_TMR_MIN2,		10
	.EQU	RTC_TMR_MIN1,		9
	.EQU	RTC_TMR_MIN0,		8
	.EQU	RTC_TMR_SEC6,		6
	.EQU	RTC_TMR_SEC5,		5
	.EQU	RTC_TMR_SEC4,		4
	.EQU	RTC_TMR_SEC3,		3
	.EQU	RTC_TMR_SEC2,		2
	.EQU	RTC_TMR_SEC1,		1
	.EQU	RTC_TMR_SEC0,		0
//  register-------------------------------------
	.EQU	RTC_DTR,		0x40000F0C
//  0x4000 0F0C  RTC_DTR   Bits-------------------------------------
	.EQU	RTC_DTR_YEAR7,		23
	.EQU	RTC_DTR_YEAR6,		22
	.EQU	RTC_DTR_YEAR5,		21
	.EQU	RTC_DTR_YEAR4,		20
	.EQU	RTC_DTR_YEAR3,		19
	.EQU	RTC_DTR_YEAR2,		18
	.EQU	RTC_DTR_YEAR1,		17
	.EQU	RTC_DTR_YEAR0,		16
	.EQU	RTC_DTR_MTH4,		12
	.EQU	RTC_DTR_MTH3,		11
	.EQU	RTC_DTR_MTH2,		10
	.EQU	RTC_DTR_MTH1,		9
	.EQU	RTC_DTR_MTH0,		8
	.EQU	RTC_DTR_DAY5,		5
	.EQU	RTC_DTR_DAY4,		4
	.EQU	RTC_DTR_DAY3,		3
	.EQU	RTC_DTR_DAY2,		2
	.EQU	RTC_DTR_DAY1,		1
	.EQU	RTC_DTR_DAY0,		0
//  register-------------------------------------
	.EQU	RTC_ALRB,		0x40000F10
//  0x4000 0F10  RTC_ALRB   Bits-------------------------------------
	.EQU	RTC_ALRB_ALRENB,		31
	.EQU	RTC_ALRB_AWENB,		27
	.EQU	RTC_ALRB_ALRWB2,		26
	.EQU	RTC_ALRB_ALRWB1,		25
	.EQU	RTC_ALRB_ALRWB0,		24
	.EQU	RTC_ALRB_AHENB,		23
	.EQU	RTC_ALRB_AMPMB,		22
	.EQU	RTC_ALRB_ALRHB5,		21
	.EQU	RTC_ALRB_ALRHB4,		20
	.EQU	RTC_ALRB_ALRHB3,		19
	.EQU	RTC_ALRB_ALRHB2,		18
	.EQU	RTC_ALRB_ALRHB1,		17
	.EQU	RTC_ALRB_ALRHB0,		16
	.EQU	RTC_ALRB_AMENB,		15
	.EQU	RTC_ALRB_ALRMB6,		14
	.EQU	RTC_ALRB_ALRMB5,		13
	.EQU	RTC_ALRB_ALRMB4,		12
	.EQU	RTC_ALRB_ALRMB3,		11
	.EQU	RTC_ALRB_ALRMB2,		10
	.EQU	RTC_ALRB_ALRMB1,		9
	.EQU	RTC_ALRB_ALRMB0,		8
	.EQU	RTC_ALRB_ASENB,		7
	.EQU	RTC_ALRB_ALRSB6,		6
	.EQU	RTC_ALRB_ALRSB5,		5
	.EQU	RTC_ALRB_ALRSB4,		4
	.EQU	RTC_ALRB_ALRSB3,		3
	.EQU	RTC_ALRB_ALRSB2,		2
	.EQU	RTC_ALRB_ALRSB1,		1
	.EQU	RTC_ALRB_ALRSB0,		0
//  register-------------------------------------
	.EQU	RTC_TMER,		0x40000F14
//  0x4000 0F14  RTC_TMER   Bits-------------------------------------
	.EQU	RTC_TMER_TMR1_15,		31
	.EQU	RTC_TMER_TMR1_14,		30
	.EQU	RTC_TMER_TMR1_13,		29
	.EQU	RTC_TMER_TMR1_12,		28
	.EQU	RTC_TMER_TMR1_11,		27
	.EQU	RTC_TMER_TMR1_10,		26
	.EQU	RTC_TMER_TMR1_9,		25
	.EQU	RTC_TMER_TMR1_8,		24
	.EQU	RTC_TMER_TMR1_7,		23
	.EQU	RTC_TMER_TMR1_6,		22
	.EQU	RTC_TMER_TMR1_5,		21
	.EQU	RTC_TMER_TMR1_4,		20
	.EQU	RTC_TMER_TMR1_3,		19
	.EQU	RTC_TMER_TMR1_2,		18
	.EQU	RTC_TMER_TMR1_1,		17
	.EQU	RTC_TMER_TMR1_0,		16
	.EQU	RTC_TMER_TMR0_15,		15
	.EQU	RTC_TMER_TMR0_14,		14
	.EQU	RTC_TMER_TMR0_13,		13
	.EQU	RTC_TMER_TMR0_12,		12
	.EQU	RTC_TMER_TMR0_11,		11
	.EQU	RTC_TMER_TMR0_10,		10
	.EQU	RTC_TMER_TMR0_9,		9
	.EQU	RTC_TMER_TMR0_8,		8
	.EQU	RTC_TMER_TMR0_7,		7
	.EQU	RTC_TMER_TMR0_6,		6
	.EQU	RTC_TMER_TMR0_5,		5
	.EQU	RTC_TMER_TMR0_4,		4
	.EQU	RTC_TMER_TMR0_3,		3
	.EQU	RTC_TMER_TMR0_2,		2
	.EQU	RTC_TMER_TMR0_1,		1
	.EQU	RTC_TMER_TMR0_0,		0
//  register-------------------------------------
	.EQU	RTC_TCR,		0x40000F18
//  0x4000 0F18  RTC_TCR   Bits-------------------------------------
	.EQU	RTC_TCR_TMR1EN,		9
	.EQU	RTC_TCR_TMR0EN,		8
	.EQU	RTC_TCR_TMR1C3,		7
	.EQU	RTC_TCR_TMR1C2,		6
	.EQU	RTC_TCR_TMR1C1,		5
	.EQU	RTC_TCR_TMR1C0,		4
	.EQU	RTC_TCR_TMR0C3,		3
	.EQU	RTC_TCR_TMR0C2,		2
	.EQU	RTC_TCR_TMR0C1,		1
	.EQU	RTC_TCR_TMR0C0,		0
//  register-------------------------------------
	.EQU	RTC_IER,		0x40000F1C
//  0x4000 0F1C  RTC_IER   Bits-------------------------------------
	.EQU	RTC_IER_TSIE,		11
	.EQU	RTC_IER_TSOVFIE,		10
	.EQU	RTC_IER_RTCT1IE,		9
	.EQU	RTC_IER_RTCT0IE,		8
	.EQU	RTC_IER_TTIE,		6
	.EQU	RTC_IER_ALRBIE,		5
	.EQU	RTC_IER_ALRAIE,		4
	.EQU	RTC_IER_DAYIE,		3
	.EQU	RTC_IER_HOURIE,		2
	.EQU	RTC_IER_MINIE,		1
	.EQU	RTC_IER_SECIE,		0
//  register-------------------------------------
	.EQU	RTC_IFR,		0x40000F20
//  0x4000 0F20  RTC_IFR   Bits-------------------------------------
	.EQU	RTC_IFR_TSIC,		27
	.EQU	RTC_IFR_TSOVFIC,		26
	.EQU	RTC_IFR_RTCT1IC,		25
	.EQU	RTC_IFR_RTCT0IC,		24
	.EQU	RTC_IFR_TTIC,		22
	.EQU	RTC_IFR_ALRBIC,		21
	.EQU	RTC_IFR_ALRAIC,		20
	.EQU	RTC_IFR_DAYIC,		19
	.EQU	RTC_IFR_HOURIC,		18
	.EQU	RTC_IFR_MINIC,		17
	.EQU	RTC_IFR_SECIC,		16
	.EQU	RTC_IFR_TSIF,		11
	.EQU	RTC_IFR_TSOVFIF,		10
	.EQU	RTC_IFR_RTCT1IF,		9
	.EQU	RTC_IFR_RTCT0IF,		8
	.EQU	RTC_IFR_TTIF,		6
	.EQU	RTC_IFR_ALRBIF,		5
	.EQU	RTC_IFR_ALRAIF,		4
	.EQU	RTC_IFR_DAYIF,		3
	.EQU	RTC_IFR_HOURIF,		2
	.EQU	RTC_IFR_MINIF,		1
	.EQU	RTC_IFR_SECIF,		0
//  register-------------------------------------
	.EQU	RTC_TMBR,		0x40000F24
//  0x4000 0F24  RTC_TMBR   Bits-------------------------------------
	.EQU	RTC_TMBR_WEKB2,		26
	.EQU	RTC_TMBR_WEKB1,		25
	.EQU	RTC_TMBR_WEKB0,		24
	.EQU	RTC_TMBR_AMPMB,		22
	.EQU	RTC_TMBR_HOURB5,		21
	.EQU	RTC_TMBR_HOURB4,		20
	.EQU	RTC_TMBR_HOURB3,		19
	.EQU	RTC_TMBR_HOURB2,		18
	.EQU	RTC_TMBR_HOURB1,		17
	.EQU	RTC_TMBR_HOURB0,		16
	.EQU	RTC_TMBR_MINB6,		14
	.EQU	RTC_TMBR_MINB5,		13
	.EQU	RTC_TMBR_MINB4,		12
	.EQU	RTC_TMBR_MINB3,		11
	.EQU	RTC_TMBR_MINB2,		10
	.EQU	RTC_TMBR_MINB1,		9
	.EQU	RTC_TMBR_MINB0,		8
	.EQU	RTC_TMBR_SECB6,		6
	.EQU	RTC_TMBR_SECB5,		5
	.EQU	RTC_TMBR_SECB4,		4
	.EQU	RTC_TMBR_SECB3,		3
	.EQU	RTC_TMBR_SECB2,		2
	.EQU	RTC_TMBR_SECB1,		1
	.EQU	RTC_TMBR_SECB0,		0
//  register-------------------------------------
	.EQU	RTC_DTBR,		0x40000F28
//  0x4000 0F28  RTC_DTBR   Bits-------------------------------------
	.EQU	RTC_DTBR_YEARB7,		23
	.EQU	RTC_DTBR_YEARB6,		22
	.EQU	RTC_DTBR_YEARB5,		21
	.EQU	RTC_DTBR_YEARB4,		20
	.EQU	RTC_DTBR_YEARB3,		19
	.EQU	RTC_DTBR_YEARB2,		18
	.EQU	RTC_DTBR_YEARB1,		17
	.EQU	RTC_DTBR_YEARB0,		16
	.EQU	RTC_DTBR_MTHB4,		12
	.EQU	RTC_DTBR_MTHB3,		11
	.EQU	RTC_DTBR_MTHB2,		10
	.EQU	RTC_DTBR_MTHB1,		9
	.EQU	RTC_DTBR_MTHB0,		8
	.EQU	RTC_DTBR_DAYB5,		5
	.EQU	RTC_DTBR_DAYB4,		4
	.EQU	RTC_DTBR_DAYB3,		3
	.EQU	RTC_DTBR_DAYB2,		2
	.EQU	RTC_DTBR_DAYB1,		1
	.EQU	RTC_DTBR_DAYB0,		0
//  register-------------------------------------
	.EQU	CANFD6_CTLR0,	0x40002E80
//  0x4000 2E80  CANFD6_CTLR0   Bits-------------------------------------
	.EQU	CANFD6_CTLR0_CANFDEN,		31
	.EQU	CANFD6_CTLR0_CANRMC6,		30
	.EQU	CANFD6_CTLR0_CANRMC5,		29
	.EQU	CANFD6_CTLR0_CANRMC4,		28
	.EQU	CANFD6_CTLR0_CANRMC3,		27
	.EQU	CANFD6_CTLR0_CANRMC2,		26
	.EQU	CANFD6_CTLR0_CANRMC1,		25
	.EQU	CANFD6_CTLR0_CANRMC0,		24
	.EQU	CANFD6_CTLR0_BOFF,		23
	.EQU	CANFD6_CTLR0_CERROR,		22
	.EQU	CANFD6_CTLR0_TXSTA,		21
	.EQU	CANFD6_CTLR0_RXSTA,		20
	.EQU	CANFD6_CTLR0_TCSTA,		19
	.EQU	CANFD6_CTLR0_DOSTA,		17
	.EQU	CANFD6_CTLR0_RXBSTA,		16
	.EQU	CANFD6_CTLR0_ANSWEREN,		15
	.EQU	CANFD6_CTLR0_FULLRXEN,		14
	.EQU	CANFD6_CTLR0_MBSIZE1,		13
	.EQU	CANFD6_CTLR0_MBSIZE0,		12
	.EQU	CANFD6_CTLR0_RELF,		11
	.EQU	CANFD6_CTLR0_RELRX,		10
	.EQU	CANFD6_CTLR0_ATX,		9
	.EQU	CANFD6_CTLR0_TXR,		8
	.EQU	CANFD6_CTLR0_CANEN,		7
	.EQU	CANFD6_CTLR0_CANCKS1,		6
	.EQU	CANFD6_CTLR0_CANCKS0,		5
	.EQU	CANFD6_CTLR0_ISOFDCANEN,		4
	.EQU	CANFD6_CTLR0_SLEEP,		3
	.EQU	CANFD6_CTLR0_LBACK,		2
	.EQU	CANFD6_CTLR0_SILENT,		1
	.EQU	CANFD6_CTLR0_RSMOD,		0
//  register-------------------------------------
	.EQU	CANFD6_BRGR,	0x40002E84
//  0x4000 2E84  CANFD6_BRGR   Bits-------------------------------------
	.EQU	CANFD6_BRGR_HTSEG2_2,		28
	.EQU	CANFD6_BRGR_HTSEG2_1,		27
	.EQU	CANFD6_BRGR_HTSEG2_0,		26
	.EQU	CANFD6_BRGR_HTSEG1_3,		25
	.EQU	CANFD6_BRGR_HTSEG1_2,		24
	.EQU	CANFD6_BRGR_HTSEG1_1,		23
	.EQU	CANFD6_BRGR_HTSEG1_0,		22
	.EQU	CANFD6_BRGR_BRSBRP5,		21
	.EQU	CANFD6_BRGR_BRSBRP4,		20
	.EQU	CANFD6_BRGR_BRSBRP3,		19
	.EQU	CANFD6_BRGR_BRSBRP2,		18
	.EQU	CANFD6_BRGR_BRSBRP1,		17
	.EQU	CANFD6_BRGR_BRSBRP0,		16
	.EQU	CANFD6_BRGR_SAM,		15
	.EQU	CANFD6_BRGR_TSEG2_2,		14
	.EQU	CANFD6_BRGR_TSEG2_1,		13
	.EQU	CANFD6_BRGR_TSEG2_0,		12
	.EQU	CANFD6_BRGR_TSEG1_3,		11
	.EQU	CANFD6_BRGR_TSEG1_2,		10
	.EQU	CANFD6_BRGR_TSEG1_1,		9
	.EQU	CANFD6_BRGR_TSEG1_0,		8
	.EQU	CANFD6_BRGR_SJW1,		7
	.EQU	CANFD6_BRGR_SJW0,		6
	.EQU	CANFD6_BRGR_CANBRP5,		5
	.EQU	CANFD6_BRGR_CANBRP4,		4
	.EQU	CANFD6_BRGR_CANBRP3,		3
	.EQU	CANFD6_BRGR_CANBRP2,		2
	.EQU	CANFD6_BRGR_CANBRP1,		1
	.EQU	CANFD6_BRGR_CANBRP0,		0
//  register-------------------------------------
	.EQU	CANFD6_RCR,	0x40002E88
//  0x4000 2E88  CANFD6_RCR   Bits-------------------------------------
	.EQU	CANFD6_RCR_DPRAMOF,		16
	.EQU	CANFD6_RCR_CANERRC1,		15
	.EQU	CANFD6_RCR_CANERRC0,		14
	.EQU	CANFD6_RCR_CANDIR,		13
	.EQU	CANFD6_RCR_CANSEG4,		12
	.EQU	CANFD6_RCR_CANSEG3,		11
	.EQU	CANFD6_RCR_CANSEG2,		10
	.EQU	CANFD6_RCR_CANSEG1,		9
	.EQU	CANFD6_RCR_CANSEG0,		8
	.EQU	CANFD6_RCR_CANALC4,		4
	.EQU	CANFD6_RCR_CANALC3,		3
	.EQU	CANFD6_RCR_CANALC2,		2
	.EQU	CANFD6_RCR_CANALC1,		1
	.EQU	CANFD6_RCR_CANALC0,		0
//  register-------------------------------------
	.EQU	CANFD6_EROR,	0x40002E8C
//  0x4000 2E8C  CANFD6_EROR   Bits-------------------------------------
	.EQU	CANFD6_EROR_DPRAMFEN,		31
	.EQU	CANFD6_EROR_SFDMOD,		30
	.EQU	CANFD6_EROR_SFDEN,		29
	.EQU	CANFD6_EROR_SOSFD4,		28
	.EQU	CANFD6_EROR_SOSFD3,		27
	.EQU	CANFD6_EROR_SOSFD2,		26
	.EQU	CANFD6_EROR_SOSFD1,		25
	.EQU	CANFD6_EROR_SOSFD0,		24
	.EQU	CANFD6_EROR_CANEWL7,		23
	.EQU	CANFD6_EROR_CANEWL6,		22
	.EQU	CANFD6_EROR_CANEWL5,		21
	.EQU	CANFD6_EROR_CANEWL4,		20
	.EQU	CANFD6_EROR_CANEWL3,		19
	.EQU	CANFD6_EROR_CANEWL2,		18
	.EQU	CANFD6_EROR_CANEWL1,		17
	.EQU	CANFD6_EROR_CANEWL0,		16
	.EQU	CANFD6_EROR_CANTXE7,		15
	.EQU	CANFD6_EROR_CANTXE6,		14
	.EQU	CANFD6_EROR_CANTXE5,		13
	.EQU	CANFD6_EROR_CANTXE4,		12
	.EQU	CANFD6_EROR_CANTXE3,		11
	.EQU	CANFD6_EROR_CANTXE2,		10
	.EQU	CANFD6_EROR_CANTXE1,		9
	.EQU	CANFD6_EROR_CANTXE0,		8
	.EQU	CANFD6_EROR_CANRXE7,		7
	.EQU	CANFD6_EROR_CANRXE6,		6
	.EQU	CANFD6_EROR_CANRXE5,		5
	.EQU	CANFD6_EROR_CANRXE4,		4
	.EQU	CANFD6_EROR_CANRXE3,		3
	.EQU	CANFD6_EROR_CANRXE2,		2
	.EQU	CANFD6_EROR_CANRXE1,		1
	.EQU	CANFD6_EROR_CANRXE0,		0
//  register-------------------------------------
	.EQU	CANFD6_CTLR2,	0x40002E90
//  0x4000 2E90  CANFD6_CTLR2   Bits-------------------------------------
	.EQU	CANFD6_CTLR2_AMCKDIV1,		26
	.EQU	CANFD6_CTLR2_AMCKDIV0,		25
	.EQU	CANFD6_CTLR2_DESEL,		24
	.EQU	CANFD6_CTLR2_TDCVM6,		22
	.EQU	CANFD6_CTLR2_TDCVM5,		21
	.EQU	CANFD6_CTLR2_TDCVM4,		20
	.EQU	CANFD6_CTLR2_TDCVM3,		19
	.EQU	CANFD6_CTLR2_TDCVM2,		18
	.EQU	CANFD6_CTLR2_TDCVM1,		17
	.EQU	CANFD6_CTLR2_TDCVM0,		16
	.EQU	CANFD6_CTLR2_TDC0_1,		15
	.EQU	CANFD6_CTLR2_TDC0_0,		14
	.EQU	CANFD6_CTLR2_TDCSR1,		13
	.EQU	CANFD6_CTLR2_TDCSR0,		12
	.EQU	CANFD6_CTLR2_TDCS1,		11
	.EQU	CANFD6_CTLR2_TDCS0,		10
	.EQU	CANFD6_CTLR2_TDCAUT0,		9
	.EQU	CANFD6_CTLR2_TDCEN,		8
	.EQU	CANFD6_CTLR2_TDC0EN,		7
	.EQU	CANFD6_CTLR2_TDCV6,		6
	.EQU	CANFD6_CTLR2_TDCV5,		5
	.EQU	CANFD6_CTLR2_TDCV4,		4
	.EQU	CANFD6_CTLR2_TDCV3,		3
	.EQU	CANFD6_CTLR2_TDCV2,		2
	.EQU	CANFD6_CTLR2_TDCV1,		1
	.EQU	CANFD6_CTLR2_TDCV0,		0
//  register-------------------------------------
	.EQU	CANFD6_MSKR,	0x40002E94
//  0x4000 2E94  CANFD6_MSKR   Bits-------------------------------------
	.EQU	CANFD6_MSKR_MSK31,		31
	.EQU	CANFD6_MSKR_MSK30,		30
	.EQU	CANFD6_MSKR_MSK29,		29
	.EQU	CANFD6_MSKR_MSK28,		28
	.EQU	CANFD6_MSKR_MSK27,		27
	.EQU	CANFD6_MSKR_MSK26,		26
	.EQU	CANFD6_MSKR_MSK25,		25
	.EQU	CANFD6_MSKR_MSK24,		24
	.EQU	CANFD6_MSKR_MSK23,		23
	.EQU	CANFD6_MSKR_MSK22,		22
	.EQU	CANFD6_MSKR_MSK21,		21
	.EQU	CANFD6_MSKR_MSK20,		20
	.EQU	CANFD6_MSKR_MSK19,		19
	.EQU	CANFD6_MSKR_MSK18,		18
	.EQU	CANFD6_MSKR_MSK17,		17
	.EQU	CANFD6_MSKR_MSK16,		16
	.EQU	CANFD6_MSKR_MSK15,		15
	.EQU	CANFD6_MSKR_MSK14,		14
	.EQU	CANFD6_MSKR_MSK13,		13
	.EQU	CANFD6_MSKR_MSK12,		12
	.EQU	CANFD6_MSKR_MSK11,		11
	.EQU	CANFD6_MSKR_MSK10,		10
	.EQU	CANFD6_MSKR_MSK9,		9
	.EQU	CANFD6_MSKR_MSK8,		8
	.EQU	CANFD6_MSKR_MSK7,		7
	.EQU	CANFD6_MSKR_MSK6,		6
	.EQU	CANFD6_MSKR_MSK5,		5
	.EQU	CANFD6_MSKR_MSK4,		4
	.EQU	CANFD6_MSKR_MSK3,		3
	.EQU	CANFD6_MSKR_MSK2,		2
	.EQU	CANFD6_MSKR_MSK1,		1
	.EQU	CANFD6_MSKR_MSK0,		0
//  register-------------------------------------
	.EQU	CANFD6_IER,	0x40002E98
//  0x4000 2E98  CANFD6_IER   Bits-------------------------------------
	.EQU	CANFD6_IER_FAILCLR,		31
	.EQU	CANFD6_IER_LPCANGPIOSEL0,		30
	.EQU	CANFD6_IER_BOFFIC,		28
	.EQU	CANFD6_IER_TRGMBIC,		27
	.EQU	CANFD6_IER_MOENDIC,		26
	.EQU	CANFD6_IER_BEIC,		23
	.EQU	CANFD6_IER_ALIC,		22
	.EQU	CANFD6_IER_ENIC,		21
	.EQU	CANFD6_IER_WUIC,		20
	.EQU	CANFD6_IER_DOVFIC,		19
	.EQU	CANFD6_IER_EAIC,		18
	.EQU	CANFD6_IER_CANTXIC,		17
	.EQU	CANFD6_IER_CANRXIC,		16
	.EQU	CANFD6_IER_MOENDIE,		15
	.EQU	CANFD6_IER_ARBFAILIE,		14
	.EQU	CANFD6_IER_BOFFIE,		12
	.EQU	CANFD6_IER_TRGMBIE,		11
	.EQU	CANFD6_IER_RXBSTAIE,		10
	.EQU	CANFD6_IER_CRXDE,		9
	.EQU	CANFD6_IER_CTXDE,		8
	.EQU	CANFD6_IER_BEIE,		7
	.EQU	CANFD6_IER_ALIE,		6
	.EQU	CANFD6_IER_ENIE,		5
	.EQU	CANFD6_IER_WUIE,		4
	.EQU	CANFD6_IER_DOVFIE,		3
	.EQU	CANFD6_IER_EAIE,		2
	.EQU	CANFD6_IER_CANTXIE,		1
	.EQU	CANFD6_IER_CANRXIE,		0
//  register-------------------------------------
	.EQU	CANFD6_IFR,	0x40002E9C
//  0x4000 2E9C  CANFD6_IFR   Bits-------------------------------------
	.EQU	CANFD6_IFR_MOENDIF,		14
	.EQU	CANFD6_IFR_BOFFIF,		12
	.EQU	CANFD6_IFR_TRGMBIF,		11
	.EQU	CANFD6_IFR_RXBSTAIF,		10
	.EQU	CANFD6_IFR_CRXDF,		9
	.EQU	CANFD6_IFR_CTXDF,		8
	.EQU	CANFD6_IFR_BEIF,		7
	.EQU	CANFD6_IFR_ALIF,		6
	.EQU	CANFD6_IFR_ENIF,		5
	.EQU	CANFD6_IFR_WUIF,		4
	.EQU	CANFD6_IFR_DOVFIF,		3
	.EQU	CANFD6_IFR_EAIF,		2
	.EQU	CANFD6_IFR_CANTXIF,		1
	.EQU	CANFD6_IFR_CANRXIF,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA0,	0x40002EA0
//  0x4000 2EA0  CANFD6_RXDATA0   Bits-------------------------------------
	.EQU	CANFD6_RXDATA0_RXDATA0_31,		31
	.EQU	CANFD6_RXDATA0_RXDATA0_30,		30
	.EQU	CANFD6_RXDATA0_RXDATA0_29,		29
	.EQU	CANFD6_RXDATA0_RXDATA0_28,		28
	.EQU	CANFD6_RXDATA0_RXDATA0_27,		27
	.EQU	CANFD6_RXDATA0_RXDATA0_26,		26
	.EQU	CANFD6_RXDATA0_RXDATA0_25,		25
	.EQU	CANFD6_RXDATA0_RXDATA0_24,		24
	.EQU	CANFD6_RXDATA0_RXDATA0_23,		23
	.EQU	CANFD6_RXDATA0_RXDATA0_22,		22
	.EQU	CANFD6_RXDATA0_RXDATA0_21,		21
	.EQU	CANFD6_RXDATA0_RXDATA0_20,		20
	.EQU	CANFD6_RXDATA0_RXDATA0_19,		19
	.EQU	CANFD6_RXDATA0_RXDATA0_18,		18
	.EQU	CANFD6_RXDATA0_RXDATA0_17,		17
	.EQU	CANFD6_RXDATA0_RXDATA0_16,		16
	.EQU	CANFD6_RXDATA0_RXDATA0_15,		15
	.EQU	CANFD6_RXDATA0_RXDATA0_14,		14
	.EQU	CANFD6_RXDATA0_RXDATA0_13,		13
	.EQU	CANFD6_RXDATA0_RXDATA0_12,		12
	.EQU	CANFD6_RXDATA0_RXDATA0_11,		11
	.EQU	CANFD6_RXDATA0_RXDATA0_10,		10
	.EQU	CANFD6_RXDATA0_RXDATA0_9,		9
	.EQU	CANFD6_RXDATA0_RXDATA0_8,		8
	.EQU	CANFD6_RXDATA0_RXDATA0_7,		7
	.EQU	CANFD6_RXDATA0_RXDATA0_6,		6
	.EQU	CANFD6_RXDATA0_RXDATA0_5,		5
	.EQU	CANFD6_RXDATA0_RXDATA0_4,		4
	.EQU	CANFD6_RXDATA0_RXDATA0_3,		3
	.EQU	CANFD6_RXDATA0_RXDATA0_2,		2
	.EQU	CANFD6_RXDATA0_RXDATA0_1,		1
	.EQU	CANFD6_RXDATA0_RXDATA0_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA1,	0x40002EA4
//  0x4000 2EA4  CANFD6_RXDATA1   Bits-------------------------------------
	.EQU	CANFD6_RXDATA1_RXDATA1_31,		31
	.EQU	CANFD6_RXDATA1_RXDATA1_30,		30
	.EQU	CANFD6_RXDATA1_RXDATA1_29,		29
	.EQU	CANFD6_RXDATA1_RXDATA1_28,		28
	.EQU	CANFD6_RXDATA1_RXDATA1_27,		27
	.EQU	CANFD6_RXDATA1_RXDATA1_26,		26
	.EQU	CANFD6_RXDATA1_RXDATA1_25,		25
	.EQU	CANFD6_RXDATA1_RXDATA1_24,		24
	.EQU	CANFD6_RXDATA1_RXDATA1_23,		23
	.EQU	CANFD6_RXDATA1_RXDATA1_22,		22
	.EQU	CANFD6_RXDATA1_RXDATA1_21,		21
	.EQU	CANFD6_RXDATA1_RXDATA1_20,		20
	.EQU	CANFD6_RXDATA1_RXDATA1_19,		19
	.EQU	CANFD6_RXDATA1_RXDATA1_18,		18
	.EQU	CANFD6_RXDATA1_RXDATA1_17,		17
	.EQU	CANFD6_RXDATA1_RXDATA1_16,		16
	.EQU	CANFD6_RXDATA1_RXDATA1_15,		15
	.EQU	CANFD6_RXDATA1_RXDATA1_14,		14
	.EQU	CANFD6_RXDATA1_RXDATA1_13,		13
	.EQU	CANFD6_RXDATA1_RXDATA1_12,		12
	.EQU	CANFD6_RXDATA1_RXDATA1_11,		11
	.EQU	CANFD6_RXDATA1_RXDATA1_10,		10
	.EQU	CANFD6_RXDATA1_RXDATA1_9,		9
	.EQU	CANFD6_RXDATA1_RXDATA1_8,		8
	.EQU	CANFD6_RXDATA1_RXDATA1_7,		7
	.EQU	CANFD6_RXDATA1_RXDATA1_6,		6
	.EQU	CANFD6_RXDATA1_RXDATA1_5,		5
	.EQU	CANFD6_RXDATA1_RXDATA1_4,		4
	.EQU	CANFD6_RXDATA1_RXDATA1_3,		3
	.EQU	CANFD6_RXDATA1_RXDATA1_2,		2
	.EQU	CANFD6_RXDATA1_RXDATA1_1,		1
	.EQU	CANFD6_RXDATA1_RXDATA1_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA2,	0x40002EA8
//  0x4000 2EA8  CANFD6_RXDATA2   Bits-------------------------------------
	.EQU	CANFD6_RXDATA2_RXDATA2_31,		31
	.EQU	CANFD6_RXDATA2_RXDATA2_30,		30
	.EQU	CANFD6_RXDATA2_RXDATA2_29,		29
	.EQU	CANFD6_RXDATA2_RXDATA2_28,		28
	.EQU	CANFD6_RXDATA2_RXDATA2_27,		27
	.EQU	CANFD6_RXDATA2_RXDATA2_26,		26
	.EQU	CANFD6_RXDATA2_RXDATA2_25,		25
	.EQU	CANFD6_RXDATA2_RXDATA2_24,		24
	.EQU	CANFD6_RXDATA2_RXDATA2_23,		23
	.EQU	CANFD6_RXDATA2_RXDATA2_22,		22
	.EQU	CANFD6_RXDATA2_RXDATA2_21,		21
	.EQU	CANFD6_RXDATA2_RXDATA2_20,		20
	.EQU	CANFD6_RXDATA2_RXDATA2_19,		19
	.EQU	CANFD6_RXDATA2_RXDATA2_18,		18
	.EQU	CANFD6_RXDATA2_RXDATA2_17,		17
	.EQU	CANFD6_RXDATA2_RXDATA2_16,		16
	.EQU	CANFD6_RXDATA2_RXDATA2_15,		15
	.EQU	CANFD6_RXDATA2_RXDATA2_14,		14
	.EQU	CANFD6_RXDATA2_RXDATA2_13,		13
	.EQU	CANFD6_RXDATA2_RXDATA2_12,		12
	.EQU	CANFD6_RXDATA2_RXDATA2_11,		11
	.EQU	CANFD6_RXDATA2_RXDATA2_10,		10
	.EQU	CANFD6_RXDATA2_RXDATA2_9,		9
	.EQU	CANFD6_RXDATA2_RXDATA2_8,		8
	.EQU	CANFD6_RXDATA2_RXDATA2_7,		7
	.EQU	CANFD6_RXDATA2_RXDATA2_6,		6
	.EQU	CANFD6_RXDATA2_RXDATA2_5,		5
	.EQU	CANFD6_RXDATA2_RXDATA2_4,		4
	.EQU	CANFD6_RXDATA2_RXDATA2_3,		3
	.EQU	CANFD6_RXDATA2_RXDATA2_2,		2
	.EQU	CANFD6_RXDATA2_RXDATA2_1,		1
	.EQU	CANFD6_RXDATA2_RXDATA2_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA3,	0x40002EAC
//  0x4000 2EAC  CANFD6_RXDATA3   Bits-------------------------------------
	.EQU	CANFD6_RXDATA3_RXDATA3_31,		31
	.EQU	CANFD6_RXDATA3_RXDATA3_30,		30
	.EQU	CANFD6_RXDATA3_RXDATA3_29,		29
	.EQU	CANFD6_RXDATA3_RXDATA3_28,		28
	.EQU	CANFD6_RXDATA3_RXDATA3_27,		27
	.EQU	CANFD6_RXDATA3_RXDATA3_26,		26
	.EQU	CANFD6_RXDATA3_RXDATA3_25,		25
	.EQU	CANFD6_RXDATA3_RXDATA3_24,		24
	.EQU	CANFD6_RXDATA3_RXDATA3_23,		23
	.EQU	CANFD6_RXDATA3_RXDATA3_22,		22
	.EQU	CANFD6_RXDATA3_RXDATA3_21,		21
	.EQU	CANFD6_RXDATA3_RXDATA3_20,		20
	.EQU	CANFD6_RXDATA3_RXDATA3_19,		19
	.EQU	CANFD6_RXDATA3_RXDATA3_18,		18
	.EQU	CANFD6_RXDATA3_RXDATA3_17,		17
	.EQU	CANFD6_RXDATA3_RXDATA3_16,		16
	.EQU	CANFD6_RXDATA3_RXDATA3_15,		15
	.EQU	CANFD6_RXDATA3_RXDATA3_14,		14
	.EQU	CANFD6_RXDATA3_RXDATA3_13,		13
	.EQU	CANFD6_RXDATA3_RXDATA3_12,		12
	.EQU	CANFD6_RXDATA3_RXDATA3_11,		11
	.EQU	CANFD6_RXDATA3_RXDATA3_10,		10
	.EQU	CANFD6_RXDATA3_RXDATA3_9,		9
	.EQU	CANFD6_RXDATA3_RXDATA3_8,		8
	.EQU	CANFD6_RXDATA3_RXDATA3_7,		7
	.EQU	CANFD6_RXDATA3_RXDATA3_6,		6
	.EQU	CANFD6_RXDATA3_RXDATA3_5,		5
	.EQU	CANFD6_RXDATA3_RXDATA3_4,		4
	.EQU	CANFD6_RXDATA3_RXDATA3_3,		3
	.EQU	CANFD6_RXDATA3_RXDATA3_2,		2
	.EQU	CANFD6_RXDATA3_RXDATA3_1,		1
	.EQU	CANFD6_RXDATA3_RXDATA3_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA4,	0x40002EB0
//  0x4000 2EB0  CANFD6_RXDATA4   Bits-------------------------------------
	.EQU	CANFD6_RXDATA4_RXDATA4_31,		31
	.EQU	CANFD6_RXDATA4_RXDATA4_30,		30
	.EQU	CANFD6_RXDATA4_RXDATA4_29,		29
	.EQU	CANFD6_RXDATA4_RXDATA4_28,		28
	.EQU	CANFD6_RXDATA4_RXDATA4_27,		27
	.EQU	CANFD6_RXDATA4_RXDATA4_26,		26
	.EQU	CANFD6_RXDATA4_RXDATA4_25,		25
	.EQU	CANFD6_RXDATA4_RXDATA4_24,		24
	.EQU	CANFD6_RXDATA4_RXDATA4_23,		23
	.EQU	CANFD6_RXDATA4_RXDATA4_22,		22
	.EQU	CANFD6_RXDATA4_RXDATA4_21,		21
	.EQU	CANFD6_RXDATA4_RXDATA4_20,		20
	.EQU	CANFD6_RXDATA4_RXDATA4_19,		19
	.EQU	CANFD6_RXDATA4_RXDATA4_18,		18
	.EQU	CANFD6_RXDATA4_RXDATA4_17,		17
	.EQU	CANFD6_RXDATA4_RXDATA4_16,		16
	.EQU	CANFD6_RXDATA4_RXDATA4_15,		15
	.EQU	CANFD6_RXDATA4_RXDATA4_14,		14
	.EQU	CANFD6_RXDATA4_RXDATA4_13,		13
	.EQU	CANFD6_RXDATA4_RXDATA4_12,		12
	.EQU	CANFD6_RXDATA4_RXDATA4_11,		11
	.EQU	CANFD6_RXDATA4_RXDATA4_10,		10
	.EQU	CANFD6_RXDATA4_RXDATA4_9,		9
	.EQU	CANFD6_RXDATA4_RXDATA4_8,		8
	.EQU	CANFD6_RXDATA4_RXDATA4_7,		7
	.EQU	CANFD6_RXDATA4_RXDATA4_6,		6
	.EQU	CANFD6_RXDATA4_RXDATA4_5,		5
	.EQU	CANFD6_RXDATA4_RXDATA4_4,		4
	.EQU	CANFD6_RXDATA4_RXDATA4_3,		3
	.EQU	CANFD6_RXDATA4_RXDATA4_2,		2
	.EQU	CANFD6_RXDATA4_RXDATA4_1,		1
	.EQU	CANFD6_RXDATA4_RXDATA4_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA5,	0x40002EB4
//  0x4000 2EB4  CANFD6_RXDATA5   Bits-------------------------------------
	.EQU	CANFD6_RXDATA5_RXDATA5_31,		31
	.EQU	CANFD6_RXDATA5_RXDATA5_30,		30
	.EQU	CANFD6_RXDATA5_RXDATA5_29,		29
	.EQU	CANFD6_RXDATA5_RXDATA5_28,		28
	.EQU	CANFD6_RXDATA5_RXDATA5_27,		27
	.EQU	CANFD6_RXDATA5_RXDATA5_26,		26
	.EQU	CANFD6_RXDATA5_RXDATA5_25,		25
	.EQU	CANFD6_RXDATA5_RXDATA5_24,		24
	.EQU	CANFD6_RXDATA5_RXDATA5_23,		23
	.EQU	CANFD6_RXDATA5_RXDATA5_22,		22
	.EQU	CANFD6_RXDATA5_RXDATA5_21,		21
	.EQU	CANFD6_RXDATA5_RXDATA5_20,		20
	.EQU	CANFD6_RXDATA5_RXDATA5_19,		19
	.EQU	CANFD6_RXDATA5_RXDATA5_18,		18
	.EQU	CANFD6_RXDATA5_RXDATA5_17,		17
	.EQU	CANFD6_RXDATA5_RXDATA5_16,		16
	.EQU	CANFD6_RXDATA5_RXDATA5_15,		15
	.EQU	CANFD6_RXDATA5_RXDATA5_14,		14
	.EQU	CANFD6_RXDATA5_RXDATA5_13,		13
	.EQU	CANFD6_RXDATA5_RXDATA5_12,		12
	.EQU	CANFD6_RXDATA5_RXDATA5_11,		11
	.EQU	CANFD6_RXDATA5_RXDATA5_10,		10
	.EQU	CANFD6_RXDATA5_RXDATA5_9,		9
	.EQU	CANFD6_RXDATA5_RXDATA5_8,		8
	.EQU	CANFD6_RXDATA5_RXDATA5_7,		7
	.EQU	CANFD6_RXDATA5_RXDATA5_6,		6
	.EQU	CANFD6_RXDATA5_RXDATA5_5,		5
	.EQU	CANFD6_RXDATA5_RXDATA5_4,		4
	.EQU	CANFD6_RXDATA5_RXDATA5_3,		3
	.EQU	CANFD6_RXDATA5_RXDATA5_2,		2
	.EQU	CANFD6_RXDATA5_RXDATA5_1,		1
	.EQU	CANFD6_RXDATA5_RXDATA5_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA6,	0x40002EB8
//  0x4000 2EB8  CANFD6_RXDATA6   Bits-------------------------------------
	.EQU	CANFD6_RXDATA6_RXDATA6_31,		31
	.EQU	CANFD6_RXDATA6_RXDATA6_30,		30
	.EQU	CANFD6_RXDATA6_RXDATA6_29,		29
	.EQU	CANFD6_RXDATA6_RXDATA6_28,		28
	.EQU	CANFD6_RXDATA6_RXDATA6_27,		27
	.EQU	CANFD6_RXDATA6_RXDATA6_26,		26
	.EQU	CANFD6_RXDATA6_RXDATA6_25,		25
	.EQU	CANFD6_RXDATA6_RXDATA6_24,		24
	.EQU	CANFD6_RXDATA6_RXDATA6_23,		23
	.EQU	CANFD6_RXDATA6_RXDATA6_22,		22
	.EQU	CANFD6_RXDATA6_RXDATA6_21,		21
	.EQU	CANFD6_RXDATA6_RXDATA6_20,		20
	.EQU	CANFD6_RXDATA6_RXDATA6_19,		19
	.EQU	CANFD6_RXDATA6_RXDATA6_18,		18
	.EQU	CANFD6_RXDATA6_RXDATA6_17,		17
	.EQU	CANFD6_RXDATA6_RXDATA6_16,		16
	.EQU	CANFD6_RXDATA6_RXDATA6_15,		15
	.EQU	CANFD6_RXDATA6_RXDATA6_14,		14
	.EQU	CANFD6_RXDATA6_RXDATA6_13,		13
	.EQU	CANFD6_RXDATA6_RXDATA6_12,		12
	.EQU	CANFD6_RXDATA6_RXDATA6_11,		11
	.EQU	CANFD6_RXDATA6_RXDATA6_10,		10
	.EQU	CANFD6_RXDATA6_RXDATA6_9,		9
	.EQU	CANFD6_RXDATA6_RXDATA6_8,		8
	.EQU	CANFD6_RXDATA6_RXDATA6_7,		7
	.EQU	CANFD6_RXDATA6_RXDATA6_6,		6
	.EQU	CANFD6_RXDATA6_RXDATA6_5,		5
	.EQU	CANFD6_RXDATA6_RXDATA6_4,		4
	.EQU	CANFD6_RXDATA6_RXDATA6_3,		3
	.EQU	CANFD6_RXDATA6_RXDATA6_2,		2
	.EQU	CANFD6_RXDATA6_RXDATA6_1,		1
	.EQU	CANFD6_RXDATA6_RXDATA6_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA7,	0x40002EBC
//  0x4000 2EBC  CANFD6_RXDATA7   Bits-------------------------------------
	.EQU	CANFD6_RXDATA7_RXDATA7_31,		31
	.EQU	CANFD6_RXDATA7_RXDATA7_30,		30
	.EQU	CANFD6_RXDATA7_RXDATA7_29,		29
	.EQU	CANFD6_RXDATA7_RXDATA7_28,		28
	.EQU	CANFD6_RXDATA7_RXDATA7_27,		27
	.EQU	CANFD6_RXDATA7_RXDATA7_26,		26
	.EQU	CANFD6_RXDATA7_RXDATA7_25,		25
	.EQU	CANFD6_RXDATA7_RXDATA7_24,		24
	.EQU	CANFD6_RXDATA7_RXDATA7_23,		23
	.EQU	CANFD6_RXDATA7_RXDATA7_22,		22
	.EQU	CANFD6_RXDATA7_RXDATA7_21,		21
	.EQU	CANFD6_RXDATA7_RXDATA7_20,		20
	.EQU	CANFD6_RXDATA7_RXDATA7_19,		19
	.EQU	CANFD6_RXDATA7_RXDATA7_18,		18
	.EQU	CANFD6_RXDATA7_RXDATA7_17,		17
	.EQU	CANFD6_RXDATA7_RXDATA7_16,		16
	.EQU	CANFD6_RXDATA7_RXDATA7_15,		15
	.EQU	CANFD6_RXDATA7_RXDATA7_14,		14
	.EQU	CANFD6_RXDATA7_RXDATA7_13,		13
	.EQU	CANFD6_RXDATA7_RXDATA7_12,		12
	.EQU	CANFD6_RXDATA7_RXDATA7_11,		11
	.EQU	CANFD6_RXDATA7_RXDATA7_10,		10
	.EQU	CANFD6_RXDATA7_RXDATA7_9,		9
	.EQU	CANFD6_RXDATA7_RXDATA7_8,		8
	.EQU	CANFD6_RXDATA7_RXDATA7_7,		7
	.EQU	CANFD6_RXDATA7_RXDATA7_6,		6
	.EQU	CANFD6_RXDATA7_RXDATA7_5,		5
	.EQU	CANFD6_RXDATA7_RXDATA7_4,		4
	.EQU	CANFD6_RXDATA7_RXDATA7_3,		3
	.EQU	CANFD6_RXDATA7_RXDATA7_2,		2
	.EQU	CANFD6_RXDATA7_RXDATA7_1,		1
	.EQU	CANFD6_RXDATA7_RXDATA7_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA8,	0x40002EC0
//  0x4000 2EC0  CANFD6_RXDATA8   Bits-------------------------------------
	.EQU	CANFD6_RXDATA8_RXDATA8_31,		31
	.EQU	CANFD6_RXDATA8_RXDATA8_30,		30
	.EQU	CANFD6_RXDATA8_RXDATA8_29,		29
	.EQU	CANFD6_RXDATA8_RXDATA8_28,		28
	.EQU	CANFD6_RXDATA8_RXDATA8_27,		27
	.EQU	CANFD6_RXDATA8_RXDATA8_26,		26
	.EQU	CANFD6_RXDATA8_RXDATA8_25,		25
	.EQU	CANFD6_RXDATA8_RXDATA8_24,		24
	.EQU	CANFD6_RXDATA8_RXDATA8_23,		23
	.EQU	CANFD6_RXDATA8_RXDATA8_22,		22
	.EQU	CANFD6_RXDATA8_RXDATA8_21,		21
	.EQU	CANFD6_RXDATA8_RXDATA8_20,		20
	.EQU	CANFD6_RXDATA8_RXDATA8_19,		19
	.EQU	CANFD6_RXDATA8_RXDATA8_18,		18
	.EQU	CANFD6_RXDATA8_RXDATA8_17,		17
	.EQU	CANFD6_RXDATA8_RXDATA8_16,		16
	.EQU	CANFD6_RXDATA8_RXDATA8_15,		15
	.EQU	CANFD6_RXDATA8_RXDATA8_14,		14
	.EQU	CANFD6_RXDATA8_RXDATA8_13,		13
	.EQU	CANFD6_RXDATA8_RXDATA8_12,		12
	.EQU	CANFD6_RXDATA8_RXDATA8_11,		11
	.EQU	CANFD6_RXDATA8_RXDATA8_10,		10
	.EQU	CANFD6_RXDATA8_RXDATA8_9,		9
	.EQU	CANFD6_RXDATA8_RXDATA8_8,		8
	.EQU	CANFD6_RXDATA8_RXDATA8_7,		7
	.EQU	CANFD6_RXDATA8_RXDATA8_6,		6
	.EQU	CANFD6_RXDATA8_RXDATA8_5,		5
	.EQU	CANFD6_RXDATA8_RXDATA8_4,		4
	.EQU	CANFD6_RXDATA8_RXDATA8_3,		3
	.EQU	CANFD6_RXDATA8_RXDATA8_2,		2
	.EQU	CANFD6_RXDATA8_RXDATA8_1,		1
	.EQU	CANFD6_RXDATA8_RXDATA8_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA9,	0x40002EC4
//  0x4000 2EC4  CANFD6_RXDATA9   Bits-------------------------------------
	.EQU	CANFD6_RXDATA9_RXDATA9_31,		31
	.EQU	CANFD6_RXDATA9_RXDATA9_30,		30
	.EQU	CANFD6_RXDATA9_RXDATA9_29,		29
	.EQU	CANFD6_RXDATA9_RXDATA9_28,		28
	.EQU	CANFD6_RXDATA9_RXDATA9_27,		27
	.EQU	CANFD6_RXDATA9_RXDATA9_26,		26
	.EQU	CANFD6_RXDATA9_RXDATA9_25,		25
	.EQU	CANFD6_RXDATA9_RXDATA9_24,		24
	.EQU	CANFD6_RXDATA9_RXDATA9_23,		23
	.EQU	CANFD6_RXDATA9_RXDATA9_22,		22
	.EQU	CANFD6_RXDATA9_RXDATA9_21,		21
	.EQU	CANFD6_RXDATA9_RXDATA9_20,		20
	.EQU	CANFD6_RXDATA9_RXDATA9_19,		19
	.EQU	CANFD6_RXDATA9_RXDATA9_18,		18
	.EQU	CANFD6_RXDATA9_RXDATA9_17,		17
	.EQU	CANFD6_RXDATA9_RXDATA9_16,		16
	.EQU	CANFD6_RXDATA9_RXDATA9_15,		15
	.EQU	CANFD6_RXDATA9_RXDATA9_14,		14
	.EQU	CANFD6_RXDATA9_RXDATA9_13,		13
	.EQU	CANFD6_RXDATA9_RXDATA9_12,		12
	.EQU	CANFD6_RXDATA9_RXDATA9_11,		11
	.EQU	CANFD6_RXDATA9_RXDATA9_10,		10
	.EQU	CANFD6_RXDATA9_RXDATA9_9,		9
	.EQU	CANFD6_RXDATA9_RXDATA9_8,		8
	.EQU	CANFD6_RXDATA9_RXDATA9_7,		7
	.EQU	CANFD6_RXDATA9_RXDATA9_6,		6
	.EQU	CANFD6_RXDATA9_RXDATA9_5,		5
	.EQU	CANFD6_RXDATA9_RXDATA9_4,		4
	.EQU	CANFD6_RXDATA9_RXDATA9_3,		3
	.EQU	CANFD6_RXDATA9_RXDATA9_2,		2
	.EQU	CANFD6_RXDATA9_RXDATA9_1,		1
	.EQU	CANFD6_RXDATA9_RXDATA9_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA10,	0x40002EC8
//  0x4000 2EC8  CANFD6_RXDATA10   Bits-------------------------------------
	.EQU	CANFD6_RXDATA10_RXDATA10_31,		31
	.EQU	CANFD6_RXDATA10_RXDATA10_30,		30
	.EQU	CANFD6_RXDATA10_RXDATA10_29,		29
	.EQU	CANFD6_RXDATA10_RXDATA10_28,		28
	.EQU	CANFD6_RXDATA10_RXDATA10_27,		27
	.EQU	CANFD6_RXDATA10_RXDATA10_26,		26
	.EQU	CANFD6_RXDATA10_RXDATA10_25,		25
	.EQU	CANFD6_RXDATA10_RXDATA10_24,		24
	.EQU	CANFD6_RXDATA10_RXDATA10_23,		23
	.EQU	CANFD6_RXDATA10_RXDATA10_22,		22
	.EQU	CANFD6_RXDATA10_RXDATA10_21,		21
	.EQU	CANFD6_RXDATA10_RXDATA10_20,		20
	.EQU	CANFD6_RXDATA10_RXDATA10_19,		19
	.EQU	CANFD6_RXDATA10_RXDATA10_18,		18
	.EQU	CANFD6_RXDATA10_RXDATA10_17,		17
	.EQU	CANFD6_RXDATA10_RXDATA10_16,		16
	.EQU	CANFD6_RXDATA10_RXDATA10_15,		15
	.EQU	CANFD6_RXDATA10_RXDATA10_14,		14
	.EQU	CANFD6_RXDATA10_RXDATA10_13,		13
	.EQU	CANFD6_RXDATA10_RXDATA10_12,		12
	.EQU	CANFD6_RXDATA10_RXDATA10_11,		11
	.EQU	CANFD6_RXDATA10_RXDATA10_10,		10
	.EQU	CANFD6_RXDATA10_RXDATA10_9,		9
	.EQU	CANFD6_RXDATA10_RXDATA10_8,		8
	.EQU	CANFD6_RXDATA10_RXDATA10_7,		7
	.EQU	CANFD6_RXDATA10_RXDATA10_6,		6
	.EQU	CANFD6_RXDATA10_RXDATA10_5,		5
	.EQU	CANFD6_RXDATA10_RXDATA10_4,		4
	.EQU	CANFD6_RXDATA10_RXDATA10_3,		3
	.EQU	CANFD6_RXDATA10_RXDATA10_2,		2
	.EQU	CANFD6_RXDATA10_RXDATA10_1,		1
	.EQU	CANFD6_RXDATA10_RXDATA10_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA11,	0x40002ECC
//  0x4000 2ECC  CANFD6_RXDATA11   Bits-------------------------------------
	.EQU	CANFD6_RXDATA11_RXDATA11_31,		31
	.EQU	CANFD6_RXDATA11_RXDATA11_30,		30
	.EQU	CANFD6_RXDATA11_RXDATA11_29,		29
	.EQU	CANFD6_RXDATA11_RXDATA11_28,		28
	.EQU	CANFD6_RXDATA11_RXDATA11_27,		27
	.EQU	CANFD6_RXDATA11_RXDATA11_26,		26
	.EQU	CANFD6_RXDATA11_RXDATA11_25,		25
	.EQU	CANFD6_RXDATA11_RXDATA11_24,		24
	.EQU	CANFD6_RXDATA11_RXDATA11_23,		23
	.EQU	CANFD6_RXDATA11_RXDATA11_22,		22
	.EQU	CANFD6_RXDATA11_RXDATA11_21,		21
	.EQU	CANFD6_RXDATA11_RXDATA11_20,		20
	.EQU	CANFD6_RXDATA11_RXDATA11_19,		19
	.EQU	CANFD6_RXDATA11_RXDATA11_18,		18
	.EQU	CANFD6_RXDATA11_RXDATA11_17,		17
	.EQU	CANFD6_RXDATA11_RXDATA11_16,		16
	.EQU	CANFD6_RXDATA11_RXDATA11_15,		15
	.EQU	CANFD6_RXDATA11_RXDATA11_14,		14
	.EQU	CANFD6_RXDATA11_RXDATA11_13,		13
	.EQU	CANFD6_RXDATA11_RXDATA11_12,		12
	.EQU	CANFD6_RXDATA11_RXDATA11_11,		11
	.EQU	CANFD6_RXDATA11_RXDATA11_10,		10
	.EQU	CANFD6_RXDATA11_RXDATA11_9,		9
	.EQU	CANFD6_RXDATA11_RXDATA11_8,		8
	.EQU	CANFD6_RXDATA11_RXDATA11_7,		7
	.EQU	CANFD6_RXDATA11_RXDATA11_6,		6
	.EQU	CANFD6_RXDATA11_RXDATA11_5,		5
	.EQU	CANFD6_RXDATA11_RXDATA11_4,		4
	.EQU	CANFD6_RXDATA11_RXDATA11_3,		3
	.EQU	CANFD6_RXDATA11_RXDATA11_2,		2
	.EQU	CANFD6_RXDATA11_RXDATA11_1,		1
	.EQU	CANFD6_RXDATA11_RXDATA11_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA12,	0x40002ED0
//  0x4000 2ED0  CANFD6_RXDATA12   Bits-------------------------------------
	.EQU	CANFD6_RXDATA12_RXDATA12_31,		31
	.EQU	CANFD6_RXDATA12_RXDATA12_30,		30
	.EQU	CANFD6_RXDATA12_RXDATA12_29,		29
	.EQU	CANFD6_RXDATA12_RXDATA12_28,		28
	.EQU	CANFD6_RXDATA12_RXDATA12_27,		27
	.EQU	CANFD6_RXDATA12_RXDATA12_26,		26
	.EQU	CANFD6_RXDATA12_RXDATA12_25,		25
	.EQU	CANFD6_RXDATA12_RXDATA12_24,		24
	.EQU	CANFD6_RXDATA12_RXDATA12_23,		23
	.EQU	CANFD6_RXDATA12_RXDATA12_22,		22
	.EQU	CANFD6_RXDATA12_RXDATA12_21,		21
	.EQU	CANFD6_RXDATA12_RXDATA12_20,		20
	.EQU	CANFD6_RXDATA12_RXDATA12_19,		19
	.EQU	CANFD6_RXDATA12_RXDATA12_18,		18
	.EQU	CANFD6_RXDATA12_RXDATA12_17,		17
	.EQU	CANFD6_RXDATA12_RXDATA12_16,		16
	.EQU	CANFD6_RXDATA12_RXDATA12_15,		15
	.EQU	CANFD6_RXDATA12_RXDATA12_14,		14
	.EQU	CANFD6_RXDATA12_RXDATA12_13,		13
	.EQU	CANFD6_RXDATA12_RXDATA12_12,		12
	.EQU	CANFD6_RXDATA12_RXDATA12_11,		11
	.EQU	CANFD6_RXDATA12_RXDATA12_10,		10
	.EQU	CANFD6_RXDATA12_RXDATA12_9,		9
	.EQU	CANFD6_RXDATA12_RXDATA12_8,		8
	.EQU	CANFD6_RXDATA12_RXDATA12_7,		7
	.EQU	CANFD6_RXDATA12_RXDATA12_6,		6
	.EQU	CANFD6_RXDATA12_RXDATA12_5,		5
	.EQU	CANFD6_RXDATA12_RXDATA12_4,		4
	.EQU	CANFD6_RXDATA12_RXDATA12_3,		3
	.EQU	CANFD6_RXDATA12_RXDATA12_2,		2
	.EQU	CANFD6_RXDATA12_RXDATA12_1,		1
	.EQU	CANFD6_RXDATA12_RXDATA12_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA13,	0x40002ED4
//  0x4000 2ED4  CANFD6_RXDATA13   Bits-------------------------------------
	.EQU	CANFD6_RXDATA13_RXDATA13_31,		31
	.EQU	CANFD6_RXDATA13_RXDATA13_30,		30
	.EQU	CANFD6_RXDATA13_RXDATA13_29,		29
	.EQU	CANFD6_RXDATA13_RXDATA13_28,		28
	.EQU	CANFD6_RXDATA13_RXDATA13_27,		27
	.EQU	CANFD6_RXDATA13_RXDATA13_26,		26
	.EQU	CANFD6_RXDATA13_RXDATA13_25,		25
	.EQU	CANFD6_RXDATA13_RXDATA13_24,		24
	.EQU	CANFD6_RXDATA13_RXDATA13_23,		23
	.EQU	CANFD6_RXDATA13_RXDATA13_22,		22
	.EQU	CANFD6_RXDATA13_RXDATA13_21,		21
	.EQU	CANFD6_RXDATA13_RXDATA13_20,		20
	.EQU	CANFD6_RXDATA13_RXDATA13_19,		19
	.EQU	CANFD6_RXDATA13_RXDATA13_18,		18
	.EQU	CANFD6_RXDATA13_RXDATA13_17,		17
	.EQU	CANFD6_RXDATA13_RXDATA13_16,		16
	.EQU	CANFD6_RXDATA13_RXDATA13_15,		15
	.EQU	CANFD6_RXDATA13_RXDATA13_14,		14
	.EQU	CANFD6_RXDATA13_RXDATA13_13,		13
	.EQU	CANFD6_RXDATA13_RXDATA13_12,		12
	.EQU	CANFD6_RXDATA13_RXDATA13_11,		11
	.EQU	CANFD6_RXDATA13_RXDATA13_10,		10
	.EQU	CANFD6_RXDATA13_RXDATA13_9,		9
	.EQU	CANFD6_RXDATA13_RXDATA13_8,		8
	.EQU	CANFD6_RXDATA13_RXDATA13_7,		7
	.EQU	CANFD6_RXDATA13_RXDATA13_6,		6
	.EQU	CANFD6_RXDATA13_RXDATA13_5,		5
	.EQU	CANFD6_RXDATA13_RXDATA13_4,		4
	.EQU	CANFD6_RXDATA13_RXDATA13_3,		3
	.EQU	CANFD6_RXDATA13_RXDATA13_2,		2
	.EQU	CANFD6_RXDATA13_RXDATA13_1,		1
	.EQU	CANFD6_RXDATA13_RXDATA13_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA14,	0x40002ED8
//  0x4000 2ED8  CANFD6_RXDATA14   Bits-------------------------------------
	.EQU	CANFD6_RXDATA14_RXDATA14_31,		31
	.EQU	CANFD6_RXDATA14_RXDATA14_30,		30
	.EQU	CANFD6_RXDATA14_RXDATA14_29,		29
	.EQU	CANFD6_RXDATA14_RXDATA14_28,		28
	.EQU	CANFD6_RXDATA14_RXDATA14_27,		27
	.EQU	CANFD6_RXDATA14_RXDATA14_26,		26
	.EQU	CANFD6_RXDATA14_RXDATA14_25,		25
	.EQU	CANFD6_RXDATA14_RXDATA14_24,		24
	.EQU	CANFD6_RXDATA14_RXDATA14_23,		23
	.EQU	CANFD6_RXDATA14_RXDATA14_22,		22
	.EQU	CANFD6_RXDATA14_RXDATA14_21,		21
	.EQU	CANFD6_RXDATA14_RXDATA14_20,		20
	.EQU	CANFD6_RXDATA14_RXDATA14_19,		19
	.EQU	CANFD6_RXDATA14_RXDATA14_18,		18
	.EQU	CANFD6_RXDATA14_RXDATA14_17,		17
	.EQU	CANFD6_RXDATA14_RXDATA14_16,		16
	.EQU	CANFD6_RXDATA14_RXDATA14_15,		15
	.EQU	CANFD6_RXDATA14_RXDATA14_14,		14
	.EQU	CANFD6_RXDATA14_RXDATA14_13,		13
	.EQU	CANFD6_RXDATA14_RXDATA14_12,		12
	.EQU	CANFD6_RXDATA14_RXDATA14_11,		11
	.EQU	CANFD6_RXDATA14_RXDATA14_10,		10
	.EQU	CANFD6_RXDATA14_RXDATA14_9,		9
	.EQU	CANFD6_RXDATA14_RXDATA14_8,		8
	.EQU	CANFD6_RXDATA14_RXDATA14_7,		7
	.EQU	CANFD6_RXDATA14_RXDATA14_6,		6
	.EQU	CANFD6_RXDATA14_RXDATA14_5,		5
	.EQU	CANFD6_RXDATA14_RXDATA14_4,		4
	.EQU	CANFD6_RXDATA14_RXDATA14_3,		3
	.EQU	CANFD6_RXDATA14_RXDATA14_2,		2
	.EQU	CANFD6_RXDATA14_RXDATA14_1,		1
	.EQU	CANFD6_RXDATA14_RXDATA14_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA15,	0x40002EDC
//  0x4000 2EDC  CANFD6_RXDATA15   Bits-------------------------------------
	.EQU	CANFD6_RXDATA15_RXDATA15_31,		31
	.EQU	CANFD6_RXDATA15_RXDATA15_30,		30
	.EQU	CANFD6_RXDATA15_RXDATA15_29,		29
	.EQU	CANFD6_RXDATA15_RXDATA15_28,		28
	.EQU	CANFD6_RXDATA15_RXDATA15_27,		27
	.EQU	CANFD6_RXDATA15_RXDATA15_26,		26
	.EQU	CANFD6_RXDATA15_RXDATA15_25,		25
	.EQU	CANFD6_RXDATA15_RXDATA15_24,		24
	.EQU	CANFD6_RXDATA15_RXDATA15_23,		23
	.EQU	CANFD6_RXDATA15_RXDATA15_22,		22
	.EQU	CANFD6_RXDATA15_RXDATA15_21,		21
	.EQU	CANFD6_RXDATA15_RXDATA15_20,		20
	.EQU	CANFD6_RXDATA15_RXDATA15_19,		19
	.EQU	CANFD6_RXDATA15_RXDATA15_18,		18
	.EQU	CANFD6_RXDATA15_RXDATA15_17,		17
	.EQU	CANFD6_RXDATA15_RXDATA15_16,		16
	.EQU	CANFD6_RXDATA15_RXDATA15_15,		15
	.EQU	CANFD6_RXDATA15_RXDATA15_14,		14
	.EQU	CANFD6_RXDATA15_RXDATA15_13,		13
	.EQU	CANFD6_RXDATA15_RXDATA15_12,		12
	.EQU	CANFD6_RXDATA15_RXDATA15_11,		11
	.EQU	CANFD6_RXDATA15_RXDATA15_10,		10
	.EQU	CANFD6_RXDATA15_RXDATA15_9,		9
	.EQU	CANFD6_RXDATA15_RXDATA15_8,		8
	.EQU	CANFD6_RXDATA15_RXDATA15_7,		7
	.EQU	CANFD6_RXDATA15_RXDATA15_6,		6
	.EQU	CANFD6_RXDATA15_RXDATA15_5,		5
	.EQU	CANFD6_RXDATA15_RXDATA15_4,		4
	.EQU	CANFD6_RXDATA15_RXDATA15_3,		3
	.EQU	CANFD6_RXDATA15_RXDATA15_2,		2
	.EQU	CANFD6_RXDATA15_RXDATA15_1,		1
	.EQU	CANFD6_RXDATA15_RXDATA15_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA16,	0x40002EE0
//  0x4000 2EE0  CANFD6_RXDATA16   Bits-------------------------------------
	.EQU	CANFD6_RXDATA16_RXDATA16_31,		31
	.EQU	CANFD6_RXDATA16_RXDATA16_30,		30
	.EQU	CANFD6_RXDATA16_RXDATA16_29,		29
	.EQU	CANFD6_RXDATA16_RXDATA16_28,		28
	.EQU	CANFD6_RXDATA16_RXDATA16_27,		27
	.EQU	CANFD6_RXDATA16_RXDATA16_26,		26
	.EQU	CANFD6_RXDATA16_RXDATA16_25,		25
	.EQU	CANFD6_RXDATA16_RXDATA16_24,		24
	.EQU	CANFD6_RXDATA16_RXDATA16_23,		23
	.EQU	CANFD6_RXDATA16_RXDATA16_22,		22
	.EQU	CANFD6_RXDATA16_RXDATA16_21,		21
	.EQU	CANFD6_RXDATA16_RXDATA16_20,		20
	.EQU	CANFD6_RXDATA16_RXDATA16_19,		19
	.EQU	CANFD6_RXDATA16_RXDATA16_18,		18
	.EQU	CANFD6_RXDATA16_RXDATA16_17,		17
	.EQU	CANFD6_RXDATA16_RXDATA16_16,		16
	.EQU	CANFD6_RXDATA16_RXDATA16_15,		15
	.EQU	CANFD6_RXDATA16_RXDATA16_14,		14
	.EQU	CANFD6_RXDATA16_RXDATA16_13,		13
	.EQU	CANFD6_RXDATA16_RXDATA16_12,		12
	.EQU	CANFD6_RXDATA16_RXDATA16_11,		11
	.EQU	CANFD6_RXDATA16_RXDATA16_10,		10
	.EQU	CANFD6_RXDATA16_RXDATA16_9,		9
	.EQU	CANFD6_RXDATA16_RXDATA16_8,		8
	.EQU	CANFD6_RXDATA16_RXDATA16_7,		7
	.EQU	CANFD6_RXDATA16_RXDATA16_6,		6
	.EQU	CANFD6_RXDATA16_RXDATA16_5,		5
	.EQU	CANFD6_RXDATA16_RXDATA16_4,		4
	.EQU	CANFD6_RXDATA16_RXDATA16_3,		3
	.EQU	CANFD6_RXDATA16_RXDATA16_2,		2
	.EQU	CANFD6_RXDATA16_RXDATA16_1,		1
	.EQU	CANFD6_RXDATA16_RXDATA16_0,		0
//  register-------------------------------------
	.EQU	CANFD6_RXDATA17,	0x40002EE4
//  0x4000 2EE4  CANFD6_RXDATA17   Bits-------------------------------------
	.EQU	CANFD6_RXDATA17_RXDATA17_31,		31
	.EQU	CANFD6_RXDATA17_RXDATA17_30,		30
	.EQU	CANFD6_RXDATA17_RXDATA17_29,		29
	.EQU	CANFD6_RXDATA17_RXDATA17_28,		28
	.EQU	CANFD6_RXDATA17_RXDATA17_27,		27
	.EQU	CANFD6_RXDATA17_RXDATA17_26,		26
	.EQU	CANFD6_RXDATA17_RXDATA17_25,		25
	.EQU	CANFD6_RXDATA17_RXDATA17_24,		24
	.EQU	CANFD6_RXDATA17_RXDATA17_23,		23
	.EQU	CANFD6_RXDATA17_RXDATA17_22,		22
	.EQU	CANFD6_RXDATA17_RXDATA17_21,		21
	.EQU	CANFD6_RXDATA17_RXDATA17_20,		20
	.EQU	CANFD6_RXDATA17_RXDATA17_19,		19
	.EQU	CANFD6_RXDATA17_RXDATA17_18,		18
	.EQU	CANFD6_RXDATA17_RXDATA17_17,		17
	.EQU	CANFD6_RXDATA17_RXDATA17_16,		16
	.EQU	CANFD6_RXDATA17_RXDATA17_15,		15
	.EQU	CANFD6_RXDATA17_RXDATA17_14,		14
	.EQU	CANFD6_RXDATA17_RXDATA17_13,		13
	.EQU	CANFD6_RXDATA17_RXDATA17_12,		12
	.EQU	CANFD6_RXDATA17_RXDATA17_11,		11
	.EQU	CANFD6_RXDATA17_RXDATA17_10,		10
	.EQU	CANFD6_RXDATA17_RXDATA17_9,		9
	.EQU	CANFD6_RXDATA17_RXDATA17_8,		8
	.EQU	CANFD6_RXDATA17_RXDATA17_7,		7
	.EQU	CANFD6_RXDATA17_RXDATA17_6,		6
	.EQU	CANFD6_RXDATA17_RXDATA17_5,		5
	.EQU	CANFD6_RXDATA17_RXDATA17_4,		4
	.EQU	CANFD6_RXDATA17_RXDATA17_3,		3
	.EQU	CANFD6_RXDATA17_RXDATA17_2,		2
	.EQU	CANFD6_RXDATA17_RXDATA17_1,		1
	.EQU	CANFD6_RXDATA17_RXDATA17_0,		0
//  register-------------------------------------
	.EQU	CANFD6_TIMER,	0x40002EE8
//  0x4000 2EE8  CANFD6_TIMER   Bits-------------------------------------
	.EQU	CANFD6_TIMER_CANTIMER15,		15
	.EQU	CANFD6_TIMER_CANTIMER14,		14
	.EQU	CANFD6_TIMER_CANTIMER13,		13
	.EQU	CANFD6_TIMER_CANTIMER12,		12
	.EQU	CANFD6_TIMER_CANTIMER11,		11
	.EQU	CANFD6_TIMER_CANTIMER10,		10
	.EQU	CANFD6_TIMER_CANTIMER9,		9
	.EQU	CANFD6_TIMER_CANTIMER8,		8
	.EQU	CANFD6_TIMER_CANTIMER7,		7
	.EQU	CANFD6_TIMER_CANTIMER6,		6
	.EQU	CANFD6_TIMER_CANTIMER5,		5
	.EQU	CANFD6_TIMER_CANTIMER4,		4
	.EQU	CANFD6_TIMER_CANTIMER3,		3
	.EQU	CANFD6_TIMER_CANTIMER2,		2
	.EQU	CANFD6_TIMER_CANTIMER1,		1
	.EQU	CANFD6_TIMER_CANTIMER0,		0
//  register-------------------------------------
	.EQU	CANFD6_CRC,	0x40002EEC
//  0x4000 2EEC  CANFD6_CRC   Bits-------------------------------------
	.EQU	CANFD6_CRC_STUFFCNT3,		31
	.EQU	CANFD6_CRC_STUFFCNT2,		30
	.EQU	CANFD6_CRC_STUFFCNT1,		29
	.EQU	CANFD6_CRC_STUFFCNT0,		28
	.EQU	CANFD6_CRC_CRC20,		20
	.EQU	CANFD6_CRC_CRC19,		19
	.EQU	CANFD6_CRC_CRC18,		18
	.EQU	CANFD6_CRC_CRC17,		17
	.EQU	CANFD6_CRC_CRC16,		16
	.EQU	CANFD6_CRC_CRC15,		15
	.EQU	CANFD6_CRC_CRC14,		14
	.EQU	CANFD6_CRC_CRC13,		13
	.EQU	CANFD6_CRC_CRC12,		12
	.EQU	CANFD6_CRC_CRC11,		11
	.EQU	CANFD6_CRC_CRC10,		10
	.EQU	CANFD6_CRC_CRC9,		9
	.EQU	CANFD6_CRC_CRC8,		8
	.EQU	CANFD6_CRC_CRC7,		7
	.EQU	CANFD6_CRC_CRC6,		6
	.EQU	CANFD6_CRC_CRC5,		5
	.EQU	CANFD6_CRC_CRC4,		4
	.EQU	CANFD6_CRC_CRC3,		3
	.EQU	CANFD6_CRC_CRC2,		2
	.EQU	CANFD6_CRC_CRC1,		1
	.EQU	CANFD6_CRC_CRC0,		0
//  register-------------------------------------
	.EQU	CANFD6_CTLR1,	0x40002EF4
//  0x4000 2EF4  CANFD6_CTLR1   Bits-------------------------------------
	.EQU	CANFD6_CTLR1_TRGMBEN,		31
	.EQU	CANFD6_CTLR1_TRGMBSEL6,		30
	.EQU	CANFD6_CTLR1_TRGMBSEL5,		29
	.EQU	CANFD6_CTLR1_TRGMBSEL4,		28
	.EQU	CANFD6_CTLR1_TRGMBSEL3,		27
	.EQU	CANFD6_CTLR1_TRGMBSEL2,		26
	.EQU	CANFD6_CTLR1_TRGMBSEL1,		25
	.EQU	CANFD6_CTLR1_TRGMBSEL0,		24
	.EQU	CANFD6_CTLR1_TRGNUM3,		23
	.EQU	CANFD6_CTLR1_TRGNUM2,		22
	.EQU	CANFD6_CTLR1_TRGNUM1,		21
	.EQU	CANFD6_CTLR1_TRGNUM0,		20
	.EQU	CANFD6_CTLR1_CKMODE,		19
	.EQU	CANFD6_CTLR1_BOFFREC,		18
	.EQU	CANFD6_CTLR1_LBSEL,		17
	.EQU	CANFD6_CTLR1_ARBSTART,		16
	.EQU	CANFD6_CTLR1_ARBMS,		15
	.EQU	CANFD6_CTLR1_MBMSKEN,		14
	.EQU	CANFD6_CTLR1_MATCHMS,		13
	.EQU	CANFD6_CTLR1_MBNUM,		12
	.EQU	CANFD6_CTLR1_TSYN,		11
	.EQU	CANFD6_CTLR1_FTCLKS,		10
	.EQU	CANFD6_CTLR1_ST,		9
	.EQU	CANFD6_CTLR1_RXMUX6,		8
	.EQU	CANFD6_CTLR1_RXMUX5,		7
	.EQU	CANFD6_CTLR1_RXMUX4,		6
	.EQU	CANFD6_CTLR1_RXMUX3,		5
	.EQU	CANFD6_CTLR1_RXMUX2,		4
	.EQU	CANFD6_CTLR1_RXMUX1,		3
	.EQU	CANFD6_CTLR1_RXMUX0,		2
	.EQU	CANFD6_CTLR1_AMCKS1,		1
	.EQU	CANFD6_CTLR1_AMCKS0,		0
//  register-------------------------------------
	.EQU	CANFD6_AMSTA,	0x40002EF8
//  0x4000 2EF8  CANFD6_AMSTA   Bits-------------------------------------
	.EQU	CANFD6_AMSTA_TXCODE3,		31
	.EQU	CANFD6_AMSTA_TXCODE2,		30
	.EQU	CANFD6_AMSTA_TXCODE1,		29
	.EQU	CANFD6_AMSTA_TXCODE0,		28
	.EQU	CANFD6_AMSTA_ARBSTA1,		27
	.EQU	CANFD6_AMSTA_ARBSTA0,		26
	.EQU	CANFD6_AMSTA_ARBWINNER9,		25
	.EQU	CANFD6_AMSTA_ARBWINNER8,		24
	.EQU	CANFD6_AMSTA_ARBWINNER7,		23
	.EQU	CANFD6_AMSTA_ARBWINNER6,		22
	.EQU	CANFD6_AMSTA_ARBWINNER5,		21
	.EQU	CANFD6_AMSTA_ARBWINNER4,		20
	.EQU	CANFD6_AMSTA_ARBWINNER3,		19
	.EQU	CANFD6_AMSTA_ARBWINNER2,		18
	.EQU	CANFD6_AMSTA_ARBWINNER1,		17
	.EQU	CANFD6_AMSTA_ARBWINNER0,		16
	.EQU	CANFD6_AMSTA_BETEN,		15
	.EQU	CANFD6_AMSTA_RTRMEN,		14
	.EQU	CANFD6_AMSTA_IDSELEN,		13
	.EQU	CANFD6_AMSTA_RELRXALL,		12
	.EQU	CANFD6_AMSTA_ROPSTA,		11
	.EQU	CANFD6_AMSTA_MATSTA,		10
	.EQU	CANFD6_AMSTA_MATWINNER9,		9
	.EQU	CANFD6_AMSTA_MATWINNER8,		8
	.EQU	CANFD6_AMSTA_MATWINNER7,		7
	.EQU	CANFD6_AMSTA_MATWINNER6,		6
	.EQU	CANFD6_AMSTA_MATWINNER5,		5
	.EQU	CANFD6_AMSTA_MATWINNER4,		4
	.EQU	CANFD6_AMSTA_MATWINNER3,		3
	.EQU	CANFD6_AMSTA_MATWINNER2,		2
	.EQU	CANFD6_AMSTA_MATWINNER1,		1
	.EQU	CANFD6_AMSTA_MATWINNER0,		0
//  register-------------------------------------
	.EQU	CANFD6_TXDATA,	0x40002EFC
//  0x4000 2EFC  CANFD6_TXDATA   Bits-------------------------------------
	.EQU	CANFD6_TXDATA_TXDATA31,		31
	.EQU	CANFD6_TXDATA_TXDATA30,		30
	.EQU	CANFD6_TXDATA_TXDATA29,		29
	.EQU	CANFD6_TXDATA_TXDATA28,		28
	.EQU	CANFD6_TXDATA_TXDATA27,		27
	.EQU	CANFD6_TXDATA_TXDATA26,		26
	.EQU	CANFD6_TXDATA_TXDATA25,		25
	.EQU	CANFD6_TXDATA_TXDATA24,		24
	.EQU	CANFD6_TXDATA_TXDATA23,		23
	.EQU	CANFD6_TXDATA_TXDATA22,		22
	.EQU	CANFD6_TXDATA_TXDATA21,		21
	.EQU	CANFD6_TXDATA_TXDATA20,		20
	.EQU	CANFD6_TXDATA_TXDATA19,		19
	.EQU	CANFD6_TXDATA_TXDATA18,		18
	.EQU	CANFD6_TXDATA_TXDATA17,		17
	.EQU	CANFD6_TXDATA_TXDATA16,		16
	.EQU	CANFD6_TXDATA_TXDATA15,		15
	.EQU	CANFD6_TXDATA_TXDATA14,		14
	.EQU	CANFD6_TXDATA_TXDATA13,		13
	.EQU	CANFD6_TXDATA_TXDATA12,		12
	.EQU	CANFD6_TXDATA_TXDATA11,		11
	.EQU	CANFD6_TXDATA_TXDATA10,		10
	.EQU	CANFD6_TXDATA_TXDATA9,		9
	.EQU	CANFD6_TXDATA_TXDATA8,		8
	.EQU	CANFD6_TXDATA_TXDATA7,		7
	.EQU	CANFD6_TXDATA_TXDATA6,		6
	.EQU	CANFD6_TXDATA_TXDATA5,		5
	.EQU	CANFD6_TXDATA_TXDATA4,		4
	.EQU	CANFD6_TXDATA_TXDATA3,		3
	.EQU	CANFD6_TXDATA_TXDATA2,		2
	.EQU	CANFD6_TXDATA_TXDATA1,		1
	.EQU	CANFD6_TXDATA_TXDATA0,		0
//  register-------------------------------------
	.EQU	CANFD7_CTLR0,	0x40002F00
//  0x4000 2F00  CANFD7_CTLR0   Bits-------------------------------------
	.EQU	CANFD7_CTLR0_CANFDEN,		31
	.EQU	CANFD7_CTLR0_CANRMC6,		30
	.EQU	CANFD7_CTLR0_CANRMC5,		29
	.EQU	CANFD7_CTLR0_CANRMC4,		28
	.EQU	CANFD7_CTLR0_CANRMC3,		27
	.EQU	CANFD7_CTLR0_CANRMC2,		26
	.EQU	CANFD7_CTLR0_CANRMC1,		25
	.EQU	CANFD7_CTLR0_CANRMC0,		24
	.EQU	CANFD7_CTLR0_BOFF,		23
	.EQU	CANFD7_CTLR0_CERROR,		22
	.EQU	CANFD7_CTLR0_TXSTA,		21
	.EQU	CANFD7_CTLR0_RXSTA,		20
	.EQU	CANFD7_CTLR0_TCSTA,		19
	.EQU	CANFD7_CTLR0_DOSTA,		17
	.EQU	CANFD7_CTLR0_RXBSTA,		16
	.EQU	CANFD7_CTLR0_ANSWEREN,		15
	.EQU	CANFD7_CTLR0_FULLRXEN,		14
	.EQU	CANFD7_CTLR0_MBSIZE1,		13
	.EQU	CANFD7_CTLR0_MBSIZE0,		12
	.EQU	CANFD7_CTLR0_RELF,		11
	.EQU	CANFD7_CTLR0_RELRX,		10
	.EQU	CANFD7_CTLR0_ATX,		9
	.EQU	CANFD7_CTLR0_TXR,		8
	.EQU	CANFD7_CTLR0_CANEN,		7
	.EQU	CANFD7_CTLR0_CANCKS1,		6
	.EQU	CANFD7_CTLR0_CANCKS0,		5
	.EQU	CANFD7_CTLR0_ISOFDCANEN,		4
	.EQU	CANFD7_CTLR0_SLEEP,		3
	.EQU	CANFD7_CTLR0_LBACK,		2
	.EQU	CANFD7_CTLR0_SILENT,		1
	.EQU	CANFD7_CTLR0_RSMOD,		0
//  register-------------------------------------
	.EQU	 CANFD7_BRGR,	0x40002F04
//  0x4000 2F04   CANFD7_BRGR   Bits-------------------------------------
	.EQU	 CANFD7_BRGR_HTSEG2_2,		28
	.EQU	 CANFD7_BRGR_HTSEG2_1,		27
	.EQU	 CANFD7_BRGR_HTSEG2_0,		26
	.EQU	 CANFD7_BRGR_HTSEG1_3,		25
	.EQU	 CANFD7_BRGR_HTSEG1_2,		24
	.EQU	 CANFD7_BRGR_HTSEG1_1,		23
	.EQU	 CANFD7_BRGR_HTSEG1_0,		22
	.EQU	 CANFD7_BRGR_BRSBRP5,		21
	.EQU	 CANFD7_BRGR_BRSBRP4,		20
	.EQU	 CANFD7_BRGR_BRSBRP3,		19
	.EQU	 CANFD7_BRGR_BRSBRP2,		18
	.EQU	 CANFD7_BRGR_BRSBRP1,		17
	.EQU	 CANFD7_BRGR_BRSBRP0,		16
	.EQU	 CANFD7_BRGR_SAM,		15
	.EQU	 CANFD7_BRGR_TSEG2_2,		14
	.EQU	 CANFD7_BRGR_TSEG2_1,		13
	.EQU	 CANFD7_BRGR_TSEG2_0,		12
	.EQU	 CANFD7_BRGR_TSEG1_3,		11
	.EQU	 CANFD7_BRGR_TSEG1_2,		10
	.EQU	 CANFD7_BRGR_TSEG1_1,		9
	.EQU	 CANFD7_BRGR_TSEG1_0,		8
	.EQU	 CANFD7_BRGR_SJW1,		7
	.EQU	 CANFD7_BRGR_SJW0,		6
	.EQU	 CANFD7_BRGR_CANBRP5,		5
	.EQU	 CANFD7_BRGR_CANBRP4,		4
	.EQU	 CANFD7_BRGR_CANBRP3,		3
	.EQU	 CANFD7_BRGR_CANBRP2,		2
	.EQU	 CANFD7_BRGR_CANBRP1,		1
	.EQU	 CANFD7_BRGR_CANBRP0,		0
//  register-------------------------------------
	.EQU	CANFD7_RCR,	0x40002F08
//  0x4000 2F08  CANFD7_RCR   Bits-------------------------------------
	.EQU	CANFD7_RCR_DPRAMOF,		16
	.EQU	CANFD7_RCR_CANERRC1,		15
	.EQU	CANFD7_RCR_CANERRC0,		14
	.EQU	CANFD7_RCR_CANDIR,		13
	.EQU	CANFD7_RCR_CANSEG4,		12
	.EQU	CANFD7_RCR_CANSEG3,		11
	.EQU	CANFD7_RCR_CANSEG2,		10
	.EQU	CANFD7_RCR_CANSEG1,		9
	.EQU	CANFD7_RCR_CANSEG0,		8
	.EQU	CANFD7_RCR_CANALC4,		4
	.EQU	CANFD7_RCR_CANALC3,		3
	.EQU	CANFD7_RCR_CANALC2,		2
	.EQU	CANFD7_RCR_CANALC1,		1
	.EQU	CANFD7_RCR_CANALC0,		0
//  register-------------------------------------
	.EQU	CANFD7_EROR,	0x40002F0C
//  0x4000 2F0C  CANFD7_EROR   Bits-------------------------------------
	.EQU	CANFD7_EROR_DPRAMFEN,		31
	.EQU	CANFD7_EROR_SFDMOD,		30
	.EQU	CANFD7_EROR_SFDEN,		29
	.EQU	CANFD7_EROR_SOSFD4,		28
	.EQU	CANFD7_EROR_SOSFD3,		27
	.EQU	CANFD7_EROR_SOSFD2,		26
	.EQU	CANFD7_EROR_SOSFD1,		25
	.EQU	CANFD7_EROR_SOSFD0,		24
	.EQU	CANFD7_EROR_CANEWL7,		23
	.EQU	CANFD7_EROR_CANEWL6,		22
	.EQU	CANFD7_EROR_CANEWL5,		21
	.EQU	CANFD7_EROR_CANEWL4,		20
	.EQU	CANFD7_EROR_CANEWL3,		19
	.EQU	CANFD7_EROR_CANEWL2,		18
	.EQU	CANFD7_EROR_CANEWL1,		17
	.EQU	CANFD7_EROR_CANEWL0,		16
	.EQU	CANFD7_EROR_CANTXE7,		15
	.EQU	CANFD7_EROR_CANTXE6,		14
	.EQU	CANFD7_EROR_CANTXE5,		13
	.EQU	CANFD7_EROR_CANTXE4,		12
	.EQU	CANFD7_EROR_CANTXE3,		11
	.EQU	CANFD7_EROR_CANTXE2,		10
	.EQU	CANFD7_EROR_CANTXE1,		9
	.EQU	CANFD7_EROR_CANTXE0,		8
	.EQU	CANFD7_EROR_CANRXE7,		7
	.EQU	CANFD7_EROR_CANRXE6,		6
	.EQU	CANFD7_EROR_CANRXE5,		5
	.EQU	CANFD7_EROR_CANRXE4,		4
	.EQU	CANFD7_EROR_CANRXE3,		3
	.EQU	CANFD7_EROR_CANRXE2,		2
	.EQU	CANFD7_EROR_CANRXE1,		1
	.EQU	CANFD7_EROR_CANRXE0,		0
//  register-------------------------------------
	.EQU	CANFD7_CTLR2,	0x40002F10
//  0x4000 2F10  CANFD7_CTLR2   Bits-------------------------------------
	.EQU	CANFD7_CTLR2_AMCKDIV1,		26
	.EQU	CANFD7_CTLR2_AMCKDIV0,		25
	.EQU	CANFD7_CTLR2_DESEL,		24
	.EQU	CANFD7_CTLR2_TDCVM6,		22
	.EQU	CANFD7_CTLR2_TDCVM5,		21
	.EQU	CANFD7_CTLR2_TDCVM4,		20
	.EQU	CANFD7_CTLR2_TDCVM3,		19
	.EQU	CANFD7_CTLR2_TDCVM2,		18
	.EQU	CANFD7_CTLR2_TDCVM1,		17
	.EQU	CANFD7_CTLR2_TDCVM0,		16
	.EQU	CANFD7_CTLR2_TDC0_1,		15
	.EQU	CANFD7_CTLR2_TDC0_0,		14
	.EQU	CANFD7_CTLR2_TDCSR1,		13
	.EQU	CANFD7_CTLR2_TDCSR0,		12
	.EQU	CANFD7_CTLR2_TDCS1,		11
	.EQU	CANFD7_CTLR2_TDCS0,		10
	.EQU	CANFD7_CTLR2_TDCAUT0,		9
	.EQU	CANFD7_CTLR2_TDCEN,		8
	.EQU	CANFD7_CTLR2_TDCOEN,		7
	.EQU	CANFD7_CTLR2_TDCV6,		6
	.EQU	CANFD7_CTLR2_TDCV5,		5
	.EQU	CANFD7_CTLR2_TDCV4,		4
	.EQU	CANFD7_CTLR2_TDCV3,		3
	.EQU	CANFD7_CTLR2_TDCV2,		2
	.EQU	CANFD7_CTLR2_TDCV1,		1
	.EQU	CANFD7_CTLR2_TDCV0,		0
//  register-------------------------------------
	.EQU	CANFD7_MSKR,	0x40002F14
//  0x4000 2F14  CANFD7_MSKR   Bits-------------------------------------
	.EQU	CANFD7_MSKR_MSK31,		31
	.EQU	CANFD7_MSKR_MSK30,		30
	.EQU	CANFD7_MSKR_MSK29,		29
	.EQU	CANFD7_MSKR_MSK28,		28
	.EQU	CANFD7_MSKR_MSK27,		27
	.EQU	CANFD7_MSKR_MSK26,		26
	.EQU	CANFD7_MSKR_MSK25,		25
	.EQU	CANFD7_MSKR_MSK24,		24
	.EQU	CANFD7_MSKR_MSK23,		23
	.EQU	CANFD7_MSKR_MSK22,		22
	.EQU	CANFD7_MSKR_MSK21,		21
	.EQU	CANFD7_MSKR_MSK20,		20
	.EQU	CANFD7_MSKR_MSK19,		19
	.EQU	CANFD7_MSKR_MSK18,		18
	.EQU	CANFD7_MSKR_MSK17,		17
	.EQU	CANFD7_MSKR_MSK16,		16
	.EQU	CANFD7_MSKR_MSK15,		15
	.EQU	CANFD7_MSKR_MSK14,		14
	.EQU	CANFD7_MSKR_MSK13,		13
	.EQU	CANFD7_MSKR_MSK12,		12
	.EQU	CANFD7_MSKR_MSK11,		11
	.EQU	CANFD7_MSKR_MSK10,		10
	.EQU	CANFD7_MSKR_MSK9,		9
	.EQU	CANFD7_MSKR_MSK8,		8
	.EQU	CANFD7_MSKR_MSK7,		7
	.EQU	CANFD7_MSKR_MSK6,		6
	.EQU	CANFD7_MSKR_MSK5,		5
	.EQU	CANFD7_MSKR_MSK4,		4
	.EQU	CANFD7_MSKR_MSK3,		3
	.EQU	CANFD7_MSKR_MSK2,		2
	.EQU	CANFD7_MSKR_MSK1,		1
	.EQU	CANFD7_MSKR_MSK0,		0
//  register-------------------------------------
	.EQU	CANFD7_IER,	0x40002F18
//  0x4000 2F18  CANFD7_IER   Bits-------------------------------------
	.EQU	CANFD7_IER_FAILCLR,		31
	.EQU	CANFD7_IER_BOFFIC,		28
	.EQU	CANFD7_IER_TRGMBIC,		27
	.EQU	CANFD7_IER_MOENDIC,		26
	.EQU	CANFD7_IER_BEIC,		23
	.EQU	CANFD7_IER_ALIC,		22
	.EQU	CANFD7_IER_ENIC,		21
	.EQU	CANFD7_IER_WUIC,		20
	.EQU	CANFD7_IER_DOVFIC,		19
	.EQU	CANFD7_IER_EAIC,		18
	.EQU	CANFD7_IER_CANTXIC,		17
	.EQU	CANFD7_IER_CANRXIC,		16
	.EQU	CANFD7_IER_MOENDIE,		15
	.EQU	CANFD7_IER_ARBFAILIE,		14
	.EQU	CANFD7_IER_BOFFIE,		12
	.EQU	CANFD7_IER_TRGMBIE,		11
	.EQU	CANFD7_IER_RXBSTAIE,		10
	.EQU	CANFD7_IER_CRXDE,		9
	.EQU	CANFD7_IER_CTXDE,		8
	.EQU	CANFD7_IER_BEIE,		7
	.EQU	CANFD7_IER_ALIE,		6
	.EQU	CANFD7_IER_ENIE,		5
	.EQU	CANFD7_IER_WUIE,		4
	.EQU	CANFD7_IER_DOVFIE,		3
	.EQU	CANFD7_IER_EAIE,		2
	.EQU	CANFD7_IER_CANTXIE,		1
	.EQU	CANFD7_IER_CANRXIE,		0
//  register-------------------------------------
	.EQU	CANFD7_IFR,	0x40002F1C
//  0x4000 2F1C  CANFD7_IFR   Bits-------------------------------------
	.EQU	CANFD7_IFR_MOENDIF,		14
	.EQU	CANFD7_IFR_BOFFIF,		12
	.EQU	CANFD7_IFR_TRGMBIF,		11
	.EQU	CANFD7_IFR_RXBSTAIF,		10
	.EQU	CANFD7_IFR_CRXDF,		9
	.EQU	CANFD7_IFR_CTXDF,		8
	.EQU	CANFD7_IFR_BEIF,		7
	.EQU	CANFD7_IFR_ALIF,		6
	.EQU	CANFD7_IFR_ENIF,		5
	.EQU	CANFD7_IFR_WUIF,		4
	.EQU	CANFD7_IFR_DOVFIF,		3
	.EQU	CANFD7_IFR_EAIF,		2
	.EQU	CANFD7_IFR_CANTXIF,		1
	.EQU	CANFD7_IFR_CANRXIF,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA0,	0x40002F20
//  0x4000 2F20  CANFD7_RXDATA0   Bits-------------------------------------
	.EQU	CANFD7_RXDATA0_RXDATA0_31,		31
	.EQU	CANFD7_RXDATA0_RXDATA0_30,		30
	.EQU	CANFD7_RXDATA0_RXDATA0_29,		29
	.EQU	CANFD7_RXDATA0_RXDATA0_28,		28
	.EQU	CANFD7_RXDATA0_RXDATA0_27,		27
	.EQU	CANFD7_RXDATA0_RXDATA0_26,		26
	.EQU	CANFD7_RXDATA0_RXDATA0_25,		25
	.EQU	CANFD7_RXDATA0_RXDATA0_24,		24
	.EQU	CANFD7_RXDATA0_RXDATA0_23,		23
	.EQU	CANFD7_RXDATA0_RXDATA0_22,		22
	.EQU	CANFD7_RXDATA0_RXDATA0_21,		21
	.EQU	CANFD7_RXDATA0_RXDATA0_20,		20
	.EQU	CANFD7_RXDATA0_RXDATA0_19,		19
	.EQU	CANFD7_RXDATA0_RXDATA0_18,		18
	.EQU	CANFD7_RXDATA0_RXDATA0_17,		17
	.EQU	CANFD7_RXDATA0_RXDATA0_16,		16
	.EQU	CANFD7_RXDATA0_RXDATA0_15,		15
	.EQU	CANFD7_RXDATA0_RXDATA0_14,		14
	.EQU	CANFD7_RXDATA0_RXDATA0_13,		13
	.EQU	CANFD7_RXDATA0_RXDATA0_12,		12
	.EQU	CANFD7_RXDATA0_RXDATA0_11,		11
	.EQU	CANFD7_RXDATA0_RXDATA0_10,		10
	.EQU	CANFD7_RXDATA0_RXDATA0_9,		9
	.EQU	CANFD7_RXDATA0_RXDATA0_8,		8
	.EQU	CANFD7_RXDATA0_RXDATA0_7,		7
	.EQU	CANFD7_RXDATA0_RXDATA0_6,		6
	.EQU	CANFD7_RXDATA0_RXDATA0_5,		5
	.EQU	CANFD7_RXDATA0_RXDATA0_4,		4
	.EQU	CANFD7_RXDATA0_RXDATA0_3,		3
	.EQU	CANFD7_RXDATA0_RXDATA0_2,		2
	.EQU	CANFD7_RXDATA0_RXDATA0_1,		1
	.EQU	CANFD7_RXDATA0_RXDATA0_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA1,	0x40002F24
//  0x4000 2F24  CANFD7_RXDATA1   Bits-------------------------------------
	.EQU	CANFD7_RXDATA1_RXDATA1_31,		31
	.EQU	CANFD7_RXDATA1_RXDATA1_30,		30
	.EQU	CANFD7_RXDATA1_RXDATA1_29,		29
	.EQU	CANFD7_RXDATA1_RXDATA1_28,		28
	.EQU	CANFD7_RXDATA1_RXDATA1_27,		27
	.EQU	CANFD7_RXDATA1_RXDATA1_26,		26
	.EQU	CANFD7_RXDATA1_RXDATA1_25,		25
	.EQU	CANFD7_RXDATA1_RXDATA1_24,		24
	.EQU	CANFD7_RXDATA1_RXDATA1_23,		23
	.EQU	CANFD7_RXDATA1_RXDATA1_22,		22
	.EQU	CANFD7_RXDATA1_RXDATA1_21,		21
	.EQU	CANFD7_RXDATA1_RXDATA1_20,		20
	.EQU	CANFD7_RXDATA1_RXDATA1_19,		19
	.EQU	CANFD7_RXDATA1_RXDATA1_18,		18
	.EQU	CANFD7_RXDATA1_RXDATA1_17,		17
	.EQU	CANFD7_RXDATA1_RXDATA1_16,		16
	.EQU	CANFD7_RXDATA1_RXDATA1_15,		15
	.EQU	CANFD7_RXDATA1_RXDATA1_14,		14
	.EQU	CANFD7_RXDATA1_RXDATA1_13,		13
	.EQU	CANFD7_RXDATA1_RXDATA1_12,		12
	.EQU	CANFD7_RXDATA1_RXDATA1_11,		11
	.EQU	CANFD7_RXDATA1_RXDATA1_10,		10
	.EQU	CANFD7_RXDATA1_RXDATA1_9,		9
	.EQU	CANFD7_RXDATA1_RXDATA1_8,		8
	.EQU	CANFD7_RXDATA1_RXDATA1_7,		7
	.EQU	CANFD7_RXDATA1_RXDATA1_6,		6
	.EQU	CANFD7_RXDATA1_RXDATA1_5,		5
	.EQU	CANFD7_RXDATA1_RXDATA1_4,		4
	.EQU	CANFD7_RXDATA1_RXDATA1_3,		3
	.EQU	CANFD7_RXDATA1_RXDATA1_2,		2
	.EQU	CANFD7_RXDATA1_RXDATA1_1,		1
	.EQU	CANFD7_RXDATA1_RXDATA1_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA2,	0x40002F28
//  0x4000 2F28  CANFD7_RXDATA2   Bits-------------------------------------
	.EQU	CANFD7_RXDATA2_RXDATA2_31,		31
	.EQU	CANFD7_RXDATA2_RXDATA2_30,		30
	.EQU	CANFD7_RXDATA2_RXDATA2_29,		29
	.EQU	CANFD7_RXDATA2_RXDATA2_28,		28
	.EQU	CANFD7_RXDATA2_RXDATA2_27,		27
	.EQU	CANFD7_RXDATA2_RXDATA2_26,		26
	.EQU	CANFD7_RXDATA2_RXDATA2_25,		25
	.EQU	CANFD7_RXDATA2_RXDATA2_24,		24
	.EQU	CANFD7_RXDATA2_RXDATA2_23,		23
	.EQU	CANFD7_RXDATA2_RXDATA2_22,		22
	.EQU	CANFD7_RXDATA2_RXDATA2_21,		21
	.EQU	CANFD7_RXDATA2_RXDATA2_20,		20
	.EQU	CANFD7_RXDATA2_RXDATA2_19,		19
	.EQU	CANFD7_RXDATA2_RXDATA2_18,		18
	.EQU	CANFD7_RXDATA2_RXDATA2_17,		17
	.EQU	CANFD7_RXDATA2_RXDATA2_16,		16
	.EQU	CANFD7_RXDATA2_RXDATA2_15,		15
	.EQU	CANFD7_RXDATA2_RXDATA2_14,		14
	.EQU	CANFD7_RXDATA2_RXDATA2_13,		13
	.EQU	CANFD7_RXDATA2_RXDATA2_12,		12
	.EQU	CANFD7_RXDATA2_RXDATA2_11,		11
	.EQU	CANFD7_RXDATA2_RXDATA2_10,		10
	.EQU	CANFD7_RXDATA2_RXDATA2_9,		9
	.EQU	CANFD7_RXDATA2_RXDATA2_8,		8
	.EQU	CANFD7_RXDATA2_RXDATA2_7,		7
	.EQU	CANFD7_RXDATA2_RXDATA2_6,		6
	.EQU	CANFD7_RXDATA2_RXDATA2_5,		5
	.EQU	CANFD7_RXDATA2_RXDATA2_4,		4
	.EQU	CANFD7_RXDATA2_RXDATA2_3,		3
	.EQU	CANFD7_RXDATA2_RXDATA2_2,		2
	.EQU	CANFD7_RXDATA2_RXDATA2_1,		1
	.EQU	CANFD7_RXDATA2_RXDATA2_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA3,	0x40002F2C
//  0x4000 2F2C  CANFD7_RXDATA3   Bits-------------------------------------
	.EQU	CANFD7_RXDATA3_RXDATA3_31,		31
	.EQU	CANFD7_RXDATA3_RXDATA3_30,		30
	.EQU	CANFD7_RXDATA3_RXDATA3_29,		29
	.EQU	CANFD7_RXDATA3_RXDATA3_28,		28
	.EQU	CANFD7_RXDATA3_RXDATA3_27,		27
	.EQU	CANFD7_RXDATA3_RXDATA3_26,		26
	.EQU	CANFD7_RXDATA3_RXDATA3_25,		25
	.EQU	CANFD7_RXDATA3_RXDATA3_24,		24
	.EQU	CANFD7_RXDATA3_RXDATA3_23,		23
	.EQU	CANFD7_RXDATA3_RXDATA3_22,		22
	.EQU	CANFD7_RXDATA3_RXDATA3_21,		21
	.EQU	CANFD7_RXDATA3_RXDATA3_20,		20
	.EQU	CANFD7_RXDATA3_RXDATA3_19,		19
	.EQU	CANFD7_RXDATA3_RXDATA3_18,		18
	.EQU	CANFD7_RXDATA3_RXDATA3_17,		17
	.EQU	CANFD7_RXDATA3_RXDATA3_16,		16
	.EQU	CANFD7_RXDATA3_RXDATA3_15,		15
	.EQU	CANFD7_RXDATA3_RXDATA3_14,		14
	.EQU	CANFD7_RXDATA3_RXDATA3_13,		13
	.EQU	CANFD7_RXDATA3_RXDATA3_12,		12
	.EQU	CANFD7_RXDATA3_RXDATA3_11,		11
	.EQU	CANFD7_RXDATA3_RXDATA3_10,		10
	.EQU	CANFD7_RXDATA3_RXDATA3_9,		9
	.EQU	CANFD7_RXDATA3_RXDATA3_8,		8
	.EQU	CANFD7_RXDATA3_RXDATA3_7,		7
	.EQU	CANFD7_RXDATA3_RXDATA3_6,		6
	.EQU	CANFD7_RXDATA3_RXDATA3_5,		5
	.EQU	CANFD7_RXDATA3_RXDATA3_4,		4
	.EQU	CANFD7_RXDATA3_RXDATA3_3,		3
	.EQU	CANFD7_RXDATA3_RXDATA3_2,		2
	.EQU	CANFD7_RXDATA3_RXDATA3_1,		1
	.EQU	CANFD7_RXDATA3_RXDATA3_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA4,	0x40002F30
//  0x4000 2F30  CANFD7_RXDATA4   Bits-------------------------------------
	.EQU	CANFD7_RXDATA4_RXDATA4_31,		31
	.EQU	CANFD7_RXDATA4_RXDATA4_30,		30
	.EQU	CANFD7_RXDATA4_RXDATA4_29,		29
	.EQU	CANFD7_RXDATA4_RXDATA4_28,		28
	.EQU	CANFD7_RXDATA4_RXDATA4_27,		27
	.EQU	CANFD7_RXDATA4_RXDATA4_26,		26
	.EQU	CANFD7_RXDATA4_RXDATA4_25,		25
	.EQU	CANFD7_RXDATA4_RXDATA4_24,		24
	.EQU	CANFD7_RXDATA4_RXDATA4_23,		23
	.EQU	CANFD7_RXDATA4_RXDATA4_22,		22
	.EQU	CANFD7_RXDATA4_RXDATA4_21,		21
	.EQU	CANFD7_RXDATA4_RXDATA4_20,		20
	.EQU	CANFD7_RXDATA4_RXDATA4_19,		19
	.EQU	CANFD7_RXDATA4_RXDATA4_18,		18
	.EQU	CANFD7_RXDATA4_RXDATA4_17,		17
	.EQU	CANFD7_RXDATA4_RXDATA4_16,		16
	.EQU	CANFD7_RXDATA4_RXDATA4_15,		15
	.EQU	CANFD7_RXDATA4_RXDATA4_14,		14
	.EQU	CANFD7_RXDATA4_RXDATA4_13,		13
	.EQU	CANFD7_RXDATA4_RXDATA4_12,		12
	.EQU	CANFD7_RXDATA4_RXDATA4_11,		11
	.EQU	CANFD7_RXDATA4_RXDATA4_10,		10
	.EQU	CANFD7_RXDATA4_RXDATA4_9,		9
	.EQU	CANFD7_RXDATA4_RXDATA4_8,		8
	.EQU	CANFD7_RXDATA4_RXDATA4_7,		7
	.EQU	CANFD7_RXDATA4_RXDATA4_6,		6
	.EQU	CANFD7_RXDATA4_RXDATA4_5,		5
	.EQU	CANFD7_RXDATA4_RXDATA4_4,		4
	.EQU	CANFD7_RXDATA4_RXDATA4_3,		3
	.EQU	CANFD7_RXDATA4_RXDATA4_2,		2
	.EQU	CANFD7_RXDATA4_RXDATA4_1,		1
	.EQU	CANFD7_RXDATA4_RXDATA4_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA5,	0x40002F34
//  0x4000 2F34  CANFD7_RXDATA5   Bits-------------------------------------
	.EQU	CANFD7_RXDATA5_RXDATA5_31,		31
	.EQU	CANFD7_RXDATA5_RXDATA5_30,		30
	.EQU	CANFD7_RXDATA5_RXDATA5_29,		29
	.EQU	CANFD7_RXDATA5_RXDATA5_28,		28
	.EQU	CANFD7_RXDATA5_RXDATA5_27,		27
	.EQU	CANFD7_RXDATA5_RXDATA5_26,		26
	.EQU	CANFD7_RXDATA5_RXDATA5_25,		25
	.EQU	CANFD7_RXDATA5_RXDATA5_24,		24
	.EQU	CANFD7_RXDATA5_RXDATA5_23,		23
	.EQU	CANFD7_RXDATA5_RXDATA5_22,		22
	.EQU	CANFD7_RXDATA5_RXDATA5_21,		21
	.EQU	CANFD7_RXDATA5_RXDATA5_20,		20
	.EQU	CANFD7_RXDATA5_RXDATA5_19,		19
	.EQU	CANFD7_RXDATA5_RXDATA5_18,		18
	.EQU	CANFD7_RXDATA5_RXDATA5_17,		17
	.EQU	CANFD7_RXDATA5_RXDATA5_16,		16
	.EQU	CANFD7_RXDATA5_RXDATA5_15,		15
	.EQU	CANFD7_RXDATA5_RXDATA5_14,		14
	.EQU	CANFD7_RXDATA5_RXDATA5_13,		13
	.EQU	CANFD7_RXDATA5_RXDATA5_12,		12
	.EQU	CANFD7_RXDATA5_RXDATA5_11,		11
	.EQU	CANFD7_RXDATA5_RXDATA5_10,		10
	.EQU	CANFD7_RXDATA5_RXDATA5_9,		9
	.EQU	CANFD7_RXDATA5_RXDATA5_8,		8
	.EQU	CANFD7_RXDATA5_RXDATA5_7,		7
	.EQU	CANFD7_RXDATA5_RXDATA5_6,		6
	.EQU	CANFD7_RXDATA5_RXDATA5_5,		5
	.EQU	CANFD7_RXDATA5_RXDATA5_4,		4
	.EQU	CANFD7_RXDATA5_RXDATA5_3,		3
	.EQU	CANFD7_RXDATA5_RXDATA5_2,		2
	.EQU	CANFD7_RXDATA5_RXDATA5_1,		1
	.EQU	CANFD7_RXDATA5_RXDATA5_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA6,	0x40002F38
//  0x4000 2F38  CANFD7_RXDATA6   Bits-------------------------------------
	.EQU	CANFD7_RXDATA6_RXDATA6_31,		31
	.EQU	CANFD7_RXDATA6_RXDATA6_30,		30
	.EQU	CANFD7_RXDATA6_RXDATA6_29,		29
	.EQU	CANFD7_RXDATA6_RXDATA6_28,		28
	.EQU	CANFD7_RXDATA6_RXDATA6_27,		27
	.EQU	CANFD7_RXDATA6_RXDATA6_26,		26
	.EQU	CANFD7_RXDATA6_RXDATA6_25,		25
	.EQU	CANFD7_RXDATA6_RXDATA6_24,		24
	.EQU	CANFD7_RXDATA6_RXDATA6_23,		23
	.EQU	CANFD7_RXDATA6_RXDATA6_22,		22
	.EQU	CANFD7_RXDATA6_RXDATA6_21,		21
	.EQU	CANFD7_RXDATA6_RXDATA6_20,		20
	.EQU	CANFD7_RXDATA6_RXDATA6_19,		19
	.EQU	CANFD7_RXDATA6_RXDATA6_18,		18
	.EQU	CANFD7_RXDATA6_RXDATA6_17,		17
	.EQU	CANFD7_RXDATA6_RXDATA6_16,		16
	.EQU	CANFD7_RXDATA6_RXDATA6_15,		15
	.EQU	CANFD7_RXDATA6_RXDATA6_14,		14
	.EQU	CANFD7_RXDATA6_RXDATA6_13,		13
	.EQU	CANFD7_RXDATA6_RXDATA6_12,		12
	.EQU	CANFD7_RXDATA6_RXDATA6_11,		11
	.EQU	CANFD7_RXDATA6_RXDATA6_10,		10
	.EQU	CANFD7_RXDATA6_RXDATA6_9,		9
	.EQU	CANFD7_RXDATA6_RXDATA6_8,		8
	.EQU	CANFD7_RXDATA6_RXDATA6_7,		7
	.EQU	CANFD7_RXDATA6_RXDATA6_6,		6
	.EQU	CANFD7_RXDATA6_RXDATA6_5,		5
	.EQU	CANFD7_RXDATA6_RXDATA6_4,		4
	.EQU	CANFD7_RXDATA6_RXDATA6_3,		3
	.EQU	CANFD7_RXDATA6_RXDATA6_2,		2
	.EQU	CANFD7_RXDATA6_RXDATA6_1,		1
	.EQU	CANFD7_RXDATA6_RXDATA6_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA7,	0x40002F3C
//  0x4000 2F3C  CANFD7_RXDATA7   Bits-------------------------------------
	.EQU	CANFD7_RXDATA7_RXDATA7_31,		31
	.EQU	CANFD7_RXDATA7_RXDATA7_30,		30
	.EQU	CANFD7_RXDATA7_RXDATA7_29,		29
	.EQU	CANFD7_RXDATA7_RXDATA7_28,		28
	.EQU	CANFD7_RXDATA7_RXDATA7_27,		27
	.EQU	CANFD7_RXDATA7_RXDATA7_26,		26
	.EQU	CANFD7_RXDATA7_RXDATA7_25,		25
	.EQU	CANFD7_RXDATA7_RXDATA7_24,		24
	.EQU	CANFD7_RXDATA7_RXDATA7_23,		23
	.EQU	CANFD7_RXDATA7_RXDATA7_22,		22
	.EQU	CANFD7_RXDATA7_RXDATA7_21,		21
	.EQU	CANFD7_RXDATA7_RXDATA7_20,		20
	.EQU	CANFD7_RXDATA7_RXDATA7_19,		19
	.EQU	CANFD7_RXDATA7_RXDATA7_18,		18
	.EQU	CANFD7_RXDATA7_RXDATA7_17,		17
	.EQU	CANFD7_RXDATA7_RXDATA7_16,		16
	.EQU	CANFD7_RXDATA7_RXDATA7_15,		15
	.EQU	CANFD7_RXDATA7_RXDATA7_14,		14
	.EQU	CANFD7_RXDATA7_RXDATA7_13,		13
	.EQU	CANFD7_RXDATA7_RXDATA7_12,		12
	.EQU	CANFD7_RXDATA7_RXDATA7_11,		11
	.EQU	CANFD7_RXDATA7_RXDATA7_10,		10
	.EQU	CANFD7_RXDATA7_RXDATA7_9,		9
	.EQU	CANFD7_RXDATA7_RXDATA7_8,		8
	.EQU	CANFD7_RXDATA7_RXDATA7_7,		7
	.EQU	CANFD7_RXDATA7_RXDATA7_6,		6
	.EQU	CANFD7_RXDATA7_RXDATA7_5,		5
	.EQU	CANFD7_RXDATA7_RXDATA7_4,		4
	.EQU	CANFD7_RXDATA7_RXDATA7_3,		3
	.EQU	CANFD7_RXDATA7_RXDATA7_2,		2
	.EQU	CANFD7_RXDATA7_RXDATA7_1,		1
	.EQU	CANFD7_RXDATA7_RXDATA7_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA8,	0x40002F40
//  0x4000 2F40  CANFD7_RXDATA8   Bits-------------------------------------
	.EQU	CANFD7_RXDATA8_RXDATA8_31,		31
	.EQU	CANFD7_RXDATA8_RXDATA8_30,		30
	.EQU	CANFD7_RXDATA8_RXDATA8_29,		29
	.EQU	CANFD7_RXDATA8_RXDATA8_28,		28
	.EQU	CANFD7_RXDATA8_RXDATA8_27,		27
	.EQU	CANFD7_RXDATA8_RXDATA8_26,		26
	.EQU	CANFD7_RXDATA8_RXDATA8_25,		25
	.EQU	CANFD7_RXDATA8_RXDATA8_24,		24
	.EQU	CANFD7_RXDATA8_RXDATA8_23,		23
	.EQU	CANFD7_RXDATA8_RXDATA8_22,		22
	.EQU	CANFD7_RXDATA8_RXDATA8_21,		21
	.EQU	CANFD7_RXDATA8_RXDATA8_20,		20
	.EQU	CANFD7_RXDATA8_RXDATA8_19,		19
	.EQU	CANFD7_RXDATA8_RXDATA8_18,		18
	.EQU	CANFD7_RXDATA8_RXDATA8_17,		17
	.EQU	CANFD7_RXDATA8_RXDATA8_16,		16
	.EQU	CANFD7_RXDATA8_RXDATA8_15,		15
	.EQU	CANFD7_RXDATA8_RXDATA8_14,		14
	.EQU	CANFD7_RXDATA8_RXDATA8_13,		13
	.EQU	CANFD7_RXDATA8_RXDATA8_12,		12
	.EQU	CANFD7_RXDATA8_RXDATA8_11,		11
	.EQU	CANFD7_RXDATA8_RXDATA8_10,		10
	.EQU	CANFD7_RXDATA8_RXDATA8_9,		9
	.EQU	CANFD7_RXDATA8_RXDATA8_8,		8
	.EQU	CANFD7_RXDATA8_RXDATA8_7,		7
	.EQU	CANFD7_RXDATA8_RXDATA8_6,		6
	.EQU	CANFD7_RXDATA8_RXDATA8_5,		5
	.EQU	CANFD7_RXDATA8_RXDATA8_4,		4
	.EQU	CANFD7_RXDATA8_RXDATA8_3,		3
	.EQU	CANFD7_RXDATA8_RXDATA8_2,		2
	.EQU	CANFD7_RXDATA8_RXDATA8_1,		1
	.EQU	CANFD7_RXDATA8_RXDATA8_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA9,	0x40002F44
//  0x4000 2F44  CANFD7_RXDATA9   Bits-------------------------------------
	.EQU	CANFD7_RXDATA9_RXDATA9_31,		31
	.EQU	CANFD7_RXDATA9_RXDATA9_30,		30
	.EQU	CANFD7_RXDATA9_RXDATA9_29,		29
	.EQU	CANFD7_RXDATA9_RXDATA9_28,		28
	.EQU	CANFD7_RXDATA9_RXDATA9_27,		27
	.EQU	CANFD7_RXDATA9_RXDATA9_26,		26
	.EQU	CANFD7_RXDATA9_RXDATA9_25,		25
	.EQU	CANFD7_RXDATA9_RXDATA9_24,		24
	.EQU	CANFD7_RXDATA9_RXDATA9_23,		23
	.EQU	CANFD7_RXDATA9_RXDATA9_22,		22
	.EQU	CANFD7_RXDATA9_RXDATA9_21,		21
	.EQU	CANFD7_RXDATA9_RXDATA9_20,		20
	.EQU	CANFD7_RXDATA9_RXDATA9_19,		19
	.EQU	CANFD7_RXDATA9_RXDATA9_18,		18
	.EQU	CANFD7_RXDATA9_RXDATA9_17,		17
	.EQU	CANFD7_RXDATA9_RXDATA9_16,		16
	.EQU	CANFD7_RXDATA9_RXDATA9_15,		15
	.EQU	CANFD7_RXDATA9_RXDATA9_14,		14
	.EQU	CANFD7_RXDATA9_RXDATA9_13,		13
	.EQU	CANFD7_RXDATA9_RXDATA9_12,		12
	.EQU	CANFD7_RXDATA9_RXDATA9_11,		11
	.EQU	CANFD7_RXDATA9_RXDATA9_10,		10
	.EQU	CANFD7_RXDATA9_RXDATA9_9,		9
	.EQU	CANFD7_RXDATA9_RXDATA9_8,		8
	.EQU	CANFD7_RXDATA9_RXDATA9_7,		7
	.EQU	CANFD7_RXDATA9_RXDATA9_6,		6
	.EQU	CANFD7_RXDATA9_RXDATA9_5,		5
	.EQU	CANFD7_RXDATA9_RXDATA9_4,		4
	.EQU	CANFD7_RXDATA9_RXDATA9_3,		3
	.EQU	CANFD7_RXDATA9_RXDATA9_2,		2
	.EQU	CANFD7_RXDATA9_RXDATA9_1,		1
	.EQU	CANFD7_RXDATA9_RXDATA9_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA10,	0x40002F48
//  0x4000 2F48  CANFD7_RXDATA10   Bits-------------------------------------
	.EQU	CANFD7_RXDATA10_RXDATA10_31,		31
	.EQU	CANFD7_RXDATA10_RXDATA10_30,		30
	.EQU	CANFD7_RXDATA10_RXDATA10_29,		29
	.EQU	CANFD7_RXDATA10_RXDATA10_28,		28
	.EQU	CANFD7_RXDATA10_RXDATA10_27,		27
	.EQU	CANFD7_RXDATA10_RXDATA10_26,		26
	.EQU	CANFD7_RXDATA10_RXDATA10_25,		25
	.EQU	CANFD7_RXDATA10_RXDATA10_24,		24
	.EQU	CANFD7_RXDATA10_RXDATA10_23,		23
	.EQU	CANFD7_RXDATA10_RXDATA10_22,		22
	.EQU	CANFD7_RXDATA10_RXDATA10_21,		21
	.EQU	CANFD7_RXDATA10_RXDATA10_20,		20
	.EQU	CANFD7_RXDATA10_RXDATA10_19,		19
	.EQU	CANFD7_RXDATA10_RXDATA10_18,		18
	.EQU	CANFD7_RXDATA10_RXDATA10_17,		17
	.EQU	CANFD7_RXDATA10_RXDATA10_16,		16
	.EQU	CANFD7_RXDATA10_RXDATA10_15,		15
	.EQU	CANFD7_RXDATA10_RXDATA10_14,		14
	.EQU	CANFD7_RXDATA10_RXDATA10_13,		13
	.EQU	CANFD7_RXDATA10_RXDATA10_12,		12
	.EQU	CANFD7_RXDATA10_RXDATA10_11,		11
	.EQU	CANFD7_RXDATA10_RXDATA10_10,		10
	.EQU	CANFD7_RXDATA10_RXDATA10_9,		9
	.EQU	CANFD7_RXDATA10_RXDATA10_8,		8
	.EQU	CANFD7_RXDATA10_RXDATA10_7,		7
	.EQU	CANFD7_RXDATA10_RXDATA10_6,		6
	.EQU	CANFD7_RXDATA10_RXDATA10_5,		5
	.EQU	CANFD7_RXDATA10_RXDATA10_4,		4
	.EQU	CANFD7_RXDATA10_RXDATA10_3,		3
	.EQU	CANFD7_RXDATA10_RXDATA10_2,		2
	.EQU	CANFD7_RXDATA10_RXDATA10_1,		1
	.EQU	CANFD7_RXDATA10_RXDATA10_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA11,	0x40002F4C
//  0x4000 2F4C  CANFD7_RXDATA11   Bits-------------------------------------
	.EQU	CANFD7_RXDATA11_RXDATA11_31,		31
	.EQU	CANFD7_RXDATA11_RXDATA11_30,		30
	.EQU	CANFD7_RXDATA11_RXDATA11_29,		29
	.EQU	CANFD7_RXDATA11_RXDATA11_28,		28
	.EQU	CANFD7_RXDATA11_RXDATA11_27,		27
	.EQU	CANFD7_RXDATA11_RXDATA11_26,		26
	.EQU	CANFD7_RXDATA11_RXDATA11_25,		25
	.EQU	CANFD7_RXDATA11_RXDATA11_24,		24
	.EQU	CANFD7_RXDATA11_RXDATA11_23,		23
	.EQU	CANFD7_RXDATA11_RXDATA11_22,		22
	.EQU	CANFD7_RXDATA11_RXDATA11_21,		21
	.EQU	CANFD7_RXDATA11_RXDATA11_20,		20
	.EQU	CANFD7_RXDATA11_RXDATA11_19,		19
	.EQU	CANFD7_RXDATA11_RXDATA11_18,		18
	.EQU	CANFD7_RXDATA11_RXDATA11_17,		17
	.EQU	CANFD7_RXDATA11_RXDATA11_16,		16
	.EQU	CANFD7_RXDATA11_RXDATA11_15,		15
	.EQU	CANFD7_RXDATA11_RXDATA11_14,		14
	.EQU	CANFD7_RXDATA11_RXDATA11_13,		13
	.EQU	CANFD7_RXDATA11_RXDATA11_12,		12
	.EQU	CANFD7_RXDATA11_RXDATA11_11,		11
	.EQU	CANFD7_RXDATA11_RXDATA11_10,		10
	.EQU	CANFD7_RXDATA11_RXDATA11_9,		9
	.EQU	CANFD7_RXDATA11_RXDATA11_8,		8
	.EQU	CANFD7_RXDATA11_RXDATA11_7,		7
	.EQU	CANFD7_RXDATA11_RXDATA11_6,		6
	.EQU	CANFD7_RXDATA11_RXDATA11_5,		5
	.EQU	CANFD7_RXDATA11_RXDATA11_4,		4
	.EQU	CANFD7_RXDATA11_RXDATA11_3,		3
	.EQU	CANFD7_RXDATA11_RXDATA11_2,		2
	.EQU	CANFD7_RXDATA11_RXDATA11_1,		1
	.EQU	CANFD7_RXDATA11_RXDATA11_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA12,	0x40002F50
//  0x4000 2F50  CANFD7_RXDATA12   Bits-------------------------------------
	.EQU	CANFD7_RXDATA12_RXDATA12_31,		31
	.EQU	CANFD7_RXDATA12_RXDATA12_30,		30
	.EQU	CANFD7_RXDATA12_RXDATA12_29,		29
	.EQU	CANFD7_RXDATA12_RXDATA12_28,		28
	.EQU	CANFD7_RXDATA12_RXDATA12_27,		27
	.EQU	CANFD7_RXDATA12_RXDATA12_26,		26
	.EQU	CANFD7_RXDATA12_RXDATA12_25,		25
	.EQU	CANFD7_RXDATA12_RXDATA12_24,		24
	.EQU	CANFD7_RXDATA12_RXDATA12_23,		23
	.EQU	CANFD7_RXDATA12_RXDATA12_22,		22
	.EQU	CANFD7_RXDATA12_RXDATA12_21,		21
	.EQU	CANFD7_RXDATA12_RXDATA12_20,		20
	.EQU	CANFD7_RXDATA12_RXDATA12_19,		19
	.EQU	CANFD7_RXDATA12_RXDATA12_18,		18
	.EQU	CANFD7_RXDATA12_RXDATA12_17,		17
	.EQU	CANFD7_RXDATA12_RXDATA12_16,		16
	.EQU	CANFD7_RXDATA12_RXDATA12_15,		15
	.EQU	CANFD7_RXDATA12_RXDATA12_14,		14
	.EQU	CANFD7_RXDATA12_RXDATA12_13,		13
	.EQU	CANFD7_RXDATA12_RXDATA12_12,		12
	.EQU	CANFD7_RXDATA12_RXDATA12_11,		11
	.EQU	CANFD7_RXDATA12_RXDATA12_10,		10
	.EQU	CANFD7_RXDATA12_RXDATA12_9,		9
	.EQU	CANFD7_RXDATA12_RXDATA12_8,		8
	.EQU	CANFD7_RXDATA12_RXDATA12_7,		7
	.EQU	CANFD7_RXDATA12_RXDATA12_6,		6
	.EQU	CANFD7_RXDATA12_RXDATA12_5,		5
	.EQU	CANFD7_RXDATA12_RXDATA12_4,		4
	.EQU	CANFD7_RXDATA12_RXDATA12_3,		3
	.EQU	CANFD7_RXDATA12_RXDATA12_2,		2
	.EQU	CANFD7_RXDATA12_RXDATA12_1,		1
	.EQU	CANFD7_RXDATA12_RXDATA12_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA13,	0x40002F54
//  0x4000 2F54  CANFD7_RXDATA13   Bits-------------------------------------
	.EQU	CANFD7_RXDATA13_RXDATA13_31,		31
	.EQU	CANFD7_RXDATA13_RXDATA13_30,		30
	.EQU	CANFD7_RXDATA13_RXDATA13_29,		29
	.EQU	CANFD7_RXDATA13_RXDATA13_28,		28
	.EQU	CANFD7_RXDATA13_RXDATA13_27,		27
	.EQU	CANFD7_RXDATA13_RXDATA13_26,		26
	.EQU	CANFD7_RXDATA13_RXDATA13_25,		25
	.EQU	CANFD7_RXDATA13_RXDATA13_24,		24
	.EQU	CANFD7_RXDATA13_RXDATA13_23,		23
	.EQU	CANFD7_RXDATA13_RXDATA13_22,		22
	.EQU	CANFD7_RXDATA13_RXDATA13_21,		21
	.EQU	CANFD7_RXDATA13_RXDATA13_20,		20
	.EQU	CANFD7_RXDATA13_RXDATA13_19,		19
	.EQU	CANFD7_RXDATA13_RXDATA13_18,		18
	.EQU	CANFD7_RXDATA13_RXDATA13_17,		17
	.EQU	CANFD7_RXDATA13_RXDATA13_16,		16
	.EQU	CANFD7_RXDATA13_RXDATA13_15,		15
	.EQU	CANFD7_RXDATA13_RXDATA13_14,		14
	.EQU	CANFD7_RXDATA13_RXDATA13_13,		13
	.EQU	CANFD7_RXDATA13_RXDATA13_12,		12
	.EQU	CANFD7_RXDATA13_RXDATA13_11,		11
	.EQU	CANFD7_RXDATA13_RXDATA13_10,		10
	.EQU	CANFD7_RXDATA13_RXDATA13_9,		9
	.EQU	CANFD7_RXDATA13_RXDATA13_8,		8
	.EQU	CANFD7_RXDATA13_RXDATA13_7,		7
	.EQU	CANFD7_RXDATA13_RXDATA13_6,		6
	.EQU	CANFD7_RXDATA13_RXDATA13_5,		5
	.EQU	CANFD7_RXDATA13_RXDATA13_4,		4
	.EQU	CANFD7_RXDATA13_RXDATA13_3,		3
	.EQU	CANFD7_RXDATA13_RXDATA13_2,		2
	.EQU	CANFD7_RXDATA13_RXDATA13_1,		1
	.EQU	CANFD7_RXDATA13_RXDATA13_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA14,	0x40002F58
//  0x4000 2F58  CANFD7_RXDATA14   Bits-------------------------------------
	.EQU	CANFD7_RXDATA14_RXDATA14_31,		31
	.EQU	CANFD7_RXDATA14_RXDATA14_30,		30
	.EQU	CANFD7_RXDATA14_RXDATA14_29,		29
	.EQU	CANFD7_RXDATA14_RXDATA14_28,		28
	.EQU	CANFD7_RXDATA14_RXDATA14_27,		27
	.EQU	CANFD7_RXDATA14_RXDATA14_26,		26
	.EQU	CANFD7_RXDATA14_RXDATA14_25,		25
	.EQU	CANFD7_RXDATA14_RXDATA14_24,		24
	.EQU	CANFD7_RXDATA14_RXDATA14_23,		23
	.EQU	CANFD7_RXDATA14_RXDATA14_22,		22
	.EQU	CANFD7_RXDATA14_RXDATA14_21,		21
	.EQU	CANFD7_RXDATA14_RXDATA14_20,		20
	.EQU	CANFD7_RXDATA14_RXDATA14_19,		19
	.EQU	CANFD7_RXDATA14_RXDATA14_18,		18
	.EQU	CANFD7_RXDATA14_RXDATA14_17,		17
	.EQU	CANFD7_RXDATA14_RXDATA14_16,		16
	.EQU	CANFD7_RXDATA14_RXDATA14_15,		15
	.EQU	CANFD7_RXDATA14_RXDATA14_14,		14
	.EQU	CANFD7_RXDATA14_RXDATA14_13,		13
	.EQU	CANFD7_RXDATA14_RXDATA14_12,		12
	.EQU	CANFD7_RXDATA14_RXDATA14_11,		11
	.EQU	CANFD7_RXDATA14_RXDATA14_10,		10
	.EQU	CANFD7_RXDATA14_RXDATA14_9,		9
	.EQU	CANFD7_RXDATA14_RXDATA14_8,		8
	.EQU	CANFD7_RXDATA14_RXDATA14_7,		7
	.EQU	CANFD7_RXDATA14_RXDATA14_6,		6
	.EQU	CANFD7_RXDATA14_RXDATA14_5,		5
	.EQU	CANFD7_RXDATA14_RXDATA14_4,		4
	.EQU	CANFD7_RXDATA14_RXDATA14_3,		3
	.EQU	CANFD7_RXDATA14_RXDATA14_2,		2
	.EQU	CANFD7_RXDATA14_RXDATA14_1,		1
	.EQU	CANFD7_RXDATA14_RXDATA14_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA15,	0x40002F5C
//  0x4000 2F5C  CANFD7_RXDATA15   Bits-------------------------------------
	.EQU	CANFD7_RXDATA15_RXDATA15_31,		31
	.EQU	CANFD7_RXDATA15_RXDATA15_30,		30
	.EQU	CANFD7_RXDATA15_RXDATA15_29,		29
	.EQU	CANFD7_RXDATA15_RXDATA15_28,		28
	.EQU	CANFD7_RXDATA15_RXDATA15_27,		27
	.EQU	CANFD7_RXDATA15_RXDATA15_26,		26
	.EQU	CANFD7_RXDATA15_RXDATA15_25,		25
	.EQU	CANFD7_RXDATA15_RXDATA15_24,		24
	.EQU	CANFD7_RXDATA15_RXDATA15_23,		23
	.EQU	CANFD7_RXDATA15_RXDATA15_22,		22
	.EQU	CANFD7_RXDATA15_RXDATA15_21,		21
	.EQU	CANFD7_RXDATA15_RXDATA15_20,		20
	.EQU	CANFD7_RXDATA15_RXDATA15_19,		19
	.EQU	CANFD7_RXDATA15_RXDATA15_18,		18
	.EQU	CANFD7_RXDATA15_RXDATA15_17,		17
	.EQU	CANFD7_RXDATA15_RXDATA15_16,		16
	.EQU	CANFD7_RXDATA15_RXDATA15_15,		15
	.EQU	CANFD7_RXDATA15_RXDATA15_14,		14
	.EQU	CANFD7_RXDATA15_RXDATA15_13,		13
	.EQU	CANFD7_RXDATA15_RXDATA15_12,		12
	.EQU	CANFD7_RXDATA15_RXDATA15_11,		11
	.EQU	CANFD7_RXDATA15_RXDATA15_10,		10
	.EQU	CANFD7_RXDATA15_RXDATA15_9,		9
	.EQU	CANFD7_RXDATA15_RXDATA15_8,		8
	.EQU	CANFD7_RXDATA15_RXDATA15_7,		7
	.EQU	CANFD7_RXDATA15_RXDATA15_6,		6
	.EQU	CANFD7_RXDATA15_RXDATA15_5,		5
	.EQU	CANFD7_RXDATA15_RXDATA15_4,		4
	.EQU	CANFD7_RXDATA15_RXDATA15_3,		3
	.EQU	CANFD7_RXDATA15_RXDATA15_2,		2
	.EQU	CANFD7_RXDATA15_RXDATA15_1,		1
	.EQU	CANFD7_RXDATA15_RXDATA15_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA16,	0x40002F60
//  0x4000 2F60  CANFD7_RXDATA16   Bits-------------------------------------
	.EQU	CANFD7_RXDATA16_RXDATA16_31,		31
	.EQU	CANFD7_RXDATA16_RXDATA16_30,		30
	.EQU	CANFD7_RXDATA16_RXDATA16_29,		29
	.EQU	CANFD7_RXDATA16_RXDATA16_28,		28
	.EQU	CANFD7_RXDATA16_RXDATA16_27,		27
	.EQU	CANFD7_RXDATA16_RXDATA16_26,		26
	.EQU	CANFD7_RXDATA16_RXDATA16_25,		25
	.EQU	CANFD7_RXDATA16_RXDATA16_24,		24
	.EQU	CANFD7_RXDATA16_RXDATA16_23,		23
	.EQU	CANFD7_RXDATA16_RXDATA16_22,		22
	.EQU	CANFD7_RXDATA16_RXDATA16_21,		21
	.EQU	CANFD7_RXDATA16_RXDATA16_20,		20
	.EQU	CANFD7_RXDATA16_RXDATA16_19,		19
	.EQU	CANFD7_RXDATA16_RXDATA16_18,		18
	.EQU	CANFD7_RXDATA16_RXDATA16_17,		17
	.EQU	CANFD7_RXDATA16_RXDATA16_16,		16
	.EQU	CANFD7_RXDATA16_RXDATA16_15,		15
	.EQU	CANFD7_RXDATA16_RXDATA16_14,		14
	.EQU	CANFD7_RXDATA16_RXDATA16_13,		13
	.EQU	CANFD7_RXDATA16_RXDATA16_12,		12
	.EQU	CANFD7_RXDATA16_RXDATA16_11,		11
	.EQU	CANFD7_RXDATA16_RXDATA16_10,		10
	.EQU	CANFD7_RXDATA16_RXDATA16_9,		9
	.EQU	CANFD7_RXDATA16_RXDATA16_8,		8
	.EQU	CANFD7_RXDATA16_RXDATA16_7,		7
	.EQU	CANFD7_RXDATA16_RXDATA16_6,		6
	.EQU	CANFD7_RXDATA16_RXDATA16_5,		5
	.EQU	CANFD7_RXDATA16_RXDATA16_4,		4
	.EQU	CANFD7_RXDATA16_RXDATA16_3,		3
	.EQU	CANFD7_RXDATA16_RXDATA16_2,		2
	.EQU	CANFD7_RXDATA16_RXDATA16_1,		1
	.EQU	CANFD7_RXDATA16_RXDATA16_0,		0
//  register-------------------------------------
	.EQU	CANFD7_RXDATA17,	0x40002F64
//  0x4000 2F64  CANFD7_RXDATA17   Bits-------------------------------------
	.EQU	CANFD7_RXDATA17_RXDATA17_31,		31
	.EQU	CANFD7_RXDATA17_RXDATA17_30,		30
	.EQU	CANFD7_RXDATA17_RXDATA17_29,		29
	.EQU	CANFD7_RXDATA17_RXDATA17_28,		28
	.EQU	CANFD7_RXDATA17_RXDATA17_27,		27
	.EQU	CANFD7_RXDATA17_RXDATA17_26,		26
	.EQU	CANFD7_RXDATA17_RXDATA17_25,		25
	.EQU	CANFD7_RXDATA17_RXDATA17_24,		24
	.EQU	CANFD7_RXDATA17_RXDATA17_23,		23
	.EQU	CANFD7_RXDATA17_RXDATA17_22,		22
	.EQU	CANFD7_RXDATA17_RXDATA17_21,		21
	.EQU	CANFD7_RXDATA17_RXDATA17_20,		20
	.EQU	CANFD7_RXDATA17_RXDATA17_19,		19
	.EQU	CANFD7_RXDATA17_RXDATA17_18,		18
	.EQU	CANFD7_RXDATA17_RXDATA17_17,		17
	.EQU	CANFD7_RXDATA17_RXDATA17_16,		16
	.EQU	CANFD7_RXDATA17_RXDATA17_15,		15
	.EQU	CANFD7_RXDATA17_RXDATA17_14,		14
	.EQU	CANFD7_RXDATA17_RXDATA17_13,		13
	.EQU	CANFD7_RXDATA17_RXDATA17_12,		12
	.EQU	CANFD7_RXDATA17_RXDATA17_11,		11
	.EQU	CANFD7_RXDATA17_RXDATA17_10,		10
	.EQU	CANFD7_RXDATA17_RXDATA17_9,		9
	.EQU	CANFD7_RXDATA17_RXDATA17_8,		8
	.EQU	CANFD7_RXDATA17_RXDATA17_7,		7
	.EQU	CANFD7_RXDATA17_RXDATA17_6,		6
	.EQU	CANFD7_RXDATA17_RXDATA17_5,		5
	.EQU	CANFD7_RXDATA17_RXDATA17_4,		4
	.EQU	CANFD7_RXDATA17_RXDATA17_3,		3
	.EQU	CANFD7_RXDATA17_RXDATA17_2,		2
	.EQU	CANFD7_RXDATA17_RXDATA17_1,		1
	.EQU	CANFD7_RXDATA17_RXDATA17_0,		0
//  register-------------------------------------
	.EQU	CANFD7_TIMER,	0x40002F68
//  0x4000 2F68  CANFD7_TIMER   Bits-------------------------------------
	.EQU	CANFD7_TIMER_CANTIMER15,		15
	.EQU	CANFD7_TIMER_CANTIMER14,		14
	.EQU	CANFD7_TIMER_CANTIMER13,		13
	.EQU	CANFD7_TIMER_CANTIMER12,		12
	.EQU	CANFD7_TIMER_CANTIMER11,		11
	.EQU	CANFD7_TIMER_CANTIMER10,		10
	.EQU	CANFD7_TIMER_CANTIMER9,		9
	.EQU	CANFD7_TIMER_CANTIMER8,		8
	.EQU	CANFD7_TIMER_CANTIMER7,		7
	.EQU	CANFD7_TIMER_CANTIMER6,		6
	.EQU	CANFD7_TIMER_CANTIMER5,		5
	.EQU	CANFD7_TIMER_CANTIMER4,		4
	.EQU	CANFD7_TIMER_CANTIMER3,		3
	.EQU	CANFD7_TIMER_CANTIMER2,		2
	.EQU	CANFD7_TIMER_CANTIMER1,		1
	.EQU	CANFD7_TIMER_CANTIMER0,		0
//  register-------------------------------------
	.EQU	CANFD7_CRC,	0x40002F6C
//  0x4000 2F6C  CANFD7_CRC   Bits-------------------------------------
	.EQU	CANFD7_CRC_STUFFCNT3,		31
	.EQU	CANFD7_CRC_STUFFCNT2,		30
	.EQU	CANFD7_CRC_STUFFCNT1,		29
	.EQU	CANFD7_CRC_STUFFCNT0,		28
	.EQU	CANFD7_CRC_CRC20,		20
	.EQU	CANFD7_CRC_CRC19,		19
	.EQU	CANFD7_CRC_CRC18,		18
	.EQU	CANFD7_CRC_CRC17,		17
	.EQU	CANFD7_CRC_CRC16,		16
	.EQU	CANFD7_CRC_CRC15,		15
	.EQU	CANFD7_CRC_CRC14,		14
	.EQU	CANFD7_CRC_CRC13,		13
	.EQU	CANFD7_CRC_CRC12,		12
	.EQU	CANFD7_CRC_CRC11,		11
	.EQU	CANFD7_CRC_CRC10,		10
	.EQU	CANFD7_CRC_CRC9,		9
	.EQU	CANFD7_CRC_CRC8,		8
	.EQU	CANFD7_CRC_CRC7,		7
	.EQU	CANFD7_CRC_CRC6,		6
	.EQU	CANFD7_CRC_CRC5,		5
	.EQU	CANFD7_CRC_CRC4,		4
	.EQU	CANFD7_CRC_CRC3,		3
	.EQU	CANFD7_CRC_CRC2,		2
	.EQU	CANFD7_CRC_CRC1,		1
	.EQU	CANFD7_CRC_CRC0,		0
//  register-------------------------------------
	.EQU	CANFD7_CTLR1,	0x40002F74
//  0x4000 2F74  CANFD7_CTLR1   Bits-------------------------------------
	.EQU	CANFD7_CTLR1_TRGMBEN,		31
	.EQU	CANFD7_CTLR1_TRGMBSEL6,		30
	.EQU	CANFD7_CTLR1_TRGMBSEL5,		29
	.EQU	CANFD7_CTLR1_TRGMBSEL4,		28
	.EQU	CANFD7_CTLR1_TRGMBSEL3,		27
	.EQU	CANFD7_CTLR1_TRGMBSEL2,		26
	.EQU	CANFD7_CTLR1_TRGMBSEL1,		25
	.EQU	CANFD7_CTLR1_TRGMBSEL0,		24
	.EQU	CANFD7_CTLR1_TRGNUM3,		23
	.EQU	CANFD7_CTLR1_TRGNUM2,		22
	.EQU	CANFD7_CTLR1_TRGNUM1,		21
	.EQU	CANFD7_CTLR1_TRGNUM0,		20
	.EQU	CANFD7_CTLR1_CKMODE,		19
	.EQU	CANFD7_CTLR1_BOFFREC,		18
	.EQU	CANFD7_CTLR1_LBSEL,		17
	.EQU	CANFD7_CTLR1_ARBSTART,		16
	.EQU	CANFD7_CTLR1_ARBMS,		15
	.EQU	CANFD7_CTLR1_MBMSKEN,		14
	.EQU	CANFD7_CTLR1_MATCHMS,		13
	.EQU	CANFD7_CTLR1_MBNUM,		12
	.EQU	CANFD7_CTLR1_TSYN,		11
	.EQU	CANFD7_CTLR1_FTCLKS,		10
	.EQU	CANFD7_CTLR1_ST,		9
	.EQU	CANFD7_CTLR1_RXMUX6,		8
	.EQU	CANFD7_CTLR1_RXMUX5,		7
	.EQU	CANFD7_CTLR1_RXMUX4,		6
	.EQU	CANFD7_CTLR1_RXMUX3,		5
	.EQU	CANFD7_CTLR1_RXMUX2,		4
	.EQU	CANFD7_CTLR1_RXMUX1,		3
	.EQU	CANFD7_CTLR1_RXMUX0,		2
	.EQU	CANFD7_CTLR1_AMCKS1,		1
	.EQU	CANFD7_CTLR1_AMCKS0,		0
//  register-------------------------------------
	.EQU	CANFD7_AMSTA,	0x40002F78
//  0x4000 2F78  CANFD7_AMSTA   Bits-------------------------------------
	.EQU	CANFD7_AMSTA_TXCODE3,		31
	.EQU	CANFD7_AMSTA_TXCODE2,		30
	.EQU	CANFD7_AMSTA_TXCODE1,		29
	.EQU	CANFD7_AMSTA_TXCODE0,		28
	.EQU	CANFD7_AMSTA_ARBSTA1,		27
	.EQU	CANFD7_AMSTA_ARBSTA0,		26
	.EQU	CANFD7_AMSTA_ARBWINNER9,		25
	.EQU	CANFD7_AMSTA_ARBWINNER8,		24
	.EQU	CANFD7_AMSTA_ARBWINNER7,		23
	.EQU	CANFD7_AMSTA_ARBWINNER6,		22
	.EQU	CANFD7_AMSTA_ARBWINNER5,		21
	.EQU	CANFD7_AMSTA_ARBWINNER4,		20
	.EQU	CANFD7_AMSTA_ARBWINNER3,		19
	.EQU	CANFD7_AMSTA_ARBWINNER2,		18
	.EQU	CANFD7_AMSTA_ARBWINNER1,		17
	.EQU	CANFD7_AMSTA_ARBWINNER0,		16
	.EQU	CANFD7_AMSTA_BETEN,		15
	.EQU	CANFD7_AMSTA_RTRMEN,		14
	.EQU	CANFD7_AMSTA_IDSELEN,		13
	.EQU	CANFD7_AMSTA_RELRXALL,		12
	.EQU	CANFD7_AMSTA_ROPSTA,		11
	.EQU	CANFD7_AMSTA_MATSTA,		10
	.EQU	CANFD7_AMSTA_MATWINNER9,		9
	.EQU	CANFD7_AMSTA_MATWINNER8,		8
	.EQU	CANFD7_AMSTA_MATWINNER7,		7
	.EQU	CANFD7_AMSTA_MATWINNER6,		6
	.EQU	CANFD7_AMSTA_MATWINNER5,		5
	.EQU	CANFD7_AMSTA_MATWINNER4,		4
	.EQU	CANFD7_AMSTA_MATWINNER3,		3
	.EQU	CANFD7_AMSTA_MATWINNER2,		2
	.EQU	CANFD7_AMSTA_MATWINNER1,		1
	.EQU	CANFD7_AMSTA_MATWINNER0,		0
//  register-------------------------------------
	.EQU	CANFD7_TXDATA,	0x40002F7C
//  0x4000 2F7C  CANFD7_TXDATA   Bits-------------------------------------
	.EQU	CANFD7_TXDATA_TXDATA31,		31
	.EQU	CANFD7_TXDATA_TXDATA30,		30
	.EQU	CANFD7_TXDATA_TXDATA29,		29
	.EQU	CANFD7_TXDATA_TXDATA28,		28
	.EQU	CANFD7_TXDATA_TXDATA27,		27
	.EQU	CANFD7_TXDATA_TXDATA26,		26
	.EQU	CANFD7_TXDATA_TXDATA25,		25
	.EQU	CANFD7_TXDATA_TXDATA24,		24
	.EQU	CANFD7_TXDATA_TXDATA23,		23
	.EQU	CANFD7_TXDATA_TXDATA22,		22
	.EQU	CANFD7_TXDATA_TXDATA21,		21
	.EQU	CANFD7_TXDATA_TXDATA20,		20
	.EQU	CANFD7_TXDATA_TXDATA19,		19
	.EQU	CANFD7_TXDATA_TXDATA18,		18
	.EQU	CANFD7_TXDATA_TXDATA17,		17
	.EQU	CANFD7_TXDATA_TXDATA16,		16
	.EQU	CANFD7_TXDATA_TXDATA15,		15
	.EQU	CANFD7_TXDATA_TXDATA14,		14
	.EQU	CANFD7_TXDATA_TXDATA13,		13
	.EQU	CANFD7_TXDATA_TXDATA12,		12
	.EQU	CANFD7_TXDATA_TXDATA11,		11
	.EQU	CANFD7_TXDATA_TXDATA10,		10
	.EQU	CANFD7_TXDATA_TXDATA9,		9
	.EQU	CANFD7_TXDATA_TXDATA8,		8
	.EQU	CANFD7_TXDATA_TXDATA7,		7
	.EQU	CANFD7_TXDATA_TXDATA6,		6
	.EQU	CANFD7_TXDATA_TXDATA5,		5
	.EQU	CANFD7_TXDATA_TXDATA4,		4
	.EQU	CANFD7_TXDATA_TXDATA3,		3
	.EQU	CANFD7_TXDATA_TXDATA2,		2
	.EQU	CANFD7_TXDATA_TXDATA1,		1
	.EQU	CANFD7_TXDATA_TXDATA0,		0
//  register-------------------------------------
	.EQU	IWDT_CTL,		0x40001200
//  0x4000 1200  IWDT_CTL   Bits-------------------------------------
	.EQU	IWDT_CTL_IWDTEN,		31
	.EQU	IWDT_CTL_CLKS,		29
	.EQU	IWDT_CTL_IWDTOVF11,		15
	.EQU	IWDT_CTL_IWDTOVF10,		14
	.EQU	IWDT_CTL_IWDTOVF9,		13
	.EQU	IWDT_CTL_IWDTOVF8,		12
	.EQU	IWDT_CTL_IWDTOVF7,		11
	.EQU	IWDT_CTL_IWDTOVF6,		10
	.EQU	IWDT_CTL_IWDTOVF5,		9
	.EQU	IWDT_CTL_IWDTOVF4,		8
	.EQU	IWDT_CTL_IWDTOVF3,		7
	.EQU	IWDT_CTL_IWDTOVF2,		6
	.EQU	IWDT_CTL_IWDTOVF1,		5
	.EQU	IWDT_CTL_IWDTOVF0,		4
	.EQU	IWDT_CTL_IWDTPS3,		3
	.EQU	IWDT_CTL_IWDTPS2,		2
	.EQU	IWDT_CTL_IWDTPS1,		1
	.EQU	IWDT_CTL_IWDTPS0,		0
//  register-------------------------------------
	.EQU	IWDT_FD,		0x40001204
//  0x4000 1204  IWDT_FD   Bits-------------------------------------
	.EQU	IWDT_FD_IWDTFD31,		31
	.EQU	IWDT_FD_IWDTFD30,		30
	.EQU	IWDT_FD_IWDTFD29,		29
	.EQU	IWDT_FD_IWDTFD28,		28
	.EQU	IWDT_FD_IWDTFD27,		27
	.EQU	IWDT_FD_IWDTFD26,		26
	.EQU	IWDT_FD_IWDTFD25,		25
	.EQU	IWDT_FD_IWDTFD24,		24
	.EQU	IWDT_FD_IWDTFD23,		23
	.EQU	IWDT_FD_IWDTFD22,		22
	.EQU	IWDT_FD_IWDTFD21,		21
	.EQU	IWDT_FD_IWDTFD20,		20
	.EQU	IWDT_FD_IWDTFD19,		19
	.EQU	IWDT_FD_IWDTFD18,		18
	.EQU	IWDT_FD_IWDTFD17,		17
	.EQU	IWDT_FD_IWDTFD16,		16
	.EQU	IWDT_FD_IWDTFD15,		15
	.EQU	IWDT_FD_IWDTFD14,		14
	.EQU	IWDT_FD_IWDTFD13,		13
	.EQU	IWDT_FD_IWDTFD12,		12
	.EQU	IWDT_FD_IWDTFD11,		11
	.EQU	IWDT_FD_IWDTFD10,		10
	.EQU	IWDT_FD_IWDTFD9,		9
	.EQU	IWDT_FD_IWDTFD8,		8
	.EQU	IWDT_FD_IWDTFD7,		7
	.EQU	IWDT_FD_IWDTFD6,		6
	.EQU	IWDT_FD_IWDTFD5,		5
	.EQU	IWDT_FD_IWDTFD4,		4
	.EQU	IWDT_FD_IWDTFD3,		3
	.EQU	IWDT_FD_IWDTFD2,		2
	.EQU	IWDT_FD_IWDTFD1,		1
	.EQU	IWDT_FD_IWDTFD0,		0
//  register-------------------------------------
	.EQU	WWDT_CTL,		0x40001280
//  0x4000 1280  WWDT_CTL   Bits-------------------------------------
	.EQU	WWDT_CTL_WWDTIC,		15
	.EQU	WWDT_CTL_WW6,		14
	.EQU	WWDT_CTL_WW5,		13
	.EQU	WWDT_CTL_WW4,		12
	.EQU	WWDT_CTL_WW3,		11
	.EQU	WWDT_CTL_WW2,		10
	.EQU	WWDT_CTL_WW1,		9
	.EQU	WWDT_CTL_WW0,		8
	.EQU	WWDT_CTL_WPS4,		7
	.EQU	WWDT_CTL_WPS3,		6
	.EQU	WWDT_CTL_WPS2,		5
	.EQU	WWDT_CTL_WPS1,		4
	.EQU	WWDT_CTL_WPS0,		3
	.EQU	WWDT_CTL_WWDTIF,		2
	.EQU	WWDT_CTL_WWDTIE,		1
	.EQU	WWDT_CTL_WWDTEN,		0
//  register-------------------------------------
	.EQU	WWDT_CNT,		0x40001284
//  0x4000 1284  WWDT_CNT   Bits-------------------------------------
	.EQU	WWDT_CNT_WT6,		6
	.EQU	WWDT_CNT_WT5,		5
	.EQU	WWDT_CNT_WT4,		4
	.EQU	WWDT_CNT_WT3,		3
	.EQU	WWDT_CNT_WT2,		2
	.EQU	WWDT_CNT_WT1,		1
	.EQU	WWDT_CNT_WT0,		0
//  register-------------------------------------
	.EQU	WWDT_CTL1,		0x40001288
//  0x4000 1288  WWDT_CTL1   Bits-------------------------------------
	.EQU	WWDT_CTL1_CLKS1,		1
	.EQU	WWDT_CTL1_CLKS0,		0
//  register-------------------------------------
	.EQU	BKP_CTL,		0x40001400
//  0x4000 1400  BKP_CTL   Bits-------------------------------------
	.EQU	BKP_CTL_BKDRST,		31
	.EQU	BKP_CTL_TAMP3LVL,		22
	.EQU	BKP_CTL_TAMP2LVL,		21
	.EQU	BKP_CTL_TAMP1LVL,		20
	.EQU	BKP_CTL_TAMP3EN,		18
	.EQU	BKP_CTL_TAMP2EN,		17
	.EQU	BKP_CTL_TAMP1EN,		16
	.EQU	BKP_CTL_SYNC,		4
	.EQU	BKP_CTL_SAMCLKS,		3
	.EQU	BKP_CTL_EXTLFBYP,		2
	.EQU	BKP_CTL_EXTHFBYP,		1
	.EQU	BKP_CTL_EXTLFEN,		0
//  register-------------------------------------
	.EQU	BKP_INT,		0x40001404
//  0x4000 1404  BKP_INT   Bits-------------------------------------
	.EQU	BKP_INT_TAMP3IF,		18
	.EQU	BKP_INT_TAMP2IF,		17
	.EQU	BKP_INT_TAMP1IF,		16
	.EQU	BKP_INT_TAMP3IE,		10
	.EQU	BKP_INT_TAMP2IE,		9
	.EQU	BKP_INT_TAMP1IE,		8
	.EQU	BKP_INT_TAMP3IC,		2
	.EQU	BKP_INT_TAMP2IC,		1
	.EQU	BKP_INT_TAMP1IC,		0
//  register-------------------------------------
	.EQU	BKP_DATA0,		0x40001440
//  0x4000 1440  BKP_DATA0   Bits-------------------------------------
	.EQU	BKP_DATA0_BKPDATA31,		31
	.EQU	BKP_DATA0_BKPDATA30,		30
	.EQU	BKP_DATA0_BKPDATA29,		29
	.EQU	BKP_DATA0_BKPDATA28,		28
	.EQU	BKP_DATA0_BKPDATA27,		27
	.EQU	BKP_DATA0_BKPDATA26,		26
	.EQU	BKP_DATA0_BKPDATA25,		25
	.EQU	BKP_DATA0_BKPDATA24,		24
	.EQU	BKP_DATA0_BKPDATA23,		23
	.EQU	BKP_DATA0_BKPDATA22,		22
	.EQU	BKP_DATA0_BKPDATA21,		21
	.EQU	BKP_DATA0_BKPDATA20,		20
	.EQU	BKP_DATA0_BKPDATA19,		19
	.EQU	BKP_DATA0_BKPDATA18,		18
	.EQU	BKP_DATA0_BKPDATA17,		17
	.EQU	BKP_DATA0_BKPDATA16,		16
	.EQU	BKP_DATA0_BKPDATA15,		15
	.EQU	BKP_DATA0_BKPDATA14,		14
	.EQU	BKP_DATA0_BKPDATA13,		13
	.EQU	BKP_DATA0_BKPDATA12,		12
	.EQU	BKP_DATA0_BKPDATA11,		11
	.EQU	BKP_DATA0_BKPDATA10,		10
	.EQU	BKP_DATA0_BKPDATA9,		9
	.EQU	BKP_DATA0_BKPDATA8,		8
	.EQU	BKP_DATA0_BKPDATA7,		7
	.EQU	BKP_DATA0_BKPDATA6,		6
	.EQU	BKP_DATA0_BKPDATA5,		5
	.EQU	BKP_DATA0_BKPDATA4,		4
	.EQU	BKP_DATA0_BKPDATA3,		3
	.EQU	BKP_DATA0_BKPDATA2,		2
	.EQU	BKP_DATA0_BKPDATA1,		1
	.EQU	BKP_DATA0_BKPDATA0,		0
//  register-------------------------------------
	.EQU	BKP_DATA1,		0x40001444
//  0x4000 1444  BKP_DATA1   Bits-------------------------------------
	.EQU	BKP_DATA1_BKPDATA31,		31
	.EQU	BKP_DATA1_BKPDATA30,		30
	.EQU	BKP_DATA1_BKPDATA29,		29
	.EQU	BKP_DATA1_BKPDATA28,		28
	.EQU	BKP_DATA1_BKPDATA27,		27
	.EQU	BKP_DATA1_BKPDATA26,		26
	.EQU	BKP_DATA1_BKPDATA25,		25
	.EQU	BKP_DATA1_BKPDATA24,		24
	.EQU	BKP_DATA1_BKPDATA23,		23
	.EQU	BKP_DATA1_BKPDATA22,		22
	.EQU	BKP_DATA1_BKPDATA21,		21
	.EQU	BKP_DATA1_BKPDATA20,		20
	.EQU	BKP_DATA1_BKPDATA19,		19
	.EQU	BKP_DATA1_BKPDATA18,		18
	.EQU	BKP_DATA1_BKPDATA17,		17
	.EQU	BKP_DATA1_BKPDATA16,		16
	.EQU	BKP_DATA1_BKPDATA15,		15
	.EQU	BKP_DATA1_BKPDATA14,		14
	.EQU	BKP_DATA1_BKPDATA13,		13
	.EQU	BKP_DATA1_BKPDATA12,		12
	.EQU	BKP_DATA1_BKPDATA11,		11
	.EQU	BKP_DATA1_BKPDATA10,		10
	.EQU	BKP_DATA1_BKPDATA9,		9
	.EQU	BKP_DATA1_BKPDATA8,		8
	.EQU	BKP_DATA1_BKPDATA7,		7
	.EQU	BKP_DATA1_BKPDATA6,		6
	.EQU	BKP_DATA1_BKPDATA5,		5
	.EQU	BKP_DATA1_BKPDATA4,		4
	.EQU	BKP_DATA1_BKPDATA3,		3
	.EQU	BKP_DATA1_BKPDATA2,		2
	.EQU	BKP_DATA1_BKPDATA1,		1
	.EQU	BKP_DATA1_BKPDATA0,		0
//  register-------------------------------------
	.EQU	BKP_DATA2,		0x40001448
//  0x4000 1448  BKP_DATA2   Bits-------------------------------------
	.EQU	BKP_DATA2_BKPDATA31,		31
	.EQU	BKP_DATA2_BKPDATA30,		30
	.EQU	BKP_DATA2_BKPDATA29,		29
	.EQU	BKP_DATA2_BKPDATA28,		28
	.EQU	BKP_DATA2_BKPDATA27,		27
	.EQU	BKP_DATA2_BKPDATA26,		26
	.EQU	BKP_DATA2_BKPDATA25,		25
	.EQU	BKP_DATA2_BKPDATA24,		24
	.EQU	BKP_DATA2_BKPDATA23,		23
	.EQU	BKP_DATA2_BKPDATA22,		22
	.EQU	BKP_DATA2_BKPDATA21,		21
	.EQU	BKP_DATA2_BKPDATA20,		20
	.EQU	BKP_DATA2_BKPDATA19,		19
	.EQU	BKP_DATA2_BKPDATA18,		18
	.EQU	BKP_DATA2_BKPDATA17,		17
	.EQU	BKP_DATA2_BKPDATA16,		16
	.EQU	BKP_DATA2_BKPDATA15,		15
	.EQU	BKP_DATA2_BKPDATA14,		14
	.EQU	BKP_DATA2_BKPDATA13,		13
	.EQU	BKP_DATA2_BKPDATA12,		12
	.EQU	BKP_DATA2_BKPDATA11,		11
	.EQU	BKP_DATA2_BKPDATA10,		10
	.EQU	BKP_DATA2_BKPDATA9,		9
	.EQU	BKP_DATA2_BKPDATA8,		8
	.EQU	BKP_DATA2_BKPDATA7,		7
	.EQU	BKP_DATA2_BKPDATA6,		6
	.EQU	BKP_DATA2_BKPDATA5,		5
	.EQU	BKP_DATA2_BKPDATA4,		4
	.EQU	BKP_DATA2_BKPDATA3,		3
	.EQU	BKP_DATA2_BKPDATA2,		2
	.EQU	BKP_DATA2_BKPDATA1,		1
	.EQU	BKP_DATA2_BKPDATA0,		0
//  register-------------------------------------
	.EQU	BKP_DATA3,		0x4000144C
//  0x4000 144C  BKP_DATA3   Bits-------------------------------------
	.EQU	BKP_DATA3_BKPDATA31,		31
	.EQU	BKP_DATA3_BKPDATA30,		30
	.EQU	BKP_DATA3_BKPDATA29,		29
	.EQU	BKP_DATA3_BKPDATA28,		28
	.EQU	BKP_DATA3_BKPDATA27,		27
	.EQU	BKP_DATA3_BKPDATA26,		26
	.EQU	BKP_DATA3_BKPDATA25,		25
	.EQU	BKP_DATA3_BKPDATA24,		24
	.EQU	BKP_DATA3_BKPDATA23,		23
	.EQU	BKP_DATA3_BKPDATA22,		22
	.EQU	BKP_DATA3_BKPDATA21,		21
	.EQU	BKP_DATA3_BKPDATA20,		20
	.EQU	BKP_DATA3_BKPDATA19,		19
	.EQU	BKP_DATA3_BKPDATA18,		18
	.EQU	BKP_DATA3_BKPDATA17,		17
	.EQU	BKP_DATA3_BKPDATA16,		16
	.EQU	BKP_DATA3_BKPDATA15,		15
	.EQU	BKP_DATA3_BKPDATA14,		14
	.EQU	BKP_DATA3_BKPDATA13,		13
	.EQU	BKP_DATA3_BKPDATA12,		12
	.EQU	BKP_DATA3_BKPDATA11,		11
	.EQU	BKP_DATA3_BKPDATA10,		10
	.EQU	BKP_DATA3_BKPDATA9,		9
	.EQU	BKP_DATA3_BKPDATA8,		8
	.EQU	BKP_DATA3_BKPDATA7,		7
	.EQU	BKP_DATA3_BKPDATA6,		6
	.EQU	BKP_DATA3_BKPDATA5,		5
	.EQU	BKP_DATA3_BKPDATA4,		4
	.EQU	BKP_DATA3_BKPDATA3,		3
	.EQU	BKP_DATA3_BKPDATA2,		2
	.EQU	BKP_DATA3_BKPDATA1,		1
	.EQU	BKP_DATA3_BKPDATA0,		0
//  register-------------------------------------
	.EQU	BKP_DATA4,		0x40001450
//  0x4000 1450  BKP_DATA4   Bits-------------------------------------
	.EQU	BKP_DATA4_BKPDATA31,		31
	.EQU	BKP_DATA4_BKPDATA30,		30
	.EQU	BKP_DATA4_BKPDATA29,		29
	.EQU	BKP_DATA4_BKPDATA28,		28
	.EQU	BKP_DATA4_BKPDATA27,		27
	.EQU	BKP_DATA4_BKPDATA26,		26
	.EQU	BKP_DATA4_BKPDATA25,		25
	.EQU	BKP_DATA4_BKPDATA24,		24
	.EQU	BKP_DATA4_BKPDATA23,		23
	.EQU	BKP_DATA4_BKPDATA22,		22
	.EQU	BKP_DATA4_BKPDATA21,		21
	.EQU	BKP_DATA4_BKPDATA20,		20
	.EQU	BKP_DATA4_BKPDATA19,		19
	.EQU	BKP_DATA4_BKPDATA18,		18
	.EQU	BKP_DATA4_BKPDATA17,		17
	.EQU	BKP_DATA4_BKPDATA16,		16
	.EQU	BKP_DATA4_BKPDATA15,		15
	.EQU	BKP_DATA4_BKPDATA14,		14
	.EQU	BKP_DATA4_BKPDATA13,		13
	.EQU	BKP_DATA4_BKPDATA12,		12
	.EQU	BKP_DATA4_BKPDATA11,		11
	.EQU	BKP_DATA4_BKPDATA10,		10
	.EQU	BKP_DATA4_BKPDATA9,		9
	.EQU	BKP_DATA4_BKPDATA8,		8
	.EQU	BKP_DATA4_BKPDATA7,		7
	.EQU	BKP_DATA4_BKPDATA6,		6
	.EQU	BKP_DATA4_BKPDATA5,		5
	.EQU	BKP_DATA4_BKPDATA4,		4
	.EQU	BKP_DATA4_BKPDATA3,		3
	.EQU	BKP_DATA4_BKPDATA2,		2
	.EQU	BKP_DATA4_BKPDATA1,		1
	.EQU	BKP_DATA4_BKPDATA0,		0
//  register-------------------------------------
	.EQU	BKP_DATA5,		0x40001454
//  0x4000 1454  BKP_DATA5   Bits-------------------------------------
	.EQU	BKP_DATA5_BKPDATA31,		31
	.EQU	BKP_DATA5_BKPDATA30,		30
	.EQU	BKP_DATA5_BKPDATA29,		29
	.EQU	BKP_DATA5_BKPDATA28,		28
	.EQU	BKP_DATA5_BKPDATA27,		27
	.EQU	BKP_DATA5_BKPDATA26,		26
	.EQU	BKP_DATA5_BKPDATA25,		25
	.EQU	BKP_DATA5_BKPDATA24,		24
	.EQU	BKP_DATA5_BKPDATA23,		23
	.EQU	BKP_DATA5_BKPDATA22,		22
	.EQU	BKP_DATA5_BKPDATA21,		21
	.EQU	BKP_DATA5_BKPDATA20,		20
	.EQU	BKP_DATA5_BKPDATA19,		19
	.EQU	BKP_DATA5_BKPDATA18,		18
	.EQU	BKP_DATA5_BKPDATA17,		17
	.EQU	BKP_DATA5_BKPDATA16,		16
	.EQU	BKP_DATA5_BKPDATA15,		15
	.EQU	BKP_DATA5_BKPDATA14,		14
	.EQU	BKP_DATA5_BKPDATA13,		13
	.EQU	BKP_DATA5_BKPDATA12,		12
	.EQU	BKP_DATA5_BKPDATA11,		11
	.EQU	BKP_DATA5_BKPDATA10,		10
	.EQU	BKP_DATA5_BKPDATA9,		9
	.EQU	BKP_DATA5_BKPDATA8,		8
	.EQU	BKP_DATA5_BKPDATA7,		7
	.EQU	BKP_DATA5_BKPDATA6,		6
	.EQU	BKP_DATA5_BKPDATA5,		5
	.EQU	BKP_DATA5_BKPDATA4,		4
	.EQU	BKP_DATA5_BKPDATA3,		3
	.EQU	BKP_DATA5_BKPDATA2,		2
	.EQU	BKP_DATA5_BKPDATA1,		1
	.EQU	BKP_DATA5_BKPDATA0,		0
//  register-------------------------------------
	.EQU	BKP_DATA6,		0x40001458
//  0x4000 1458  BKP_DATA6   Bits-------------------------------------
	.EQU	BKP_DATA6_BKPDATA31,		31
	.EQU	BKP_DATA6_BKPDATA30,		30
	.EQU	BKP_DATA6_BKPDATA29,		29
	.EQU	BKP_DATA6_BKPDATA28,		28
	.EQU	BKP_DATA6_BKPDATA27,		27
	.EQU	BKP_DATA6_BKPDATA26,		26
	.EQU	BKP_DATA6_BKPDATA25,		25
	.EQU	BKP_DATA6_BKPDATA24,		24
	.EQU	BKP_DATA6_BKPDATA23,		23
	.EQU	BKP_DATA6_BKPDATA22,		22
	.EQU	BKP_DATA6_BKPDATA21,		21
	.EQU	BKP_DATA6_BKPDATA20,		20
	.EQU	BKP_DATA6_BKPDATA19,		19
	.EQU	BKP_DATA6_BKPDATA18,		18
	.EQU	BKP_DATA6_BKPDATA17,		17
	.EQU	BKP_DATA6_BKPDATA16,		16
	.EQU	BKP_DATA6_BKPDATA15,		15
	.EQU	BKP_DATA6_BKPDATA14,		14
	.EQU	BKP_DATA6_BKPDATA13,		13
	.EQU	BKP_DATA6_BKPDATA12,		12
	.EQU	BKP_DATA6_BKPDATA11,		11
	.EQU	BKP_DATA6_BKPDATA10,		10
	.EQU	BKP_DATA6_BKPDATA9,		9
	.EQU	BKP_DATA6_BKPDATA8,		8
	.EQU	BKP_DATA6_BKPDATA7,		7
	.EQU	BKP_DATA6_BKPDATA6,		6
	.EQU	BKP_DATA6_BKPDATA5,		5
	.EQU	BKP_DATA6_BKPDATA4,		4
	.EQU	BKP_DATA6_BKPDATA3,		3
	.EQU	BKP_DATA6_BKPDATA2,		2
	.EQU	BKP_DATA6_BKPDATA1,		1
	.EQU	BKP_DATA6_BKPDATA0,		0
//  register-------------------------------------
	.EQU	BKP_DATA7,		0x4000145C
//  0x4000 145C  BKP_DATA7   Bits-------------------------------------
	.EQU	BKP_DATA7_BKPDATA31,		31
	.EQU	BKP_DATA7_BKPDATA30,		30
	.EQU	BKP_DATA7_BKPDATA29,		29
	.EQU	BKP_DATA7_BKPDATA28,		28
	.EQU	BKP_DATA7_BKPDATA27,		27
	.EQU	BKP_DATA7_BKPDATA26,		26
	.EQU	BKP_DATA7_BKPDATA25,		25
	.EQU	BKP_DATA7_BKPDATA24,		24
	.EQU	BKP_DATA7_BKPDATA23,		23
	.EQU	BKP_DATA7_BKPDATA22,		22
	.EQU	BKP_DATA7_BKPDATA21,		21
	.EQU	BKP_DATA7_BKPDATA20,		20
	.EQU	BKP_DATA7_BKPDATA19,		19
	.EQU	BKP_DATA7_BKPDATA18,		18
	.EQU	BKP_DATA7_BKPDATA17,		17
	.EQU	BKP_DATA7_BKPDATA16,		16
	.EQU	BKP_DATA7_BKPDATA15,		15
	.EQU	BKP_DATA7_BKPDATA14,		14
	.EQU	BKP_DATA7_BKPDATA13,		13
	.EQU	BKP_DATA7_BKPDATA12,		12
	.EQU	BKP_DATA7_BKPDATA11,		11
	.EQU	BKP_DATA7_BKPDATA10,		10
	.EQU	BKP_DATA7_BKPDATA9,		9
	.EQU	BKP_DATA7_BKPDATA8,		8
	.EQU	BKP_DATA7_BKPDATA7,		7
	.EQU	BKP_DATA7_BKPDATA6,		6
	.EQU	BKP_DATA7_BKPDATA5,		5
	.EQU	BKP_DATA7_BKPDATA4,		4
	.EQU	BKP_DATA7_BKPDATA3,		3
	.EQU	BKP_DATA7_BKPDATA2,		2
	.EQU	BKP_DATA7_BKPDATA1,		1
	.EQU	BKP_DATA7_BKPDATA0,		0
//  register-------------------------------------
	.EQU	RST_CTL0,		0x40001500
//  0x4000 1500  RST_CTL0   Bits-------------------------------------
	.EQU	RST_CTL0_GPIOHRST,		7
	.EQU	RST_CTL0_GPIOGRST,		6
	.EQU	RST_CTL0_GPIOFRST,		5
	.EQU	RST_CTL0_GPIOERST,		4
	.EQU	RST_CTL0_GPIODRST,		3
	.EQU	RST_CTL0_GPIOCRST,		2
	.EQU	RST_CTL0_GPIOBRST,		1
	.EQU	RST_CTL0_GPIOARST,		0
//  register-------------------------------------
	.EQU	RST_CTL1,		0x40001504
//  0x4000 1504  RST_CTL1   Bits-------------------------------------
	.EQU	RST_CTL1_I2C2RST,		28
	.EQU	RST_CTL1_I2C1RST,		27
	.EQU	RST_CTL1_I2C0RST,		26
	.EQU	RST_CTL1_SPI1RST,		25
	.EQU	RST_CTL1_SPI0RST,		24
	.EQU	RST_CTL1_USART4RST,		23
	.EQU	RST_CTL1_USART2RST,		21
	.EQU	RST_CTL1_USART1RST,		20
	.EQU	RST_CTL1_USART0RST,		19
	.EQU	RST_CTL1_T0RST,		17
	.EQU	RST_CTL1_CMPRST,		16
	.EQU	RST_CTL1_DAC1RST,		15
	.EQU	RST_CTL1_DAC0RST,		14
	.EQU	RST_CTL1_ADC2RST,		13
	.EQU	RST_CTL1_ADC1RST,		12
	.EQU	RST_CTL1_ADC0RST,		11
	.EQU	RST_CTL1_QEI0RST,		10
	.EQU	RST_CTL1_T5T6RST,		6
	.EQU	RST_CTL1_T4RST,		5
	.EQU	RST_CTL1_T3RST,		4
	.EQU	RST_CTL1_T2RST,		3
	.EQU	RST_CTL1_T1RST,		2
	.EQU	RST_CTL1_QEI1RST,		1
//  register-------------------------------------
	.EQU	RST_CTL2,		0x40001508
//  0x4000 1508  RST_CTL2   Bits-------------------------------------
	.EQU	RST_CTL2_USART7RST,		31
	.EQU	RST_CTL2_USART5RST,		29
	.EQU	RST_CTL2_DAC3RST,		28
	.EQU	RST_CTL2_DAC2RST,		27
	.EQU	RST_CTL2_T21RST,		24
	.EQU	RST_CTL2_T19RST,		22
	.EQU	RST_CTL2_T18RST,		21
	.EQU	RST_CTL2_T14RST,		16
	.EQU	RST_CTL2_DMA1RST,		14
	.EQU	RST_CTL2_DMA0RST,		12
	.EQU	RST_CTL2_EPWM16RST,		11
	.EQU	RST_CTL2_EPWM13RST,		10
	.EQU	RST_CTL2_EPWM12RST,		9
	.EQU	RST_CTL2_EPWM11RST,		8
	.EQU	RST_CTL2_WWDTRST,		5
//  register-------------------------------------
	.EQU	RST_CTL3,		0x4000150C
//  0x4000 150C  RST_CTL3   Bits-------------------------------------
	.EQU	RST_CTL3_RTCRST,		31
	.EQU	RST_CTL3_CANFD7RST,		30
	.EQU	RST_CTL3_CANFD6RST,		29
	.EQU	RST_CTL3_RNGRST,		28
	.EQU	RST_CTL3_EWDTRST,		27
	.EQU	RST_CTL3_ECFGLRST,		26
	.EQU	RST_CTL3_FLEXRMRST,		25
	.EQU	RST_CTL3_FDC2RST,		24
	.EQU	RST_CTL3_FDC1RST,		23
	.EQU	RST_CTL3_FDC0RST,		22
	.EQU	RST_CTL3_FLEXMUXRST,		21
	.EQU	RST_CTL3_OPRST,		20
	.EQU	RST_CTL3_CFGLRST,		19
	.EQU	RST_CTL3_CAN4RST,		17
	.EQU	RST_CTL3_EXICRST,		16
	.EQU	RST_CTL3_AESRST,		14
	.EQU	RST_CTL3_CRCRST,		13
	.EQU	RST_CTL3_HRCAP2RST,		10
	.EQU	RST_CTL3_HRCAP1RST,		9
	.EQU	RST_CTL3_HRCAP0RST,		8
	.EQU	RST_CTL3_I2C3RST,		7
	.EQU	RST_CTL3_SPI3RST,		2
	.EQU	RST_CTL3_SPI2RST,		1
//  register-------------------------------------
	.EQU	PM_CTL0,		0x40001580
//  0x4000 1580  PM_CTL0   Bits-------------------------------------
	.EQU	PM_CTL0_IOLATCH,		31
	.EQU	PM_CTL0_LSIEN,		29
	.EQU	PM_CTL0_LSEEN,		28
	.EQU	PM_CTL0_MRBGEN,		25
	.EQU	PM_CTL0_LDO18EN,		24
	.EQU	PM_CTL0_LPBGON,		23
	.EQU	PM_CTL0_BKPREGCLR,		22
	.EQU	PM_CTL0_IWDTCLR,		21
	.EQU	PM_CTL0_DPRAMASEL,		20
	.EQU	PM_CTL0_LPRAMSEL,		19
	.EQU	PM_CTL0_LP4MEN,		18
	.EQU	PM_CTL0_LSECONF,		17
	.EQU	PM_CTL0_IWDTRMSEL,		16
	.EQU	PM_CTL0_BKPPORDELAYSEL,		15
	.EQU	PM_CTL0_PORDELAYSEL,		14
	.EQU	PM_CTL0_PHERIIOSEL,		13
	.EQU	PM_CTL0_HSIEN,		8
	.EQU	PM_CTL0_BKPWR,		7
	.EQU	PM_CTL0_OCALLOCK,		6
	.EQU	PM_CTL0_LPREN,		5
	.EQU	PM_CTL0_MEMSEL,		3
	.EQU	PM_CTL0_LPMS2,		2
	.EQU	PM_CTL0_LPMS1,		1
	.EQU	PM_CTL0_LPMS0,		0
//  register-------------------------------------
	.EQU	PM_CTL1,		0x40001584
//  0x4000 1584  PM_CTL1   Bits-------------------------------------
	.EQU	PM_CTL1_BOREN,		31
	.EQU	PM_CTL1_LPBOREN,		30
	.EQU	PM_CTL1_TSEN,		29
	.EQU	PM_CTL1_TSOE,		28
	.EQU	PM_CTL1_P18OE,		27
	.EQU	PM_CTL1_PVDWKEN,		18
	.EQU	PM_CTL1_PMCERRMS,		17
	.EQU	PM_CTL1_LVL18OEN,		16
	.EQU	PM_CTL1_LPCANCLKS,		11
	.EQU	PM_CTL1_RAMECCEN,		10
	.EQU	PM_CTL1_P18LVLSENB,		9
	.EQU	PM_CTL1_LPDEBUG,		8
	.EQU	PM_CTL1_VREFSEL1,		7
	.EQU	PM_CTL1_VREFSEL0,		6
	.EQU	PM_CTL1_VREFEN,		5
	.EQU	PM_CTL1_PVDS2,		4
	.EQU	PM_CTL1_PVDS1,		3
	.EQU	PM_CTL1_PVDS0,		2
	.EQU	PM_CTL1_PVDEN,		0
//  register-------------------------------------
	.EQU	PM_STA0,		0x40001588
//  0x4000 1588  PM_STA0   Bits-------------------------------------
	.EQU	PM_STA0_RSTFC,		31
	.EQU	PM_STA0_IWDTF,		30
	.EQU	PM_STA0_WKPPINF,		28
	.EQU	PM_STA0_PORF,		27
	.EQU	PM_STA0_BORF,		26
	.EQU	PM_STA0_WSRSTF,		25
	.EQU	PM_STA0_BKPPORIF,		24
	.EQU	PM_STA0_NRRSTF,		23
	.EQU	PM_STA0_LPRUNF,		1
	.EQU	PM_STA0_LPRSTA,		0
//  register-------------------------------------
	.EQU	PM_STA1,		0x4000158C
//  0x4000 158C  PM_STA1   Bits-------------------------------------
	.EQU	PM_STA1_WKP5STA,		31
	.EQU	PM_STA1_WKP4STA,		30
	.EQU	PM_STA1_WKP3STA,		29
	.EQU	PM_STA1_WKP2STA,		28
	.EQU	PM_STA1_WKP1STA,		27
	.EQU	PM_STA1_PMCIF,		26
	.EQU	PM_STA1_POR18STA,		22
	.EQU	PM_STA1_PMCERROR,		19
	.EQU	PM_STA1_STOPERROR,		18
	.EQU	PM_STA1_WKP12STA,		17
	.EQU	PM_STA1_WKP11STA,		16
	.EQU	PM_STA1_WKP10STA,		15
	.EQU	PM_STA1_WKP9STA,		14
	.EQU	PM_STA1_WKP8STA,		13
	.EQU	PM_STA1_WKP7STA,		12
	.EQU	PM_STA1_WKP6STA,		11
	.EQU	PM_STA1_PVDSTA,		0
//  register-------------------------------------
	.EQU	PM_STAC,		0x40001590
//  0x4000 1590  PM_STAC   Bits-------------------------------------
	.EQU	PM_STAC_WKP5SC,		31
	.EQU	PM_STAC_WKP4SC,		30
	.EQU	PM_STAC_WKP3SC,		29
	.EQU	PM_STAC_WKP2SC,		28
	.EQU	PM_STAC_WKP1SC,		27
	.EQU	PM_STAC_PMCIC,		26
	.EQU	PM_STAC_IWDTDBGEN,		25
	.EQU	PM_STAC_WKP12SC,		22
	.EQU	PM_STAC_WKP11SC,		21
	.EQU	PM_STAC_WKP10SC,		20
	.EQU	PM_STAC_WKP9SC,		19
	.EQU	PM_STAC_WKP8SC,		18
	.EQU	PM_STAC_WKP7SC,		17
	.EQU	PM_STAC_WKP6SC,		16
	.EQU	PM_STAC_WKP12P,		15
	.EQU	PM_STAC_WKP11P,		14
	.EQU	PM_STAC_WKP10P,		13
	.EQU	PM_STAC_WKP9P,		12
	.EQU	PM_STAC_WKP8P,		11
	.EQU	PM_STAC_WKP7P,		10
	.EQU	PM_STAC_WKP6P,		9
	.EQU	PM_STAC_WKP12EN,		8
	.EQU	PM_STAC_WKP11EN,		7
	.EQU	PM_STAC_WKP10EN,		6
	.EQU	PM_STAC_WKP9EN,		5
	.EQU	PM_STAC_WKP8EN,		4
	.EQU	PM_STAC_WKP7EN,		3
	.EQU	PM_STAC_WKP6EN,		2
//  register-------------------------------------
	.EQU	PM_CTL2,		0x40001594
//  0x4000 1594  PM_CTL2   Bits-------------------------------------
	.EQU	PM_CTL2_WKP5EN,		31
	.EQU	PM_CTL2_WKP4EN,		30
	.EQU	PM_CTL2_WKP3EN,		29
	.EQU	PM_CTL2_WKP2EN,		28
	.EQU	PM_CTL2_WKP1EN,		27
	.EQU	PM_CTL2_WKP5P,		26
	.EQU	PM_CTL2_WKP4P,		25
	.EQU	PM_CTL2_WKP3P,		24
	.EQU	PM_CTL2_WKP2P,		23
	.EQU	PM_CTL2_WKP1P,		22
	.EQU	PM_CTL2_PMCIE,		19
	.EQU	PM_CTL2_QEI0LPEN,		18
	.EQU	PM_CTL2_GPIOALPEN,		17
	.EQU	PM_CTL2_QEI0CLKLPEN,		16
	.EQU	PM_CTL2_RTCCLKLPEN,		15
	.EQU	PM_CTL2_RTCLPEN,		14
	.EQU	PM_CTL2_VF12EN,		11
	.EQU	PM_CTL2_VF12INF1,		10
	.EQU	PM_CTL2_VF12INF0,		9
	.EQU	PM_CTL2_POR18SHD,		8
	.EQU	PM_CTL2_USART0CLKLPEN,		7
	.EQU	PM_CTL2_EWDTCLKLPEN,		6
	.EQU	PM_CTL2_CCP0CLKLPEN,		5
	.EQU	PM_CTL2_CANFD6CLKLPEN,		4
	.EQU	PM_CTL2_USART0LPEN,		3
	.EQU	PM_CTL2_EWDTLPEN,		2
	.EQU	PM_CTL2_CCP0LPEN,		1
	.EQU	PM_CTL2_CANFD6LPEN,		0
//  register-------------------------------------
	.EQU	PM_CAL0,		0x40001598
//  0x4000 1598  PM_CAL0   Bits-------------------------------------
	.EQU	PM_CAL0_BORSEL1,		21
	.EQU	PM_CAL0_BORSEL0,		20
//  register-------------------------------------
	.EQU	DMA0_CTLR1,	0x40001600
//  0x4000 1600  DMA0_CTLR1   Bits-------------------------------------
	.EQU	DMA0_CTLR1_NUMODT15,		31
	.EQU	DMA0_CTLR1_NUMODT14,		30
	.EQU	DMA0_CTLR1_NUMODT13,		29
	.EQU	DMA0_CTLR1_NUMODT12,		28
	.EQU	DMA0_CTLR1_NUMODT11,		27
	.EQU	DMA0_CTLR1_NUMODT10,		26
	.EQU	DMA0_CTLR1_NUMODT9,		25
	.EQU	DMA0_CTLR1_NUMODT8,		24
	.EQU	DMA0_CTLR1_NUMODT7,		23
	.EQU	DMA0_CTLR1_NUMODT6,		22
	.EQU	DMA0_CTLR1_NUMODT5,		21
	.EQU	DMA0_CTLR1_NUMODT4,		20
	.EQU	DMA0_CTLR1_NUMODT3,		19
	.EQU	DMA0_CTLR1_NUMODT2,		18
	.EQU	DMA0_CTLR1_NUMODT1,		17
	.EQU	DMA0_CTLR1_NUMODT0,		16
	.EQU	DMA0_CTLR1_M2M,		15
	.EQU	DMA0_CTLR1_CPL1,		14
	.EQU	DMA0_CTLR1_CPL0,		13
	.EQU	DMA0_CTLR1_ONESHOT,		12
	.EQU	DMA0_CTLR1_PDS1,		11
	.EQU	DMA0_CTLR1_PDS0,		10
	.EQU	DMA0_CTLR1_MDS1,		9
	.EQU	DMA0_CTLR1_MDS0,		8
	.EQU	DMA0_CTLR1_PINC,		7
	.EQU	DMA0_CTLR1_MINC,		6
	.EQU	DMA0_CTLR1_LPM,		5
	.EQU	DMA0_CTLR1_DDIR,		4
	.EQU	DMA0_CTLR1_BLKM,		3
	.EQU	DMA0_CTLR1_DMAMODES,		2
	.EQU	DMA0_CTLR1_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA0_CTLR2,	0x40001604
//  0x4000 1604  DMA0_CTLR2   Bits-------------------------------------
	.EQU	DMA0_CTLR2_NUMODT15,		31
	.EQU	DMA0_CTLR2_NUMODT14,		30
	.EQU	DMA0_CTLR2_NUMODT13,		29
	.EQU	DMA0_CTLR2_NUMODT12,		28
	.EQU	DMA0_CTLR2_NUMODT11,		27
	.EQU	DMA0_CTLR2_NUMODT10,		26
	.EQU	DMA0_CTLR2_NUMODT9,		25
	.EQU	DMA0_CTLR2_NUMODT8,		24
	.EQU	DMA0_CTLR2_NUMODT7,		23
	.EQU	DMA0_CTLR2_NUMODT6,		22
	.EQU	DMA0_CTLR2_NUMODT5,		21
	.EQU	DMA0_CTLR2_NUMODT4,		20
	.EQU	DMA0_CTLR2_NUMODT3,		19
	.EQU	DMA0_CTLR2_NUMODT2,		18
	.EQU	DMA0_CTLR2_NUMODT1,		17
	.EQU	DMA0_CTLR2_NUMODT0,		16
	.EQU	DMA0_CTLR2_M2M,		15
	.EQU	DMA0_CTLR2_CPL1,		14
	.EQU	DMA0_CTLR2_CPL0,		13
	.EQU	DMA0_CTLR2_ONESHOT,		12
	.EQU	DMA0_CTLR2_PDS1,		11
	.EQU	DMA0_CTLR2_PDS0,		10
	.EQU	DMA0_CTLR2_MDS1,		9
	.EQU	DMA0_CTLR2_MDS0,		8
	.EQU	DMA0_CTLR2_PINC,		7
	.EQU	DMA0_CTLR2_MINC,		6
	.EQU	DMA0_CTLR2_LPM,		5
	.EQU	DMA0_CTLR2_DDIR,		4
	.EQU	DMA0_CTLR2_BLKM,		3
	.EQU	DMA0_CTLR2_DMAMODES,		2
	.EQU	DMA0_CTLR2_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA0_CTLR3,	0x40001608
//  0x4000 1608  DMA0_CTLR3   Bits-------------------------------------
	.EQU	DMA0_CTLR3_NUMODT15,		31
	.EQU	DMA0_CTLR3_NUMODT14,		30
	.EQU	DMA0_CTLR3_NUMODT13,		29
	.EQU	DMA0_CTLR3_NUMODT12,		28
	.EQU	DMA0_CTLR3_NUMODT11,		27
	.EQU	DMA0_CTLR3_NUMODT10,		26
	.EQU	DMA0_CTLR3_NUMODT9,		25
	.EQU	DMA0_CTLR3_NUMODT8,		24
	.EQU	DMA0_CTLR3_NUMODT7,		23
	.EQU	DMA0_CTLR3_NUMODT6,		22
	.EQU	DMA0_CTLR3_NUMODT5,		21
	.EQU	DMA0_CTLR3_NUMODT4,		20
	.EQU	DMA0_CTLR3_NUMODT3,		19
	.EQU	DMA0_CTLR3_NUMODT2,		18
	.EQU	DMA0_CTLR3_NUMODT1,		17
	.EQU	DMA0_CTLR3_NUMODT0,		16
	.EQU	DMA0_CTLR3_M2M,		15
	.EQU	DMA0_CTLR3_CPL1,		14
	.EQU	DMA0_CTLR3_CPL0,		13
	.EQU	DMA0_CTLR3_ONESHOT,		12
	.EQU	DMA0_CTLR3_PDS1,		11
	.EQU	DMA0_CTLR3_PDS0,		10
	.EQU	DMA0_CTLR3_MDS1,		9
	.EQU	DMA0_CTLR3_MDS0,		8
	.EQU	DMA0_CTLR3_PINC,		7
	.EQU	DMA0_CTLR3_MINC,		6
	.EQU	DMA0_CTLR3_LPM,		5
	.EQU	DMA0_CTLR3_DDIR,		4
	.EQU	DMA0_CTLR3_BLKM,		3
	.EQU	DMA0_CTLR3_DMAMODES,		2
	.EQU	DMA0_CTLR3_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA0_CTLR4,	0x4000160C
//  0x4000 160C  DMA0_CTLR4   Bits-------------------------------------
	.EQU	DMA0_CTLR4_NUMODT15,		31
	.EQU	DMA0_CTLR4_NUMODT14,		30
	.EQU	DMA0_CTLR4_NUMODT13,		29
	.EQU	DMA0_CTLR4_NUMODT12,		28
	.EQU	DMA0_CTLR4_NUMODT11,		27
	.EQU	DMA0_CTLR4_NUMODT10,		26
	.EQU	DMA0_CTLR4_NUMODT9,		25
	.EQU	DMA0_CTLR4_NUMODT8,		24
	.EQU	DMA0_CTLR4_NUMODT7,		23
	.EQU	DMA0_CTLR4_NUMODT6,		22
	.EQU	DMA0_CTLR4_NUMODT5,		21
	.EQU	DMA0_CTLR4_NUMODT4,		20
	.EQU	DMA0_CTLR4_NUMODT3,		19
	.EQU	DMA0_CTLR4_NUMODT2,		18
	.EQU	DMA0_CTLR4_NUMODT1,		17
	.EQU	DMA0_CTLR4_NUMODT0,		16
	.EQU	DMA0_CTLR4_M2M,		15
	.EQU	DMA0_CTLR4_CPL1,		14
	.EQU	DMA0_CTLR4_CPL0,		13
	.EQU	DMA0_CTLR4_ONESHOT,		12
	.EQU	DMA0_CTLR4_PDS1,		11
	.EQU	DMA0_CTLR4_PDS0,		10
	.EQU	DMA0_CTLR4_MDS1,		9
	.EQU	DMA0_CTLR4_MDS0,		8
	.EQU	DMA0_CTLR4_PINC,		7
	.EQU	DMA0_CTLR4_MINC,		6
	.EQU	DMA0_CTLR4_LPM,		5
	.EQU	DMA0_CTLR4_DDIR,		4
	.EQU	DMA0_CTLR4_BLKM,		3
	.EQU	DMA0_CTLR4_DMAMODES,		2
	.EQU	DMA0_CTLR4_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA0_CTLR5,	0x40001610
//  0x4000 1610  DMA0_CTLR5   Bits-------------------------------------
	.EQU	DMA0_CTLR5_NUMODT15,		31
	.EQU	DMA0_CTLR5_NUMODT14,		30
	.EQU	DMA0_CTLR5_NUMODT13,		29
	.EQU	DMA0_CTLR5_NUMODT12,		28
	.EQU	DMA0_CTLR5_NUMODT11,		27
	.EQU	DMA0_CTLR5_NUMODT10,		26
	.EQU	DMA0_CTLR5_NUMODT9,		25
	.EQU	DMA0_CTLR5_NUMODT8,		24
	.EQU	DMA0_CTLR5_NUMODT7,		23
	.EQU	DMA0_CTLR5_NUMODT6,		22
	.EQU	DMA0_CTLR5_NUMODT5,		21
	.EQU	DMA0_CTLR5_NUMODT4,		20
	.EQU	DMA0_CTLR5_NUMODT3,		19
	.EQU	DMA0_CTLR5_NUMODT2,		18
	.EQU	DMA0_CTLR5_NUMODT1,		17
	.EQU	DMA0_CTLR5_NUMODT0,		16
	.EQU	DMA0_CTLR5_M2M,		15
	.EQU	DMA0_CTLR5_CPL1,		14
	.EQU	DMA0_CTLR5_CPL0,		13
	.EQU	DMA0_CTLR5_ONESHOT,		12
	.EQU	DMA0_CTLR5_PDS1,		11
	.EQU	DMA0_CTLR5_PDS0,		10
	.EQU	DMA0_CTLR5_MDS1,		9
	.EQU	DMA0_CTLR5_MDS0,		8
	.EQU	DMA0_CTLR5_PINC,		7
	.EQU	DMA0_CTLR5_MINC,		6
	.EQU	DMA0_CTLR5_LPM,		5
	.EQU	DMA0_CTLR5_DDIR,		4
	.EQU	DMA0_CTLR5_BLKM,		3
	.EQU	DMA0_CTLR5_DMAMODES,		2
	.EQU	DMA0_CTLR5_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA0_CTLR6,	0x40001614
//  0x4000 1614  DMA0_CTLR6   Bits-------------------------------------
	.EQU	DMA0_CTLR6_NUMODT15,		31
	.EQU	DMA0_CTLR6_NUMODT14,		30
	.EQU	DMA0_CTLR6_NUMODT13,		29
	.EQU	DMA0_CTLR6_NUMODT12,		28
	.EQU	DMA0_CTLR6_NUMODT11,		27
	.EQU	DMA0_CTLR6_NUMODT10,		26
	.EQU	DMA0_CTLR6_NUMODT9,		25
	.EQU	DMA0_CTLR6_NUMODT8,		24
	.EQU	DMA0_CTLR6_NUMODT7,		23
	.EQU	DMA0_CTLR6_NUMODT6,		22
	.EQU	DMA0_CTLR6_NUMODT5,		21
	.EQU	DMA0_CTLR6_NUMODT4,		20
	.EQU	DMA0_CTLR6_NUMODT3,		19
	.EQU	DMA0_CTLR6_NUMODT2,		18
	.EQU	DMA0_CTLR6_NUMODT1,		17
	.EQU	DMA0_CTLR6_NUMODT0,		16
	.EQU	DMA0_CTLR6_M2M,		15
	.EQU	DMA0_CTLR6_CPL1,		14
	.EQU	DMA0_CTLR6_CPL0,		13
	.EQU	DMA0_CTLR6_ONESHOT,		12
	.EQU	DMA0_CTLR6_PDS1,		11
	.EQU	DMA0_CTLR6_PDS0,		10
	.EQU	DMA0_CTLR6_MDS1,		9
	.EQU	DMA0_CTLR6_MDS0,		8
	.EQU	DMA0_CTLR6_PINC,		7
	.EQU	DMA0_CTLR6_MINC,		6
	.EQU	DMA0_CTLR6_LPM,		5
	.EQU	DMA0_CTLR6_DDIR,		4
	.EQU	DMA0_CTLR6_BLKM,		3
	.EQU	DMA0_CTLR6_DMAMODES,		2
	.EQU	DMA0_CTLR6_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA0_CTLR7,	0x40001618
//  0x4000 1618  DMA0_CTLR7   Bits-------------------------------------
	.EQU	DMA0_CTLR7_NUMODT15,		31
	.EQU	DMA0_CTLR7_NUMODT14,		30
	.EQU	DMA0_CTLR7_NUMODT13,		29
	.EQU	DMA0_CTLR7_NUMODT12,		28
	.EQU	DMA0_CTLR7_NUMODT11,		27
	.EQU	DMA0_CTLR7_NUMODT10,		26
	.EQU	DMA0_CTLR7_NUMODT9,		25
	.EQU	DMA0_CTLR7_NUMODT8,		24
	.EQU	DMA0_CTLR7_NUMODT7,		23
	.EQU	DMA0_CTLR7_NUMODT6,		22
	.EQU	DMA0_CTLR7_NUMODT5,		21
	.EQU	DMA0_CTLR7_NUMODT4,		20
	.EQU	DMA0_CTLR7_NUMODT3,		19
	.EQU	DMA0_CTLR7_NUMODT2,		18
	.EQU	DMA0_CTLR7_NUMODT1,		17
	.EQU	DMA0_CTLR7_NUMODT0,		16
	.EQU	DMA0_CTLR7_M2M,		15
	.EQU	DMA0_CTLR7_CPL1,		14
	.EQU	DMA0_CTLR7_CPL0,		13
	.EQU	DMA0_CTLR7_ONESHOT,		12
	.EQU	DMA0_CTLR7_PDS1,		11
	.EQU	DMA0_CTLR7_PDS0,		10
	.EQU	DMA0_CTLR7_MDS1,		9
	.EQU	DMA0_CTLR7_MDS0,		8
	.EQU	DMA0_CTLR7_PINC,		7
	.EQU	DMA0_CTLR7_MINC,		6
	.EQU	DMA0_CTLR7_LPM,		5
	.EQU	DMA0_CTLR7_DDIR,		4
	.EQU	DMA0_CTLR7_BLKM,		3
	.EQU	DMA0_CTLR7_DMAMODES,		2
	.EQU	DMA0_CTLR7_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA0_PADDR1,	0x40001620
//  0x4000 1620  DMA0_PADDR1   Bits-------------------------------------
	.EQU	DMA0_PADDR1_PADDR31,		31
	.EQU	DMA0_PADDR1_PADDR30,		30
	.EQU	DMA0_PADDR1_PADDR29,		29
	.EQU	DMA0_PADDR1_PADDR28,		28
	.EQU	DMA0_PADDR1_PADDR27,		27
	.EQU	DMA0_PADDR1_PADDR26,		26
	.EQU	DMA0_PADDR1_PADDR25,		25
	.EQU	DMA0_PADDR1_PADDR24,		24
	.EQU	DMA0_PADDR1_PADDR23,		23
	.EQU	DMA0_PADDR1_PADDR22,		22
	.EQU	DMA0_PADDR1_PADDR21,		21
	.EQU	DMA0_PADDR1_PADDR20,		20
	.EQU	DMA0_PADDR1_PADDR19,		19
	.EQU	DMA0_PADDR1_PADDR18,		18
	.EQU	DMA0_PADDR1_PADDR17,		17
	.EQU	DMA0_PADDR1_PADDR16,		16
	.EQU	DMA0_PADDR1_PADDR15,		15
	.EQU	DMA0_PADDR1_PADDR14,		14
	.EQU	DMA0_PADDR1_PADDR13,		13
	.EQU	DMA0_PADDR1_PADDR12,		12
	.EQU	DMA0_PADDR1_PADDR11,		11
	.EQU	DMA0_PADDR1_PADDR10,		10
	.EQU	DMA0_PADDR1_PADDR9,		9
	.EQU	DMA0_PADDR1_PADDR8,		8
	.EQU	DMA0_PADDR1_PADDR7,		7
	.EQU	DMA0_PADDR1_PADDR6,		6
	.EQU	DMA0_PADDR1_PADDR5,		5
	.EQU	DMA0_PADDR1_PADDR4,		4
	.EQU	DMA0_PADDR1_PADDR3,		3
	.EQU	DMA0_PADDR1_PADDR2,		2
	.EQU	DMA0_PADDR1_PADDR1,		1
	.EQU	DMA0_PADDR1_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_PADDR2,	0x40001624
//  0x4000 1624  DMA0_PADDR2   Bits-------------------------------------
	.EQU	DMA0_PADDR2_PADDR31,		31
	.EQU	DMA0_PADDR2_PADDR30,		30
	.EQU	DMA0_PADDR2_PADDR29,		29
	.EQU	DMA0_PADDR2_PADDR28,		28
	.EQU	DMA0_PADDR2_PADDR27,		27
	.EQU	DMA0_PADDR2_PADDR26,		26
	.EQU	DMA0_PADDR2_PADDR25,		25
	.EQU	DMA0_PADDR2_PADDR24,		24
	.EQU	DMA0_PADDR2_PADDR23,		23
	.EQU	DMA0_PADDR2_PADDR22,		22
	.EQU	DMA0_PADDR2_PADDR21,		21
	.EQU	DMA0_PADDR2_PADDR20,		20
	.EQU	DMA0_PADDR2_PADDR19,		19
	.EQU	DMA0_PADDR2_PADDR18,		18
	.EQU	DMA0_PADDR2_PADDR17,		17
	.EQU	DMA0_PADDR2_PADDR16,		16
	.EQU	DMA0_PADDR2_PADDR15,		15
	.EQU	DMA0_PADDR2_PADDR14,		14
	.EQU	DMA0_PADDR2_PADDR13,		13
	.EQU	DMA0_PADDR2_PADDR12,		12
	.EQU	DMA0_PADDR2_PADDR11,		11
	.EQU	DMA0_PADDR2_PADDR10,		10
	.EQU	DMA0_PADDR2_PADDR9,		9
	.EQU	DMA0_PADDR2_PADDR8,		8
	.EQU	DMA0_PADDR2_PADDR7,		7
	.EQU	DMA0_PADDR2_PADDR6,		6
	.EQU	DMA0_PADDR2_PADDR5,		5
	.EQU	DMA0_PADDR2_PADDR4,		4
	.EQU	DMA0_PADDR2_PADDR3,		3
	.EQU	DMA0_PADDR2_PADDR2,		2
	.EQU	DMA0_PADDR2_PADDR1,		1
	.EQU	DMA0_PADDR2_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_PADDR3,	0x40001628
//  0x4000 1628  DMA0_PADDR3   Bits-------------------------------------
	.EQU	DMA0_PADDR3_PADDR31,		31
	.EQU	DMA0_PADDR3_PADDR30,		30
	.EQU	DMA0_PADDR3_PADDR29,		29
	.EQU	DMA0_PADDR3_PADDR28,		28
	.EQU	DMA0_PADDR3_PADDR27,		27
	.EQU	DMA0_PADDR3_PADDR26,		26
	.EQU	DMA0_PADDR3_PADDR25,		25
	.EQU	DMA0_PADDR3_PADDR24,		24
	.EQU	DMA0_PADDR3_PADDR23,		23
	.EQU	DMA0_PADDR3_PADDR22,		22
	.EQU	DMA0_PADDR3_PADDR21,		21
	.EQU	DMA0_PADDR3_PADDR20,		20
	.EQU	DMA0_PADDR3_PADDR19,		19
	.EQU	DMA0_PADDR3_PADDR18,		18
	.EQU	DMA0_PADDR3_PADDR17,		17
	.EQU	DMA0_PADDR3_PADDR16,		16
	.EQU	DMA0_PADDR3_PADDR15,		15
	.EQU	DMA0_PADDR3_PADDR14,		14
	.EQU	DMA0_PADDR3_PADDR13,		13
	.EQU	DMA0_PADDR3_PADDR12,		12
	.EQU	DMA0_PADDR3_PADDR11,		11
	.EQU	DMA0_PADDR3_PADDR10,		10
	.EQU	DMA0_PADDR3_PADDR9,		9
	.EQU	DMA0_PADDR3_PADDR8,		8
	.EQU	DMA0_PADDR3_PADDR7,		7
	.EQU	DMA0_PADDR3_PADDR6,		6
	.EQU	DMA0_PADDR3_PADDR5,		5
	.EQU	DMA0_PADDR3_PADDR4,		4
	.EQU	DMA0_PADDR3_PADDR3,		3
	.EQU	DMA0_PADDR3_PADDR2,		2
	.EQU	DMA0_PADDR3_PADDR1,		1
	.EQU	DMA0_PADDR3_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_PADDR4,	0x4000162C
//  0x4000 162C  DMA0_PADDR4   Bits-------------------------------------
	.EQU	DMA0_PADDR4_PADDR31,		31
	.EQU	DMA0_PADDR4_PADDR30,		30
	.EQU	DMA0_PADDR4_PADDR29,		29
	.EQU	DMA0_PADDR4_PADDR28,		28
	.EQU	DMA0_PADDR4_PADDR27,		27
	.EQU	DMA0_PADDR4_PADDR26,		26
	.EQU	DMA0_PADDR4_PADDR25,		25
	.EQU	DMA0_PADDR4_PADDR24,		24
	.EQU	DMA0_PADDR4_PADDR23,		23
	.EQU	DMA0_PADDR4_PADDR22,		22
	.EQU	DMA0_PADDR4_PADDR21,		21
	.EQU	DMA0_PADDR4_PADDR20,		20
	.EQU	DMA0_PADDR4_PADDR19,		19
	.EQU	DMA0_PADDR4_PADDR18,		18
	.EQU	DMA0_PADDR4_PADDR17,		17
	.EQU	DMA0_PADDR4_PADDR16,		16
	.EQU	DMA0_PADDR4_PADDR15,		15
	.EQU	DMA0_PADDR4_PADDR14,		14
	.EQU	DMA0_PADDR4_PADDR13,		13
	.EQU	DMA0_PADDR4_PADDR12,		12
	.EQU	DMA0_PADDR4_PADDR11,		11
	.EQU	DMA0_PADDR4_PADDR10,		10
	.EQU	DMA0_PADDR4_PADDR9,		9
	.EQU	DMA0_PADDR4_PADDR8,		8
	.EQU	DMA0_PADDR4_PADDR7,		7
	.EQU	DMA0_PADDR4_PADDR6,		6
	.EQU	DMA0_PADDR4_PADDR5,		5
	.EQU	DMA0_PADDR4_PADDR4,		4
	.EQU	DMA0_PADDR4_PADDR3,		3
	.EQU	DMA0_PADDR4_PADDR2,		2
	.EQU	DMA0_PADDR4_PADDR1,		1
	.EQU	DMA0_PADDR4_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_PADDR5,	0x40001630
//  0x4000 1630  DMA0_PADDR5   Bits-------------------------------------
	.EQU	DMA0_PADDR5_PADDR31,		31
	.EQU	DMA0_PADDR5_PADDR30,		30
	.EQU	DMA0_PADDR5_PADDR29,		29
	.EQU	DMA0_PADDR5_PADDR28,		28
	.EQU	DMA0_PADDR5_PADDR27,		27
	.EQU	DMA0_PADDR5_PADDR26,		26
	.EQU	DMA0_PADDR5_PADDR25,		25
	.EQU	DMA0_PADDR5_PADDR24,		24
	.EQU	DMA0_PADDR5_PADDR23,		23
	.EQU	DMA0_PADDR5_PADDR22,		22
	.EQU	DMA0_PADDR5_PADDR21,		21
	.EQU	DMA0_PADDR5_PADDR20,		20
	.EQU	DMA0_PADDR5_PADDR19,		19
	.EQU	DMA0_PADDR5_PADDR18,		18
	.EQU	DMA0_PADDR5_PADDR17,		17
	.EQU	DMA0_PADDR5_PADDR16,		16
	.EQU	DMA0_PADDR5_PADDR15,		15
	.EQU	DMA0_PADDR5_PADDR14,		14
	.EQU	DMA0_PADDR5_PADDR13,		13
	.EQU	DMA0_PADDR5_PADDR12,		12
	.EQU	DMA0_PADDR5_PADDR11,		11
	.EQU	DMA0_PADDR5_PADDR10,		10
	.EQU	DMA0_PADDR5_PADDR9,		9
	.EQU	DMA0_PADDR5_PADDR8,		8
	.EQU	DMA0_PADDR5_PADDR7,		7
	.EQU	DMA0_PADDR5_PADDR6,		6
	.EQU	DMA0_PADDR5_PADDR5,		5
	.EQU	DMA0_PADDR5_PADDR4,		4
	.EQU	DMA0_PADDR5_PADDR3,		3
	.EQU	DMA0_PADDR5_PADDR2,		2
	.EQU	DMA0_PADDR5_PADDR1,		1
	.EQU	DMA0_PADDR5_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_PADDR6,	0x40001634
//  0x4000 1634  DMA0_PADDR6   Bits-------------------------------------
	.EQU	DMA0_PADDR6_PADDR31,		31
	.EQU	DMA0_PADDR6_PADDR30,		30
	.EQU	DMA0_PADDR6_PADDR29,		29
	.EQU	DMA0_PADDR6_PADDR28,		28
	.EQU	DMA0_PADDR6_PADDR27,		27
	.EQU	DMA0_PADDR6_PADDR26,		26
	.EQU	DMA0_PADDR6_PADDR25,		25
	.EQU	DMA0_PADDR6_PADDR24,		24
	.EQU	DMA0_PADDR6_PADDR23,		23
	.EQU	DMA0_PADDR6_PADDR22,		22
	.EQU	DMA0_PADDR6_PADDR21,		21
	.EQU	DMA0_PADDR6_PADDR20,		20
	.EQU	DMA0_PADDR6_PADDR19,		19
	.EQU	DMA0_PADDR6_PADDR18,		18
	.EQU	DMA0_PADDR6_PADDR17,		17
	.EQU	DMA0_PADDR6_PADDR16,		16
	.EQU	DMA0_PADDR6_PADDR15,		15
	.EQU	DMA0_PADDR6_PADDR14,		14
	.EQU	DMA0_PADDR6_PADDR13,		13
	.EQU	DMA0_PADDR6_PADDR12,		12
	.EQU	DMA0_PADDR6_PADDR11,		11
	.EQU	DMA0_PADDR6_PADDR10,		10
	.EQU	DMA0_PADDR6_PADDR9,		9
	.EQU	DMA0_PADDR6_PADDR8,		8
	.EQU	DMA0_PADDR6_PADDR7,		7
	.EQU	DMA0_PADDR6_PADDR6,		6
	.EQU	DMA0_PADDR6_PADDR5,		5
	.EQU	DMA0_PADDR6_PADDR4,		4
	.EQU	DMA0_PADDR6_PADDR3,		3
	.EQU	DMA0_PADDR6_PADDR2,		2
	.EQU	DMA0_PADDR6_PADDR1,		1
	.EQU	DMA0_PADDR6_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_PADDR7,	0x40001638
//  0x4000 1638  DMA0_PADDR7   Bits-------------------------------------
	.EQU	DMA0_PADDR7_PADDR31,		31
	.EQU	DMA0_PADDR7_PADDR30,		30
	.EQU	DMA0_PADDR7_PADDR29,		29
	.EQU	DMA0_PADDR7_PADDR28,		28
	.EQU	DMA0_PADDR7_PADDR27,		27
	.EQU	DMA0_PADDR7_PADDR26,		26
	.EQU	DMA0_PADDR7_PADDR25,		25
	.EQU	DMA0_PADDR7_PADDR24,		24
	.EQU	DMA0_PADDR7_PADDR23,		23
	.EQU	DMA0_PADDR7_PADDR22,		22
	.EQU	DMA0_PADDR7_PADDR21,		21
	.EQU	DMA0_PADDR7_PADDR20,		20
	.EQU	DMA0_PADDR7_PADDR19,		19
	.EQU	DMA0_PADDR7_PADDR18,		18
	.EQU	DMA0_PADDR7_PADDR17,		17
	.EQU	DMA0_PADDR7_PADDR16,		16
	.EQU	DMA0_PADDR7_PADDR15,		15
	.EQU	DMA0_PADDR7_PADDR14,		14
	.EQU	DMA0_PADDR7_PADDR13,		13
	.EQU	DMA0_PADDR7_PADDR12,		12
	.EQU	DMA0_PADDR7_PADDR11,		11
	.EQU	DMA0_PADDR7_PADDR10,		10
	.EQU	DMA0_PADDR7_PADDR9,		9
	.EQU	DMA0_PADDR7_PADDR8,		8
	.EQU	DMA0_PADDR7_PADDR7,		7
	.EQU	DMA0_PADDR7_PADDR6,		6
	.EQU	DMA0_PADDR7_PADDR5,		5
	.EQU	DMA0_PADDR7_PADDR4,		4
	.EQU	DMA0_PADDR7_PADDR3,		3
	.EQU	DMA0_PADDR7_PADDR2,		2
	.EQU	DMA0_PADDR7_PADDR1,		1
	.EQU	DMA0_PADDR7_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_MADDR1,	0x40001640
//  0x4000 1640  DMA0_MADDR1   Bits-------------------------------------
	.EQU	DMA0_MADDR1_MADDR31,		31
	.EQU	DMA0_MADDR1_MADDR30,		30
	.EQU	DMA0_MADDR1_MADDR29,		29
	.EQU	DMA0_MADDR1_MADDR28,		28
	.EQU	DMA0_MADDR1_MADDR27,		27
	.EQU	DMA0_MADDR1_MADDR26,		26
	.EQU	DMA0_MADDR1_MADDR25,		25
	.EQU	DMA0_MADDR1_MADDR24,		24
	.EQU	DMA0_MADDR1_MADDR23,		23
	.EQU	DMA0_MADDR1_MADDR22,		22
	.EQU	DMA0_MADDR1_MADDR21,		21
	.EQU	DMA0_MADDR1_MADDR20,		20
	.EQU	DMA0_MADDR1_MADDR19,		19
	.EQU	DMA0_MADDR1_MADDR18,		18
	.EQU	DMA0_MADDR1_MADDR17,		17
	.EQU	DMA0_MADDR1_MADDR16,		16
	.EQU	DMA0_MADDR1_MADDR15,		15
	.EQU	DMA0_MADDR1_MADDR14,		14
	.EQU	DMA0_MADDR1_MADDR13,		13
	.EQU	DMA0_MADDR1_MADDR12,		12
	.EQU	DMA0_MADDR1_MADDR11,		11
	.EQU	DMA0_MADDR1_MADDR10,		10
	.EQU	DMA0_MADDR1_MADDR9,		9
	.EQU	DMA0_MADDR1_MADDR8,		8
	.EQU	DMA0_MADDR1_MADDR7,		7
	.EQU	DMA0_MADDR1_MADDR6,		6
	.EQU	DMA0_MADDR1_MADDR5,		5
	.EQU	DMA0_MADDR1_MADDR4,		4
	.EQU	DMA0_MADDR1_MADDR3,		3
	.EQU	DMA0_MADDR1_MADDR2,		2
	.EQU	DMA0_MADDR1_MADDR1,		1
	.EQU	DMA0_MADDR1_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_MADDR2,	0x40001644
//  0x4000 1644  DMA0_MADDR2   Bits-------------------------------------
	.EQU	DMA0_MADDR2_MADDR31,		31
	.EQU	DMA0_MADDR2_MADDR30,		30
	.EQU	DMA0_MADDR2_MADDR29,		29
	.EQU	DMA0_MADDR2_MADDR28,		28
	.EQU	DMA0_MADDR2_MADDR27,		27
	.EQU	DMA0_MADDR2_MADDR26,		26
	.EQU	DMA0_MADDR2_MADDR25,		25
	.EQU	DMA0_MADDR2_MADDR24,		24
	.EQU	DMA0_MADDR2_MADDR23,		23
	.EQU	DMA0_MADDR2_MADDR22,		22
	.EQU	DMA0_MADDR2_MADDR21,		21
	.EQU	DMA0_MADDR2_MADDR20,		20
	.EQU	DMA0_MADDR2_MADDR19,		19
	.EQU	DMA0_MADDR2_MADDR18,		18
	.EQU	DMA0_MADDR2_MADDR17,		17
	.EQU	DMA0_MADDR2_MADDR16,		16
	.EQU	DMA0_MADDR2_MADDR15,		15
	.EQU	DMA0_MADDR2_MADDR14,		14
	.EQU	DMA0_MADDR2_MADDR13,		13
	.EQU	DMA0_MADDR2_MADDR12,		12
	.EQU	DMA0_MADDR2_MADDR11,		11
	.EQU	DMA0_MADDR2_MADDR10,		10
	.EQU	DMA0_MADDR2_MADDR9,		9
	.EQU	DMA0_MADDR2_MADDR8,		8
	.EQU	DMA0_MADDR2_MADDR7,		7
	.EQU	DMA0_MADDR2_MADDR6,		6
	.EQU	DMA0_MADDR2_MADDR5,		5
	.EQU	DMA0_MADDR2_MADDR4,		4
	.EQU	DMA0_MADDR2_MADDR3,		3
	.EQU	DMA0_MADDR2_MADDR2,		2
	.EQU	DMA0_MADDR2_MADDR1,		1
	.EQU	DMA0_MADDR2_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_MADDR3,	0x40001648
//  0x4000 1648  DMA0_MADDR3   Bits-------------------------------------
	.EQU	DMA0_MADDR3_MADDR31,		31
	.EQU	DMA0_MADDR3_MADDR30,		30
	.EQU	DMA0_MADDR3_MADDR29,		29
	.EQU	DMA0_MADDR3_MADDR28,		28
	.EQU	DMA0_MADDR3_MADDR27,		27
	.EQU	DMA0_MADDR3_MADDR26,		26
	.EQU	DMA0_MADDR3_MADDR25,		25
	.EQU	DMA0_MADDR3_MADDR24,		24
	.EQU	DMA0_MADDR3_MADDR23,		23
	.EQU	DMA0_MADDR3_MADDR22,		22
	.EQU	DMA0_MADDR3_MADDR21,		21
	.EQU	DMA0_MADDR3_MADDR20,		20
	.EQU	DMA0_MADDR3_MADDR19,		19
	.EQU	DMA0_MADDR3_MADDR18,		18
	.EQU	DMA0_MADDR3_MADDR17,		17
	.EQU	DMA0_MADDR3_MADDR16,		16
	.EQU	DMA0_MADDR3_MADDR15,		15
	.EQU	DMA0_MADDR3_MADDR14,		14
	.EQU	DMA0_MADDR3_MADDR13,		13
	.EQU	DMA0_MADDR3_MADDR12,		12
	.EQU	DMA0_MADDR3_MADDR11,		11
	.EQU	DMA0_MADDR3_MADDR10,		10
	.EQU	DMA0_MADDR3_MADDR9,		9
	.EQU	DMA0_MADDR3_MADDR8,		8
	.EQU	DMA0_MADDR3_MADDR7,		7
	.EQU	DMA0_MADDR3_MADDR6,		6
	.EQU	DMA0_MADDR3_MADDR5,		5
	.EQU	DMA0_MADDR3_MADDR4,		4
	.EQU	DMA0_MADDR3_MADDR3,		3
	.EQU	DMA0_MADDR3_MADDR2,		2
	.EQU	DMA0_MADDR3_MADDR1,		1
	.EQU	DMA0_MADDR3_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_MADDR4,	0x4000164C
//  0x4000 164C  DMA0_MADDR4   Bits-------------------------------------
	.EQU	DMA0_MADDR4_MADDR31,		31
	.EQU	DMA0_MADDR4_MADDR30,		30
	.EQU	DMA0_MADDR4_MADDR29,		29
	.EQU	DMA0_MADDR4_MADDR28,		28
	.EQU	DMA0_MADDR4_MADDR27,		27
	.EQU	DMA0_MADDR4_MADDR26,		26
	.EQU	DMA0_MADDR4_MADDR25,		25
	.EQU	DMA0_MADDR4_MADDR24,		24
	.EQU	DMA0_MADDR4_MADDR23,		23
	.EQU	DMA0_MADDR4_MADDR22,		22
	.EQU	DMA0_MADDR4_MADDR21,		21
	.EQU	DMA0_MADDR4_MADDR20,		20
	.EQU	DMA0_MADDR4_MADDR19,		19
	.EQU	DMA0_MADDR4_MADDR18,		18
	.EQU	DMA0_MADDR4_MADDR17,		17
	.EQU	DMA0_MADDR4_MADDR16,		16
	.EQU	DMA0_MADDR4_MADDR15,		15
	.EQU	DMA0_MADDR4_MADDR14,		14
	.EQU	DMA0_MADDR4_MADDR13,		13
	.EQU	DMA0_MADDR4_MADDR12,		12
	.EQU	DMA0_MADDR4_MADDR11,		11
	.EQU	DMA0_MADDR4_MADDR10,		10
	.EQU	DMA0_MADDR4_MADDR9,		9
	.EQU	DMA0_MADDR4_MADDR8,		8
	.EQU	DMA0_MADDR4_MADDR7,		7
	.EQU	DMA0_MADDR4_MADDR6,		6
	.EQU	DMA0_MADDR4_MADDR5,		5
	.EQU	DMA0_MADDR4_MADDR4,		4
	.EQU	DMA0_MADDR4_MADDR3,		3
	.EQU	DMA0_MADDR4_MADDR2,		2
	.EQU	DMA0_MADDR4_MADDR1,		1
	.EQU	DMA0_MADDR4_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_MADDR5,	0x40001650
//  0x4000 1650  DMA0_MADDR5   Bits-------------------------------------
	.EQU	DMA0_MADDR5_MADDR31,		31
	.EQU	DMA0_MADDR5_MADDR30,		30
	.EQU	DMA0_MADDR5_MADDR29,		29
	.EQU	DMA0_MADDR5_MADDR28,		28
	.EQU	DMA0_MADDR5_MADDR27,		27
	.EQU	DMA0_MADDR5_MADDR26,		26
	.EQU	DMA0_MADDR5_MADDR25,		25
	.EQU	DMA0_MADDR5_MADDR24,		24
	.EQU	DMA0_MADDR5_MADDR23,		23
	.EQU	DMA0_MADDR5_MADDR22,		22
	.EQU	DMA0_MADDR5_MADDR21,		21
	.EQU	DMA0_MADDR5_MADDR20,		20
	.EQU	DMA0_MADDR5_MADDR19,		19
	.EQU	DMA0_MADDR5_MADDR18,		18
	.EQU	DMA0_MADDR5_MADDR17,		17
	.EQU	DMA0_MADDR5_MADDR16,		16
	.EQU	DMA0_MADDR5_MADDR15,		15
	.EQU	DMA0_MADDR5_MADDR14,		14
	.EQU	DMA0_MADDR5_MADDR13,		13
	.EQU	DMA0_MADDR5_MADDR12,		12
	.EQU	DMA0_MADDR5_MADDR11,		11
	.EQU	DMA0_MADDR5_MADDR10,		10
	.EQU	DMA0_MADDR5_MADDR9,		9
	.EQU	DMA0_MADDR5_MADDR8,		8
	.EQU	DMA0_MADDR5_MADDR7,		7
	.EQU	DMA0_MADDR5_MADDR6,		6
	.EQU	DMA0_MADDR5_MADDR5,		5
	.EQU	DMA0_MADDR5_MADDR4,		4
	.EQU	DMA0_MADDR5_MADDR3,		3
	.EQU	DMA0_MADDR5_MADDR2,		2
	.EQU	DMA0_MADDR5_MADDR1,		1
	.EQU	DMA0_MADDR5_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_MADDR6,	0x40001654
//  0x4000 1654  DMA0_MADDR6   Bits-------------------------------------
	.EQU	DMA0_MADDR6_MADDR31,		31
	.EQU	DMA0_MADDR6_MADDR30,		30
	.EQU	DMA0_MADDR6_MADDR29,		29
	.EQU	DMA0_MADDR6_MADDR28,		28
	.EQU	DMA0_MADDR6_MADDR27,		27
	.EQU	DMA0_MADDR6_MADDR26,		26
	.EQU	DMA0_MADDR6_MADDR25,		25
	.EQU	DMA0_MADDR6_MADDR24,		24
	.EQU	DMA0_MADDR6_MADDR23,		23
	.EQU	DMA0_MADDR6_MADDR22,		22
	.EQU	DMA0_MADDR6_MADDR21,		21
	.EQU	DMA0_MADDR6_MADDR20,		20
	.EQU	DMA0_MADDR6_MADDR19,		19
	.EQU	DMA0_MADDR6_MADDR18,		18
	.EQU	DMA0_MADDR6_MADDR17,		17
	.EQU	DMA0_MADDR6_MADDR16,		16
	.EQU	DMA0_MADDR6_MADDR15,		15
	.EQU	DMA0_MADDR6_MADDR14,		14
	.EQU	DMA0_MADDR6_MADDR13,		13
	.EQU	DMA0_MADDR6_MADDR12,		12
	.EQU	DMA0_MADDR6_MADDR11,		11
	.EQU	DMA0_MADDR6_MADDR10,		10
	.EQU	DMA0_MADDR6_MADDR9,		9
	.EQU	DMA0_MADDR6_MADDR8,		8
	.EQU	DMA0_MADDR6_MADDR7,		7
	.EQU	DMA0_MADDR6_MADDR6,		6
	.EQU	DMA0_MADDR6_MADDR5,		5
	.EQU	DMA0_MADDR6_MADDR4,		4
	.EQU	DMA0_MADDR6_MADDR3,		3
	.EQU	DMA0_MADDR6_MADDR2,		2
	.EQU	DMA0_MADDR6_MADDR1,		1
	.EQU	DMA0_MADDR6_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_MADDR7,	0x40001658
//  0x4000 1658  DMA0_MADDR7   Bits-------------------------------------
	.EQU	DMA0_MADDR7_MADDR31,		31
	.EQU	DMA0_MADDR7_MADDR30,		30
	.EQU	DMA0_MADDR7_MADDR29,		29
	.EQU	DMA0_MADDR7_MADDR28,		28
	.EQU	DMA0_MADDR7_MADDR27,		27
	.EQU	DMA0_MADDR7_MADDR26,		26
	.EQU	DMA0_MADDR7_MADDR25,		25
	.EQU	DMA0_MADDR7_MADDR24,		24
	.EQU	DMA0_MADDR7_MADDR23,		23
	.EQU	DMA0_MADDR7_MADDR22,		22
	.EQU	DMA0_MADDR7_MADDR21,		21
	.EQU	DMA0_MADDR7_MADDR20,		20
	.EQU	DMA0_MADDR7_MADDR19,		19
	.EQU	DMA0_MADDR7_MADDR18,		18
	.EQU	DMA0_MADDR7_MADDR17,		17
	.EQU	DMA0_MADDR7_MADDR16,		16
	.EQU	DMA0_MADDR7_MADDR15,		15
	.EQU	DMA0_MADDR7_MADDR14,		14
	.EQU	DMA0_MADDR7_MADDR13,		13
	.EQU	DMA0_MADDR7_MADDR12,		12
	.EQU	DMA0_MADDR7_MADDR11,		11
	.EQU	DMA0_MADDR7_MADDR10,		10
	.EQU	DMA0_MADDR7_MADDR9,		9
	.EQU	DMA0_MADDR7_MADDR8,		8
	.EQU	DMA0_MADDR7_MADDR7,		7
	.EQU	DMA0_MADDR7_MADDR6,		6
	.EQU	DMA0_MADDR7_MADDR5,		5
	.EQU	DMA0_MADDR7_MADDR4,		4
	.EQU	DMA0_MADDR7_MADDR3,		3
	.EQU	DMA0_MADDR7_MADDR2,		2
	.EQU	DMA0_MADDR7_MADDR1,		1
	.EQU	DMA0_MADDR7_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA0_CPAR1,	0x40001660
//  0x4000 1660  DMA0_CPAR1   Bits-------------------------------------
	.EQU	DMA0_CPAR1_CPAR31,		31
	.EQU	DMA0_CPAR1_CPAR30,		30
	.EQU	DMA0_CPAR1_CPAR29,		29
	.EQU	DMA0_CPAR1_CPAR28,		28
	.EQU	DMA0_CPAR1_CPAR27,		27
	.EQU	DMA0_CPAR1_CPAR26,		26
	.EQU	DMA0_CPAR1_CPAR25,		25
	.EQU	DMA0_CPAR1_CPAR24,		24
	.EQU	DMA0_CPAR1_CPAR23,		23
	.EQU	DMA0_CPAR1_CPAR22,		22
	.EQU	DMA0_CPAR1_CPAR21,		21
	.EQU	DMA0_CPAR1_CPAR20,		20
	.EQU	DMA0_CPAR1_CPAR19,		19
	.EQU	DMA0_CPAR1_CPAR18,		18
	.EQU	DMA0_CPAR1_CPAR17,		17
	.EQU	DMA0_CPAR1_CPAR16,		16
	.EQU	DMA0_CPAR1_CPAR15,		15
	.EQU	DMA0_CPAR1_CPAR14,		14
	.EQU	DMA0_CPAR1_CPAR13,		13
	.EQU	DMA0_CPAR1_CPAR12,		12
	.EQU	DMA0_CPAR1_CPAR11,		11
	.EQU	DMA0_CPAR1_CPAR10,		10
	.EQU	DMA0_CPAR1_CPAR9,		9
	.EQU	DMA0_CPAR1_CPAR8,		8
	.EQU	DMA0_CPAR1_CPAR7,		7
	.EQU	DMA0_CPAR1_CPAR6,		6
	.EQU	DMA0_CPAR1_CPAR5,		5
	.EQU	DMA0_CPAR1_CPAR4,		4
	.EQU	DMA0_CPAR1_CPAR3,		3
	.EQU	DMA0_CPAR1_CPAR2,		2
	.EQU	DMA0_CPAR1_CPAR1,		1
	.EQU	DMA0_CPAR1_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CPAR2,	0x40001664
//  0x4000 1664  DMA0_CPAR2   Bits-------------------------------------
	.EQU	DMA0_CPAR2_CPAR31,		31
	.EQU	DMA0_CPAR2_CPAR30,		30
	.EQU	DMA0_CPAR2_CPAR29,		29
	.EQU	DMA0_CPAR2_CPAR28,		28
	.EQU	DMA0_CPAR2_CPAR27,		27
	.EQU	DMA0_CPAR2_CPAR26,		26
	.EQU	DMA0_CPAR2_CPAR25,		25
	.EQU	DMA0_CPAR2_CPAR24,		24
	.EQU	DMA0_CPAR2_CPAR23,		23
	.EQU	DMA0_CPAR2_CPAR22,		22
	.EQU	DMA0_CPAR2_CPAR21,		21
	.EQU	DMA0_CPAR2_CPAR20,		20
	.EQU	DMA0_CPAR2_CPAR19,		19
	.EQU	DMA0_CPAR2_CPAR18,		18
	.EQU	DMA0_CPAR2_CPAR17,		17
	.EQU	DMA0_CPAR2_CPAR16,		16
	.EQU	DMA0_CPAR2_CPAR15,		15
	.EQU	DMA0_CPAR2_CPAR14,		14
	.EQU	DMA0_CPAR2_CPAR13,		13
	.EQU	DMA0_CPAR2_CPAR12,		12
	.EQU	DMA0_CPAR2_CPAR11,		11
	.EQU	DMA0_CPAR2_CPAR10,		10
	.EQU	DMA0_CPAR2_CPAR9,		9
	.EQU	DMA0_CPAR2_CPAR8,		8
	.EQU	DMA0_CPAR2_CPAR7,		7
	.EQU	DMA0_CPAR2_CPAR6,		6
	.EQU	DMA0_CPAR2_CPAR5,		5
	.EQU	DMA0_CPAR2_CPAR4,		4
	.EQU	DMA0_CPAR2_CPAR3,		3
	.EQU	DMA0_CPAR2_CPAR2,		2
	.EQU	DMA0_CPAR2_CPAR1,		1
	.EQU	DMA0_CPAR2_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CPAR3,	0x40001668
//  0x4000 1668  DMA0_CPAR3   Bits-------------------------------------
	.EQU	DMA0_CPAR3_CPAR31,		31
	.EQU	DMA0_CPAR3_CPAR30,		30
	.EQU	DMA0_CPAR3_CPAR29,		29
	.EQU	DMA0_CPAR3_CPAR28,		28
	.EQU	DMA0_CPAR3_CPAR27,		27
	.EQU	DMA0_CPAR3_CPAR26,		26
	.EQU	DMA0_CPAR3_CPAR25,		25
	.EQU	DMA0_CPAR3_CPAR24,		24
	.EQU	DMA0_CPAR3_CPAR23,		23
	.EQU	DMA0_CPAR3_CPAR22,		22
	.EQU	DMA0_CPAR3_CPAR21,		21
	.EQU	DMA0_CPAR3_CPAR20,		20
	.EQU	DMA0_CPAR3_CPAR19,		19
	.EQU	DMA0_CPAR3_CPAR18,		18
	.EQU	DMA0_CPAR3_CPAR17,		17
	.EQU	DMA0_CPAR3_CPAR16,		16
	.EQU	DMA0_CPAR3_CPAR15,		15
	.EQU	DMA0_CPAR3_CPAR14,		14
	.EQU	DMA0_CPAR3_CPAR13,		13
	.EQU	DMA0_CPAR3_CPAR12,		12
	.EQU	DMA0_CPAR3_CPAR11,		11
	.EQU	DMA0_CPAR3_CPAR10,		10
	.EQU	DMA0_CPAR3_CPAR9,		9
	.EQU	DMA0_CPAR3_CPAR8,		8
	.EQU	DMA0_CPAR3_CPAR7,		7
	.EQU	DMA0_CPAR3_CPAR6,		6
	.EQU	DMA0_CPAR3_CPAR5,		5
	.EQU	DMA0_CPAR3_CPAR4,		4
	.EQU	DMA0_CPAR3_CPAR3,		3
	.EQU	DMA0_CPAR3_CPAR2,		2
	.EQU	DMA0_CPAR3_CPAR1,		1
	.EQU	DMA0_CPAR3_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CPAR4,	0x4000166C
//  0x4000 166C  DMA0_CPAR4   Bits-------------------------------------
	.EQU	DMA0_CPAR4_CPAR31,		31
	.EQU	DMA0_CPAR4_CPAR30,		30
	.EQU	DMA0_CPAR4_CPAR29,		29
	.EQU	DMA0_CPAR4_CPAR28,		28
	.EQU	DMA0_CPAR4_CPAR27,		27
	.EQU	DMA0_CPAR4_CPAR26,		26
	.EQU	DMA0_CPAR4_CPAR25,		25
	.EQU	DMA0_CPAR4_CPAR24,		24
	.EQU	DMA0_CPAR4_CPAR23,		23
	.EQU	DMA0_CPAR4_CPAR22,		22
	.EQU	DMA0_CPAR4_CPAR21,		21
	.EQU	DMA0_CPAR4_CPAR20,		20
	.EQU	DMA0_CPAR4_CPAR19,		19
	.EQU	DMA0_CPAR4_CPAR18,		18
	.EQU	DMA0_CPAR4_CPAR17,		17
	.EQU	DMA0_CPAR4_CPAR16,		16
	.EQU	DMA0_CPAR4_CPAR15,		15
	.EQU	DMA0_CPAR4_CPAR14,		14
	.EQU	DMA0_CPAR4_CPAR13,		13
	.EQU	DMA0_CPAR4_CPAR12,		12
	.EQU	DMA0_CPAR4_CPAR11,		11
	.EQU	DMA0_CPAR4_CPAR10,		10
	.EQU	DMA0_CPAR4_CPAR9,		9
	.EQU	DMA0_CPAR4_CPAR8,		8
	.EQU	DMA0_CPAR4_CPAR7,		7
	.EQU	DMA0_CPAR4_CPAR6,		6
	.EQU	DMA0_CPAR4_CPAR5,		5
	.EQU	DMA0_CPAR4_CPAR4,		4
	.EQU	DMA0_CPAR4_CPAR3,		3
	.EQU	DMA0_CPAR4_CPAR2,		2
	.EQU	DMA0_CPAR4_CPAR1,		1
	.EQU	DMA0_CPAR4_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CPAR5,	0x40001670
//  0x4000 1670  DMA0_CPAR5   Bits-------------------------------------
	.EQU	DMA0_CPAR5_CPAR31,		31
	.EQU	DMA0_CPAR5_CPAR30,		30
	.EQU	DMA0_CPAR5_CPAR29,		29
	.EQU	DMA0_CPAR5_CPAR28,		28
	.EQU	DMA0_CPAR5_CPAR27,		27
	.EQU	DMA0_CPAR5_CPAR26,		26
	.EQU	DMA0_CPAR5_CPAR25,		25
	.EQU	DMA0_CPAR5_CPAR24,		24
	.EQU	DMA0_CPAR5_CPAR23,		23
	.EQU	DMA0_CPAR5_CPAR22,		22
	.EQU	DMA0_CPAR5_CPAR21,		21
	.EQU	DMA0_CPAR5_CPAR20,		20
	.EQU	DMA0_CPAR5_CPAR19,		19
	.EQU	DMA0_CPAR5_CPAR18,		18
	.EQU	DMA0_CPAR5_CPAR17,		17
	.EQU	DMA0_CPAR5_CPAR16,		16
	.EQU	DMA0_CPAR5_CPAR15,		15
	.EQU	DMA0_CPAR5_CPAR14,		14
	.EQU	DMA0_CPAR5_CPAR13,		13
	.EQU	DMA0_CPAR5_CPAR12,		12
	.EQU	DMA0_CPAR5_CPAR11,		11
	.EQU	DMA0_CPAR5_CPAR10,		10
	.EQU	DMA0_CPAR5_CPAR9,		9
	.EQU	DMA0_CPAR5_CPAR8,		8
	.EQU	DMA0_CPAR5_CPAR7,		7
	.EQU	DMA0_CPAR5_CPAR6,		6
	.EQU	DMA0_CPAR5_CPAR5,		5
	.EQU	DMA0_CPAR5_CPAR4,		4
	.EQU	DMA0_CPAR5_CPAR3,		3
	.EQU	DMA0_CPAR5_CPAR2,		2
	.EQU	DMA0_CPAR5_CPAR1,		1
	.EQU	DMA0_CPAR5_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CPAR6,	0x40001674
//  0x4000 1674  DMA0_CPAR6   Bits-------------------------------------
	.EQU	DMA0_CPAR6_CPAR31,		31
	.EQU	DMA0_CPAR6_CPAR30,		30
	.EQU	DMA0_CPAR6_CPAR29,		29
	.EQU	DMA0_CPAR6_CPAR28,		28
	.EQU	DMA0_CPAR6_CPAR27,		27
	.EQU	DMA0_CPAR6_CPAR26,		26
	.EQU	DMA0_CPAR6_CPAR25,		25
	.EQU	DMA0_CPAR6_CPAR24,		24
	.EQU	DMA0_CPAR6_CPAR23,		23
	.EQU	DMA0_CPAR6_CPAR22,		22
	.EQU	DMA0_CPAR6_CPAR21,		21
	.EQU	DMA0_CPAR6_CPAR20,		20
	.EQU	DMA0_CPAR6_CPAR19,		19
	.EQU	DMA0_CPAR6_CPAR18,		18
	.EQU	DMA0_CPAR6_CPAR17,		17
	.EQU	DMA0_CPAR6_CPAR16,		16
	.EQU	DMA0_CPAR6_CPAR15,		15
	.EQU	DMA0_CPAR6_CPAR14,		14
	.EQU	DMA0_CPAR6_CPAR13,		13
	.EQU	DMA0_CPAR6_CPAR12,		12
	.EQU	DMA0_CPAR6_CPAR11,		11
	.EQU	DMA0_CPAR6_CPAR10,		10
	.EQU	DMA0_CPAR6_CPAR9,		9
	.EQU	DMA0_CPAR6_CPAR8,		8
	.EQU	DMA0_CPAR6_CPAR7,		7
	.EQU	DMA0_CPAR6_CPAR6,		6
	.EQU	DMA0_CPAR6_CPAR5,		5
	.EQU	DMA0_CPAR6_CPAR4,		4
	.EQU	DMA0_CPAR6_CPAR3,		3
	.EQU	DMA0_CPAR6_CPAR2,		2
	.EQU	DMA0_CPAR6_CPAR1,		1
	.EQU	DMA0_CPAR6_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CPAR7,	0x40001678
//  0x4000 1678  DMA0_CPAR7   Bits-------------------------------------
	.EQU	DMA0_CPAR7_CPAR31,		31
	.EQU	DMA0_CPAR7_CPAR30,		30
	.EQU	DMA0_CPAR7_CPAR29,		29
	.EQU	DMA0_CPAR7_CPAR28,		28
	.EQU	DMA0_CPAR7_CPAR27,		27
	.EQU	DMA0_CPAR7_CPAR26,		26
	.EQU	DMA0_CPAR7_CPAR25,		25
	.EQU	DMA0_CPAR7_CPAR24,		24
	.EQU	DMA0_CPAR7_CPAR23,		23
	.EQU	DMA0_CPAR7_CPAR22,		22
	.EQU	DMA0_CPAR7_CPAR21,		21
	.EQU	DMA0_CPAR7_CPAR20,		20
	.EQU	DMA0_CPAR7_CPAR19,		19
	.EQU	DMA0_CPAR7_CPAR18,		18
	.EQU	DMA0_CPAR7_CPAR17,		17
	.EQU	DMA0_CPAR7_CPAR16,		16
	.EQU	DMA0_CPAR7_CPAR15,		15
	.EQU	DMA0_CPAR7_CPAR14,		14
	.EQU	DMA0_CPAR7_CPAR13,		13
	.EQU	DMA0_CPAR7_CPAR12,		12
	.EQU	DMA0_CPAR7_CPAR11,		11
	.EQU	DMA0_CPAR7_CPAR10,		10
	.EQU	DMA0_CPAR7_CPAR9,		9
	.EQU	DMA0_CPAR7_CPAR8,		8
	.EQU	DMA0_CPAR7_CPAR7,		7
	.EQU	DMA0_CPAR7_CPAR6,		6
	.EQU	DMA0_CPAR7_CPAR5,		5
	.EQU	DMA0_CPAR7_CPAR4,		4
	.EQU	DMA0_CPAR7_CPAR3,		3
	.EQU	DMA0_CPAR7_CPAR2,		2
	.EQU	DMA0_CPAR7_CPAR1,		1
	.EQU	DMA0_CPAR7_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CMAR1,	0x40001680
//  0x4000 1680  DMA0_CMAR1   Bits-------------------------------------
	.EQU	DMA0_CMAR1_CMAR31,		31
	.EQU	DMA0_CMAR1_CMAR30,		30
	.EQU	DMA0_CMAR1_CMAR29,		29
	.EQU	DMA0_CMAR1_CMAR28,		28
	.EQU	DMA0_CMAR1_CMAR27,		27
	.EQU	DMA0_CMAR1_CMAR26,		26
	.EQU	DMA0_CMAR1_CMAR25,		25
	.EQU	DMA0_CMAR1_CMAR24,		24
	.EQU	DMA0_CMAR1_CMAR23,		23
	.EQU	DMA0_CMAR1_CMAR22,		22
	.EQU	DMA0_CMAR1_CMAR21,		21
	.EQU	DMA0_CMAR1_CMAR20,		20
	.EQU	DMA0_CMAR1_CMAR19,		19
	.EQU	DMA0_CMAR1_CMAR18,		18
	.EQU	DMA0_CMAR1_CMAR17,		17
	.EQU	DMA0_CMAR1_CMAR16,		16
	.EQU	DMA0_CMAR1_CMAR15,		15
	.EQU	DMA0_CMAR1_CMAR14,		14
	.EQU	DMA0_CMAR1_CMAR13,		13
	.EQU	DMA0_CMAR1_CMAR12,		12
	.EQU	DMA0_CMAR1_CMAR11,		11
	.EQU	DMA0_CMAR1_CMAR10,		10
	.EQU	DMA0_CMAR1_CMAR9,		9
	.EQU	DMA0_CMAR1_CMAR8,		8
	.EQU	DMA0_CMAR1_CMAR7,		7
	.EQU	DMA0_CMAR1_CMAR6,		6
	.EQU	DMA0_CMAR1_CMAR5,		5
	.EQU	DMA0_CMAR1_CMAR4,		4
	.EQU	DMA0_CMAR1_CMAR3,		3
	.EQU	DMA0_CMAR1_CMAR2,		2
	.EQU	DMA0_CMAR1_CMAR1,		1
	.EQU	DMA0_CMAR1_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CMAR2,	0x40001684
//  0x4000 1684  DMA0_CMAR2   Bits-------------------------------------
	.EQU	DMA0_CMAR2_CMAR31,		31
	.EQU	DMA0_CMAR2_CMAR30,		30
	.EQU	DMA0_CMAR2_CMAR29,		29
	.EQU	DMA0_CMAR2_CMAR28,		28
	.EQU	DMA0_CMAR2_CMAR27,		27
	.EQU	DMA0_CMAR2_CMAR26,		26
	.EQU	DMA0_CMAR2_CMAR25,		25
	.EQU	DMA0_CMAR2_CMAR24,		24
	.EQU	DMA0_CMAR2_CMAR23,		23
	.EQU	DMA0_CMAR2_CMAR22,		22
	.EQU	DMA0_CMAR2_CMAR21,		21
	.EQU	DMA0_CMAR2_CMAR20,		20
	.EQU	DMA0_CMAR2_CMAR19,		19
	.EQU	DMA0_CMAR2_CMAR18,		18
	.EQU	DMA0_CMAR2_CMAR17,		17
	.EQU	DMA0_CMAR2_CMAR16,		16
	.EQU	DMA0_CMAR2_CMAR15,		15
	.EQU	DMA0_CMAR2_CMAR14,		14
	.EQU	DMA0_CMAR2_CMAR13,		13
	.EQU	DMA0_CMAR2_CMAR12,		12
	.EQU	DMA0_CMAR2_CMAR11,		11
	.EQU	DMA0_CMAR2_CMAR10,		10
	.EQU	DMA0_CMAR2_CMAR9,		9
	.EQU	DMA0_CMAR2_CMAR8,		8
	.EQU	DMA0_CMAR2_CMAR7,		7
	.EQU	DMA0_CMAR2_CMAR6,		6
	.EQU	DMA0_CMAR2_CMAR5,		5
	.EQU	DMA0_CMAR2_CMAR4,		4
	.EQU	DMA0_CMAR2_CMAR3,		3
	.EQU	DMA0_CMAR2_CMAR2,		2
	.EQU	DMA0_CMAR2_CMAR1,		1
	.EQU	DMA0_CMAR2_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CMAR3,	0x40001688
//  0x4000 1688  DMA0_CMAR3   Bits-------------------------------------
	.EQU	DMA0_CMAR3_CMAR31,		31
	.EQU	DMA0_CMAR3_CMAR30,		30
	.EQU	DMA0_CMAR3_CMAR29,		29
	.EQU	DMA0_CMAR3_CMAR28,		28
	.EQU	DMA0_CMAR3_CMAR27,		27
	.EQU	DMA0_CMAR3_CMAR26,		26
	.EQU	DMA0_CMAR3_CMAR25,		25
	.EQU	DMA0_CMAR3_CMAR24,		24
	.EQU	DMA0_CMAR3_CMAR23,		23
	.EQU	DMA0_CMAR3_CMAR22,		22
	.EQU	DMA0_CMAR3_CMAR21,		21
	.EQU	DMA0_CMAR3_CMAR20,		20
	.EQU	DMA0_CMAR3_CMAR19,		19
	.EQU	DMA0_CMAR3_CMAR18,		18
	.EQU	DMA0_CMAR3_CMAR17,		17
	.EQU	DMA0_CMAR3_CMAR16,		16
	.EQU	DMA0_CMAR3_CMAR15,		15
	.EQU	DMA0_CMAR3_CMAR14,		14
	.EQU	DMA0_CMAR3_CMAR13,		13
	.EQU	DMA0_CMAR3_CMAR12,		12
	.EQU	DMA0_CMAR3_CMAR11,		11
	.EQU	DMA0_CMAR3_CMAR10,		10
	.EQU	DMA0_CMAR3_CMAR9,		9
	.EQU	DMA0_CMAR3_CMAR8,		8
	.EQU	DMA0_CMAR3_CMAR7,		7
	.EQU	DMA0_CMAR3_CMAR6,		6
	.EQU	DMA0_CMAR3_CMAR5,		5
	.EQU	DMA0_CMAR3_CMAR4,		4
	.EQU	DMA0_CMAR3_CMAR3,		3
	.EQU	DMA0_CMAR3_CMAR2,		2
	.EQU	DMA0_CMAR3_CMAR1,		1
	.EQU	DMA0_CMAR3_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CMAR4,	0x4000168C
//  0x4000 168C  DMA0_CMAR4   Bits-------------------------------------
	.EQU	DMA0_CMAR4_CMAR31,		31
	.EQU	DMA0_CMAR4_CMAR30,		30
	.EQU	DMA0_CMAR4_CMAR29,		29
	.EQU	DMA0_CMAR4_CMAR28,		28
	.EQU	DMA0_CMAR4_CMAR27,		27
	.EQU	DMA0_CMAR4_CMAR26,		26
	.EQU	DMA0_CMAR4_CMAR25,		25
	.EQU	DMA0_CMAR4_CMAR24,		24
	.EQU	DMA0_CMAR4_CMAR23,		23
	.EQU	DMA0_CMAR4_CMAR22,		22
	.EQU	DMA0_CMAR4_CMAR21,		21
	.EQU	DMA0_CMAR4_CMAR20,		20
	.EQU	DMA0_CMAR4_CMAR19,		19
	.EQU	DMA0_CMAR4_CMAR18,		18
	.EQU	DMA0_CMAR4_CMAR17,		17
	.EQU	DMA0_CMAR4_CMAR16,		16
	.EQU	DMA0_CMAR4_CMAR15,		15
	.EQU	DMA0_CMAR4_CMAR14,		14
	.EQU	DMA0_CMAR4_CMAR13,		13
	.EQU	DMA0_CMAR4_CMAR12,		12
	.EQU	DMA0_CMAR4_CMAR11,		11
	.EQU	DMA0_CMAR4_CMAR10,		10
	.EQU	DMA0_CMAR4_CMAR9,		9
	.EQU	DMA0_CMAR4_CMAR8,		8
	.EQU	DMA0_CMAR4_CMAR7,		7
	.EQU	DMA0_CMAR4_CMAR6,		6
	.EQU	DMA0_CMAR4_CMAR5,		5
	.EQU	DMA0_CMAR4_CMAR4,		4
	.EQU	DMA0_CMAR4_CMAR3,		3
	.EQU	DMA0_CMAR4_CMAR2,		2
	.EQU	DMA0_CMAR4_CMAR1,		1
	.EQU	DMA0_CMAR4_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CMAR5,	0x40001690
//  0x4000 1690  DMA0_CMAR5   Bits-------------------------------------
	.EQU	DMA0_CMAR5_CMAR31,		31
	.EQU	DMA0_CMAR5_CMAR30,		30
	.EQU	DMA0_CMAR5_CMAR29,		29
	.EQU	DMA0_CMAR5_CMAR28,		28
	.EQU	DMA0_CMAR5_CMAR27,		27
	.EQU	DMA0_CMAR5_CMAR26,		26
	.EQU	DMA0_CMAR5_CMAR25,		25
	.EQU	DMA0_CMAR5_CMAR24,		24
	.EQU	DMA0_CMAR5_CMAR23,		23
	.EQU	DMA0_CMAR5_CMAR22,		22
	.EQU	DMA0_CMAR5_CMAR21,		21
	.EQU	DMA0_CMAR5_CMAR20,		20
	.EQU	DMA0_CMAR5_CMAR19,		19
	.EQU	DMA0_CMAR5_CMAR18,		18
	.EQU	DMA0_CMAR5_CMAR17,		17
	.EQU	DMA0_CMAR5_CMAR16,		16
	.EQU	DMA0_CMAR5_CMAR15,		15
	.EQU	DMA0_CMAR5_CMAR14,		14
	.EQU	DMA0_CMAR5_CMAR13,		13
	.EQU	DMA0_CMAR5_CMAR12,		12
	.EQU	DMA0_CMAR5_CMAR11,		11
	.EQU	DMA0_CMAR5_CMAR10,		10
	.EQU	DMA0_CMAR5_CMAR9,		9
	.EQU	DMA0_CMAR5_CMAR8,		8
	.EQU	DMA0_CMAR5_CMAR7,		7
	.EQU	DMA0_CMAR5_CMAR6,		6
	.EQU	DMA0_CMAR5_CMAR5,		5
	.EQU	DMA0_CMAR5_CMAR4,		4
	.EQU	DMA0_CMAR5_CMAR3,		3
	.EQU	DMA0_CMAR5_CMAR2,		2
	.EQU	DMA0_CMAR5_CMAR1,		1
	.EQU	DMA0_CMAR5_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CMAR6,	0x40001694
//  0x4000 1694  DMA0_CMAR6   Bits-------------------------------------
	.EQU	DMA0_CMAR6_CMAR31,		31
	.EQU	DMA0_CMAR6_CMAR30,		30
	.EQU	DMA0_CMAR6_CMAR29,		29
	.EQU	DMA0_CMAR6_CMAR28,		28
	.EQU	DMA0_CMAR6_CMAR27,		27
	.EQU	DMA0_CMAR6_CMAR26,		26
	.EQU	DMA0_CMAR6_CMAR25,		25
	.EQU	DMA0_CMAR6_CMAR24,		24
	.EQU	DMA0_CMAR6_CMAR23,		23
	.EQU	DMA0_CMAR6_CMAR22,		22
	.EQU	DMA0_CMAR6_CMAR21,		21
	.EQU	DMA0_CMAR6_CMAR20,		20
	.EQU	DMA0_CMAR6_CMAR19,		19
	.EQU	DMA0_CMAR6_CMAR18,		18
	.EQU	DMA0_CMAR6_CMAR17,		17
	.EQU	DMA0_CMAR6_CMAR16,		16
	.EQU	DMA0_CMAR6_CMAR15,		15
	.EQU	DMA0_CMAR6_CMAR14,		14
	.EQU	DMA0_CMAR6_CMAR13,		13
	.EQU	DMA0_CMAR6_CMAR12,		12
	.EQU	DMA0_CMAR6_CMAR11,		11
	.EQU	DMA0_CMAR6_CMAR10,		10
	.EQU	DMA0_CMAR6_CMAR9,		9
	.EQU	DMA0_CMAR6_CMAR8,		8
	.EQU	DMA0_CMAR6_CMAR7,		7
	.EQU	DMA0_CMAR6_CMAR6,		6
	.EQU	DMA0_CMAR6_CMAR5,		5
	.EQU	DMA0_CMAR6_CMAR4,		4
	.EQU	DMA0_CMAR6_CMAR3,		3
	.EQU	DMA0_CMAR6_CMAR2,		2
	.EQU	DMA0_CMAR6_CMAR1,		1
	.EQU	DMA0_CMAR6_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA0_CMAR7,	0x40001698
//  0x4000 1698  DMA0_CMAR7   Bits-------------------------------------
	.EQU	DMA0_CMAR7_CMAR31,		31
	.EQU	DMA0_CMAR7_CMAR30,		30
	.EQU	DMA0_CMAR7_CMAR29,		29
	.EQU	DMA0_CMAR7_CMAR28,		28
	.EQU	DMA0_CMAR7_CMAR27,		27
	.EQU	DMA0_CMAR7_CMAR26,		26
	.EQU	DMA0_CMAR7_CMAR25,		25
	.EQU	DMA0_CMAR7_CMAR24,		24
	.EQU	DMA0_CMAR7_CMAR23,		23
	.EQU	DMA0_CMAR7_CMAR22,		22
	.EQU	DMA0_CMAR7_CMAR21,		21
	.EQU	DMA0_CMAR7_CMAR20,		20
	.EQU	DMA0_CMAR7_CMAR19,		19
	.EQU	DMA0_CMAR7_CMAR18,		18
	.EQU	DMA0_CMAR7_CMAR17,		17
	.EQU	DMA0_CMAR7_CMAR16,		16
	.EQU	DMA0_CMAR7_CMAR15,		15
	.EQU	DMA0_CMAR7_CMAR14,		14
	.EQU	DMA0_CMAR7_CMAR13,		13
	.EQU	DMA0_CMAR7_CMAR12,		12
	.EQU	DMA0_CMAR7_CMAR11,		11
	.EQU	DMA0_CMAR7_CMAR10,		10
	.EQU	DMA0_CMAR7_CMAR9,		9
	.EQU	DMA0_CMAR7_CMAR8,		8
	.EQU	DMA0_CMAR7_CMAR7,		7
	.EQU	DMA0_CMAR7_CMAR6,		6
	.EQU	DMA0_CMAR7_CMAR5,		5
	.EQU	DMA0_CMAR7_CMAR4,		4
	.EQU	DMA0_CMAR7_CMAR3,		3
	.EQU	DMA0_CMAR7_CMAR2,		2
	.EQU	DMA0_CMAR7_CMAR1,		1
	.EQU	DMA0_CMAR7_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA0_NCT1,		0x400016A0
//  0x4000 16A0  DMA0_NCT1   Bits-------------------------------------
	.EQU	DMA0_NCT1_NCT31,		31
	.EQU	DMA0_NCT1_NCT30,		30
	.EQU	DMA0_NCT1_NCT29,		29
	.EQU	DMA0_NCT1_NCT28,		28
	.EQU	DMA0_NCT1_NCT27,		27
	.EQU	DMA0_NCT1_NCT26,		26
	.EQU	DMA0_NCT1_NCT25,		25
	.EQU	DMA0_NCT1_NCT24,		24
	.EQU	DMA0_NCT1_NCT23,		23
	.EQU	DMA0_NCT1_NCT22,		22
	.EQU	DMA0_NCT1_NCT21,		21
	.EQU	DMA0_NCT1_NCT20,		20
	.EQU	DMA0_NCT1_NCT19,		19
	.EQU	DMA0_NCT1_NCT18,		18
	.EQU	DMA0_NCT1_NCT17,		17
	.EQU	DMA0_NCT1_NCT16,		16
//  register-------------------------------------
	.EQU	DMA0_NCT2,		0x400016A4
//  0x4000 16A4  DMA0_NCT2   Bits-------------------------------------
	.EQU	DMA0_NCT2_NCT31,		31
	.EQU	DMA0_NCT2_NCT30,		30
	.EQU	DMA0_NCT2_NCT29,		29
	.EQU	DMA0_NCT2_NCT28,		28
	.EQU	DMA0_NCT2_NCT27,		27
	.EQU	DMA0_NCT2_NCT26,		26
	.EQU	DMA0_NCT2_NCT25,		25
	.EQU	DMA0_NCT2_NCT24,		24
	.EQU	DMA0_NCT2_NCT23,		23
	.EQU	DMA0_NCT2_NCT22,		22
	.EQU	DMA0_NCT2_NCT21,		21
	.EQU	DMA0_NCT2_NCT20,		20
	.EQU	DMA0_NCT2_NCT19,		19
	.EQU	DMA0_NCT2_NCT18,		18
	.EQU	DMA0_NCT2_NCT17,		17
	.EQU	DMA0_NCT2_NCT16,		16
//  register-------------------------------------
	.EQU	DMA0_NCT3,		0x400016A8
//  0x4000 16A8  DMA0_NCT3   Bits-------------------------------------
	.EQU	DMA0_NCT3_NCT31,		31
	.EQU	DMA0_NCT3_NCT30,		30
	.EQU	DMA0_NCT3_NCT29,		29
	.EQU	DMA0_NCT3_NCT28,		28
	.EQU	DMA0_NCT3_NCT27,		27
	.EQU	DMA0_NCT3_NCT26,		26
	.EQU	DMA0_NCT3_NCT25,		25
	.EQU	DMA0_NCT3_NCT24,		24
	.EQU	DMA0_NCT3_NCT23,		23
	.EQU	DMA0_NCT3_NCT22,		22
	.EQU	DMA0_NCT3_NCT21,		21
	.EQU	DMA0_NCT3_NCT20,		20
	.EQU	DMA0_NCT3_NCT19,		19
	.EQU	DMA0_NCT3_NCT18,		18
	.EQU	DMA0_NCT3_NCT17,		17
	.EQU	DMA0_NCT3_NCT16,		16
//  register-------------------------------------
	.EQU	DMA0_NCT4,		0x400016AC
//  0x4000 16AC  DMA0_NCT4   Bits-------------------------------------
	.EQU	DMA0_NCT4_NCT31,		31
	.EQU	DMA0_NCT4_NCT30,		30
	.EQU	DMA0_NCT4_NCT29,		29
	.EQU	DMA0_NCT4_NCT28,		28
	.EQU	DMA0_NCT4_NCT27,		27
	.EQU	DMA0_NCT4_NCT26,		26
	.EQU	DMA0_NCT4_NCT25,		25
	.EQU	DMA0_NCT4_NCT24,		24
	.EQU	DMA0_NCT4_NCT23,		23
	.EQU	DMA0_NCT4_NCT22,		22
	.EQU	DMA0_NCT4_NCT21,		21
	.EQU	DMA0_NCT4_NCT20,		20
	.EQU	DMA0_NCT4_NCT19,		19
	.EQU	DMA0_NCT4_NCT18,		18
	.EQU	DMA0_NCT4_NCT17,		17
	.EQU	DMA0_NCT4_NCT16,		16
//  register-------------------------------------
	.EQU	DMA0_NCT5,		0x400016B0
//  0x4000 16B0  DMA0_NCT5   Bits-------------------------------------
	.EQU	DMA0_NCT5_NCT31,		31
	.EQU	DMA0_NCT5_NCT30,		30
	.EQU	DMA0_NCT5_NCT29,		29
	.EQU	DMA0_NCT5_NCT28,		28
	.EQU	DMA0_NCT5_NCT27,		27
	.EQU	DMA0_NCT5_NCT26,		26
	.EQU	DMA0_NCT5_NCT25,		25
	.EQU	DMA0_NCT5_NCT24,		24
	.EQU	DMA0_NCT5_NCT23,		23
	.EQU	DMA0_NCT5_NCT22,		22
	.EQU	DMA0_NCT5_NCT21,		21
	.EQU	DMA0_NCT5_NCT20,		20
	.EQU	DMA0_NCT5_NCT19,		19
	.EQU	DMA0_NCT5_NCT18,		18
	.EQU	DMA0_NCT5_NCT17,		17
	.EQU	DMA0_NCT5_NCT16,		16
//  register-------------------------------------
	.EQU	DMA0_NCT6,		0x400016B4
//  0x4000 16B4  DMA0_NCT6   Bits-------------------------------------
	.EQU	DMA0_NCT6_NCT31,		31
	.EQU	DMA0_NCT6_NCT30,		30
	.EQU	DMA0_NCT6_NCT29,		29
	.EQU	DMA0_NCT6_NCT28,		28
	.EQU	DMA0_NCT6_NCT27,		27
	.EQU	DMA0_NCT6_NCT26,		26
	.EQU	DMA0_NCT6_NCT25,		25
	.EQU	DMA0_NCT6_NCT24,		24
	.EQU	DMA0_NCT6_NCT23,		23
	.EQU	DMA0_NCT6_NCT22,		22
	.EQU	DMA0_NCT6_NCT21,		21
	.EQU	DMA0_NCT6_NCT20,		20
	.EQU	DMA0_NCT6_NCT19,		19
	.EQU	DMA0_NCT6_NCT18,		18
	.EQU	DMA0_NCT6_NCT17,		17
	.EQU	DMA0_NCT6_NCT16,		16
//  register-------------------------------------
	.EQU	DMA0_NCT7,		0x400016B8
//  0x4000 16B8  DMA0_NCT7   Bits-------------------------------------
	.EQU	DMA0_NCT7_NCT31,		31
	.EQU	DMA0_NCT7_NCT30,		30
	.EQU	DMA0_NCT7_NCT29,		29
	.EQU	DMA0_NCT7_NCT28,		28
	.EQU	DMA0_NCT7_NCT27,		27
	.EQU	DMA0_NCT7_NCT26,		26
	.EQU	DMA0_NCT7_NCT25,		25
	.EQU	DMA0_NCT7_NCT24,		24
	.EQU	DMA0_NCT7_NCT23,		23
	.EQU	DMA0_NCT7_NCT22,		22
	.EQU	DMA0_NCT7_NCT21,		21
	.EQU	DMA0_NCT7_NCT20,		20
	.EQU	DMA0_NCT7_NCT19,		19
	.EQU	DMA0_NCT7_NCT18,		18
	.EQU	DMA0_NCT7_NCT17,		17
	.EQU	DMA0_NCT7_NCT16,		16
//  register-------------------------------------
	.EQU	DMA0_LIFR,		0x400016C0
//  0x4000 16C0  DMA0_LIFR   Bits-------------------------------------
	.EQU	DMA0_LIFR_ETIF7,		20
	.EQU	DMA0_LIFR_HTIF7,		19
	.EQU	DMA0_LIFR_FTIF7,		18
	.EQU	DMA0_LIFR_ETIF6,		17
	.EQU	DMA0_LIFR_HTIF6,		16
	.EQU	DMA0_LIFR_FTIF6,		15
	.EQU	DMA0_LIFR_ETIF5,		14
	.EQU	DMA0_LIFR_HTIF5,		13
	.EQU	DMA0_LIFR_FTIF5,		12
	.EQU	DMA0_LIFR_ETIF4,		11
	.EQU	DMA0_LIFR_HTIF4,		10
	.EQU	DMA0_LIFR_FTIF4,		9
	.EQU	DMA0_LIFR_ETIF3,		8
	.EQU	DMA0_LIFR_HTIF3,		7
	.EQU	DMA0_LIFR_FTIF3,		6
	.EQU	DMA0_LIFR_ETIF2,		5
	.EQU	DMA0_LIFR_HTIF2,		4
	.EQU	DMA0_LIFR_FTIF2,		3
	.EQU	DMA0_LIFR_ETIF1,		2
	.EQU	DMA0_LIFR_HTIF1,		1
	.EQU	DMA0_LIFR_FTIF1,		0
//  register-------------------------------------
	.EQU	DMA0_LIER,		0x400016C4
//  0x4000 16C4  DMA0_LIER   Bits-------------------------------------
	.EQU	DMA0_LIER_ETIE7,		20
	.EQU	DMA0_LIER_HTIE7,		19
	.EQU	DMA0_LIER_FTIE7,		18
	.EQU	DMA0_LIER_ETIE6,		17
	.EQU	DMA0_LIER_HTIE6,		16
	.EQU	DMA0_LIER_FTIE6,		15
	.EQU	DMA0_LIER_ETIE5,		14
	.EQU	DMA0_LIER_HTIE5,		13
	.EQU	DMA0_LIER_FTIE5,		12
	.EQU	DMA0_LIER_ETIE4,		11
	.EQU	DMA0_LIER_HTIE4,		10
	.EQU	DMA0_LIER_FTIE4,		9
	.EQU	DMA0_LIER_ETIE3,		8
	.EQU	DMA0_LIER_HTIE3,		7
	.EQU	DMA0_LIER_FTIE3,		6
	.EQU	DMA0_LIER_ETIE2,		5
	.EQU	DMA0_LIER_HTIE2,		4
	.EQU	DMA0_LIER_FTIE2,		3
	.EQU	DMA0_LIER_ETIE1,		2
	.EQU	DMA0_LIER_HTIE1,		1
	.EQU	DMA0_LIER_FTIE1,		0
//  register-------------------------------------
	.EQU	DMA1_CTLR1,	0x40001700
//  0x4000 1700  DMA1_CTLR1   Bits-------------------------------------
	.EQU	DMA1_CTLR1_NUMODT15,		31
	.EQU	DMA1_CTLR1_NUMODT14,		30
	.EQU	DMA1_CTLR1_NUMODT13,		29
	.EQU	DMA1_CTLR1_NUMODT12,		28
	.EQU	DMA1_CTLR1_NUMODT11,		27
	.EQU	DMA1_CTLR1_NUMODT10,		26
	.EQU	DMA1_CTLR1_NUMODT9,		25
	.EQU	DMA1_CTLR1_NUMODT8,		24
	.EQU	DMA1_CTLR1_NUMODT7,		23
	.EQU	DMA1_CTLR1_NUMODT6,		22
	.EQU	DMA1_CTLR1_NUMODT5,		21
	.EQU	DMA1_CTLR1_NUMODT4,		20
	.EQU	DMA1_CTLR1_NUMODT3,		19
	.EQU	DMA1_CTLR1_NUMODT2,		18
	.EQU	DMA1_CTLR1_NUMODT1,		17
	.EQU	DMA1_CTLR1_NUMODT0,		16
	.EQU	DMA1_CTLR1_M2M,		15
	.EQU	DMA1_CTLR1_CPL1,		14
	.EQU	DMA1_CTLR1_CPL0,		13
	.EQU	DMA1_CTLR1_ONESHOT,		12
	.EQU	DMA1_CTLR1_PDS1,		11
	.EQU	DMA1_CTLR1_PDS0,		10
	.EQU	DMA1_CTLR1_MDS1,		9
	.EQU	DMA1_CTLR1_MDS0,		8
	.EQU	DMA1_CTLR1_PINC,		7
	.EQU	DMA1_CTLR1_MINC,		6
	.EQU	DMA1_CTLR1_LPM,		5
	.EQU	DMA1_CTLR1_DDIR,		4
	.EQU	DMA1_CTLR1_BLKM,		3
	.EQU	DMA1_CTLR1_DMAMODES,		2
	.EQU	DMA1_CTLR1_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA1_CTLR2,	0x40001704
//  0x4000 1704  DMA1_CTLR2   Bits-------------------------------------
	.EQU	DMA1_CTLR2_NUMODT15,		31
	.EQU	DMA1_CTLR2_NUMODT14,		30
	.EQU	DMA1_CTLR2_NUMODT13,		29
	.EQU	DMA1_CTLR2_NUMODT12,		28
	.EQU	DMA1_CTLR2_NUMODT11,		27
	.EQU	DMA1_CTLR2_NUMODT10,		26
	.EQU	DMA1_CTLR2_NUMODT9,		25
	.EQU	DMA1_CTLR2_NUMODT8,		24
	.EQU	DMA1_CTLR2_NUMODT7,		23
	.EQU	DMA1_CTLR2_NUMODT6,		22
	.EQU	DMA1_CTLR2_NUMODT5,		21
	.EQU	DMA1_CTLR2_NUMODT4,		20
	.EQU	DMA1_CTLR2_NUMODT3,		19
	.EQU	DMA1_CTLR2_NUMODT2,		18
	.EQU	DMA1_CTLR2_NUMODT1,		17
	.EQU	DMA1_CTLR2_NUMODT0,		16
	.EQU	DMA1_CTLR2_M2M,		15
	.EQU	DMA1_CTLR2_CPL1,		14
	.EQU	DMA1_CTLR2_CPL0,		13
	.EQU	DMA1_CTLR2_ONESHOT,		12
	.EQU	DMA1_CTLR2_PDS1,		11
	.EQU	DMA1_CTLR2_PDS0,		10
	.EQU	DMA1_CTLR2_MDS1,		9
	.EQU	DMA1_CTLR2_MDS0,		8
	.EQU	DMA1_CTLR2_PINC,		7
	.EQU	DMA1_CTLR2_MINC,		6
	.EQU	DMA1_CTLR2_LPM,		5
	.EQU	DMA1_CTLR2_DDIR,		4
	.EQU	DMA1_CTLR2_BLKM,		3
	.EQU	DMA1_CTLR2_DMAMODES,		2
	.EQU	DMA1_CTLR2_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA1_CTLR3,	0x40001708
//  0x4000 1708  DMA1_CTLR3   Bits-------------------------------------
	.EQU	DMA1_CTLR3_NUMODT15,		31
	.EQU	DMA1_CTLR3_NUMODT14,		30
	.EQU	DMA1_CTLR3_NUMODT13,		29
	.EQU	DMA1_CTLR3_NUMODT12,		28
	.EQU	DMA1_CTLR3_NUMODT11,		27
	.EQU	DMA1_CTLR3_NUMODT10,		26
	.EQU	DMA1_CTLR3_NUMODT9,		25
	.EQU	DMA1_CTLR3_NUMODT8,		24
	.EQU	DMA1_CTLR3_NUMODT7,		23
	.EQU	DMA1_CTLR3_NUMODT6,		22
	.EQU	DMA1_CTLR3_NUMODT5,		21
	.EQU	DMA1_CTLR3_NUMODT4,		20
	.EQU	DMA1_CTLR3_NUMODT3,		19
	.EQU	DMA1_CTLR3_NUMODT2,		18
	.EQU	DMA1_CTLR3_NUMODT1,		17
	.EQU	DMA1_CTLR3_NUMODT0,		16
	.EQU	DMA1_CTLR3_M2M,		15
	.EQU	DMA1_CTLR3_CPL1,		14
	.EQU	DMA1_CTLR3_CPL0,		13
	.EQU	DMA1_CTLR3_ONESHOT,		12
	.EQU	DMA1_CTLR3_PDS1,		11
	.EQU	DMA1_CTLR3_PDS0,		10
	.EQU	DMA1_CTLR3_MDS1,		9
	.EQU	DMA1_CTLR3_MDS0,		8
	.EQU	DMA1_CTLR3_PINC,		7
	.EQU	DMA1_CTLR3_MINC,		6
	.EQU	DMA1_CTLR3_LPM,		5
	.EQU	DMA1_CTLR3_DDIR,		4
	.EQU	DMA1_CTLR3_BLKM,		3
	.EQU	DMA1_CTLR3_DMAMODES,		2
	.EQU	DMA1_CTLR3_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA1_CTLR4,	0x4000170C
//  0x4000 170C  DMA1_CTLR4   Bits-------------------------------------
	.EQU	DMA1_CTLR4_NUMODT15,		31
	.EQU	DMA1_CTLR4_NUMODT14,		30
	.EQU	DMA1_CTLR4_NUMODT13,		29
	.EQU	DMA1_CTLR4_NUMODT12,		28
	.EQU	DMA1_CTLR4_NUMODT11,		27
	.EQU	DMA1_CTLR4_NUMODT10,		26
	.EQU	DMA1_CTLR4_NUMODT9,		25
	.EQU	DMA1_CTLR4_NUMODT8,		24
	.EQU	DMA1_CTLR4_NUMODT7,		23
	.EQU	DMA1_CTLR4_NUMODT6,		22
	.EQU	DMA1_CTLR4_NUMODT5,		21
	.EQU	DMA1_CTLR4_NUMODT4,		20
	.EQU	DMA1_CTLR4_NUMODT3,		19
	.EQU	DMA1_CTLR4_NUMODT2,		18
	.EQU	DMA1_CTLR4_NUMODT1,		17
	.EQU	DMA1_CTLR4_NUMODT0,		16
	.EQU	DMA1_CTLR4_M2M,		15
	.EQU	DMA1_CTLR4_CPL1,		14
	.EQU	DMA1_CTLR4_CPL0,		13
	.EQU	DMA1_CTLR4_ONESHOT,		12
	.EQU	DMA1_CTLR4_PDS1,		11
	.EQU	DMA1_CTLR4_PDS0,		10
	.EQU	DMA1_CTLR4_MDS1,		9
	.EQU	DMA1_CTLR4_MDS0,		8
	.EQU	DMA1_CTLR4_PINC,		7
	.EQU	DMA1_CTLR4_MINC,		6
	.EQU	DMA1_CTLR4_LPM,		5
	.EQU	DMA1_CTLR4_DDIR,		4
	.EQU	DMA1_CTLR4_BLKM,		3
	.EQU	DMA1_CTLR4_DMAMODES,		2
	.EQU	DMA1_CTLR4_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA1_CTLR5,	0x40001710
//  0x4000 1710  DMA1_CTLR5   Bits-------------------------------------
	.EQU	DMA1_CTLR5_NUMODT15,		31
	.EQU	DMA1_CTLR5_NUMODT14,		30
	.EQU	DMA1_CTLR5_NUMODT13,		29
	.EQU	DMA1_CTLR5_NUMODT12,		28
	.EQU	DMA1_CTLR5_NUMODT11,		27
	.EQU	DMA1_CTLR5_NUMODT10,		26
	.EQU	DMA1_CTLR5_NUMODT9,		25
	.EQU	DMA1_CTLR5_NUMODT8,		24
	.EQU	DMA1_CTLR5_NUMODT7,		23
	.EQU	DMA1_CTLR5_NUMODT6,		22
	.EQU	DMA1_CTLR5_NUMODT5,		21
	.EQU	DMA1_CTLR5_NUMODT4,		20
	.EQU	DMA1_CTLR5_NUMODT3,		19
	.EQU	DMA1_CTLR5_NUMODT2,		18
	.EQU	DMA1_CTLR5_NUMODT1,		17
	.EQU	DMA1_CTLR5_NUMODT0,		16
	.EQU	DMA1_CTLR5_M2M,		15
	.EQU	DMA1_CTLR5_CPL1,		14
	.EQU	DMA1_CTLR5_CPL0,		13
	.EQU	DMA1_CTLR5_ONESHOT,		12
	.EQU	DMA1_CTLR5_PDS1,		11
	.EQU	DMA1_CTLR5_PDS0,		10
	.EQU	DMA1_CTLR5_MDS1,		9
	.EQU	DMA1_CTLR5_MDS0,		8
	.EQU	DMA1_CTLR5_PINC,		7
	.EQU	DMA1_CTLR5_MINC,		6
	.EQU	DMA1_CTLR5_LPM,		5
	.EQU	DMA1_CTLR5_DDIR,		4
	.EQU	DMA1_CTLR5_BLKM,		3
	.EQU	DMA1_CTLR5_DMAMODES,		2
	.EQU	DMA1_CTLR5_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA1_CTLR6,	0x40001714
//  0x4000 1714  DMA1_CTLR6   Bits-------------------------------------
	.EQU	DMA1_CTLR6_NUMODT15,		31
	.EQU	DMA1_CTLR6_NUMODT14,		30
	.EQU	DMA1_CTLR6_NUMODT13,		29
	.EQU	DMA1_CTLR6_NUMODT12,		28
	.EQU	DMA1_CTLR6_NUMODT11,		27
	.EQU	DMA1_CTLR6_NUMODT10,		26
	.EQU	DMA1_CTLR6_NUMODT9,		25
	.EQU	DMA1_CTLR6_NUMODT8,		24
	.EQU	DMA1_CTLR6_NUMODT7,		23
	.EQU	DMA1_CTLR6_NUMODT6,		22
	.EQU	DMA1_CTLR6_NUMODT5,		21
	.EQU	DMA1_CTLR6_NUMODT4,		20
	.EQU	DMA1_CTLR6_NUMODT3,		19
	.EQU	DMA1_CTLR6_NUMODT2,		18
	.EQU	DMA1_CTLR6_NUMODT1,		17
	.EQU	DMA1_CTLR6_NUMODT0,		16
	.EQU	DMA1_CTLR6_M2M,		15
	.EQU	DMA1_CTLR6_CPL1,		14
	.EQU	DMA1_CTLR6_CPL0,		13
	.EQU	DMA1_CTLR6_ONESHOT,		12
	.EQU	DMA1_CTLR6_PDS1,		11
	.EQU	DMA1_CTLR6_PDS0,		10
	.EQU	DMA1_CTLR6_MDS1,		9
	.EQU	DMA1_CTLR6_MDS0,		8
	.EQU	DMA1_CTLR6_PINC,		7
	.EQU	DMA1_CTLR6_MINC,		6
	.EQU	DMA1_CTLR6_LPM,		5
	.EQU	DMA1_CTLR6_DDIR,		4
	.EQU	DMA1_CTLR6_BLKM,		3
	.EQU	DMA1_CTLR6_DMAMODES,		2
	.EQU	DMA1_CTLR6_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA1_CTLR7,	0x40001718
//  0x4000 1718  DMA1_CTLR7   Bits-------------------------------------
	.EQU	DMA1_CTLR7_NUMODT15,		31
	.EQU	DMA1_CTLR7_NUMODT14,		30
	.EQU	DMA1_CTLR7_NUMODT13,		29
	.EQU	DMA1_CTLR7_NUMODT12,		28
	.EQU	DMA1_CTLR7_NUMODT11,		27
	.EQU	DMA1_CTLR7_NUMODT10,		26
	.EQU	DMA1_CTLR7_NUMODT9,		25
	.EQU	DMA1_CTLR7_NUMODT8,		24
	.EQU	DMA1_CTLR7_NUMODT7,		23
	.EQU	DMA1_CTLR7_NUMODT6,		22
	.EQU	DMA1_CTLR7_NUMODT5,		21
	.EQU	DMA1_CTLR7_NUMODT4,		20
	.EQU	DMA1_CTLR7_NUMODT3,		19
	.EQU	DMA1_CTLR7_NUMODT2,		18
	.EQU	DMA1_CTLR7_NUMODT1,		17
	.EQU	DMA1_CTLR7_NUMODT0,		16
	.EQU	DMA1_CTLR7_M2M,		15
	.EQU	DMA1_CTLR7_CPL1,		14
	.EQU	DMA1_CTLR7_CPL0,		13
	.EQU	DMA1_CTLR7_ONESHOT,		12
	.EQU	DMA1_CTLR7_PDS1,		11
	.EQU	DMA1_CTLR7_PDS0,		10
	.EQU	DMA1_CTLR7_MDS1,		9
	.EQU	DMA1_CTLR7_MDS0,		8
	.EQU	DMA1_CTLR7_PINC,		7
	.EQU	DMA1_CTLR7_MINC,		6
	.EQU	DMA1_CTLR7_LPM,		5
	.EQU	DMA1_CTLR7_DDIR,		4
	.EQU	DMA1_CTLR7_BLKM,		3
	.EQU	DMA1_CTLR7_DMAMODES,		2
	.EQU	DMA1_CTLR7_DMAEN,		0
//  register-------------------------------------
	.EQU	DMA1_PADDR1,	0x40001720
//  0x4000 1720  DMA1_PADDR1   Bits-------------------------------------
	.EQU	DMA1_PADDR1_PADDR31,		31
	.EQU	DMA1_PADDR1_PADDR30,		30
	.EQU	DMA1_PADDR1_PADDR29,		29
	.EQU	DMA1_PADDR1_PADDR28,		28
	.EQU	DMA1_PADDR1_PADDR27,		27
	.EQU	DMA1_PADDR1_PADDR26,		26
	.EQU	DMA1_PADDR1_PADDR25,		25
	.EQU	DMA1_PADDR1_PADDR24,		24
	.EQU	DMA1_PADDR1_PADDR23,		23
	.EQU	DMA1_PADDR1_PADDR22,		22
	.EQU	DMA1_PADDR1_PADDR21,		21
	.EQU	DMA1_PADDR1_PADDR20,		20
	.EQU	DMA1_PADDR1_PADDR19,		19
	.EQU	DMA1_PADDR1_PADDR18,		18
	.EQU	DMA1_PADDR1_PADDR17,		17
	.EQU	DMA1_PADDR1_PADDR16,		16
	.EQU	DMA1_PADDR1_PADDR15,		15
	.EQU	DMA1_PADDR1_PADDR14,		14
	.EQU	DMA1_PADDR1_PADDR13,		13
	.EQU	DMA1_PADDR1_PADDR12,		12
	.EQU	DMA1_PADDR1_PADDR11,		11
	.EQU	DMA1_PADDR1_PADDR10,		10
	.EQU	DMA1_PADDR1_PADDR9,		9
	.EQU	DMA1_PADDR1_PADDR8,		8
	.EQU	DMA1_PADDR1_PADDR7,		7
	.EQU	DMA1_PADDR1_PADDR6,		6
	.EQU	DMA1_PADDR1_PADDR5,		5
	.EQU	DMA1_PADDR1_PADDR4,		4
	.EQU	DMA1_PADDR1_PADDR3,		3
	.EQU	DMA1_PADDR1_PADDR2,		2
	.EQU	DMA1_PADDR1_PADDR1,		1
	.EQU	DMA1_PADDR1_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_PADDR2,	0x40001724
//  0x4000 1724  DMA1_PADDR2   Bits-------------------------------------
	.EQU	DMA1_PADDR2_PADDR31,		31
	.EQU	DMA1_PADDR2_PADDR30,		30
	.EQU	DMA1_PADDR2_PADDR29,		29
	.EQU	DMA1_PADDR2_PADDR28,		28
	.EQU	DMA1_PADDR2_PADDR27,		27
	.EQU	DMA1_PADDR2_PADDR26,		26
	.EQU	DMA1_PADDR2_PADDR25,		25
	.EQU	DMA1_PADDR2_PADDR24,		24
	.EQU	DMA1_PADDR2_PADDR23,		23
	.EQU	DMA1_PADDR2_PADDR22,		22
	.EQU	DMA1_PADDR2_PADDR21,		21
	.EQU	DMA1_PADDR2_PADDR20,		20
	.EQU	DMA1_PADDR2_PADDR19,		19
	.EQU	DMA1_PADDR2_PADDR18,		18
	.EQU	DMA1_PADDR2_PADDR17,		17
	.EQU	DMA1_PADDR2_PADDR16,		16
	.EQU	DMA1_PADDR2_PADDR15,		15
	.EQU	DMA1_PADDR2_PADDR14,		14
	.EQU	DMA1_PADDR2_PADDR13,		13
	.EQU	DMA1_PADDR2_PADDR12,		12
	.EQU	DMA1_PADDR2_PADDR11,		11
	.EQU	DMA1_PADDR2_PADDR10,		10
	.EQU	DMA1_PADDR2_PADDR9,		9
	.EQU	DMA1_PADDR2_PADDR8,		8
	.EQU	DMA1_PADDR2_PADDR7,		7
	.EQU	DMA1_PADDR2_PADDR6,		6
	.EQU	DMA1_PADDR2_PADDR5,		5
	.EQU	DMA1_PADDR2_PADDR4,		4
	.EQU	DMA1_PADDR2_PADDR3,		3
	.EQU	DMA1_PADDR2_PADDR2,		2
	.EQU	DMA1_PADDR2_PADDR1,		1
	.EQU	DMA1_PADDR2_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_PADDR3,	0x40001728
//  0x4000 1728  DMA1_PADDR3   Bits-------------------------------------
	.EQU	DMA1_PADDR3_PADDR31,		31
	.EQU	DMA1_PADDR3_PADDR30,		30
	.EQU	DMA1_PADDR3_PADDR29,		29
	.EQU	DMA1_PADDR3_PADDR28,		28
	.EQU	DMA1_PADDR3_PADDR27,		27
	.EQU	DMA1_PADDR3_PADDR26,		26
	.EQU	DMA1_PADDR3_PADDR25,		25
	.EQU	DMA1_PADDR3_PADDR24,		24
	.EQU	DMA1_PADDR3_PADDR23,		23
	.EQU	DMA1_PADDR3_PADDR22,		22
	.EQU	DMA1_PADDR3_PADDR21,		21
	.EQU	DMA1_PADDR3_PADDR20,		20
	.EQU	DMA1_PADDR3_PADDR19,		19
	.EQU	DMA1_PADDR3_PADDR18,		18
	.EQU	DMA1_PADDR3_PADDR17,		17
	.EQU	DMA1_PADDR3_PADDR16,		16
	.EQU	DMA1_PADDR3_PADDR15,		15
	.EQU	DMA1_PADDR3_PADDR14,		14
	.EQU	DMA1_PADDR3_PADDR13,		13
	.EQU	DMA1_PADDR3_PADDR12,		12
	.EQU	DMA1_PADDR3_PADDR11,		11
	.EQU	DMA1_PADDR3_PADDR10,		10
	.EQU	DMA1_PADDR3_PADDR9,		9
	.EQU	DMA1_PADDR3_PADDR8,		8
	.EQU	DMA1_PADDR3_PADDR7,		7
	.EQU	DMA1_PADDR3_PADDR6,		6
	.EQU	DMA1_PADDR3_PADDR5,		5
	.EQU	DMA1_PADDR3_PADDR4,		4
	.EQU	DMA1_PADDR3_PADDR3,		3
	.EQU	DMA1_PADDR3_PADDR2,		2
	.EQU	DMA1_PADDR3_PADDR1,		1
	.EQU	DMA1_PADDR3_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_PADDR4,	0x4000172C
//  0x4000 172C  DMA1_PADDR4   Bits-------------------------------------
	.EQU	DMA1_PADDR4_PADDR31,		31
	.EQU	DMA1_PADDR4_PADDR30,		30
	.EQU	DMA1_PADDR4_PADDR29,		29
	.EQU	DMA1_PADDR4_PADDR28,		28
	.EQU	DMA1_PADDR4_PADDR27,		27
	.EQU	DMA1_PADDR4_PADDR26,		26
	.EQU	DMA1_PADDR4_PADDR25,		25
	.EQU	DMA1_PADDR4_PADDR24,		24
	.EQU	DMA1_PADDR4_PADDR23,		23
	.EQU	DMA1_PADDR4_PADDR22,		22
	.EQU	DMA1_PADDR4_PADDR21,		21
	.EQU	DMA1_PADDR4_PADDR20,		20
	.EQU	DMA1_PADDR4_PADDR19,		19
	.EQU	DMA1_PADDR4_PADDR18,		18
	.EQU	DMA1_PADDR4_PADDR17,		17
	.EQU	DMA1_PADDR4_PADDR16,		16
	.EQU	DMA1_PADDR4_PADDR15,		15
	.EQU	DMA1_PADDR4_PADDR14,		14
	.EQU	DMA1_PADDR4_PADDR13,		13
	.EQU	DMA1_PADDR4_PADDR12,		12
	.EQU	DMA1_PADDR4_PADDR11,		11
	.EQU	DMA1_PADDR4_PADDR10,		10
	.EQU	DMA1_PADDR4_PADDR9,		9
	.EQU	DMA1_PADDR4_PADDR8,		8
	.EQU	DMA1_PADDR4_PADDR7,		7
	.EQU	DMA1_PADDR4_PADDR6,		6
	.EQU	DMA1_PADDR4_PADDR5,		5
	.EQU	DMA1_PADDR4_PADDR4,		4
	.EQU	DMA1_PADDR4_PADDR3,		3
	.EQU	DMA1_PADDR4_PADDR2,		2
	.EQU	DMA1_PADDR4_PADDR1,		1
	.EQU	DMA1_PADDR4_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_PADDR5,	0x40001730
//  0x4000 1730  DMA1_PADDR5   Bits-------------------------------------
	.EQU	DMA1_PADDR5_PADDR31,		31
	.EQU	DMA1_PADDR5_PADDR30,		30
	.EQU	DMA1_PADDR5_PADDR29,		29
	.EQU	DMA1_PADDR5_PADDR28,		28
	.EQU	DMA1_PADDR5_PADDR27,		27
	.EQU	DMA1_PADDR5_PADDR26,		26
	.EQU	DMA1_PADDR5_PADDR25,		25
	.EQU	DMA1_PADDR5_PADDR24,		24
	.EQU	DMA1_PADDR5_PADDR23,		23
	.EQU	DMA1_PADDR5_PADDR22,		22
	.EQU	DMA1_PADDR5_PADDR21,		21
	.EQU	DMA1_PADDR5_PADDR20,		20
	.EQU	DMA1_PADDR5_PADDR19,		19
	.EQU	DMA1_PADDR5_PADDR18,		18
	.EQU	DMA1_PADDR5_PADDR17,		17
	.EQU	DMA1_PADDR5_PADDR16,		16
	.EQU	DMA1_PADDR5_PADDR15,		15
	.EQU	DMA1_PADDR5_PADDR14,		14
	.EQU	DMA1_PADDR5_PADDR13,		13
	.EQU	DMA1_PADDR5_PADDR12,		12
	.EQU	DMA1_PADDR5_PADDR11,		11
	.EQU	DMA1_PADDR5_PADDR10,		10
	.EQU	DMA1_PADDR5_PADDR9,		9
	.EQU	DMA1_PADDR5_PADDR8,		8
	.EQU	DMA1_PADDR5_PADDR7,		7
	.EQU	DMA1_PADDR5_PADDR6,		6
	.EQU	DMA1_PADDR5_PADDR5,		5
	.EQU	DMA1_PADDR5_PADDR4,		4
	.EQU	DMA1_PADDR5_PADDR3,		3
	.EQU	DMA1_PADDR5_PADDR2,		2
	.EQU	DMA1_PADDR5_PADDR1,		1
	.EQU	DMA1_PADDR5_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_PADDR6,	0x40001734
//  0x4000 1734  DMA1_PADDR6   Bits-------------------------------------
	.EQU	DMA1_PADDR6_PADDR31,		31
	.EQU	DMA1_PADDR6_PADDR30,		30
	.EQU	DMA1_PADDR6_PADDR29,		29
	.EQU	DMA1_PADDR6_PADDR28,		28
	.EQU	DMA1_PADDR6_PADDR27,		27
	.EQU	DMA1_PADDR6_PADDR26,		26
	.EQU	DMA1_PADDR6_PADDR25,		25
	.EQU	DMA1_PADDR6_PADDR24,		24
	.EQU	DMA1_PADDR6_PADDR23,		23
	.EQU	DMA1_PADDR6_PADDR22,		22
	.EQU	DMA1_PADDR6_PADDR21,		21
	.EQU	DMA1_PADDR6_PADDR20,		20
	.EQU	DMA1_PADDR6_PADDR19,		19
	.EQU	DMA1_PADDR6_PADDR18,		18
	.EQU	DMA1_PADDR6_PADDR17,		17
	.EQU	DMA1_PADDR6_PADDR16,		16
	.EQU	DMA1_PADDR6_PADDR15,		15
	.EQU	DMA1_PADDR6_PADDR14,		14
	.EQU	DMA1_PADDR6_PADDR13,		13
	.EQU	DMA1_PADDR6_PADDR12,		12
	.EQU	DMA1_PADDR6_PADDR11,		11
	.EQU	DMA1_PADDR6_PADDR10,		10
	.EQU	DMA1_PADDR6_PADDR9,		9
	.EQU	DMA1_PADDR6_PADDR8,		8
	.EQU	DMA1_PADDR6_PADDR7,		7
	.EQU	DMA1_PADDR6_PADDR6,		6
	.EQU	DMA1_PADDR6_PADDR5,		5
	.EQU	DMA1_PADDR6_PADDR4,		4
	.EQU	DMA1_PADDR6_PADDR3,		3
	.EQU	DMA1_PADDR6_PADDR2,		2
	.EQU	DMA1_PADDR6_PADDR1,		1
	.EQU	DMA1_PADDR6_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_PADDR7,	0x40001738
//  0x4000 1738  DMA1_PADDR7   Bits-------------------------------------
	.EQU	DMA1_PADDR7_PADDR31,		31
	.EQU	DMA1_PADDR7_PADDR30,		30
	.EQU	DMA1_PADDR7_PADDR29,		29
	.EQU	DMA1_PADDR7_PADDR28,		28
	.EQU	DMA1_PADDR7_PADDR27,		27
	.EQU	DMA1_PADDR7_PADDR26,		26
	.EQU	DMA1_PADDR7_PADDR25,		25
	.EQU	DMA1_PADDR7_PADDR24,		24
	.EQU	DMA1_PADDR7_PADDR23,		23
	.EQU	DMA1_PADDR7_PADDR22,		22
	.EQU	DMA1_PADDR7_PADDR21,		21
	.EQU	DMA1_PADDR7_PADDR20,		20
	.EQU	DMA1_PADDR7_PADDR19,		19
	.EQU	DMA1_PADDR7_PADDR18,		18
	.EQU	DMA1_PADDR7_PADDR17,		17
	.EQU	DMA1_PADDR7_PADDR16,		16
	.EQU	DMA1_PADDR7_PADDR15,		15
	.EQU	DMA1_PADDR7_PADDR14,		14
	.EQU	DMA1_PADDR7_PADDR13,		13
	.EQU	DMA1_PADDR7_PADDR12,		12
	.EQU	DMA1_PADDR7_PADDR11,		11
	.EQU	DMA1_PADDR7_PADDR10,		10
	.EQU	DMA1_PADDR7_PADDR9,		9
	.EQU	DMA1_PADDR7_PADDR8,		8
	.EQU	DMA1_PADDR7_PADDR7,		7
	.EQU	DMA1_PADDR7_PADDR6,		6
	.EQU	DMA1_PADDR7_PADDR5,		5
	.EQU	DMA1_PADDR7_PADDR4,		4
	.EQU	DMA1_PADDR7_PADDR3,		3
	.EQU	DMA1_PADDR7_PADDR2,		2
	.EQU	DMA1_PADDR7_PADDR1,		1
	.EQU	DMA1_PADDR7_PADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_MADDR1,	0x40001740
//  0x4000 1740  DMA1_MADDR1   Bits-------------------------------------
	.EQU	DMA1_MADDR1_MADDR31,		31
	.EQU	DMA1_MADDR1_MADDR30,		30
	.EQU	DMA1_MADDR1_MADDR29,		29
	.EQU	DMA1_MADDR1_MADDR28,		28
	.EQU	DMA1_MADDR1_MADDR27,		27
	.EQU	DMA1_MADDR1_MADDR26,		26
	.EQU	DMA1_MADDR1_MADDR25,		25
	.EQU	DMA1_MADDR1_MADDR24,		24
	.EQU	DMA1_MADDR1_MADDR23,		23
	.EQU	DMA1_MADDR1_MADDR22,		22
	.EQU	DMA1_MADDR1_MADDR21,		21
	.EQU	DMA1_MADDR1_MADDR20,		20
	.EQU	DMA1_MADDR1_MADDR19,		19
	.EQU	DMA1_MADDR1_MADDR18,		18
	.EQU	DMA1_MADDR1_MADDR17,		17
	.EQU	DMA1_MADDR1_MADDR16,		16
	.EQU	DMA1_MADDR1_MADDR15,		15
	.EQU	DMA1_MADDR1_MADDR14,		14
	.EQU	DMA1_MADDR1_MADDR13,		13
	.EQU	DMA1_MADDR1_MADDR12,		12
	.EQU	DMA1_MADDR1_MADDR11,		11
	.EQU	DMA1_MADDR1_MADDR10,		10
	.EQU	DMA1_MADDR1_MADDR9,		9
	.EQU	DMA1_MADDR1_MADDR8,		8
	.EQU	DMA1_MADDR1_MADDR7,		7
	.EQU	DMA1_MADDR1_MADDR6,		6
	.EQU	DMA1_MADDR1_MADDR5,		5
	.EQU	DMA1_MADDR1_MADDR4,		4
	.EQU	DMA1_MADDR1_MADDR3,		3
	.EQU	DMA1_MADDR1_MADDR2,		2
	.EQU	DMA1_MADDR1_MADDR1,		1
	.EQU	DMA1_MADDR1_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_MADDR2,	0x40001744
//  0x4000 1744  DMA1_MADDR2   Bits-------------------------------------
	.EQU	DMA1_MADDR2_MADDR31,		31
	.EQU	DMA1_MADDR2_MADDR30,		30
	.EQU	DMA1_MADDR2_MADDR29,		29
	.EQU	DMA1_MADDR2_MADDR28,		28
	.EQU	DMA1_MADDR2_MADDR27,		27
	.EQU	DMA1_MADDR2_MADDR26,		26
	.EQU	DMA1_MADDR2_MADDR25,		25
	.EQU	DMA1_MADDR2_MADDR24,		24
	.EQU	DMA1_MADDR2_MADDR23,		23
	.EQU	DMA1_MADDR2_MADDR22,		22
	.EQU	DMA1_MADDR2_MADDR21,		21
	.EQU	DMA1_MADDR2_MADDR20,		20
	.EQU	DMA1_MADDR2_MADDR19,		19
	.EQU	DMA1_MADDR2_MADDR18,		18
	.EQU	DMA1_MADDR2_MADDR17,		17
	.EQU	DMA1_MADDR2_MADDR16,		16
	.EQU	DMA1_MADDR2_MADDR15,		15
	.EQU	DMA1_MADDR2_MADDR14,		14
	.EQU	DMA1_MADDR2_MADDR13,		13
	.EQU	DMA1_MADDR2_MADDR12,		12
	.EQU	DMA1_MADDR2_MADDR11,		11
	.EQU	DMA1_MADDR2_MADDR10,		10
	.EQU	DMA1_MADDR2_MADDR9,		9
	.EQU	DMA1_MADDR2_MADDR8,		8
	.EQU	DMA1_MADDR2_MADDR7,		7
	.EQU	DMA1_MADDR2_MADDR6,		6
	.EQU	DMA1_MADDR2_MADDR5,		5
	.EQU	DMA1_MADDR2_MADDR4,		4
	.EQU	DMA1_MADDR2_MADDR3,		3
	.EQU	DMA1_MADDR2_MADDR2,		2
	.EQU	DMA1_MADDR2_MADDR1,		1
	.EQU	DMA1_MADDR2_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_MADDR3,	0x40001748
//  0x4000 1748  DMA1_MADDR3   Bits-------------------------------------
	.EQU	DMA1_MADDR3_MADDR31,		31
	.EQU	DMA1_MADDR3_MADDR30,		30
	.EQU	DMA1_MADDR3_MADDR29,		29
	.EQU	DMA1_MADDR3_MADDR28,		28
	.EQU	DMA1_MADDR3_MADDR27,		27
	.EQU	DMA1_MADDR3_MADDR26,		26
	.EQU	DMA1_MADDR3_MADDR25,		25
	.EQU	DMA1_MADDR3_MADDR24,		24
	.EQU	DMA1_MADDR3_MADDR23,		23
	.EQU	DMA1_MADDR3_MADDR22,		22
	.EQU	DMA1_MADDR3_MADDR21,		21
	.EQU	DMA1_MADDR3_MADDR20,		20
	.EQU	DMA1_MADDR3_MADDR19,		19
	.EQU	DMA1_MADDR3_MADDR18,		18
	.EQU	DMA1_MADDR3_MADDR17,		17
	.EQU	DMA1_MADDR3_MADDR16,		16
	.EQU	DMA1_MADDR3_MADDR15,		15
	.EQU	DMA1_MADDR3_MADDR14,		14
	.EQU	DMA1_MADDR3_MADDR13,		13
	.EQU	DMA1_MADDR3_MADDR12,		12
	.EQU	DMA1_MADDR3_MADDR11,		11
	.EQU	DMA1_MADDR3_MADDR10,		10
	.EQU	DMA1_MADDR3_MADDR9,		9
	.EQU	DMA1_MADDR3_MADDR8,		8
	.EQU	DMA1_MADDR3_MADDR7,		7
	.EQU	DMA1_MADDR3_MADDR6,		6
	.EQU	DMA1_MADDR3_MADDR5,		5
	.EQU	DMA1_MADDR3_MADDR4,		4
	.EQU	DMA1_MADDR3_MADDR3,		3
	.EQU	DMA1_MADDR3_MADDR2,		2
	.EQU	DMA1_MADDR3_MADDR1,		1
	.EQU	DMA1_MADDR3_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_MADDR4,	0x4000174C
//  0x4000 174C  DMA1_MADDR4   Bits-------------------------------------
	.EQU	DMA1_MADDR4_MADDR31,		31
	.EQU	DMA1_MADDR4_MADDR30,		30
	.EQU	DMA1_MADDR4_MADDR29,		29
	.EQU	DMA1_MADDR4_MADDR28,		28
	.EQU	DMA1_MADDR4_MADDR27,		27
	.EQU	DMA1_MADDR4_MADDR26,		26
	.EQU	DMA1_MADDR4_MADDR25,		25
	.EQU	DMA1_MADDR4_MADDR24,		24
	.EQU	DMA1_MADDR4_MADDR23,		23
	.EQU	DMA1_MADDR4_MADDR22,		22
	.EQU	DMA1_MADDR4_MADDR21,		21
	.EQU	DMA1_MADDR4_MADDR20,		20
	.EQU	DMA1_MADDR4_MADDR19,		19
	.EQU	DMA1_MADDR4_MADDR18,		18
	.EQU	DMA1_MADDR4_MADDR17,		17
	.EQU	DMA1_MADDR4_MADDR16,		16
	.EQU	DMA1_MADDR4_MADDR15,		15
	.EQU	DMA1_MADDR4_MADDR14,		14
	.EQU	DMA1_MADDR4_MADDR13,		13
	.EQU	DMA1_MADDR4_MADDR12,		12
	.EQU	DMA1_MADDR4_MADDR11,		11
	.EQU	DMA1_MADDR4_MADDR10,		10
	.EQU	DMA1_MADDR4_MADDR9,		9
	.EQU	DMA1_MADDR4_MADDR8,		8
	.EQU	DMA1_MADDR4_MADDR7,		7
	.EQU	DMA1_MADDR4_MADDR6,		6
	.EQU	DMA1_MADDR4_MADDR5,		5
	.EQU	DMA1_MADDR4_MADDR4,		4
	.EQU	DMA1_MADDR4_MADDR3,		3
	.EQU	DMA1_MADDR4_MADDR2,		2
	.EQU	DMA1_MADDR4_MADDR1,		1
	.EQU	DMA1_MADDR4_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_MADDR5,	0x40001750
//  0x4000 1750  DMA1_MADDR5   Bits-------------------------------------
	.EQU	DMA1_MADDR5_MADDR31,		31
	.EQU	DMA1_MADDR5_MADDR30,		30
	.EQU	DMA1_MADDR5_MADDR29,		29
	.EQU	DMA1_MADDR5_MADDR28,		28
	.EQU	DMA1_MADDR5_MADDR27,		27
	.EQU	DMA1_MADDR5_MADDR26,		26
	.EQU	DMA1_MADDR5_MADDR25,		25
	.EQU	DMA1_MADDR5_MADDR24,		24
	.EQU	DMA1_MADDR5_MADDR23,		23
	.EQU	DMA1_MADDR5_MADDR22,		22
	.EQU	DMA1_MADDR5_MADDR21,		21
	.EQU	DMA1_MADDR5_MADDR20,		20
	.EQU	DMA1_MADDR5_MADDR19,		19
	.EQU	DMA1_MADDR5_MADDR18,		18
	.EQU	DMA1_MADDR5_MADDR17,		17
	.EQU	DMA1_MADDR5_MADDR16,		16
	.EQU	DMA1_MADDR5_MADDR15,		15
	.EQU	DMA1_MADDR5_MADDR14,		14
	.EQU	DMA1_MADDR5_MADDR13,		13
	.EQU	DMA1_MADDR5_MADDR12,		12
	.EQU	DMA1_MADDR5_MADDR11,		11
	.EQU	DMA1_MADDR5_MADDR10,		10
	.EQU	DMA1_MADDR5_MADDR9,		9
	.EQU	DMA1_MADDR5_MADDR8,		8
	.EQU	DMA1_MADDR5_MADDR7,		7
	.EQU	DMA1_MADDR5_MADDR6,		6
	.EQU	DMA1_MADDR5_MADDR5,		5
	.EQU	DMA1_MADDR5_MADDR4,		4
	.EQU	DMA1_MADDR5_MADDR3,		3
	.EQU	DMA1_MADDR5_MADDR2,		2
	.EQU	DMA1_MADDR5_MADDR1,		1
	.EQU	DMA1_MADDR5_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_MADDR6,	0x40001754
//  0x4000 1754  DMA1_MADDR6   Bits-------------------------------------
	.EQU	DMA1_MADDR6_MADDR31,		31
	.EQU	DMA1_MADDR6_MADDR30,		30
	.EQU	DMA1_MADDR6_MADDR29,		29
	.EQU	DMA1_MADDR6_MADDR28,		28
	.EQU	DMA1_MADDR6_MADDR27,		27
	.EQU	DMA1_MADDR6_MADDR26,		26
	.EQU	DMA1_MADDR6_MADDR25,		25
	.EQU	DMA1_MADDR6_MADDR24,		24
	.EQU	DMA1_MADDR6_MADDR23,		23
	.EQU	DMA1_MADDR6_MADDR22,		22
	.EQU	DMA1_MADDR6_MADDR21,		21
	.EQU	DMA1_MADDR6_MADDR20,		20
	.EQU	DMA1_MADDR6_MADDR19,		19
	.EQU	DMA1_MADDR6_MADDR18,		18
	.EQU	DMA1_MADDR6_MADDR17,		17
	.EQU	DMA1_MADDR6_MADDR16,		16
	.EQU	DMA1_MADDR6_MADDR15,		15
	.EQU	DMA1_MADDR6_MADDR14,		14
	.EQU	DMA1_MADDR6_MADDR13,		13
	.EQU	DMA1_MADDR6_MADDR12,		12
	.EQU	DMA1_MADDR6_MADDR11,		11
	.EQU	DMA1_MADDR6_MADDR10,		10
	.EQU	DMA1_MADDR6_MADDR9,		9
	.EQU	DMA1_MADDR6_MADDR8,		8
	.EQU	DMA1_MADDR6_MADDR7,		7
	.EQU	DMA1_MADDR6_MADDR6,		6
	.EQU	DMA1_MADDR6_MADDR5,		5
	.EQU	DMA1_MADDR6_MADDR4,		4
	.EQU	DMA1_MADDR6_MADDR3,		3
	.EQU	DMA1_MADDR6_MADDR2,		2
	.EQU	DMA1_MADDR6_MADDR1,		1
	.EQU	DMA1_MADDR6_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_MADDR7,	0x40001758
//  0x4000 1758  DMA1_MADDR7   Bits-------------------------------------
	.EQU	DMA1_MADDR7_MADDR31,		31
	.EQU	DMA1_MADDR7_MADDR30,		30
	.EQU	DMA1_MADDR7_MADDR29,		29
	.EQU	DMA1_MADDR7_MADDR28,		28
	.EQU	DMA1_MADDR7_MADDR27,		27
	.EQU	DMA1_MADDR7_MADDR26,		26
	.EQU	DMA1_MADDR7_MADDR25,		25
	.EQU	DMA1_MADDR7_MADDR24,		24
	.EQU	DMA1_MADDR7_MADDR23,		23
	.EQU	DMA1_MADDR7_MADDR22,		22
	.EQU	DMA1_MADDR7_MADDR21,		21
	.EQU	DMA1_MADDR7_MADDR20,		20
	.EQU	DMA1_MADDR7_MADDR19,		19
	.EQU	DMA1_MADDR7_MADDR18,		18
	.EQU	DMA1_MADDR7_MADDR17,		17
	.EQU	DMA1_MADDR7_MADDR16,		16
	.EQU	DMA1_MADDR7_MADDR15,		15
	.EQU	DMA1_MADDR7_MADDR14,		14
	.EQU	DMA1_MADDR7_MADDR13,		13
	.EQU	DMA1_MADDR7_MADDR12,		12
	.EQU	DMA1_MADDR7_MADDR11,		11
	.EQU	DMA1_MADDR7_MADDR10,		10
	.EQU	DMA1_MADDR7_MADDR9,		9
	.EQU	DMA1_MADDR7_MADDR8,		8
	.EQU	DMA1_MADDR7_MADDR7,		7
	.EQU	DMA1_MADDR7_MADDR6,		6
	.EQU	DMA1_MADDR7_MADDR5,		5
	.EQU	DMA1_MADDR7_MADDR4,		4
	.EQU	DMA1_MADDR7_MADDR3,		3
	.EQU	DMA1_MADDR7_MADDR2,		2
	.EQU	DMA1_MADDR7_MADDR1,		1
	.EQU	DMA1_MADDR7_MADDR0,		0
//  register-------------------------------------
	.EQU	DMA1_CPAR1,	0x40001760
//  0x4000 1760  DMA1_CPAR1   Bits-------------------------------------
	.EQU	DMA1_CPAR1_CPAR31,		31
	.EQU	DMA1_CPAR1_CPAR30,		30
	.EQU	DMA1_CPAR1_CPAR29,		29
	.EQU	DMA1_CPAR1_CPAR28,		28
	.EQU	DMA1_CPAR1_CPAR27,		27
	.EQU	DMA1_CPAR1_CPAR26,		26
	.EQU	DMA1_CPAR1_CPAR25,		25
	.EQU	DMA1_CPAR1_CPAR24,		24
	.EQU	DMA1_CPAR1_CPAR23,		23
	.EQU	DMA1_CPAR1_CPAR22,		22
	.EQU	DMA1_CPAR1_CPAR21,		21
	.EQU	DMA1_CPAR1_CPAR20,		20
	.EQU	DMA1_CPAR1_CPAR19,		19
	.EQU	DMA1_CPAR1_CPAR18,		18
	.EQU	DMA1_CPAR1_CPAR17,		17
	.EQU	DMA1_CPAR1_CPAR16,		16
	.EQU	DMA1_CPAR1_CPAR15,		15
	.EQU	DMA1_CPAR1_CPAR14,		14
	.EQU	DMA1_CPAR1_CPAR13,		13
	.EQU	DMA1_CPAR1_CPAR12,		12
	.EQU	DMA1_CPAR1_CPAR11,		11
	.EQU	DMA1_CPAR1_CPAR10,		10
	.EQU	DMA1_CPAR1_CPAR9,		9
	.EQU	DMA1_CPAR1_CPAR8,		8
	.EQU	DMA1_CPAR1_CPAR7,		7
	.EQU	DMA1_CPAR1_CPAR6,		6
	.EQU	DMA1_CPAR1_CPAR5,		5
	.EQU	DMA1_CPAR1_CPAR4,		4
	.EQU	DMA1_CPAR1_CPAR3,		3
	.EQU	DMA1_CPAR1_CPAR2,		2
	.EQU	DMA1_CPAR1_CPAR1,		1
	.EQU	DMA1_CPAR1_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CPAR2,	0x40001764
//  0x4000 1764  DMA1_CPAR2   Bits-------------------------------------
	.EQU	DMA1_CPAR2_CPAR31,		31
	.EQU	DMA1_CPAR2_CPAR30,		30
	.EQU	DMA1_CPAR2_CPAR29,		29
	.EQU	DMA1_CPAR2_CPAR28,		28
	.EQU	DMA1_CPAR2_CPAR27,		27
	.EQU	DMA1_CPAR2_CPAR26,		26
	.EQU	DMA1_CPAR2_CPAR25,		25
	.EQU	DMA1_CPAR2_CPAR24,		24
	.EQU	DMA1_CPAR2_CPAR23,		23
	.EQU	DMA1_CPAR2_CPAR22,		22
	.EQU	DMA1_CPAR2_CPAR21,		21
	.EQU	DMA1_CPAR2_CPAR20,		20
	.EQU	DMA1_CPAR2_CPAR19,		19
	.EQU	DMA1_CPAR2_CPAR18,		18
	.EQU	DMA1_CPAR2_CPAR17,		17
	.EQU	DMA1_CPAR2_CPAR16,		16
	.EQU	DMA1_CPAR2_CPAR15,		15
	.EQU	DMA1_CPAR2_CPAR14,		14
	.EQU	DMA1_CPAR2_CPAR13,		13
	.EQU	DMA1_CPAR2_CPAR12,		12
	.EQU	DMA1_CPAR2_CPAR11,		11
	.EQU	DMA1_CPAR2_CPAR10,		10
	.EQU	DMA1_CPAR2_CPAR9,		9
	.EQU	DMA1_CPAR2_CPAR8,		8
	.EQU	DMA1_CPAR2_CPAR7,		7
	.EQU	DMA1_CPAR2_CPAR6,		6
	.EQU	DMA1_CPAR2_CPAR5,		5
	.EQU	DMA1_CPAR2_CPAR4,		4
	.EQU	DMA1_CPAR2_CPAR3,		3
	.EQU	DMA1_CPAR2_CPAR2,		2
	.EQU	DMA1_CPAR2_CPAR1,		1
	.EQU	DMA1_CPAR2_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CPAR3,	0x40001768
//  0x4000 1768  DMA1_CPAR3   Bits-------------------------------------
	.EQU	DMA1_CPAR3_CPAR31,		31
	.EQU	DMA1_CPAR3_CPAR30,		30
	.EQU	DMA1_CPAR3_CPAR29,		29
	.EQU	DMA1_CPAR3_CPAR28,		28
	.EQU	DMA1_CPAR3_CPAR27,		27
	.EQU	DMA1_CPAR3_CPAR26,		26
	.EQU	DMA1_CPAR3_CPAR25,		25
	.EQU	DMA1_CPAR3_CPAR24,		24
	.EQU	DMA1_CPAR3_CPAR23,		23
	.EQU	DMA1_CPAR3_CPAR22,		22
	.EQU	DMA1_CPAR3_CPAR21,		21
	.EQU	DMA1_CPAR3_CPAR20,		20
	.EQU	DMA1_CPAR3_CPAR19,		19
	.EQU	DMA1_CPAR3_CPAR18,		18
	.EQU	DMA1_CPAR3_CPAR17,		17
	.EQU	DMA1_CPAR3_CPAR16,		16
	.EQU	DMA1_CPAR3_CPAR15,		15
	.EQU	DMA1_CPAR3_CPAR14,		14
	.EQU	DMA1_CPAR3_CPAR13,		13
	.EQU	DMA1_CPAR3_CPAR12,		12
	.EQU	DMA1_CPAR3_CPAR11,		11
	.EQU	DMA1_CPAR3_CPAR10,		10
	.EQU	DMA1_CPAR3_CPAR9,		9
	.EQU	DMA1_CPAR3_CPAR8,		8
	.EQU	DMA1_CPAR3_CPAR7,		7
	.EQU	DMA1_CPAR3_CPAR6,		6
	.EQU	DMA1_CPAR3_CPAR5,		5
	.EQU	DMA1_CPAR3_CPAR4,		4
	.EQU	DMA1_CPAR3_CPAR3,		3
	.EQU	DMA1_CPAR3_CPAR2,		2
	.EQU	DMA1_CPAR3_CPAR1,		1
	.EQU	DMA1_CPAR3_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CPAR4,	0x4000176C
//  0x4000 176C  DMA1_CPAR4   Bits-------------------------------------
	.EQU	DMA1_CPAR4_CPAR31,		31
	.EQU	DMA1_CPAR4_CPAR30,		30
	.EQU	DMA1_CPAR4_CPAR29,		29
	.EQU	DMA1_CPAR4_CPAR28,		28
	.EQU	DMA1_CPAR4_CPAR27,		27
	.EQU	DMA1_CPAR4_CPAR26,		26
	.EQU	DMA1_CPAR4_CPAR25,		25
	.EQU	DMA1_CPAR4_CPAR24,		24
	.EQU	DMA1_CPAR4_CPAR23,		23
	.EQU	DMA1_CPAR4_CPAR22,		22
	.EQU	DMA1_CPAR4_CPAR21,		21
	.EQU	DMA1_CPAR4_CPAR20,		20
	.EQU	DMA1_CPAR4_CPAR19,		19
	.EQU	DMA1_CPAR4_CPAR18,		18
	.EQU	DMA1_CPAR4_CPAR17,		17
	.EQU	DMA1_CPAR4_CPAR16,		16
	.EQU	DMA1_CPAR4_CPAR15,		15
	.EQU	DMA1_CPAR4_CPAR14,		14
	.EQU	DMA1_CPAR4_CPAR13,		13
	.EQU	DMA1_CPAR4_CPAR12,		12
	.EQU	DMA1_CPAR4_CPAR11,		11
	.EQU	DMA1_CPAR4_CPAR10,		10
	.EQU	DMA1_CPAR4_CPAR9,		9
	.EQU	DMA1_CPAR4_CPAR8,		8
	.EQU	DMA1_CPAR4_CPAR7,		7
	.EQU	DMA1_CPAR4_CPAR6,		6
	.EQU	DMA1_CPAR4_CPAR5,		5
	.EQU	DMA1_CPAR4_CPAR4,		4
	.EQU	DMA1_CPAR4_CPAR3,		3
	.EQU	DMA1_CPAR4_CPAR2,		2
	.EQU	DMA1_CPAR4_CPAR1,		1
	.EQU	DMA1_CPAR4_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CPAR5,	0x40001770
//  0x4000 1770  DMA1_CPAR5   Bits-------------------------------------
	.EQU	DMA1_CPAR5_CPAR31,		31
	.EQU	DMA1_CPAR5_CPAR30,		30
	.EQU	DMA1_CPAR5_CPAR29,		29
	.EQU	DMA1_CPAR5_CPAR28,		28
	.EQU	DMA1_CPAR5_CPAR27,		27
	.EQU	DMA1_CPAR5_CPAR26,		26
	.EQU	DMA1_CPAR5_CPAR25,		25
	.EQU	DMA1_CPAR5_CPAR24,		24
	.EQU	DMA1_CPAR5_CPAR23,		23
	.EQU	DMA1_CPAR5_CPAR22,		22
	.EQU	DMA1_CPAR5_CPAR21,		21
	.EQU	DMA1_CPAR5_CPAR20,		20
	.EQU	DMA1_CPAR5_CPAR19,		19
	.EQU	DMA1_CPAR5_CPAR18,		18
	.EQU	DMA1_CPAR5_CPAR17,		17
	.EQU	DMA1_CPAR5_CPAR16,		16
	.EQU	DMA1_CPAR5_CPAR15,		15
	.EQU	DMA1_CPAR5_CPAR14,		14
	.EQU	DMA1_CPAR5_CPAR13,		13
	.EQU	DMA1_CPAR5_CPAR12,		12
	.EQU	DMA1_CPAR5_CPAR11,		11
	.EQU	DMA1_CPAR5_CPAR10,		10
	.EQU	DMA1_CPAR5_CPAR9,		9
	.EQU	DMA1_CPAR5_CPAR8,		8
	.EQU	DMA1_CPAR5_CPAR7,		7
	.EQU	DMA1_CPAR5_CPAR6,		6
	.EQU	DMA1_CPAR5_CPAR5,		5
	.EQU	DMA1_CPAR5_CPAR4,		4
	.EQU	DMA1_CPAR5_CPAR3,		3
	.EQU	DMA1_CPAR5_CPAR2,		2
	.EQU	DMA1_CPAR5_CPAR1,		1
	.EQU	DMA1_CPAR5_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CPAR6,	0x40001774
//  0x4000 1774  DMA1_CPAR6   Bits-------------------------------------
	.EQU	DMA1_CPAR6_CPAR31,		31
	.EQU	DMA1_CPAR6_CPAR30,		30
	.EQU	DMA1_CPAR6_CPAR29,		29
	.EQU	DMA1_CPAR6_CPAR28,		28
	.EQU	DMA1_CPAR6_CPAR27,		27
	.EQU	DMA1_CPAR6_CPAR26,		26
	.EQU	DMA1_CPAR6_CPAR25,		25
	.EQU	DMA1_CPAR6_CPAR24,		24
	.EQU	DMA1_CPAR6_CPAR23,		23
	.EQU	DMA1_CPAR6_CPAR22,		22
	.EQU	DMA1_CPAR6_CPAR21,		21
	.EQU	DMA1_CPAR6_CPAR20,		20
	.EQU	DMA1_CPAR6_CPAR19,		19
	.EQU	DMA1_CPAR6_CPAR18,		18
	.EQU	DMA1_CPAR6_CPAR17,		17
	.EQU	DMA1_CPAR6_CPAR16,		16
	.EQU	DMA1_CPAR6_CPAR15,		15
	.EQU	DMA1_CPAR6_CPAR14,		14
	.EQU	DMA1_CPAR6_CPAR13,		13
	.EQU	DMA1_CPAR6_CPAR12,		12
	.EQU	DMA1_CPAR6_CPAR11,		11
	.EQU	DMA1_CPAR6_CPAR10,		10
	.EQU	DMA1_CPAR6_CPAR9,		9
	.EQU	DMA1_CPAR6_CPAR8,		8
	.EQU	DMA1_CPAR6_CPAR7,		7
	.EQU	DMA1_CPAR6_CPAR6,		6
	.EQU	DMA1_CPAR6_CPAR5,		5
	.EQU	DMA1_CPAR6_CPAR4,		4
	.EQU	DMA1_CPAR6_CPAR3,		3
	.EQU	DMA1_CPAR6_CPAR2,		2
	.EQU	DMA1_CPAR6_CPAR1,		1
	.EQU	DMA1_CPAR6_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CPAR7,	0x40001778
//  0x4000 1778  DMA1_CPAR7   Bits-------------------------------------
	.EQU	DMA1_CPAR7_CPAR31,		31
	.EQU	DMA1_CPAR7_CPAR30,		30
	.EQU	DMA1_CPAR7_CPAR29,		29
	.EQU	DMA1_CPAR7_CPAR28,		28
	.EQU	DMA1_CPAR7_CPAR27,		27
	.EQU	DMA1_CPAR7_CPAR26,		26
	.EQU	DMA1_CPAR7_CPAR25,		25
	.EQU	DMA1_CPAR7_CPAR24,		24
	.EQU	DMA1_CPAR7_CPAR23,		23
	.EQU	DMA1_CPAR7_CPAR22,		22
	.EQU	DMA1_CPAR7_CPAR21,		21
	.EQU	DMA1_CPAR7_CPAR20,		20
	.EQU	DMA1_CPAR7_CPAR19,		19
	.EQU	DMA1_CPAR7_CPAR18,		18
	.EQU	DMA1_CPAR7_CPAR17,		17
	.EQU	DMA1_CPAR7_CPAR16,		16
	.EQU	DMA1_CPAR7_CPAR15,		15
	.EQU	DMA1_CPAR7_CPAR14,		14
	.EQU	DMA1_CPAR7_CPAR13,		13
	.EQU	DMA1_CPAR7_CPAR12,		12
	.EQU	DMA1_CPAR7_CPAR11,		11
	.EQU	DMA1_CPAR7_CPAR10,		10
	.EQU	DMA1_CPAR7_CPAR9,		9
	.EQU	DMA1_CPAR7_CPAR8,		8
	.EQU	DMA1_CPAR7_CPAR7,		7
	.EQU	DMA1_CPAR7_CPAR6,		6
	.EQU	DMA1_CPAR7_CPAR5,		5
	.EQU	DMA1_CPAR7_CPAR4,		4
	.EQU	DMA1_CPAR7_CPAR3,		3
	.EQU	DMA1_CPAR7_CPAR2,		2
	.EQU	DMA1_CPAR7_CPAR1,		1
	.EQU	DMA1_CPAR7_CPAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CMAR1,	0x40001780
//  0x4000 1780  DMA1_CMAR1   Bits-------------------------------------
	.EQU	DMA1_CMAR1_CMAR31,		31
	.EQU	DMA1_CMAR1_CMAR30,		30
	.EQU	DMA1_CMAR1_CMAR29,		29
	.EQU	DMA1_CMAR1_CMAR28,		28
	.EQU	DMA1_CMAR1_CMAR27,		27
	.EQU	DMA1_CMAR1_CMAR26,		26
	.EQU	DMA1_CMAR1_CMAR25,		25
	.EQU	DMA1_CMAR1_CMAR24,		24
	.EQU	DMA1_CMAR1_CMAR23,		23
	.EQU	DMA1_CMAR1_CMAR22,		22
	.EQU	DMA1_CMAR1_CMAR21,		21
	.EQU	DMA1_CMAR1_CMAR20,		20
	.EQU	DMA1_CMAR1_CMAR19,		19
	.EQU	DMA1_CMAR1_CMAR18,		18
	.EQU	DMA1_CMAR1_CMAR17,		17
	.EQU	DMA1_CMAR1_CMAR16,		16
	.EQU	DMA1_CMAR1_CMAR15,		15
	.EQU	DMA1_CMAR1_CMAR14,		14
	.EQU	DMA1_CMAR1_CMAR13,		13
	.EQU	DMA1_CMAR1_CMAR12,		12
	.EQU	DMA1_CMAR1_CMAR11,		11
	.EQU	DMA1_CMAR1_CMAR10,		10
	.EQU	DMA1_CMAR1_CMAR9,		9
	.EQU	DMA1_CMAR1_CMAR8,		8
	.EQU	DMA1_CMAR1_CMAR7,		7
	.EQU	DMA1_CMAR1_CMAR6,		6
	.EQU	DMA1_CMAR1_CMAR5,		5
	.EQU	DMA1_CMAR1_CMAR4,		4
	.EQU	DMA1_CMAR1_CMAR3,		3
	.EQU	DMA1_CMAR1_CMAR2,		2
	.EQU	DMA1_CMAR1_CMAR1,		1
	.EQU	DMA1_CMAR1_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CMAR2,	0x40001784
//  0x4000 1784  DMA1_CMAR2   Bits-------------------------------------
	.EQU	DMA1_CMAR2_CMAR31,		31
	.EQU	DMA1_CMAR2_CMAR30,		30
	.EQU	DMA1_CMAR2_CMAR29,		29
	.EQU	DMA1_CMAR2_CMAR28,		28
	.EQU	DMA1_CMAR2_CMAR27,		27
	.EQU	DMA1_CMAR2_CMAR26,		26
	.EQU	DMA1_CMAR2_CMAR25,		25
	.EQU	DMA1_CMAR2_CMAR24,		24
	.EQU	DMA1_CMAR2_CMAR23,		23
	.EQU	DMA1_CMAR2_CMAR22,		22
	.EQU	DMA1_CMAR2_CMAR21,		21
	.EQU	DMA1_CMAR2_CMAR20,		20
	.EQU	DMA1_CMAR2_CMAR19,		19
	.EQU	DMA1_CMAR2_CMAR18,		18
	.EQU	DMA1_CMAR2_CMAR17,		17
	.EQU	DMA1_CMAR2_CMAR16,		16
	.EQU	DMA1_CMAR2_CMAR15,		15
	.EQU	DMA1_CMAR2_CMAR14,		14
	.EQU	DMA1_CMAR2_CMAR13,		13
	.EQU	DMA1_CMAR2_CMAR12,		12
	.EQU	DMA1_CMAR2_CMAR11,		11
	.EQU	DMA1_CMAR2_CMAR10,		10
	.EQU	DMA1_CMAR2_CMAR9,		9
	.EQU	DMA1_CMAR2_CMAR8,		8
	.EQU	DMA1_CMAR2_CMAR7,		7
	.EQU	DMA1_CMAR2_CMAR6,		6
	.EQU	DMA1_CMAR2_CMAR5,		5
	.EQU	DMA1_CMAR2_CMAR4,		4
	.EQU	DMA1_CMAR2_CMAR3,		3
	.EQU	DMA1_CMAR2_CMAR2,		2
	.EQU	DMA1_CMAR2_CMAR1,		1
	.EQU	DMA1_CMAR2_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CMAR3,	0x40001788
//  0x4000 1788  DMA1_CMAR3   Bits-------------------------------------
	.EQU	DMA1_CMAR3_CMAR31,		31
	.EQU	DMA1_CMAR3_CMAR30,		30
	.EQU	DMA1_CMAR3_CMAR29,		29
	.EQU	DMA1_CMAR3_CMAR28,		28
	.EQU	DMA1_CMAR3_CMAR27,		27
	.EQU	DMA1_CMAR3_CMAR26,		26
	.EQU	DMA1_CMAR3_CMAR25,		25
	.EQU	DMA1_CMAR3_CMAR24,		24
	.EQU	DMA1_CMAR3_CMAR23,		23
	.EQU	DMA1_CMAR3_CMAR22,		22
	.EQU	DMA1_CMAR3_CMAR21,		21
	.EQU	DMA1_CMAR3_CMAR20,		20
	.EQU	DMA1_CMAR3_CMAR19,		19
	.EQU	DMA1_CMAR3_CMAR18,		18
	.EQU	DMA1_CMAR3_CMAR17,		17
	.EQU	DMA1_CMAR3_CMAR16,		16
	.EQU	DMA1_CMAR3_CMAR15,		15
	.EQU	DMA1_CMAR3_CMAR14,		14
	.EQU	DMA1_CMAR3_CMAR13,		13
	.EQU	DMA1_CMAR3_CMAR12,		12
	.EQU	DMA1_CMAR3_CMAR11,		11
	.EQU	DMA1_CMAR3_CMAR10,		10
	.EQU	DMA1_CMAR3_CMAR9,		9
	.EQU	DMA1_CMAR3_CMAR8,		8
	.EQU	DMA1_CMAR3_CMAR7,		7
	.EQU	DMA1_CMAR3_CMAR6,		6
	.EQU	DMA1_CMAR3_CMAR5,		5
	.EQU	DMA1_CMAR3_CMAR4,		4
	.EQU	DMA1_CMAR3_CMAR3,		3
	.EQU	DMA1_CMAR3_CMAR2,		2
	.EQU	DMA1_CMAR3_CMAR1,		1
	.EQU	DMA1_CMAR3_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CMAR4,	0x4000178C
//  0x4000 178C  DMA1_CMAR4   Bits-------------------------------------
	.EQU	DMA1_CMAR4_CMAR31,		31
	.EQU	DMA1_CMAR4_CMAR30,		30
	.EQU	DMA1_CMAR4_CMAR29,		29
	.EQU	DMA1_CMAR4_CMAR28,		28
	.EQU	DMA1_CMAR4_CMAR27,		27
	.EQU	DMA1_CMAR4_CMAR26,		26
	.EQU	DMA1_CMAR4_CMAR25,		25
	.EQU	DMA1_CMAR4_CMAR24,		24
	.EQU	DMA1_CMAR4_CMAR23,		23
	.EQU	DMA1_CMAR4_CMAR22,		22
	.EQU	DMA1_CMAR4_CMAR21,		21
	.EQU	DMA1_CMAR4_CMAR20,		20
	.EQU	DMA1_CMAR4_CMAR19,		19
	.EQU	DMA1_CMAR4_CMAR18,		18
	.EQU	DMA1_CMAR4_CMAR17,		17
	.EQU	DMA1_CMAR4_CMAR16,		16
	.EQU	DMA1_CMAR4_CMAR15,		15
	.EQU	DMA1_CMAR4_CMAR14,		14
	.EQU	DMA1_CMAR4_CMAR13,		13
	.EQU	DMA1_CMAR4_CMAR12,		12
	.EQU	DMA1_CMAR4_CMAR11,		11
	.EQU	DMA1_CMAR4_CMAR10,		10
	.EQU	DMA1_CMAR4_CMAR9,		9
	.EQU	DMA1_CMAR4_CMAR8,		8
	.EQU	DMA1_CMAR4_CMAR7,		7
	.EQU	DMA1_CMAR4_CMAR6,		6
	.EQU	DMA1_CMAR4_CMAR5,		5
	.EQU	DMA1_CMAR4_CMAR4,		4
	.EQU	DMA1_CMAR4_CMAR3,		3
	.EQU	DMA1_CMAR4_CMAR2,		2
	.EQU	DMA1_CMAR4_CMAR1,		1
	.EQU	DMA1_CMAR4_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CMAR5,	0x40001790
//  0x4000 1790  DMA1_CMAR5   Bits-------------------------------------
	.EQU	DMA1_CMAR5_CMAR31,		31
	.EQU	DMA1_CMAR5_CMAR30,		30
	.EQU	DMA1_CMAR5_CMAR29,		29
	.EQU	DMA1_CMAR5_CMAR28,		28
	.EQU	DMA1_CMAR5_CMAR27,		27
	.EQU	DMA1_CMAR5_CMAR26,		26
	.EQU	DMA1_CMAR5_CMAR25,		25
	.EQU	DMA1_CMAR5_CMAR24,		24
	.EQU	DMA1_CMAR5_CMAR23,		23
	.EQU	DMA1_CMAR5_CMAR22,		22
	.EQU	DMA1_CMAR5_CMAR21,		21
	.EQU	DMA1_CMAR5_CMAR20,		20
	.EQU	DMA1_CMAR5_CMAR19,		19
	.EQU	DMA1_CMAR5_CMAR18,		18
	.EQU	DMA1_CMAR5_CMAR17,		17
	.EQU	DMA1_CMAR5_CMAR16,		16
	.EQU	DMA1_CMAR5_CMAR15,		15
	.EQU	DMA1_CMAR5_CMAR14,		14
	.EQU	DMA1_CMAR5_CMAR13,		13
	.EQU	DMA1_CMAR5_CMAR12,		12
	.EQU	DMA1_CMAR5_CMAR11,		11
	.EQU	DMA1_CMAR5_CMAR10,		10
	.EQU	DMA1_CMAR5_CMAR9,		9
	.EQU	DMA1_CMAR5_CMAR8,		8
	.EQU	DMA1_CMAR5_CMAR7,		7
	.EQU	DMA1_CMAR5_CMAR6,		6
	.EQU	DMA1_CMAR5_CMAR5,		5
	.EQU	DMA1_CMAR5_CMAR4,		4
	.EQU	DMA1_CMAR5_CMAR3,		3
	.EQU	DMA1_CMAR5_CMAR2,		2
	.EQU	DMA1_CMAR5_CMAR1,		1
	.EQU	DMA1_CMAR5_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CMAR6,	0x40001794
//  0x4000 1794  DMA1_CMAR6   Bits-------------------------------------
	.EQU	DMA1_CMAR6_CMAR31,		31
	.EQU	DMA1_CMAR6_CMAR30,		30
	.EQU	DMA1_CMAR6_CMAR29,		29
	.EQU	DMA1_CMAR6_CMAR28,		28
	.EQU	DMA1_CMAR6_CMAR27,		27
	.EQU	DMA1_CMAR6_CMAR26,		26
	.EQU	DMA1_CMAR6_CMAR25,		25
	.EQU	DMA1_CMAR6_CMAR24,		24
	.EQU	DMA1_CMAR6_CMAR23,		23
	.EQU	DMA1_CMAR6_CMAR22,		22
	.EQU	DMA1_CMAR6_CMAR21,		21
	.EQU	DMA1_CMAR6_CMAR20,		20
	.EQU	DMA1_CMAR6_CMAR19,		19
	.EQU	DMA1_CMAR6_CMAR18,		18
	.EQU	DMA1_CMAR6_CMAR17,		17
	.EQU	DMA1_CMAR6_CMAR16,		16
	.EQU	DMA1_CMAR6_CMAR15,		15
	.EQU	DMA1_CMAR6_CMAR14,		14
	.EQU	DMA1_CMAR6_CMAR13,		13
	.EQU	DMA1_CMAR6_CMAR12,		12
	.EQU	DMA1_CMAR6_CMAR11,		11
	.EQU	DMA1_CMAR6_CMAR10,		10
	.EQU	DMA1_CMAR6_CMAR9,		9
	.EQU	DMA1_CMAR6_CMAR8,		8
	.EQU	DMA1_CMAR6_CMAR7,		7
	.EQU	DMA1_CMAR6_CMAR6,		6
	.EQU	DMA1_CMAR6_CMAR5,		5
	.EQU	DMA1_CMAR6_CMAR4,		4
	.EQU	DMA1_CMAR6_CMAR3,		3
	.EQU	DMA1_CMAR6_CMAR2,		2
	.EQU	DMA1_CMAR6_CMAR1,		1
	.EQU	DMA1_CMAR6_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA1_CMAR7,	0x40001798
//  0x4000 1798  DMA1_CMAR7   Bits-------------------------------------
	.EQU	DMA1_CMAR7_CMAR31,		31
	.EQU	DMA1_CMAR7_CMAR30,		30
	.EQU	DMA1_CMAR7_CMAR29,		29
	.EQU	DMA1_CMAR7_CMAR28,		28
	.EQU	DMA1_CMAR7_CMAR27,		27
	.EQU	DMA1_CMAR7_CMAR26,		26
	.EQU	DMA1_CMAR7_CMAR25,		25
	.EQU	DMA1_CMAR7_CMAR24,		24
	.EQU	DMA1_CMAR7_CMAR23,		23
	.EQU	DMA1_CMAR7_CMAR22,		22
	.EQU	DMA1_CMAR7_CMAR21,		21
	.EQU	DMA1_CMAR7_CMAR20,		20
	.EQU	DMA1_CMAR7_CMAR19,		19
	.EQU	DMA1_CMAR7_CMAR18,		18
	.EQU	DMA1_CMAR7_CMAR17,		17
	.EQU	DMA1_CMAR7_CMAR16,		16
	.EQU	DMA1_CMAR7_CMAR15,		15
	.EQU	DMA1_CMAR7_CMAR14,		14
	.EQU	DMA1_CMAR7_CMAR13,		13
	.EQU	DMA1_CMAR7_CMAR12,		12
	.EQU	DMA1_CMAR7_CMAR11,		11
	.EQU	DMA1_CMAR7_CMAR10,		10
	.EQU	DMA1_CMAR7_CMAR9,		9
	.EQU	DMA1_CMAR7_CMAR8,		8
	.EQU	DMA1_CMAR7_CMAR7,		7
	.EQU	DMA1_CMAR7_CMAR6,		6
	.EQU	DMA1_CMAR7_CMAR5,		5
	.EQU	DMA1_CMAR7_CMAR4,		4
	.EQU	DMA1_CMAR7_CMAR3,		3
	.EQU	DMA1_CMAR7_CMAR2,		2
	.EQU	DMA1_CMAR7_CMAR1,		1
	.EQU	DMA1_CMAR7_CMAR0,		0
//  register-------------------------------------
	.EQU	DMA1_NCT1,		0x400017A0
//  0x4000 17A0  DMA1_NCT1   Bits-------------------------------------
	.EQU	DMA1_NCT1_NCT31,		31
	.EQU	DMA1_NCT1_NCT30,		30
	.EQU	DMA1_NCT1_NCT29,		29
	.EQU	DMA1_NCT1_NCT28,		28
	.EQU	DMA1_NCT1_NCT27,		27
	.EQU	DMA1_NCT1_NCT26,		26
	.EQU	DMA1_NCT1_NCT25,		25
	.EQU	DMA1_NCT1_NCT24,		24
	.EQU	DMA1_NCT1_NCT23,		23
	.EQU	DMA1_NCT1_NCT22,		22
	.EQU	DMA1_NCT1_NCT21,		21
	.EQU	DMA1_NCT1_NCT20,		20
	.EQU	DMA1_NCT1_NCT19,		19
	.EQU	DMA1_NCT1_NCT18,		18
	.EQU	DMA1_NCT1_NCT17,		17
	.EQU	DMA1_NCT1_NCT16,		16
//  register-------------------------------------
	.EQU	DMA1_NCT2,		0x400017A4
//  0x4000 17A4  DMA1_NCT2   Bits-------------------------------------
	.EQU	DMA1_NCT2_NCT31,		31
	.EQU	DMA1_NCT2_NCT30,		30
	.EQU	DMA1_NCT2_NCT29,		29
	.EQU	DMA1_NCT2_NCT28,		28
	.EQU	DMA1_NCT2_NCT27,		27
	.EQU	DMA1_NCT2_NCT26,		26
	.EQU	DMA1_NCT2_NCT25,		25
	.EQU	DMA1_NCT2_NCT24,		24
	.EQU	DMA1_NCT2_NCT23,		23
	.EQU	DMA1_NCT2_NCT22,		22
	.EQU	DMA1_NCT2_NCT21,		21
	.EQU	DMA1_NCT2_NCT20,		20
	.EQU	DMA1_NCT2_NCT19,		19
	.EQU	DMA1_NCT2_NCT18,		18
	.EQU	DMA1_NCT2_NCT17,		17
	.EQU	DMA1_NCT2_NCT16,		16
//  register-------------------------------------
	.EQU	DMA1_NCT13,	0x400017A8
//  0x4000 17A8  DMA1_NCT13   Bits-------------------------------------
	.EQU	DMA1_NCT13_NCT31,		31
	.EQU	DMA1_NCT13_NCT30,		30
	.EQU	DMA1_NCT13_NCT29,		29
	.EQU	DMA1_NCT13_NCT28,		28
	.EQU	DMA1_NCT13_NCT27,		27
	.EQU	DMA1_NCT13_NCT26,		26
	.EQU	DMA1_NCT13_NCT25,		25
	.EQU	DMA1_NCT13_NCT24,		24
	.EQU	DMA1_NCT13_NCT23,		23
	.EQU	DMA1_NCT13_NCT22,		22
	.EQU	DMA1_NCT13_NCT21,		21
	.EQU	DMA1_NCT13_NCT20,		20
	.EQU	DMA1_NCT13_NCT19,		19
	.EQU	DMA1_NCT13_NCT18,		18
	.EQU	DMA1_NCT13_NCT17,		17
	.EQU	DMA1_NCT13_NCT16,		16
//  register-------------------------------------
	.EQU	DMA1_NCT4,		0x400017AC
//  0x4000 17AC  DMA1_NCT4   Bits-------------------------------------
	.EQU	DMA1_NCT4_NCT31,		31
	.EQU	DMA1_NCT4_NCT30,		30
	.EQU	DMA1_NCT4_NCT29,		29
	.EQU	DMA1_NCT4_NCT28,		28
	.EQU	DMA1_NCT4_NCT27,		27
	.EQU	DMA1_NCT4_NCT26,		26
	.EQU	DMA1_NCT4_NCT25,		25
	.EQU	DMA1_NCT4_NCT24,		24
	.EQU	DMA1_NCT4_NCT23,		23
	.EQU	DMA1_NCT4_NCT22,		22
	.EQU	DMA1_NCT4_NCT21,		21
	.EQU	DMA1_NCT4_NCT20,		20
	.EQU	DMA1_NCT4_NCT19,		19
	.EQU	DMA1_NCT4_NCT18,		18
	.EQU	DMA1_NCT4_NCT17,		17
	.EQU	DMA1_NCT4_NCT16,		16
//  register-------------------------------------
	.EQU	DMA1_NCT5,		0x400017B0
//  0x4000 17B0  DMA1_NCT5   Bits-------------------------------------
	.EQU	DMA1_NCT5_NCT31,		31
	.EQU	DMA1_NCT5_NCT30,		30
	.EQU	DMA1_NCT5_NCT29,		29
	.EQU	DMA1_NCT5_NCT28,		28
	.EQU	DMA1_NCT5_NCT27,		27
	.EQU	DMA1_NCT5_NCT26,		26
	.EQU	DMA1_NCT5_NCT25,		25
	.EQU	DMA1_NCT5_NCT24,		24
	.EQU	DMA1_NCT5_NCT23,		23
	.EQU	DMA1_NCT5_NCT22,		22
	.EQU	DMA1_NCT5_NCT21,		21
	.EQU	DMA1_NCT5_NCT20,		20
	.EQU	DMA1_NCT5_NCT19,		19
	.EQU	DMA1_NCT5_NCT18,		18
	.EQU	DMA1_NCT5_NCT17,		17
	.EQU	DMA1_NCT5_NCT16,		16
//  register-------------------------------------
	.EQU	DMA1_NCT6,		0x400017B4
//  0x4000 17B4  DMA1_NCT6   Bits-------------------------------------
	.EQU	DMA1_NCT6_NCT31,		31
	.EQU	DMA1_NCT6_NCT30,		30
	.EQU	DMA1_NCT6_NCT29,		29
	.EQU	DMA1_NCT6_NCT28,		28
	.EQU	DMA1_NCT6_NCT27,		27
	.EQU	DMA1_NCT6_NCT26,		26
	.EQU	DMA1_NCT6_NCT25,		25
	.EQU	DMA1_NCT6_NCT24,		24
	.EQU	DMA1_NCT6_NCT23,		23
	.EQU	DMA1_NCT6_NCT22,		22
	.EQU	DMA1_NCT6_NCT21,		21
	.EQU	DMA1_NCT6_NCT20,		20
	.EQU	DMA1_NCT6_NCT19,		19
	.EQU	DMA1_NCT6_NCT18,		18
	.EQU	DMA1_NCT6_NCT17,		17
	.EQU	DMA1_NCT6_NCT16,		16
//  register-------------------------------------
	.EQU	DMA1_NCT7,		0x400017B8
//  0x4000 17B8  DMA1_NCT7   Bits-------------------------------------
	.EQU	DMA1_NCT7_NCT31,		31
	.EQU	DMA1_NCT7_NCT30,		30
	.EQU	DMA1_NCT7_NCT29,		29
	.EQU	DMA1_NCT7_NCT28,		28
	.EQU	DMA1_NCT7_NCT27,		27
	.EQU	DMA1_NCT7_NCT26,		26
	.EQU	DMA1_NCT7_NCT25,		25
	.EQU	DMA1_NCT7_NCT24,		24
	.EQU	DMA1_NCT7_NCT23,		23
	.EQU	DMA1_NCT7_NCT22,		22
	.EQU	DMA1_NCT7_NCT21,		21
	.EQU	DMA1_NCT7_NCT20,		20
	.EQU	DMA1_NCT7_NCT19,		19
	.EQU	DMA1_NCT7_NCT18,		18
	.EQU	DMA1_NCT7_NCT17,		17
	.EQU	DMA1_NCT7_NCT16,		16
//  register-------------------------------------
	.EQU	DMA1_LIFR,		0x400017C0
//  0x4000 17C0  DMA1_LIFR   Bits-------------------------------------
	.EQU	DMA1_LIFR_ETIF7,		20
	.EQU	DMA1_LIFR_HTIF7,		19
	.EQU	DMA1_LIFR_FTIF7,		18
	.EQU	DMA1_LIFR_ETIF6,		17
	.EQU	DMA1_LIFR_HTIF6,		16
	.EQU	DMA1_LIFR_FTIF6,		15
	.EQU	DMA1_LIFR_ETIF5,		14
	.EQU	DMA1_LIFR_HTIF5,		13
	.EQU	DMA1_LIFR_FTIF5,		12
	.EQU	DMA1_LIFR_ETIF4,		11
	.EQU	DMA1_LIFR_HTIF4,		10
	.EQU	DMA1_LIFR_FTIF4,		9
	.EQU	DMA1_LIFR_ETIF3,		8
	.EQU	DMA1_LIFR_HTIF3,		7
	.EQU	DMA1_LIFR_FTIF3,		6
	.EQU	DMA1_LIFR_ETIF2,		5
	.EQU	DMA1_LIFR_HTIF2,		4
	.EQU	DMA1_LIFR_FTIF2,		3
	.EQU	DMA1_LIFR_ETIF1,		2
	.EQU	DMA1_LIFR_HTIF1,		1
	.EQU	DMA1_LIFR_FTIF1,		0
//  register-------------------------------------
	.EQU	DMA1_LIER,		0x400017C4
//  0x4000 17C4  DMA1_LIER   Bits-------------------------------------
	.EQU	DMA1_LIER_ETIE7,		20
	.EQU	DMA1_LIER_HTIE7,		19
	.EQU	DMA1_LIER_FTIE7,		18
	.EQU	DMA1_LIER_ETIE6,		17
	.EQU	DMA1_LIER_HTIE6,		16
	.EQU	DMA1_LIER_FTIE6,		15
	.EQU	DMA1_LIER_ETIE5,		14
	.EQU	DMA1_LIER_HTIE5,		13
	.EQU	DMA1_LIER_FTIE5,		12
	.EQU	DMA1_LIER_ETIE4,		11
	.EQU	DMA1_LIER_HTIE4,		10
	.EQU	DMA1_LIER_FTIE4,		9
	.EQU	DMA1_LIER_ETIE3,		8
	.EQU	DMA1_LIER_HTIE3,		7
	.EQU	DMA1_LIER_FTIE3,		6
	.EQU	DMA1_LIER_ETIE2,		5
	.EQU	DMA1_LIER_HTIE2,		4
	.EQU	DMA1_LIER_FTIE2,		3
	.EQU	DMA1_LIER_ETIE1,		2
	.EQU	DMA1_LIER_HTIE1,		1
	.EQU	DMA1_LIER_FTIE1,		0
//  register-------------------------------------
	.EQU	DMA1_REMAP,	0x400017C8
//  0x4000 17C8  DMA1_REMAP   Bits-------------------------------------
	.EQU	DMA1_REMAP_REMAP12,		12
	.EQU	DMA1_REMAP_REMAP11,		11
	.EQU	DMA1_REMAP_REMAP10,		10
	.EQU	DMA1_REMAP_REMAP9,		9
	.EQU	DMA1_REMAP_REMAP8,		8
	.EQU	DMA1_REMAP_REMAP7,		7
	.EQU	DMA1_REMAP_REMAP6,		6
	.EQU	DMA1_REMAP_REMAP5,		5
	.EQU	DMA1_REMAP_REMAP4,		4
	.EQU	DMA1_REMAP_REMAP3,		3
	.EQU	DMA1_REMAP_REMAP2,		2
	.EQU	DMA1_REMAP_REMAP1,		1
	.EQU	DMA1_REMAP_REMAP0,		0
//  register-------------------------------------
	.EQU	T14_CNT,		0x40001800
//  0x4000 1800  T14_CNT   Bits-------------------------------------
	.EQU	T14_CNT_TXCNT15,		15
	.EQU	T14_CNT_TXCNT14,		14
	.EQU	T14_CNT_TXCNT13,		13
	.EQU	T14_CNT_TXCNT12,		12
	.EQU	T14_CNT_TXCNT11,		11
	.EQU	T14_CNT_TXCNT10,		10
	.EQU	T14_CNT_TXCNT9,		9
	.EQU	T14_CNT_TXCNT8,		8
	.EQU	T14_CNT_TXCNT7,		7
	.EQU	T14_CNT_TXCNT6,		6
	.EQU	T14_CNT_TXCNT5,		5
	.EQU	T14_CNT_TXCNT4,		4
	.EQU	T14_CNT_TXCNT3,		3
	.EQU	T14_CNT_TXCNT2,		2
	.EQU	T14_CNT_TXCNT1,		1
	.EQU	T14_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T14_CTL1,		0x40001804
//  0x4000 1804  T14_CTL1   Bits-------------------------------------
	.EQU	T14_CTL1_TCKSEL1,		12
	.EQU	T14_CTL1_TCKSEL0,		11
	.EQU	T14_CTL1_TRGSEL1,		10
	.EQU	T14_CTL1_TRGSEL0,		9
	.EQU	T14_CTL1_TXCMS2,		8
	.EQU	T14_CTL1_TXCMS1,		7
	.EQU	T14_CTL1_TXCMS0,		6
	.EQU	T14_CTL1_TXDIR,		5
	.EQU	T14_CTL1_TXCLK1,		4
	.EQU	T14_CTL1_TXCLK0,		3
	.EQU	T14_CTL1_TXSY,		2
	.EQU	T14_CTL1_TXCS,		1
	.EQU	T14_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T14_CTL2,		0x40001808
//  0x4000 1808  T14_CTL2   Bits-------------------------------------
	.EQU	T14_CTL2_TXTRG,		15
	.EQU	T14_CTL2_PXSPM,		14
	.EQU	T14_CTL2_PXSPMST,		13
	.EQU	T14_CTL2_TXUR,		12
	.EQU	T14_CTL2_TXMSSYNC,		11
	.EQU	T14_CTL2_TXTS3,		10
	.EQU	T14_CTL2_TXTS2,		9
	.EQU	T14_CTL2_TXTS1,		8
	.EQU	T14_CTL2_TXTS0,		7
	.EQU	T14_CTL2_TXSMS2,		6
	.EQU	T14_CTL2_TXSMS1,		5
	.EQU	T14_CTL2_TXSMS0,		4
	.EQU	T14_CTL2_TXMMS1,		3
	.EQU	T14_CTL2_TXMMS0,		2
	.EQU	T14_CTL2_TXUDEVT,		1
	.EQU	T14_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T14_PRSC,		0x4000180C
//  0x4000 180C  T14_PRSC   Bits-------------------------------------
	.EQU	T14_PRSC_TXCKS15,		15
	.EQU	T14_PRSC_TXCKS14,		14
	.EQU	T14_PRSC_TXCKS13,		13
	.EQU	T14_PRSC_TXCKS12,		12
	.EQU	T14_PRSC_TXCKS11,		11
	.EQU	T14_PRSC_TXCKS10,		10
	.EQU	T14_PRSC_TXCKS9,		9
	.EQU	T14_PRSC_TXCKS8,		8
	.EQU	T14_PRSC_TXCKS7,		7
	.EQU	T14_PRSC_TXCKS6,		6
	.EQU	T14_PRSC_TXCKS5,		5
	.EQU	T14_PRSC_TXCKS4,		4
	.EQU	T14_PRSC_TXCKS3,		3
	.EQU	T14_PRSC_TXCKS2,		2
	.EQU	T14_PRSC_TXCKS1,		1
	.EQU	T14_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T14_PPX,		0x40001810
//  0x4000 1810  T14_PPX   Bits-------------------------------------
	.EQU	T14_PPX_PPX15,		15
	.EQU	T14_PPX_PPX14,		14
	.EQU	T14_PPX_PPX13,		13
	.EQU	T14_PPX_PPX12,		12
	.EQU	T14_PPX_PPX11,		11
	.EQU	T14_PPX_PPX10,		10
	.EQU	T14_PPX_PPX9,		9
	.EQU	T14_PPX_PPX8,		8
	.EQU	T14_PPX_PPX7,		7
	.EQU	T14_PPX_PPX6,		6
	.EQU	T14_PPX_PPX5,		5
	.EQU	T14_PPX_PPX4,		4
	.EQU	T14_PPX_PPX3,		3
	.EQU	T14_PPX_PPX2,		2
	.EQU	T14_PPX_PPX1,		1
	.EQU	T14_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T14_DIER,		0x40001814
//  0x4000 1814  T14_DIER   Bits-------------------------------------
	.EQU	T14_DIER_TXTDE,		4
	.EQU	T14_DIER_TXUDE,		3
	.EQU	T14_DIER_TXIE,		2
	.EQU	T14_DIER_TXTIE,		1
	.EQU	T14_DIER_TXUIE,		0
//  register-------------------------------------
	.EQU	T14_SR,			0x40001818
//  0x4000 1818  T14_SR   Bits-------------------------------------
	.EQU	T14_SR_TXUDF,		4
	.EQU	T14_SR_TXTDF,		3
	.EQU	T14_SR_TXIF,		2
	.EQU	T14_SR_TXTIF,		1
	.EQU	T14_SR_TXUIF,		0
//  register-------------------------------------
	.EQU	T14_SRIC,		0x4000181C
//  0x4000 181C  T14_SRIC   Bits-------------------------------------
	.EQU	T14_SRIC_TXIC,		2
	.EQU	T14_SRIC_TXTIC,		1
	.EQU	T14_SRIC_TXUIC,		0
//  register-------------------------------------
	.EQU	T11_CNT,		0x40001A00
//  0x4000 1A00  T11_CNT   Bits-------------------------------------
	.EQU	T11_CNT_TXCNT31,		31
	.EQU	T11_CNT_TXCNT30,		30
	.EQU	T11_CNT_TXCNT29,		29
	.EQU	T11_CNT_TXCNT28,		28
	.EQU	T11_CNT_TXCNT27,		27
	.EQU	T11_CNT_TXCNT26,		26
	.EQU	T11_CNT_TXCNT25,		25
	.EQU	T11_CNT_TXCNT24,		24
	.EQU	T11_CNT_TXCNT23,		23
	.EQU	T11_CNT_TXCNT22,		22
	.EQU	T11_CNT_TXCNT21,		21
	.EQU	T11_CNT_TXCNT20,		20
	.EQU	T11_CNT_TXCNT19,		19
	.EQU	T11_CNT_TXCNT18,		18
	.EQU	T11_CNT_TXCNT17,		17
	.EQU	T11_CNT_TXCNT16,		16
	.EQU	T11_CNT_TXCNT15,		15
	.EQU	T11_CNT_TXCNT14,		14
	.EQU	T11_CNT_TXCNT13,		13
	.EQU	T11_CNT_TXCNT12,		12
	.EQU	T11_CNT_TXCNT11,		11
	.EQU	T11_CNT_TXCNT10,		10
	.EQU	T11_CNT_TXCNT9,		9
	.EQU	T11_CNT_TXCNT8,		8
	.EQU	T11_CNT_TXCNT7,		7
	.EQU	T11_CNT_TXCNT6,		6
	.EQU	T11_CNT_TXCNT5,		5
	.EQU	T11_CNT_TXCNT4,		4
	.EQU	T11_CNT_TXCNT3,		3
	.EQU	T11_CNT_TXCNT2,		2
	.EQU	T11_CNT_TXCNT1,		1
	.EQU	T11_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T11_PHS,		0x40001A04
//  0x4000 1A04  T11_PHS   Bits-------------------------------------
	.EQU	T11_PHS_TXPHS31,		31
	.EQU	T11_PHS_TXPHS30,		30
	.EQU	T11_PHS_TXPHS29,		29
	.EQU	T11_PHS_TXPHS28,		28
	.EQU	T11_PHS_TXPHS27,		27
	.EQU	T11_PHS_TXPHS26,		26
	.EQU	T11_PHS_TXPHS25,		25
	.EQU	T11_PHS_TXPHS24,		24
	.EQU	T11_PHS_TXPHS23,		23
	.EQU	T11_PHS_TXPHS22,		22
	.EQU	T11_PHS_TXPHS21,		21
	.EQU	T11_PHS_TXPHS20,		20
	.EQU	T11_PHS_TXPHS19,		19
	.EQU	T11_PHS_TXPHS18,		18
	.EQU	T11_PHS_TXPHS17,		17
	.EQU	T11_PHS_TXPHS16,		16
	.EQU	T11_PHS_TXPHS15,		15
	.EQU	T11_PHS_TXPHS14,		14
	.EQU	T11_PHS_TXPHS13,		13
	.EQU	T11_PHS_TXPHS12,		12
	.EQU	T11_PHS_TXPHS11,		11
	.EQU	T11_PHS_TXPHS10,		10
	.EQU	T11_PHS_TXPHS9,		9
	.EQU	T11_PHS_TXPHS8,		8
	.EQU	T11_PHS_TXPHS7,		7
	.EQU	T11_PHS_TXPHS6,		6
	.EQU	T11_PHS_TXPHS5,		5
	.EQU	T11_PHS_TXPHS4,		4
	.EQU	T11_PHS_TXPHS3,		3
	.EQU	T11_PHS_TXPHS2,		2
	.EQU	T11_PHS_TXPHS1,		1
	.EQU	T11_PHS_TXPHS0,		0
//  register-------------------------------------
	.EQU	T11_PPX,		0x40001A08
//  0x4000 1A08  T11_PPX   Bits-------------------------------------
	.EQU	T11_PPX_PPX31,		31
	.EQU	T11_PPX_PPX30,		30
	.EQU	T11_PPX_PPX29,		29
	.EQU	T11_PPX_PPX28,		28
	.EQU	T11_PPX_PPX27,		27
	.EQU	T11_PPX_PPX26,		26
	.EQU	T11_PPX_PPX25,		25
	.EQU	T11_PPX_PPX24,		24
	.EQU	T11_PPX_PPX23,		23
	.EQU	T11_PPX_PPX22,		22
	.EQU	T11_PPX_PPX21,		21
	.EQU	T11_PPX_PPX20,		20
	.EQU	T11_PPX_PPX19,		19
	.EQU	T11_PPX_PPX18,		18
	.EQU	T11_PPX_PPX17,		17
	.EQU	T11_PPX_PPX16,		16
	.EQU	T11_PPX_PPX15,		15
	.EQU	T11_PPX_PPX14,		14
	.EQU	T11_PPX_PPX13,		13
	.EQU	T11_PPX_PPX12,		12
	.EQU	T11_PPX_PPX11,		11
	.EQU	T11_PPX_PPX10,		10
	.EQU	T11_PPX_PPX9,		9
	.EQU	T11_PPX_PPX8,		8
	.EQU	T11_PPX_PPX7,		7
	.EQU	T11_PPX_PPX6,		6
	.EQU	T11_PPX_PPX5,		5
	.EQU	T11_PPX_PPX4,		4
	.EQU	T11_PPX_PPX3,		3
	.EQU	T11_PPX_PPX2,		2
	.EQU	T11_PPX_PPX1,		1
	.EQU	T11_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T11_PRSC,		0x40001A0C
//  0x4000 1A0C  T11_PRSC   Bits-------------------------------------
	.EQU	T11_PRSC_TXPRSC31,		31
	.EQU	T11_PRSC_TXPRSC30,		30
	.EQU	T11_PRSC_TXPRSC29,		29
	.EQU	T11_PRSC_TXPRSC28,		28
	.EQU	T11_PRSC_TXPRSC27,		27
	.EQU	T11_PRSC_TXPRSC26,		26
	.EQU	T11_PRSC_TXPRSC25,		25
	.EQU	T11_PRSC_TXPRSC24,		24
	.EQU	T11_PRSC_TXPRSC23,		23
	.EQU	T11_PRSC_TXPRSC22,		22
	.EQU	T11_PRSC_TXPRSC21,		21
	.EQU	T11_PRSC_TXPRSC20,		20
	.EQU	T11_PRSC_TXPRSC19,		19
	.EQU	T11_PRSC_TXPRSC18,		18
	.EQU	T11_PRSC_TXPRSC17,		17
	.EQU	T11_PRSC_TXPRSC16,		16
	.EQU	T11_PRSC_TXPRSC15,		15
	.EQU	T11_PRSC_TXPRSC14,		14
	.EQU	T11_PRSC_TXPRSC13,		13
	.EQU	T11_PRSC_TXPRSC12,		12
	.EQU	T11_PRSC_TXPRSC11,		11
	.EQU	T11_PRSC_TXPRSC10,		10
	.EQU	T11_PRSC_TXPRSC9,		9
	.EQU	T11_PRSC_TXPRSC8,		8
	.EQU	T11_PRSC_TXPRSC7,		7
	.EQU	T11_PRSC_TXPRSC6,		6
	.EQU	T11_PRSC_TXPRSC5,		5
	.EQU	T11_PRSC_TXPRSC4,		4
	.EQU	T11_PRSC_TXPRSC3,		3
	.EQU	T11_PRSC_TXPRSC2,		2
	.EQU	T11_PRSC_TXPRSC1,		1
	.EQU	T11_PRSC_TXPRSC0,		0
//  register-------------------------------------
	.EQU	T11_CTL,		0x40001A10
//  0x4000 1A10  T11_CTL   Bits-------------------------------------
	.EQU	T11_CTL_BLINKEN,		31
	.EQU	T11_CTL_LINKEN,		30
	.EQU	T11_CTL_UDSYNEN,		29
	.EQU	T11_CTL_HRLOCK,		28
	.EQU	T11_CTL_ETLOCK,		27
	.EQU	T11_CTL_PCLOCK,		26
	.EQU	T11_CTL_DBLOCK,		25
	.EQU	T11_CTL_AQLOCKB,		24
	.EQU	T11_CTL_AQLOCKA,		23
	.EQU	T11_CTL_CAPEN,		22
	.EQU	T11_CTL_CAPSEL,		21
	.EQU	T11_CTL_TXMAX,		19
	.EQU	T11_CTL_PHSDIR,		18
	.EQU	T11_CTL_SWFSYNC,		17
	.EQU	T11_CTL_SYNCOSEL1,		16
	.EQU	T11_CTL_SYNCOSEL0,		15
	.EQU	T11_CTL_PHSEN,		14
	.EQU	T11_CTL_SYNCI,		13
	.EQU	T11_CTL_TXUR,		12
	.EQU	T11_CTL_TXUDEVT,		11
	.EQU	T11_CTL_TXUDEN,		10
	.EQU	T11_CTL_TXCMS2,		9
	.EQU	T11_CTL_TXCMS1,		8
	.EQU	T11_CTL_TXCMS0,		7
	.EQU	T11_CTL_TXDIR,		6
	.EQU	T11_CTL_TXCLK1,		5
	.EQU	T11_CTL_TXCLK0,		4
	.EQU	T11_CTL_TXSY,		3
	.EQU	T11_CTL_TXGATE,		2
	.EQU	T11_CTL_TXCS,		1
	.EQU	T11_CTL_TXEN,		0
//  register-------------------------------------
	.EQU	EPWM11_RA,		0x40001A14
//  0x4000 1A14  EPWM11_RA   Bits-------------------------------------
	.EQU	EPWM11_RA_EPWMRA31,		31
	.EQU	EPWM11_RA_EPWMRA30,		30
	.EQU	EPWM11_RA_EPWMRA29,		29
	.EQU	EPWM11_RA_EPWMRA28,		28
	.EQU	EPWM11_RA_EPWMRA27,		27
	.EQU	EPWM11_RA_EPWMRA26,		26
	.EQU	EPWM11_RA_EPWMRA25,		25
	.EQU	EPWM11_RA_EPWMRA24,		24
	.EQU	EPWM11_RA_EPWMRA23,		23
	.EQU	EPWM11_RA_EPWMRA22,		22
	.EQU	EPWM11_RA_EPWMRA21,		21
	.EQU	EPWM11_RA_EPWMRA20,		20
	.EQU	EPWM11_RA_EPWMRA19,		19
	.EQU	EPWM11_RA_EPWMRA18,		18
	.EQU	EPWM11_RA_EPWMRA17,		17
	.EQU	EPWM11_RA_EPWMRA16,		16
	.EQU	EPWM11_RA_EPWMRA15,		15
	.EQU	EPWM11_RA_EPWMRA14,		14
	.EQU	EPWM11_RA_EPWMRA13,		13
	.EQU	EPWM11_RA_EPWMRA12,		12
	.EQU	EPWM11_RA_EPWMRA11,		11
	.EQU	EPWM11_RA_EPWMRA10,		10
	.EQU	EPWM11_RA_EPWMRA9,		9
	.EQU	EPWM11_RA_EPWMRA8,		8
	.EQU	EPWM11_RA_EPWMRA7,		7
	.EQU	EPWM11_RA_EPWMRA6,		6
	.EQU	EPWM11_RA_EPWMRA5,		5
	.EQU	EPWM11_RA_EPWMRA4,		4
	.EQU	EPWM11_RA_EPWMRA3,		3
	.EQU	EPWM11_RA_EPWMRA2,		2
	.EQU	EPWM11_RA_EPWMRA1,		1
	.EQU	EPWM11_RA_EPWMRA0,		0
//  register-------------------------------------
	.EQU	EPWM11_RB,		0x40001A18
//  0x4000 1A18  EPWM11_RB   Bits-------------------------------------
	.EQU	EPWM11_RB_EPWMRB31,		31
	.EQU	EPWM11_RB_EPWMRB30,		30
	.EQU	EPWM11_RB_EPWMRB29,		29
	.EQU	EPWM11_RB_EPWMRB28,		28
	.EQU	EPWM11_RB_EPWMRB27,		27
	.EQU	EPWM11_RB_EPWMRB26,		26
	.EQU	EPWM11_RB_EPWMRB25,		25
	.EQU	EPWM11_RB_EPWMRB24,		24
	.EQU	EPWM11_RB_EPWMRB23,		23
	.EQU	EPWM11_RB_EPWMRB22,		22
	.EQU	EPWM11_RB_EPWMRB21,		21
	.EQU	EPWM11_RB_EPWMRB20,		20
	.EQU	EPWM11_RB_EPWMRB19,		19
	.EQU	EPWM11_RB_EPWMRB18,		18
	.EQU	EPWM11_RB_EPWMRB17,		17
	.EQU	EPWM11_RB_EPWMRB16,		16
	.EQU	EPWM11_RB_EPWMRB15,		15
	.EQU	EPWM11_RB_EPWMRB14,		14
	.EQU	EPWM11_RB_EPWMRB13,		13
	.EQU	EPWM11_RB_EPWMRB12,		12
	.EQU	EPWM11_RB_EPWMRB11,		11
	.EQU	EPWM11_RB_EPWMRB10,		10
	.EQU	EPWM11_RB_EPWMRB9,		9
	.EQU	EPWM11_RB_EPWMRB8,		8
	.EQU	EPWM11_RB_EPWMRB7,		7
	.EQU	EPWM11_RB_EPWMRB6,		6
	.EQU	EPWM11_RB_EPWMRB5,		5
	.EQU	EPWM11_RB_EPWMRB4,		4
	.EQU	EPWM11_RB_EPWMRB3,		3
	.EQU	EPWM11_RB_EPWMRB2,		2
	.EQU	EPWM11_RB_EPWMRB1,		1
	.EQU	EPWM11_RB_EPWMRB0,		0
//  register-------------------------------------
	.EQU	EPWM11_CTLA,	0x40001A1C
//  0x4000 1A1C  EPWM11_CTLA   Bits-------------------------------------
	.EQU	EPWM11_CTLA_OTSFA,		16
	.EQU	EPWM11_CTLA_ACTSFA1,		15
	.EQU	EPWM11_CTLA_ACTSFA0,		14
	.EQU	EPWM11_CTLA_CSFA1,		13
	.EQU	EPWM11_CTLA_CSFA0,		12
	.EQU	EPWM11_CTLA_ACBD1,		11
	.EQU	EPWM11_CTLA_ACBD0,		10
	.EQU	EPWM11_CTLA_ACBU1,		9
	.EQU	EPWM11_CTLA_ACBU0,		8
	.EQU	EPWM11_CTLA_ACAD1,		7
	.EQU	EPWM11_CTLA_ACAD0,		6
	.EQU	EPWM11_CTLA_ACAU1,		5
	.EQU	EPWM11_CTLA_ACAU0,		4
	.EQU	EPWM11_CTLA_APRD1,		3
	.EQU	EPWM11_CTLA_APRD0,		2
	.EQU	EPWM11_CTLA_AZRO1,		1
	.EQU	EPWM11_CTLA_AZRO0,		0
//  register-------------------------------------
	.EQU	EPWM11_CTLB,	0x40001A20
//  0x4000 1A20  EPWM11_CTLB   Bits-------------------------------------
	.EQU	EPWM11_CTLB_OTSFB,		16
	.EQU	EPWM11_CTLB_ACTSFB1,		15
	.EQU	EPWM11_CTLB_ACTSFB0,		14
	.EQU	EPWM11_CTLB_CSFB1,		13
	.EQU	EPWM11_CTLB_CSFB0,		12
	.EQU	EPWM11_CTLB_BCBD1,		11
	.EQU	EPWM11_CTLB_BCBD0,		10
	.EQU	EPWM11_CTLB_BCBU1,		9
	.EQU	EPWM11_CTLB_BCBU0,		8
	.EQU	EPWM11_CTLB_BCAD1,		7
	.EQU	EPWM11_CTLB_BCAD0,		6
	.EQU	EPWM11_CTLB_BCAU1,		5
	.EQU	EPWM11_CTLB_BCAU0,		4
	.EQU	EPWM11_CTLB_BPRD1,		3
	.EQU	EPWM11_CTLB_BPRD0,		2
	.EQU	EPWM11_CTLB_BZRO1,		1
	.EQU	EPWM11_CTLB_BZRO0,		0
//  register-------------------------------------
	.EQU	EPWM11_DBCTL,	0x40001A24
//  0x4000 1A24  EPWM11_DBCTL   Bits-------------------------------------
	.EQU	EPWM11_DBCTL_INMODE1,		5
	.EQU	EPWM11_DBCTL_INMODE0,		4
	.EQU	EPWM11_DBCTL_POLSEL1,		3
	.EQU	EPWM11_DBCTL_POLSEL0,		2
	.EQU	EPWM11_DBCTL_OUTMODE1,		1
	.EQU	EPWM11_DBCTL_OUTMODE0,		0
//  register-------------------------------------
	.EQU	EPWM11_DBT,	0x40001A28
//  0x4000 1A28  EPWM11_DBT   Bits-------------------------------------
	.EQU	EPWM11_DBT_RDBT15,		31
	.EQU	EPWM11_DBT_RDBT14,		30
	.EQU	EPWM11_DBT_RDBT13,		29
	.EQU	EPWM11_DBT_RDBT12,		28
	.EQU	EPWM11_DBT_RDBT11,		27
	.EQU	EPWM11_DBT_RDBT10,		26
	.EQU	EPWM11_DBT_RDBT9,		25
	.EQU	EPWM11_DBT_RDBT8,		24
	.EQU	EPWM11_DBT_RDBT7,		23
	.EQU	EPWM11_DBT_RDBT6,		22
	.EQU	EPWM11_DBT_RDBT5,		21
	.EQU	EPWM11_DBT_RDBT4,		20
	.EQU	EPWM11_DBT_RDBT3,		19
	.EQU	EPWM11_DBT_RDBT2,		18
	.EQU	EPWM11_DBT_RDBT1,		17
	.EQU	EPWM11_DBT_RDBT0,		16
	.EQU	EPWM11_DBT_FDBT15,		15
	.EQU	EPWM11_DBT_FDBT14,		14
	.EQU	EPWM11_DBT_FDBT13,		13
	.EQU	EPWM11_DBT_FDBT12,		12
	.EQU	EPWM11_DBT_FDBT11,		11
	.EQU	EPWM11_DBT_FDBT10,		10
	.EQU	EPWM11_DBT_FDBT9,		9
	.EQU	EPWM11_DBT_FDBT8,		8
	.EQU	EPWM11_DBT_FDBT7,		7
	.EQU	EPWM11_DBT_FDBT6,		6
	.EQU	EPWM11_DBT_FDBT5,		5
	.EQU	EPWM11_DBT_FDBT4,		4
	.EQU	EPWM11_DBT_FDBT3,		3
	.EQU	EPWM11_DBT_FDBT2,		2
	.EQU	EPWM11_DBT_FDBT1,		1
	.EQU	EPWM11_DBT_FDBT0,		0
//  register-------------------------------------
	.EQU	EPWM11_PCCTL,	0x40001A2C
//  0x4000 1A2C  EPWM11_PCCTL   Bits-------------------------------------
	.EQU	EPWM11_PCCTL_CHPFREQ2,		10
	.EQU	EPWM11_PCCTL_CHPFREQ1,		9
	.EQU	EPWM11_PCCTL_CHPFREQ0,		8
	.EQU	EPWM11_PCCTL_CHPDUTY2,		7
	.EQU	EPWM11_PCCTL_CHPDUTY1,		6
	.EQU	EPWM11_PCCTL_CHPDUTY0,		5
	.EQU	EPWM11_PCCTL_OSHTWTH3,		4
	.EQU	EPWM11_PCCTL_OSHTWTH2,		3
	.EQU	EPWM11_PCCTL_OSHTWTH1,		2
	.EQU	EPWM11_PCCTL_OSHTWTH0,		1
	.EQU	EPWM11_PCCTL_CHPEN,		0
//  register-------------------------------------
	.EQU	EPWM11_PXASCTL,	0x40001A30
//  0x4000 1A30  EPWM11_PXASCTL   Bits-------------------------------------
	.EQU	EPWM11_PXASCTL_PXRSEN,		8
	.EQU	EPWM11_PXASCTL_PXSSA1,		7
	.EQU	EPWM11_PXASCTL_PXSSA0,		6
	.EQU	EPWM11_PXASCTL_PXSSB1,		5
	.EQU	EPWM11_PXASCTL_PXSSB0,		4
	.EQU	EPWM11_PXASCTL_PXASE,		3
	.EQU	EPWM11_PXASCTL_PXASS2,		2
	.EQU	EPWM11_PXASCTL_PXASS1,		1
	.EQU	EPWM11_PXASCTL_PXASS0,		0
//  register-------------------------------------
	.EQU	EPWM11_ETCTL,	0x40001A34
//  0x4000 1A34  EPWM11_ETCTL   Bits-------------------------------------
	.EQU	EPWM11_ETCTL_BTSEL1,		25
	.EQU	EPWM11_ETCTL_BTSEL0,		24
	.EQU	EPWM11_ETCTL_BT1,		23
	.EQU	EPWM11_ETCTL_BT0,		22
	.EQU	EPWM11_ETCTL_BPP1,		21
	.EQU	EPWM11_ETCTL_BPP0,		20
	.EQU	EPWM11_ETCTL_FRCB,		19
	.EQU	EPWM11_ETCTL_SELB1,		18
	.EQU	EPWM11_ETCTL_SELB0,		17
	.EQU	EPWM11_ETCTL_TOADENB,		16
	.EQU	EPWM11_ETCTL_ATSEL1,		9
	.EQU	EPWM11_ETCTL_ATSEL0,		8
	.EQU	EPWM11_ETCTL_AT1,		7
	.EQU	EPWM11_ETCTL_AT0,		6
	.EQU	EPWM11_ETCTL_APP1,		5
	.EQU	EPWM11_ETCTL_APP0,		4
	.EQU	EPWM11_ETCTL_FRCA,		3
	.EQU	EPWM11_ETCTL_SELA1,		2
	.EQU	EPWM11_ETCTL_SELA0,		1
	.EQU	EPWM11_ETCTL_TOADENA,		0
//  register-------------------------------------
	.EQU	EPWM11_IE,		0x40001A38
//  0x4000 1A38  EPWM11_IE   Bits-------------------------------------
	.EQU	EPWM11_IE_TXDIE,		8
	.EQU	EPWM11_IE_TXCIE,		7
	.EQU	EPWM11_IE_TXAIE,		6
	.EQU	EPWM11_IE_TXBIE,		5
	.EQU	EPWM11_IE_TXIE,		4
	.EQU	EPWM11_IE_TXUIE,		3
	.EQU	EPWM11_IE_TXGIE,		2
	.EQU	EPWM11_IE_TXTIE1,		1
	.EQU	EPWM11_IE_TXTIE0,		0
//  register-------------------------------------
	.EQU	EPWM11_IF,		0x40001A3C
//  0x4000 1A3C  EPWM11_IF   Bits-------------------------------------
	.EQU	EPWM11_IF_TXDIF,		8
	.EQU	EPWM11_IF_TXCIF,		7
	.EQU	EPWM11_IF_TXAIF,		6
	.EQU	EPWM11_IF_TXBIF,		5
	.EQU	EPWM11_IF_TXIF,		4
	.EQU	EPWM11_IF_TXUIF,		3
	.EQU	EPWM11_IF_TXGIF,		2
	.EQU	EPWM11_IF_TXTIF1,		1
	.EQU	EPWM11_IF_TXTIF0,		0
//  register-------------------------------------
	.EQU	EPWM11_IC,		0x40001A40
//  0x4000 1A40  EPWM11_IC   Bits-------------------------------------
	.EQU	EPWM11_IC_TXDIC,		8
	.EQU	EPWM11_IC_TXCIC,		7
	.EQU	EPWM11_IC_TXAIC,		6
	.EQU	EPWM11_IC_TXBIC,		5
	.EQU	EPWM11_IC_TXIC,		4
	.EQU	EPWM11_IC_TXUIC,		3
	.EQU	EPWM11_IC_TXGIC,		2
	.EQU	EPWM11_IC_TXTIC1,		1
	.EQU	EPWM11_IC_TXTIC0,		0
//  register-------------------------------------
	.EQU	EPWM11_DE,		0x40001A44
//  0x4000 1A44  EPWM11_DE   Bits-------------------------------------
	.EQU	EPWM11_DE_TXDDE,		8
	.EQU	EPWM11_DE_TXCDE,		7
	.EQU	EPWM11_DE_TXADE,		6
	.EQU	EPWM11_DE_TXBDE,		5
	.EQU	EPWM11_DE_TXDE,		4
	.EQU	EPWM11_DE_TXUDE,		3
	.EQU	EPWM11_DE_TXGDE,		2
	.EQU	EPWM11_DE_TXTDE1,		1
	.EQU	EPWM11_DE_TXTDE0,		0
//  register-------------------------------------
	.EQU	EPWM11_DF,		0x40001A48
//  0x4000 1A48  EPWM11_DF   Bits-------------------------------------
	.EQU	EPWM11_DF_TXDDF,		8
	.EQU	EPWM11_DF_TXCDF,		7
	.EQU	EPWM11_DF_TXADF,		6
	.EQU	EPWM11_DF_TXBDF,		5
	.EQU	EPWM11_DF_TXDF,		4
	.EQU	EPWM11_DF_TXUDF,		3
	.EQU	EPWM11_DF_TXGDF,		2
	.EQU	EPWM11_DF_TXTDF1,		1
	.EQU	EPWM11_DF_TXTDF0,		0
//  register-------------------------------------
	.EQU	EPWM11_HRPWMCTL,	0x40001A50
//  0x4000 1A50  EPWM11_HRPWMCTL   Bits-------------------------------------
	.EQU	EPWM11_HRPWMCTL_HRPOUTB,		1
	.EQU	EPWM11_HRPWMCTL_HRPEN,		0
//  register-------------------------------------
	.EQU	EPWM11_HRCMP,	0x40001A54
//  0x4000 1A54  EPWM11_HRCMP   Bits-------------------------------------
	.EQU	EPWM11_HRCMP_HRCMP7,		7
	.EQU	EPWM11_HRCMP_HRCMP6,		6
	.EQU	EPWM11_HRCMP_HRCMP5,		5
	.EQU	EPWM11_HRCMP_HRCMP4,		4
	.EQU	EPWM11_HRCMP_HRCMP3,		3
	.EQU	EPWM11_HRCMP_HRCMP2,		2
	.EQU	EPWM11_HRCMP_HRCMP1,		1
	.EQU	EPWM11_HRCMP_HRCMP0,		0
//  register-------------------------------------
	.EQU	EPWM11_CAP,	0x40001A58
//  0x4000 1A58  EPWM11_CAP   Bits-------------------------------------
	.EQU	EPWM11_CAP_CAP31,		31
	.EQU	EPWM11_CAP_CAP30,		30
	.EQU	EPWM11_CAP_CAP29,		29
	.EQU	EPWM11_CAP_CAP28,		28
	.EQU	EPWM11_CAP_CAP27,		27
	.EQU	EPWM11_CAP_CAP26,		26
	.EQU	EPWM11_CAP_CAP25,		25
	.EQU	EPWM11_CAP_CAP24,		24
	.EQU	EPWM11_CAP_CAP23,		23
	.EQU	EPWM11_CAP_CAP22,		22
	.EQU	EPWM11_CAP_CAP21,		21
	.EQU	EPWM11_CAP_CAP20,		20
	.EQU	EPWM11_CAP_CAP19,		19
	.EQU	EPWM11_CAP_CAP18,		18
	.EQU	EPWM11_CAP_CAP17,		17
	.EQU	EPWM11_CAP_CAP16,		16
	.EQU	EPWM11_CAP_CAP15,		15
	.EQU	EPWM11_CAP_CAP14,		14
	.EQU	EPWM11_CAP_CAP13,		13
	.EQU	EPWM11_CAP_CAP12,		12
	.EQU	EPWM11_CAP_CAP11,		11
	.EQU	EPWM11_CAP_CAP10,		10
	.EQU	EPWM11_CAP_CAP9,		9
	.EQU	EPWM11_CAP_CAP8,		8
	.EQU	EPWM11_CAP_CAP7,		7
	.EQU	EPWM11_CAP_CAP6,		6
	.EQU	EPWM11_CAP_CAP5,		5
	.EQU	EPWM11_CAP_CAP4,		4
	.EQU	EPWM11_CAP_CAP3,		3
	.EQU	EPWM11_CAP_CAP2,		2
	.EQU	EPWM11_CAP_CAP1,		1
	.EQU	EPWM11_CAP_CAP0,		0
//  register-------------------------------------
	.EQU	 EPWM11_RC,	0x40001A5C
//  0x4000 1A5C   EPWM11_RC   Bits-------------------------------------
	.EQU	 EPWM11_RC_EPWMRC31,		31
	.EQU	 EPWM11_RC_EPWMRC30,		30
	.EQU	 EPWM11_RC_EPWMRC29,		29
	.EQU	 EPWM11_RC_EPWMRC28,		28
	.EQU	 EPWM11_RC_EPWMRC27,		27
	.EQU	 EPWM11_RC_EPWMRC26,		26
	.EQU	 EPWM11_RC_EPWMRC25,		25
	.EQU	 EPWM11_RC_EPWMRC24,		24
	.EQU	 EPWM11_RC_EPWMRC23,		23
	.EQU	 EPWM11_RC_EPWMRC22,		22
	.EQU	 EPWM11_RC_EPWMRC21,		21
	.EQU	 EPWM11_RC_EPWMRC20,		20
	.EQU	 EPWM11_RC_EPWMRC19,		19
	.EQU	 EPWM11_RC_EPWMRC18,		18
	.EQU	 EPWM11_RC_EPWMRC17,		17
	.EQU	 EPWM11_RC_EPWMRC16,		16
	.EQU	 EPWM11_RC_EPWMRC15,		15
	.EQU	 EPWM11_RC_EPWMRC14,		14
	.EQU	 EPWM11_RC_EPWMRC13,		13
	.EQU	 EPWM11_RC_EPWMRC12,		12
	.EQU	 EPWM11_RC_EPWMRC11,		11
	.EQU	 EPWM11_RC_EPWMRC10,		10
	.EQU	 EPWM11_RC_EPWMRC9,		9
	.EQU	 EPWM11_RC_EPWMRC8,		8
	.EQU	 EPWM11_RC_EPWMRC7,		7
	.EQU	 EPWM11_RC_EPWMRC6,		6
	.EQU	 EPWM11_RC_EPWMRC5,		5
	.EQU	 EPWM11_RC_EPWMRC4,		4
	.EQU	 EPWM11_RC_EPWMRC3,		3
	.EQU	 EPWM11_RC_EPWMRC2,		2
	.EQU	 EPWM11_RC_EPWMRC1,		1
	.EQU	 EPWM11_RC_EPWMRC0,		0
//  register-------------------------------------
	.EQU	EPWM11_RD,		0x40001A60
//  0x4000 1A60  EPWM11_RD   Bits-------------------------------------
	.EQU	EPWM11_RD_EPWMRD31,		31
	.EQU	EPWM11_RD_EPWMRD30,		30
	.EQU	EPWM11_RD_EPWMRD29,		29
	.EQU	EPWM11_RD_EPWMRD28,		28
	.EQU	EPWM11_RD_EPWMRD27,		27
	.EQU	EPWM11_RD_EPWMRD26,		26
	.EQU	EPWM11_RD_EPWMRD25,		25
	.EQU	EPWM11_RD_EPWMRD24,		24
	.EQU	EPWM11_RD_EPWMRD23,		23
	.EQU	EPWM11_RD_EPWMRD22,		22
	.EQU	EPWM11_RD_EPWMRD21,		21
	.EQU	EPWM11_RD_EPWMRD20,		20
	.EQU	EPWM11_RD_EPWMRD19,		19
	.EQU	EPWM11_RD_EPWMRD18,		18
	.EQU	EPWM11_RD_EPWMRD17,		17
	.EQU	EPWM11_RD_EPWMRD16,		16
	.EQU	EPWM11_RD_EPWMRD15,		15
	.EQU	EPWM11_RD_EPWMRD14,		14
	.EQU	EPWM11_RD_EPWMRD13,		13
	.EQU	EPWM11_RD_EPWMRD12,		12
	.EQU	EPWM11_RD_EPWMRD11,		11
	.EQU	EPWM11_RD_EPWMRD10,		10
	.EQU	EPWM11_RD_EPWMRD9,		9
	.EQU	EPWM11_RD_EPWMRD8,		8
	.EQU	EPWM11_RD_EPWMRD7,		7
	.EQU	EPWM11_RD_EPWMRD6,		6
	.EQU	EPWM11_RD_EPWMRD5,		5
	.EQU	EPWM11_RD_EPWMRD4,		4
	.EQU	EPWM11_RD_EPWMRD3,		3
	.EQU	EPWM11_RD_EPWMRD2,		2
	.EQU	EPWM11_RD_EPWMRD1,		1
	.EQU	EPWM11_RD_EPWMRD0,		0
//  register-------------------------------------
	.EQU	EPWM11_UDCTL,	0x40001A64
//  0x4000 1A64  EPWM11_UDCTL   Bits-------------------------------------
	.EQU	EPWM11_UDCTL_GBUDEN,		27
	.EQU	EPWM11_UDCTL_HRPUDSEL1,		26
	.EQU	EPWM11_UDCTL_HRPUDSEL0,		25
	.EQU	EPWM11_UDCTL_HRPUDEN,		24
	.EQU	EPWM11_UDCTL_EBUDSEL1,		23
	.EQU	EPWM11_UDCTL_EBUDSEL0,		22
	.EQU	EPWM11_UDCTL_EBUDEN,		21
	.EQU	EPWM11_UDCTL_EAUDSEL1,		20
	.EQU	EPWM11_UDCTL_EAUDSEL0,		19
	.EQU	EPWM11_UDCTL_EAUDEN,		18
	.EQU	EPWM11_UDCTL_CMDUDSEL1,		17
	.EQU	EPWM11_UDCTL_CMDUDSEL0,		16
	.EQU	EPWM11_UDCTL_CMDUDEN,		15
	.EQU	EPWM11_UDCTL_CMCUDSEL1,		14
	.EQU	EPWM11_UDCTL_CMCUDSEL0,		13
	.EQU	EPWM11_UDCTL_CMCUDEN,		12
	.EQU	EPWM11_UDCTL_CMBUDSEL1,		11
	.EQU	EPWM11_UDCTL_CMBUDSEL0,		10
	.EQU	EPWM11_UDCTL_CMBUDEN,		9
	.EQU	EPWM11_UDCTL_CMAUDSEL1,		8
	.EQU	EPWM11_UDCTL_CMAUDSEL0,		7
	.EQU	EPWM11_UDCTL_CMAUDEN,		6
	.EQU	EPWM11_UDCTL_PRUDSEL1,		5
	.EQU	EPWM11_UDCTL_PRUDSEL0,		4
	.EQU	EPWM11_UDCTL_PRUDEN,		3
	.EQU	EPWM11_UDCTL_PPUDSEL1,		2
	.EQU	EPWM11_UDCTL_PPUDSEL0,		1
	.EQU	EPWM11_UDCTL_PPUDEN,		0
//  register-------------------------------------
	.EQU	T12_CNT,		0x40001300
//  0x4000 1300  T12_CNT   Bits-------------------------------------
	.EQU	T12_CNT_TXCNT31,		31
	.EQU	T12_CNT_TXCNT30,		30
	.EQU	T12_CNT_TXCNT29,		29
	.EQU	T12_CNT_TXCNT28,		28
	.EQU	T12_CNT_TXCNT27,		27
	.EQU	T12_CNT_TXCNT26,		26
	.EQU	T12_CNT_TXCNT25,		25
	.EQU	T12_CNT_TXCNT24,		24
	.EQU	T12_CNT_TXCNT23,		23
	.EQU	T12_CNT_TXCNT22,		22
	.EQU	T12_CNT_TXCNT21,		21
	.EQU	T12_CNT_TXCNT20,		20
	.EQU	T12_CNT_TXCNT19,		19
	.EQU	T12_CNT_TXCNT18,		18
	.EQU	T12_CNT_TXCNT17,		17
	.EQU	T12_CNT_TXCNT16,		16
	.EQU	T12_CNT_TXCNT15,		15
	.EQU	T12_CNT_TXCNT14,		14
	.EQU	T12_CNT_TXCNT13,		13
	.EQU	T12_CNT_TXCNT12,		12
	.EQU	T12_CNT_TXCNT11,		11
	.EQU	T12_CNT_TXCNT10,		10
	.EQU	T12_CNT_TXCNT9,		9
	.EQU	T12_CNT_TXCNT8,		8
	.EQU	T12_CNT_TXCNT7,		7
	.EQU	T12_CNT_TXCNT6,		6
	.EQU	T12_CNT_TXCNT5,		5
	.EQU	T12_CNT_TXCNT4,		4
	.EQU	T12_CNT_TXCNT3,		3
	.EQU	T12_CNT_TXCNT2,		2
	.EQU	T12_CNT_TXCNT1,		1
	.EQU	T12_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T12_PHS,		0x40001304
//  0x4000 1304  T12_PHS   Bits-------------------------------------
	.EQU	T12_PHS_TXPHS31,		31
	.EQU	T12_PHS_TXPHS30,		30
	.EQU	T12_PHS_TXPHS29,		29
	.EQU	T12_PHS_TXPHS28,		28
	.EQU	T12_PHS_TXPHS27,		27
	.EQU	T12_PHS_TXPHS26,		26
	.EQU	T12_PHS_TXPHS25,		25
	.EQU	T12_PHS_TXPHS24,		24
	.EQU	T12_PHS_TXPHS23,		23
	.EQU	T12_PHS_TXPHS22,		22
	.EQU	T12_PHS_TXPHS21,		21
	.EQU	T12_PHS_TXPHS20,		20
	.EQU	T12_PHS_TXPHS19,		19
	.EQU	T12_PHS_TXPHS18,		18
	.EQU	T12_PHS_TXPHS17,		17
	.EQU	T12_PHS_TXPHS16,		16
	.EQU	T12_PHS_TXPHS15,		15
	.EQU	T12_PHS_TXPHS14,		14
	.EQU	T12_PHS_TXPHS13,		13
	.EQU	T12_PHS_TXPHS12,		12
	.EQU	T12_PHS_TXPHS11,		11
	.EQU	T12_PHS_TXPHS10,		10
	.EQU	T12_PHS_TXPHS9,		9
	.EQU	T12_PHS_TXPHS8,		8
	.EQU	T12_PHS_TXPHS7,		7
	.EQU	T12_PHS_TXPHS6,		6
	.EQU	T12_PHS_TXPHS5,		5
	.EQU	T12_PHS_TXPHS4,		4
	.EQU	T12_PHS_TXPHS3,		3
	.EQU	T12_PHS_TXPHS2,		2
	.EQU	T12_PHS_TXPHS1,		1
	.EQU	T12_PHS_TXPHS0,		0
//  register-------------------------------------
	.EQU	T12_PPX,		0x40001308
//  0x4000 1308  T12_PPX   Bits-------------------------------------
	.EQU	T12_PPX_PPX31,		31
	.EQU	T12_PPX_PPX30,		30
	.EQU	T12_PPX_PPX29,		29
	.EQU	T12_PPX_PPX28,		28
	.EQU	T12_PPX_PPX27,		27
	.EQU	T12_PPX_PPX26,		26
	.EQU	T12_PPX_PPX25,		25
	.EQU	T12_PPX_PPX24,		24
	.EQU	T12_PPX_PPX23,		23
	.EQU	T12_PPX_PPX22,		22
	.EQU	T12_PPX_PPX21,		21
	.EQU	T12_PPX_PPX20,		20
	.EQU	T12_PPX_PPX19,		19
	.EQU	T12_PPX_PPX18,		18
	.EQU	T12_PPX_PPX17,		17
	.EQU	T12_PPX_PPX16,		16
	.EQU	T12_PPX_PPX15,		15
	.EQU	T12_PPX_PPX14,		14
	.EQU	T12_PPX_PPX13,		13
	.EQU	T12_PPX_PPX12,		12
	.EQU	T12_PPX_PPX11,		11
	.EQU	T12_PPX_PPX10,		10
	.EQU	T12_PPX_PPX9,		9
	.EQU	T12_PPX_PPX8,		8
	.EQU	T12_PPX_PPX7,		7
	.EQU	T12_PPX_PPX6,		6
	.EQU	T12_PPX_PPX5,		5
	.EQU	T12_PPX_PPX4,		4
	.EQU	T12_PPX_PPX3,		3
	.EQU	T12_PPX_PPX2,		2
	.EQU	T12_PPX_PPX1,		1
	.EQU	T12_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T12_PRSC,		0x4000130C
//  0x4000 130C  T12_PRSC   Bits-------------------------------------
	.EQU	T12_PRSC_TXPRSC31,		31
	.EQU	T12_PRSC_TXPRSC30,		30
	.EQU	T12_PRSC_TXPRSC29,		29
	.EQU	T12_PRSC_TXPRSC28,		28
	.EQU	T12_PRSC_TXPRSC27,		27
	.EQU	T12_PRSC_TXPRSC26,		26
	.EQU	T12_PRSC_TXPRSC25,		25
	.EQU	T12_PRSC_TXPRSC24,		24
	.EQU	T12_PRSC_TXPRSC23,		23
	.EQU	T12_PRSC_TXPRSC22,		22
	.EQU	T12_PRSC_TXPRSC21,		21
	.EQU	T12_PRSC_TXPRSC20,		20
	.EQU	T12_PRSC_TXPRSC19,		19
	.EQU	T12_PRSC_TXPRSC18,		18
	.EQU	T12_PRSC_TXPRSC17,		17
	.EQU	T12_PRSC_TXPRSC16,		16
	.EQU	T12_PRSC_TXPRSC15,		15
	.EQU	T12_PRSC_TXPRSC14,		14
	.EQU	T12_PRSC_TXPRSC13,		13
	.EQU	T12_PRSC_TXPRSC12,		12
	.EQU	T12_PRSC_TXPRSC11,		11
	.EQU	T12_PRSC_TXPRSC10,		10
	.EQU	T12_PRSC_TXPRSC9,		9
	.EQU	T12_PRSC_TXPRSC8,		8
	.EQU	T12_PRSC_TXPRSC7,		7
	.EQU	T12_PRSC_TXPRSC6,		6
	.EQU	T12_PRSC_TXPRSC5,		5
	.EQU	T12_PRSC_TXPRSC4,		4
	.EQU	T12_PRSC_TXPRSC3,		3
	.EQU	T12_PRSC_TXPRSC2,		2
	.EQU	T12_PRSC_TXPRSC1,		1
	.EQU	T12_PRSC_TXPRSC0,		0
//  register-------------------------------------
	.EQU	T12_CTL,		0x40001310
//  0x4000 1310  T12_CTL   Bits-------------------------------------
	.EQU	T12_CTL_BLINKEN,		31
	.EQU	T12_CTL_LINKEN,		30
	.EQU	T12_CTL_UDSYNEN,		29
	.EQU	T12_CTL_HRLOCK,		28
	.EQU	T12_CTL_ETLOCK,		27
	.EQU	T12_CTL_PCLOCK,		26
	.EQU	T12_CTL_DBLOCK,		25
	.EQU	T12_CTL_AQLOCKB,		24
	.EQU	T12_CTL_AQLOCKA,		23
	.EQU	T12_CTL_CAPEN,		22
	.EQU	T12_CTL_CAPSEL,		21
	.EQU	T12_CTL_TXMAX,		19
	.EQU	T12_CTL_PHSDIR,		18
	.EQU	T12_CTL_SWFSYNC,		17
	.EQU	T12_CTL_SYNCOSEL1,		16
	.EQU	T12_CTL_SYNCOSEL0,		15
	.EQU	T12_CTL_PHSEN,		14
	.EQU	T12_CTL_SYNCI,		13
	.EQU	T12_CTL_TXUR,		12
	.EQU	T12_CTL_TXUDEVT,		11
	.EQU	T12_CTL_TXUDEN,		10
	.EQU	T12_CTL_TXCMS2,		9
	.EQU	T12_CTL_TXCMS1,		8
	.EQU	T12_CTL_TXCMS0,		7
	.EQU	T12_CTL_TXDIR,		6
	.EQU	T12_CTL_TXCLK1,		5
	.EQU	T12_CTL_TXCLK0,		4
	.EQU	T12_CTL_TXSY,		3
	.EQU	T12_CTL_TXGATE,		2
	.EQU	T12_CTL_TXCS,		1
	.EQU	T12_CTL_TXEN,		0
//  register-------------------------------------
	.EQU	EPWM12_RA,		0x40001314
//  0x4000 1314  EPWM12_RA   Bits-------------------------------------
	.EQU	EPWM12_RA_EPWMRA31,		31
	.EQU	EPWM12_RA_EPWMRA30,		30
	.EQU	EPWM12_RA_EPWMRA29,		29
	.EQU	EPWM12_RA_EPWMRA28,		28
	.EQU	EPWM12_RA_EPWMRA27,		27
	.EQU	EPWM12_RA_EPWMRA26,		26
	.EQU	EPWM12_RA_EPWMRA25,		25
	.EQU	EPWM12_RA_EPWMRA24,		24
	.EQU	EPWM12_RA_EPWMRA23,		23
	.EQU	EPWM12_RA_EPWMRA22,		22
	.EQU	EPWM12_RA_EPWMRA21,		21
	.EQU	EPWM12_RA_EPWMRA20,		20
	.EQU	EPWM12_RA_EPWMRA19,		19
	.EQU	EPWM12_RA_EPWMRA18,		18
	.EQU	EPWM12_RA_EPWMRA17,		17
	.EQU	EPWM12_RA_EPWMRA16,		16
	.EQU	EPWM12_RA_EPWMRA15,		15
	.EQU	EPWM12_RA_EPWMRA14,		14
	.EQU	EPWM12_RA_EPWMRA13,		13
	.EQU	EPWM12_RA_EPWMRA12,		12
	.EQU	EPWM12_RA_EPWMRA11,		11
	.EQU	EPWM12_RA_EPWMRA10,		10
	.EQU	EPWM12_RA_EPWMRA9,		9
	.EQU	EPWM12_RA_EPWMRA8,		8
	.EQU	EPWM12_RA_EPWMRA7,		7
	.EQU	EPWM12_RA_EPWMRA6,		6
	.EQU	EPWM12_RA_EPWMRA5,		5
	.EQU	EPWM12_RA_EPWMRA4,		4
	.EQU	EPWM12_RA_EPWMRA3,		3
	.EQU	EPWM12_RA_EPWMRA2,		2
	.EQU	EPWM12_RA_EPWMRA1,		1
	.EQU	EPWM12_RA_EPWMRA0,		0
//  register-------------------------------------
	.EQU	EPWM12_RB,		0x40001318
//  0x4000 1318  EPWM12_RB   Bits-------------------------------------
	.EQU	EPWM12_RB_EPWMRB31,		31
	.EQU	EPWM12_RB_EPWMRB30,		30
	.EQU	EPWM12_RB_EPWMRB29,		29
	.EQU	EPWM12_RB_EPWMRB28,		28
	.EQU	EPWM12_RB_EPWMRB27,		27
	.EQU	EPWM12_RB_EPWMRB26,		26
	.EQU	EPWM12_RB_EPWMRB25,		25
	.EQU	EPWM12_RB_EPWMRB24,		24
	.EQU	EPWM12_RB_EPWMRB23,		23
	.EQU	EPWM12_RB_EPWMRB22,		22
	.EQU	EPWM12_RB_EPWMRB21,		21
	.EQU	EPWM12_RB_EPWMRB20,		20
	.EQU	EPWM12_RB_EPWMRB19,		19
	.EQU	EPWM12_RB_EPWMRB18,		18
	.EQU	EPWM12_RB_EPWMRB17,		17
	.EQU	EPWM12_RB_EPWMRB16,		16
	.EQU	EPWM12_RB_EPWMRB15,		15
	.EQU	EPWM12_RB_EPWMRB14,		14
	.EQU	EPWM12_RB_EPWMRB13,		13
	.EQU	EPWM12_RB_EPWMRB12,		12
	.EQU	EPWM12_RB_EPWMRB11,		11
	.EQU	EPWM12_RB_EPWMRB10,		10
	.EQU	EPWM12_RB_EPWMRB9,		9
	.EQU	EPWM12_RB_EPWMRB8,		8
	.EQU	EPWM12_RB_EPWMRB7,		7
	.EQU	EPWM12_RB_EPWMRB6,		6
	.EQU	EPWM12_RB_EPWMRB5,		5
	.EQU	EPWM12_RB_EPWMRB4,		4
	.EQU	EPWM12_RB_EPWMRB3,		3
	.EQU	EPWM12_RB_EPWMRB2,		2
	.EQU	EPWM12_RB_EPWMRB1,		1
	.EQU	EPWM12_RB_EPWMRB0,		0
//  register-------------------------------------
	.EQU	EPWM12_CTLA,	0x4000131C
//  0x4000 131C  EPWM12_CTLA   Bits-------------------------------------
	.EQU	EPWM12_CTLA_OTSFA,		16
	.EQU	EPWM12_CTLA_ACTSFA1,		15
	.EQU	EPWM12_CTLA_ACTSFA0,		14
	.EQU	EPWM12_CTLA_CSFA1,		13
	.EQU	EPWM12_CTLA_CSFA0,		12
	.EQU	EPWM12_CTLA_ACBD1,		11
	.EQU	EPWM12_CTLA_ACBD0,		10
	.EQU	EPWM12_CTLA_ACBU1,		9
	.EQU	EPWM12_CTLA_ACBU0,		8
	.EQU	EPWM12_CTLA_ACAD1,		7
	.EQU	EPWM12_CTLA_ACAD0,		6
	.EQU	EPWM12_CTLA_ACAU1,		5
	.EQU	EPWM12_CTLA_ACAU0,		4
	.EQU	EPWM12_CTLA_APRD1,		3
	.EQU	EPWM12_CTLA_APRD0,		2
	.EQU	EPWM12_CTLA_AZRO1,		1
	.EQU	EPWM12_CTLA_AZRO0,		0
//  register-------------------------------------
	.EQU	EPWM12_CTLB,	0x40001320
//  0x4000 1320  EPWM12_CTLB   Bits-------------------------------------
	.EQU	EPWM12_CTLB_OTSFB,		16
	.EQU	EPWM12_CTLB_ACTSFB1,		15
	.EQU	EPWM12_CTLB_ACTSFB0,		14
	.EQU	EPWM12_CTLB_CSFB1,		13
	.EQU	EPWM12_CTLB_CSFB0,		12
	.EQU	EPWM12_CTLB_BCBD1,		11
	.EQU	EPWM12_CTLB_BCBD0,		10
	.EQU	EPWM12_CTLB_BCBU1,		9
	.EQU	EPWM12_CTLB_BCBU0,		8
	.EQU	EPWM12_CTLB_BCAD1,		7
	.EQU	EPWM12_CTLB_BCAD0,		6
	.EQU	EPWM12_CTLB_BCAU1,		5
	.EQU	EPWM12_CTLB_BCAU0,		4
	.EQU	EPWM12_CTLB_BPRD1,		3
	.EQU	EPWM12_CTLB_BPRD0,		2
	.EQU	EPWM12_CTLB_BZRO1,		1
	.EQU	EPWM12_CTLB_BZRO0,		0
//  register-------------------------------------
	.EQU	EPWM12_DBCTL,	0x40001324
//  0x4000 1324  EPWM12_DBCTL   Bits-------------------------------------
	.EQU	EPWM12_DBCTL_INMODE1,		5
	.EQU	EPWM12_DBCTL_INMODE0,		4
	.EQU	EPWM12_DBCTL_POLSEL1,		3
	.EQU	EPWM12_DBCTL_POLSEL0,		2
	.EQU	EPWM12_DBCTL_OUTMODE1,		1
	.EQU	EPWM12_DBCTL_OUTMODE0,		0
//  register-------------------------------------
	.EQU	EPWM12_DBT,	0x40001328
//  0x4000 1328  EPWM12_DBT   Bits-------------------------------------
	.EQU	EPWM12_DBT_RDBT15,		31
	.EQU	EPWM12_DBT_RDBT14,		30
	.EQU	EPWM12_DBT_RDBT13,		29
	.EQU	EPWM12_DBT_RDBT12,		28
	.EQU	EPWM12_DBT_RDBT11,		27
	.EQU	EPWM12_DBT_RDBT10,		26
	.EQU	EPWM12_DBT_RDBT9,		25
	.EQU	EPWM12_DBT_RDBT8,		24
	.EQU	EPWM12_DBT_RDBT7,		23
	.EQU	EPWM12_DBT_RDBT6,		22
	.EQU	EPWM12_DBT_RDBT5,		21
	.EQU	EPWM12_DBT_RDBT4,		20
	.EQU	EPWM12_DBT_RDBT3,		19
	.EQU	EPWM12_DBT_RDBT2,		18
	.EQU	EPWM12_DBT_RDBT1,		17
	.EQU	EPWM12_DBT_RDBT0,		16
	.EQU	EPWM12_DBT_FDBT15,		15
	.EQU	EPWM12_DBT_FDBT14,		14
	.EQU	EPWM12_DBT_FDBT13,		13
	.EQU	EPWM12_DBT_FDBT12,		12
	.EQU	EPWM12_DBT_FDBT11,		11
	.EQU	EPWM12_DBT_FDBT10,		10
	.EQU	EPWM12_DBT_FDBT9,		9
	.EQU	EPWM12_DBT_FDBT8,		8
	.EQU	EPWM12_DBT_FDBT7,		7
	.EQU	EPWM12_DBT_FDBT6,		6
	.EQU	EPWM12_DBT_FDBT5,		5
	.EQU	EPWM12_DBT_FDBT4,		4
	.EQU	EPWM12_DBT_FDBT3,		3
	.EQU	EPWM12_DBT_FDBT2,		2
	.EQU	EPWM12_DBT_FDBT1,		1
	.EQU	EPWM12_DBT_FDBT0,		0
//  register-------------------------------------
	.EQU	EPWM12_PCCTL,	0x4000132C
//  0x4000 132C  EPWM12_PCCTL   Bits-------------------------------------
	.EQU	EPWM12_PCCTL_CHPFREQ2,		10
	.EQU	EPWM12_PCCTL_CHPFREQ1,		9
	.EQU	EPWM12_PCCTL_CHPFREQ0,		8
	.EQU	EPWM12_PCCTL_CHPDUTY2,		7
	.EQU	EPWM12_PCCTL_CHPDUTY1,		6
	.EQU	EPWM12_PCCTL_CHPDUTY0,		5
	.EQU	EPWM12_PCCTL_OSHTWTH3,		4
	.EQU	EPWM12_PCCTL_OSHTWTH2,		3
	.EQU	EPWM12_PCCTL_OSHTWTH1,		2
	.EQU	EPWM12_PCCTL_OSHTWTH0,		1
	.EQU	EPWM12_PCCTL_CHPEN,		0
//  register-------------------------------------
	.EQU	EPWM12_PXASCTL,	0x40001330
//  0x4000 1330  EPWM12_PXASCTL   Bits-------------------------------------
	.EQU	EPWM12_PXASCTL_PXRSEN,		8
	.EQU	EPWM12_PXASCTL_PXSSA1,		7
	.EQU	EPWM12_PXASCTL_PXSSA0,		6
	.EQU	EPWM12_PXASCTL_PXSSB1,		5
	.EQU	EPWM12_PXASCTL_PXSSB0,		4
	.EQU	EPWM12_PXASCTL_PXASE,		3
	.EQU	EPWM12_PXASCTL_PXASS2,		2
	.EQU	EPWM12_PXASCTL_PXASS1,		1
	.EQU	EPWM12_PXASCTL_PXASS0,		0
//  register-------------------------------------
	.EQU	EPWM12_ETCTL,	0x40001334
//  0x4000 1334  EPWM12_ETCTL   Bits-------------------------------------
	.EQU	EPWM12_ETCTL_BTSEL1,		25
	.EQU	EPWM12_ETCTL_BTSEL0,		24
	.EQU	EPWM12_ETCTL_BT1,		23
	.EQU	EPWM12_ETCTL_BT0,		22
	.EQU	EPWM12_ETCTL_BPP1,		21
	.EQU	EPWM12_ETCTL_BPP0,		20
	.EQU	EPWM12_ETCTL_FRCB,		19
	.EQU	EPWM12_ETCTL_SELB1,		18
	.EQU	EPWM12_ETCTL_SELB0,		17
	.EQU	EPWM12_ETCTL_TOADENB,		16
	.EQU	EPWM12_ETCTL_ATSEL1,		9
	.EQU	EPWM12_ETCTL_ATSEL0,		8
	.EQU	EPWM12_ETCTL_AT1,		7
	.EQU	EPWM12_ETCTL_AT0,		6
	.EQU	EPWM12_ETCTL_APP1,		5
	.EQU	EPWM12_ETCTL_APP0,		4
	.EQU	EPWM12_ETCTL_FRCA,		3
	.EQU	EPWM12_ETCTL_SELA1,		2
	.EQU	EPWM12_ETCTL_SELA0,		1
	.EQU	EPWM12_ETCTL_TOADENA,		0
//  register-------------------------------------
	.EQU	EPWM12_IE,		0x40001338
//  0x4000 1338  EPWM12_IE   Bits-------------------------------------
	.EQU	EPWM12_IE_TXDIE,		8
	.EQU	EPWM12_IE_TXCIE,		7
	.EQU	EPWM12_IE_TXAIE,		6
	.EQU	EPWM12_IE_TXBIE,		5
	.EQU	EPWM12_IE_TXIE,		4
	.EQU	EPWM12_IE_TXUIE,		3
	.EQU	EPWM12_IE_TXGIE,		2
	.EQU	EPWM12_IE_TXTIE1,		1
	.EQU	EPWM12_IE_TXTIE0,		0
//  register-------------------------------------
	.EQU	EPWM12_IF,		0x4000133C
//  0x4000 133C  EPWM12_IF   Bits-------------------------------------
	.EQU	EPWM12_IF_TXDIF,		8
	.EQU	EPWM12_IF_TXCIF,		7
	.EQU	EPWM12_IF_TXAIF,		6
	.EQU	EPWM12_IF_TXBIF,		5
	.EQU	EPWM12_IF_TXIF,		4
	.EQU	EPWM12_IF_TXUIF,		3
	.EQU	EPWM12_IF_TXGIF,		2
	.EQU	EPWM12_IF_TXTIF1,		1
	.EQU	EPWM12_IF_TXTIF0,		0
//  register-------------------------------------
	.EQU	EPWM12_IC,		0x40001340
//  0x4000 1340  EPWM12_IC   Bits-------------------------------------
	.EQU	EPWM12_IC_TXDIC,		8
	.EQU	EPWM12_IC_TXCIC,		7
	.EQU	EPWM12_IC_TXAIC,		6
	.EQU	EPWM12_IC_TXBIC,		5
	.EQU	EPWM12_IC_TXIC,		4
	.EQU	EPWM12_IC_TXUIC,		3
	.EQU	EPWM12_IC_TXGIC,		2
	.EQU	EPWM12_IC_TXTIC1,		1
	.EQU	EPWM12_IC_TXTIC0,		0
//  register-------------------------------------
	.EQU	EPWM12_DE,		0x40001344
//  0x4000 1344  EPWM12_DE   Bits-------------------------------------
	.EQU	EPWM12_DE_TXDDE,		8
	.EQU	EPWM12_DE_TXCDE,		7
	.EQU	EPWM12_DE_TXADE,		6
	.EQU	EPWM12_DE_TXBDE,		5
	.EQU	EPWM12_DE_TXDE,		4
	.EQU	EPWM12_DE_TXUDE,		3
	.EQU	EPWM12_DE_TXGDE,		2
	.EQU	EPWM12_DE_TXTDE1,		1
	.EQU	EPWM12_DE_TXTDE0,		0
//  register-------------------------------------
	.EQU	EPWM12_DF,		0x40001348
//  0x4000 1348  EPWM12_DF   Bits-------------------------------------
	.EQU	EPWM12_DF_TXDDF,		8
	.EQU	EPWM12_DF_TXCDF,		7
	.EQU	EPWM12_DF_TXADF,		6
	.EQU	EPWM12_DF_TXBDF,		5
	.EQU	EPWM12_DF_TXDF,		4
	.EQU	EPWM12_DF_TXUDF,		3
	.EQU	EPWM12_DF_TXGDF,		2
	.EQU	EPWM12_DF_TXTDF1,		1
	.EQU	EPWM12_DF_TXTDF0,		0
//  register-------------------------------------
	.EQU	EPWM12_HRPWMCTL,	0x40001350
//  0x4000 1350  EPWM12_HRPWMCTL   Bits-------------------------------------
	.EQU	EPWM12_HRPWMCTL_HRPOUTB,		1
	.EQU	EPWM12_HRPWMCTL_HRPEN,		0
//  register-------------------------------------
	.EQU	EPWM12_HRCMP,	0x40001354
//  0x4000 1354  EPWM12_HRCMP   Bits-------------------------------------
	.EQU	EPWM12_HRCMP_HRCMP7,		7
	.EQU	EPWM12_HRCMP_HRCMP6,		6
	.EQU	EPWM12_HRCMP_HRCMP5,		5
	.EQU	EPWM12_HRCMP_HRCMP4,		4
	.EQU	EPWM12_HRCMP_HRCMP3,		3
	.EQU	EPWM12_HRCMP_HRCMP2,		2
	.EQU	EPWM12_HRCMP_HRCMP1,		1
	.EQU	EPWM12_HRCMP_HRCMP0,		0
//  register-------------------------------------
	.EQU	EPWM12_CAP,	0x40001358
//  0x4000 1358  EPWM12_CAP   Bits-------------------------------------
	.EQU	EPWM12_CAP_CAP31,		31
	.EQU	EPWM12_CAP_CAP30,		30
	.EQU	EPWM12_CAP_CAP29,		29
	.EQU	EPWM12_CAP_CAP28,		28
	.EQU	EPWM12_CAP_CAP27,		27
	.EQU	EPWM12_CAP_CAP26,		26
	.EQU	EPWM12_CAP_CAP25,		25
	.EQU	EPWM12_CAP_CAP24,		24
	.EQU	EPWM12_CAP_CAP23,		23
	.EQU	EPWM12_CAP_CAP22,		22
	.EQU	EPWM12_CAP_CAP21,		21
	.EQU	EPWM12_CAP_CAP20,		20
	.EQU	EPWM12_CAP_CAP19,		19
	.EQU	EPWM12_CAP_CAP18,		18
	.EQU	EPWM12_CAP_CAP17,		17
	.EQU	EPWM12_CAP_CAP16,		16
	.EQU	EPWM12_CAP_CAP15,		15
	.EQU	EPWM12_CAP_CAP14,		14
	.EQU	EPWM12_CAP_CAP13,		13
	.EQU	EPWM12_CAP_CAP12,		12
	.EQU	EPWM12_CAP_CAP11,		11
	.EQU	EPWM12_CAP_CAP10,		10
	.EQU	EPWM12_CAP_CAP9,		9
	.EQU	EPWM12_CAP_CAP8,		8
	.EQU	EPWM12_CAP_CAP7,		7
	.EQU	EPWM12_CAP_CAP6,		6
	.EQU	EPWM12_CAP_CAP5,		5
	.EQU	EPWM12_CAP_CAP4,		4
	.EQU	EPWM12_CAP_CAP3,		3
	.EQU	EPWM12_CAP_CAP2,		2
	.EQU	EPWM12_CAP_CAP1,		1
	.EQU	EPWM12_CAP_CAP0,		0
//  register-------------------------------------
	.EQU	 EPWM12_RC,	0x4000135C
//  0x4000 135C   EPWM12_RC   Bits-------------------------------------
	.EQU	 EPWM12_RC_EPWMRC31,		31
	.EQU	 EPWM12_RC_EPWMRC30,		30
	.EQU	 EPWM12_RC_EPWMRC29,		29
	.EQU	 EPWM12_RC_EPWMRC28,		28
	.EQU	 EPWM12_RC_EPWMRC27,		27
	.EQU	 EPWM12_RC_EPWMRC26,		26
	.EQU	 EPWM12_RC_EPWMRC25,		25
	.EQU	 EPWM12_RC_EPWMRC24,		24
	.EQU	 EPWM12_RC_EPWMRC23,		23
	.EQU	 EPWM12_RC_EPWMRC22,		22
	.EQU	 EPWM12_RC_EPWMRC21,		21
	.EQU	 EPWM12_RC_EPWMRC20,		20
	.EQU	 EPWM12_RC_EPWMRC19,		19
	.EQU	 EPWM12_RC_EPWMRC18,		18
	.EQU	 EPWM12_RC_EPWMRC17,		17
	.EQU	 EPWM12_RC_EPWMRC16,		16
	.EQU	 EPWM12_RC_EPWMRC15,		15
	.EQU	 EPWM12_RC_EPWMRC14,		14
	.EQU	 EPWM12_RC_EPWMRC13,		13
	.EQU	 EPWM12_RC_EPWMRC12,		12
	.EQU	 EPWM12_RC_EPWMRC11,		11
	.EQU	 EPWM12_RC_EPWMRC10,		10
	.EQU	 EPWM12_RC_EPWMRC9,		9
	.EQU	 EPWM12_RC_EPWMRC8,		8
	.EQU	 EPWM12_RC_EPWMRC7,		7
	.EQU	 EPWM12_RC_EPWMRC6,		6
	.EQU	 EPWM12_RC_EPWMRC5,		5
	.EQU	 EPWM12_RC_EPWMRC4,		4
	.EQU	 EPWM12_RC_EPWMRC3,		3
	.EQU	 EPWM12_RC_EPWMRC2,		2
	.EQU	 EPWM12_RC_EPWMRC1,		1
	.EQU	 EPWM12_RC_EPWMRC0,		0
//  register-------------------------------------
	.EQU	EPWM12_RD,		0x40001360
//  0x4000 1360  EPWM12_RD   Bits-------------------------------------
	.EQU	EPWM12_RD_EPWMRD31,		31
	.EQU	EPWM12_RD_EPWMRD30,		30
	.EQU	EPWM12_RD_EPWMRD29,		29
	.EQU	EPWM12_RD_EPWMRD28,		28
	.EQU	EPWM12_RD_EPWMRD27,		27
	.EQU	EPWM12_RD_EPWMRD26,		26
	.EQU	EPWM12_RD_EPWMRD25,		25
	.EQU	EPWM12_RD_EPWMRD24,		24
	.EQU	EPWM12_RD_EPWMRD23,		23
	.EQU	EPWM12_RD_EPWMRD22,		22
	.EQU	EPWM12_RD_EPWMRD21,		21
	.EQU	EPWM12_RD_EPWMRD20,		20
	.EQU	EPWM12_RD_EPWMRD19,		19
	.EQU	EPWM12_RD_EPWMRD18,		18
	.EQU	EPWM12_RD_EPWMRD17,		17
	.EQU	EPWM12_RD_EPWMRD16,		16
	.EQU	EPWM12_RD_EPWMRD15,		15
	.EQU	EPWM12_RD_EPWMRD14,		14
	.EQU	EPWM12_RD_EPWMRD13,		13
	.EQU	EPWM12_RD_EPWMRD12,		12
	.EQU	EPWM12_RD_EPWMRD11,		11
	.EQU	EPWM12_RD_EPWMRD10,		10
	.EQU	EPWM12_RD_EPWMRD9,		9
	.EQU	EPWM12_RD_EPWMRD8,		8
	.EQU	EPWM12_RD_EPWMRD7,		7
	.EQU	EPWM12_RD_EPWMRD6,		6
	.EQU	EPWM12_RD_EPWMRD5,		5
	.EQU	EPWM12_RD_EPWMRD4,		4
	.EQU	EPWM12_RD_EPWMRD3,		3
	.EQU	EPWM12_RD_EPWMRD2,		2
	.EQU	EPWM12_RD_EPWMRD1,		1
	.EQU	EPWM12_RD_EPWMRD0,		0
//  register-------------------------------------
	.EQU	EPWM12_UDCTL,	0x40001364
//  0x4000 1364  EPWM12_UDCTL   Bits-------------------------------------
	.EQU	EPWM12_UDCTL_GBUDEN,		27
	.EQU	EPWM12_UDCTL_HRPUDSEL1,		26
	.EQU	EPWM12_UDCTL_HRPUDSEL0,		25
	.EQU	EPWM12_UDCTL_HRPUDEN,		24
	.EQU	EPWM12_UDCTL_EBUDSEL1,		23
	.EQU	EPWM12_UDCTL_EBUDSEL0,		22
	.EQU	EPWM12_UDCTL_EBUDEN,		21
	.EQU	EPWM12_UDCTL_EAUDSEL1,		20
	.EQU	EPWM12_UDCTL_EAUDSEL0,		19
	.EQU	EPWM12_UDCTL_EAUDEN,		18
	.EQU	EPWM12_UDCTL_CMDUDSEL1,		17
	.EQU	EPWM12_UDCTL_CMDUDSEL0,		16
	.EQU	EPWM12_UDCTL_CMDUDEN,		15
	.EQU	EPWM12_UDCTL_CMCUDSEL1,		14
	.EQU	EPWM12_UDCTL_CMCUDSEL0,		13
	.EQU	EPWM12_UDCTL_CMCUDEN,		12
	.EQU	EPWM12_UDCTL_CMBUDSEL1,		11
	.EQU	EPWM12_UDCTL_CMBUDSEL0,		10
	.EQU	EPWM12_UDCTL_CMBUDEN,		9
	.EQU	EPWM12_UDCTL_CMAUDSEL1,		8
	.EQU	EPWM12_UDCTL_CMAUDSEL0,		7
	.EQU	EPWM12_UDCTL_CMAUDEN,		6
	.EQU	EPWM12_UDCTL_PRUDSEL1,		5
	.EQU	EPWM12_UDCTL_PRUDSEL0,		4
	.EQU	EPWM12_UDCTL_PRUDEN,		3
	.EQU	EPWM12_UDCTL_PPUDSEL1,		2
	.EQU	EPWM12_UDCTL_PPUDSEL0,		1
	.EQU	EPWM12_UDCTL_PPUDEN,		0
//  register-------------------------------------
	.EQU	T13_CNT,		0x40001380
//  0x4000 1380  T13_CNT   Bits-------------------------------------
	.EQU	T13_CNT_TXCNT31,		31
	.EQU	T13_CNT_TXCNT30,		30
	.EQU	T13_CNT_TXCNT29,		29
	.EQU	T13_CNT_TXCNT28,		28
	.EQU	T13_CNT_TXCNT27,		27
	.EQU	T13_CNT_TXCNT26,		26
	.EQU	T13_CNT_TXCNT25,		25
	.EQU	T13_CNT_TXCNT24,		24
	.EQU	T13_CNT_TXCNT23,		23
	.EQU	T13_CNT_TXCNT22,		22
	.EQU	T13_CNT_TXCNT21,		21
	.EQU	T13_CNT_TXCNT20,		20
	.EQU	T13_CNT_TXCNT19,		19
	.EQU	T13_CNT_TXCNT18,		18
	.EQU	T13_CNT_TXCNT17,		17
	.EQU	T13_CNT_TXCNT16,		16
	.EQU	T13_CNT_TXCNT15,		15
	.EQU	T13_CNT_TXCNT14,		14
	.EQU	T13_CNT_TXCNT13,		13
	.EQU	T13_CNT_TXCNT12,		12
	.EQU	T13_CNT_TXCNT11,		11
	.EQU	T13_CNT_TXCNT10,		10
	.EQU	T13_CNT_TXCNT9,		9
	.EQU	T13_CNT_TXCNT8,		8
	.EQU	T13_CNT_TXCNT7,		7
	.EQU	T13_CNT_TXCNT6,		6
	.EQU	T13_CNT_TXCNT5,		5
	.EQU	T13_CNT_TXCNT4,		4
	.EQU	T13_CNT_TXCNT3,		3
	.EQU	T13_CNT_TXCNT2,		2
	.EQU	T13_CNT_TXCNT1,		1
	.EQU	T13_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T13_PHS,		0x40001384
//  0x4000 1384  T13_PHS   Bits-------------------------------------
	.EQU	T13_PHS_TXPHS31,		31
	.EQU	T13_PHS_TXPHS30,		30
	.EQU	T13_PHS_TXPHS29,		29
	.EQU	T13_PHS_TXPHS28,		28
	.EQU	T13_PHS_TXPHS27,		27
	.EQU	T13_PHS_TXPHS26,		26
	.EQU	T13_PHS_TXPHS25,		25
	.EQU	T13_PHS_TXPHS24,		24
	.EQU	T13_PHS_TXPHS23,		23
	.EQU	T13_PHS_TXPHS22,		22
	.EQU	T13_PHS_TXPHS21,		21
	.EQU	T13_PHS_TXPHS20,		20
	.EQU	T13_PHS_TXPHS19,		19
	.EQU	T13_PHS_TXPHS18,		18
	.EQU	T13_PHS_TXPHS17,		17
	.EQU	T13_PHS_TXPHS16,		16
	.EQU	T13_PHS_TXPHS15,		15
	.EQU	T13_PHS_TXPHS14,		14
	.EQU	T13_PHS_TXPHS13,		13
	.EQU	T13_PHS_TXPHS12,		12
	.EQU	T13_PHS_TXPHS11,		11
	.EQU	T13_PHS_TXPHS10,		10
	.EQU	T13_PHS_TXPHS9,		9
	.EQU	T13_PHS_TXPHS8,		8
	.EQU	T13_PHS_TXPHS7,		7
	.EQU	T13_PHS_TXPHS6,		6
	.EQU	T13_PHS_TXPHS5,		5
	.EQU	T13_PHS_TXPHS4,		4
	.EQU	T13_PHS_TXPHS3,		3
	.EQU	T13_PHS_TXPHS2,		2
	.EQU	T13_PHS_TXPHS1,		1
	.EQU	T13_PHS_TXPHS0,		0
//  register-------------------------------------
	.EQU	T13_PPX,		0x40001388
//  0x4000 1388  T13_PPX   Bits-------------------------------------
	.EQU	T13_PPX_PPX31,		31
	.EQU	T13_PPX_PPX30,		30
	.EQU	T13_PPX_PPX29,		29
	.EQU	T13_PPX_PPX28,		28
	.EQU	T13_PPX_PPX27,		27
	.EQU	T13_PPX_PPX26,		26
	.EQU	T13_PPX_PPX25,		25
	.EQU	T13_PPX_PPX24,		24
	.EQU	T13_PPX_PPX23,		23
	.EQU	T13_PPX_PPX22,		22
	.EQU	T13_PPX_PPX21,		21
	.EQU	T13_PPX_PPX20,		20
	.EQU	T13_PPX_PPX19,		19
	.EQU	T13_PPX_PPX18,		18
	.EQU	T13_PPX_PPX17,		17
	.EQU	T13_PPX_PPX16,		16
	.EQU	T13_PPX_PPX15,		15
	.EQU	T13_PPX_PPX14,		14
	.EQU	T13_PPX_PPX13,		13
	.EQU	T13_PPX_PPX12,		12
	.EQU	T13_PPX_PPX11,		11
	.EQU	T13_PPX_PPX10,		10
	.EQU	T13_PPX_PPX9,		9
	.EQU	T13_PPX_PPX8,		8
	.EQU	T13_PPX_PPX7,		7
	.EQU	T13_PPX_PPX6,		6
	.EQU	T13_PPX_PPX5,		5
	.EQU	T13_PPX_PPX4,		4
	.EQU	T13_PPX_PPX3,		3
	.EQU	T13_PPX_PPX2,		2
	.EQU	T13_PPX_PPX1,		1
	.EQU	T13_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T13_PRSC,		0x4000138C
//  0x4000 138C  T13_PRSC   Bits-------------------------------------
	.EQU	T13_PRSC_TXPRSC31,		31
	.EQU	T13_PRSC_TXPRSC30,		30
	.EQU	T13_PRSC_TXPRSC29,		29
	.EQU	T13_PRSC_TXPRSC28,		28
	.EQU	T13_PRSC_TXPRSC27,		27
	.EQU	T13_PRSC_TXPRSC26,		26
	.EQU	T13_PRSC_TXPRSC25,		25
	.EQU	T13_PRSC_TXPRSC24,		24
	.EQU	T13_PRSC_TXPRSC23,		23
	.EQU	T13_PRSC_TXPRSC22,		22
	.EQU	T13_PRSC_TXPRSC21,		21
	.EQU	T13_PRSC_TXPRSC20,		20
	.EQU	T13_PRSC_TXPRSC19,		19
	.EQU	T13_PRSC_TXPRSC18,		18
	.EQU	T13_PRSC_TXPRSC17,		17
	.EQU	T13_PRSC_TXPRSC16,		16
	.EQU	T13_PRSC_TXPRSC15,		15
	.EQU	T13_PRSC_TXPRSC14,		14
	.EQU	T13_PRSC_TXPRSC13,		13
	.EQU	T13_PRSC_TXPRSC12,		12
	.EQU	T13_PRSC_TXPRSC11,		11
	.EQU	T13_PRSC_TXPRSC10,		10
	.EQU	T13_PRSC_TXPRSC9,		9
	.EQU	T13_PRSC_TXPRSC8,		8
	.EQU	T13_PRSC_TXPRSC7,		7
	.EQU	T13_PRSC_TXPRSC6,		6
	.EQU	T13_PRSC_TXPRSC5,		5
	.EQU	T13_PRSC_TXPRSC4,		4
	.EQU	T13_PRSC_TXPRSC3,		3
	.EQU	T13_PRSC_TXPRSC2,		2
	.EQU	T13_PRSC_TXPRSC1,		1
	.EQU	T13_PRSC_TXPRSC0,		0
//  register-------------------------------------
	.EQU	T13_CTL,		0x40001390
//  0x4000 1390  T13_CTL   Bits-------------------------------------
	.EQU	T13_CTL_BLINKEN,		31
	.EQU	T13_CTL_LINKEN,		30
	.EQU	T13_CTL_UDSYNEN,		29
	.EQU	T13_CTL_HRLOCK,		28
	.EQU	T13_CTL_ETLOCK,		27
	.EQU	T13_CTL_PCLOCK,		26
	.EQU	T13_CTL_DBLOCK,		25
	.EQU	T13_CTL_AQLOCKB,		24
	.EQU	T13_CTL_AQLOCKA,		23
	.EQU	T13_CTL_CAPEN,		22
	.EQU	T13_CTL_CAPSEL,		21
	.EQU	T13_CTL_TXMAX,		19
	.EQU	T13_CTL_PHSDIR,		18
	.EQU	T13_CTL_SWFSYNC,		17
	.EQU	T13_CTL_SYNCOSEL1,		16
	.EQU	T13_CTL_SYNCOSEL0,		15
	.EQU	T13_CTL_PHSEN,		14
	.EQU	T13_CTL_SYNCI,		13
	.EQU	T13_CTL_TXUR,		12
	.EQU	T13_CTL_TXUDEVT,		11
	.EQU	T13_CTL_TXUDEN,		10
	.EQU	T13_CTL_TXCMS2,		9
	.EQU	T13_CTL_TXCMS1,		8
	.EQU	T13_CTL_TXCMS0,		7
	.EQU	T13_CTL_TXDIR,		6
	.EQU	T13_CTL_TXCLK1,		5
	.EQU	T13_CTL_TXCLK0,		4
	.EQU	T13_CTL_TXSY,		3
	.EQU	T13_CTL_TXGATE,		2
	.EQU	T13_CTL_TXCS,		1
	.EQU	T13_CTL_TXEN,		0
//  register-------------------------------------
	.EQU	EPWM13_RA,		0x40001394
//  0x4000 1394  EPWM13_RA   Bits-------------------------------------
	.EQU	EPWM13_RA_EPWMRA31,		31
	.EQU	EPWM13_RA_EPWMRA30,		30
	.EQU	EPWM13_RA_EPWMRA29,		29
	.EQU	EPWM13_RA_EPWMRA28,		28
	.EQU	EPWM13_RA_EPWMRA27,		27
	.EQU	EPWM13_RA_EPWMRA26,		26
	.EQU	EPWM13_RA_EPWMRA25,		25
	.EQU	EPWM13_RA_EPWMRA24,		24
	.EQU	EPWM13_RA_EPWMRA23,		23
	.EQU	EPWM13_RA_EPWMRA22,		22
	.EQU	EPWM13_RA_EPWMRA21,		21
	.EQU	EPWM13_RA_EPWMRA20,		20
	.EQU	EPWM13_RA_EPWMRA19,		19
	.EQU	EPWM13_RA_EPWMRA18,		18
	.EQU	EPWM13_RA_EPWMRA17,		17
	.EQU	EPWM13_RA_EPWMRA16,		16
	.EQU	EPWM13_RA_EPWMRA15,		15
	.EQU	EPWM13_RA_EPWMRA14,		14
	.EQU	EPWM13_RA_EPWMRA13,		13
	.EQU	EPWM13_RA_EPWMRA12,		12
	.EQU	EPWM13_RA_EPWMRA11,		11
	.EQU	EPWM13_RA_EPWMRA10,		10
	.EQU	EPWM13_RA_EPWMRA9,		9
	.EQU	EPWM13_RA_EPWMRA8,		8
	.EQU	EPWM13_RA_EPWMRA7,		7
	.EQU	EPWM13_RA_EPWMRA6,		6
	.EQU	EPWM13_RA_EPWMRA5,		5
	.EQU	EPWM13_RA_EPWMRA4,		4
	.EQU	EPWM13_RA_EPWMRA3,		3
	.EQU	EPWM13_RA_EPWMRA2,		2
	.EQU	EPWM13_RA_EPWMRA1,		1
	.EQU	EPWM13_RA_EPWMRA0,		0
//  register-------------------------------------
	.EQU	EPWM13_RB,		0x40001398
//  0x4000 1398  EPWM13_RB   Bits-------------------------------------
	.EQU	EPWM13_RB_EPWMRB31,		31
	.EQU	EPWM13_RB_EPWMRB30,		30
	.EQU	EPWM13_RB_EPWMRB29,		29
	.EQU	EPWM13_RB_EPWMRB28,		28
	.EQU	EPWM13_RB_EPWMRB27,		27
	.EQU	EPWM13_RB_EPWMRB26,		26
	.EQU	EPWM13_RB_EPWMRB25,		25
	.EQU	EPWM13_RB_EPWMRB24,		24
	.EQU	EPWM13_RB_EPWMRB23,		23
	.EQU	EPWM13_RB_EPWMRB22,		22
	.EQU	EPWM13_RB_EPWMRB21,		21
	.EQU	EPWM13_RB_EPWMRB20,		20
	.EQU	EPWM13_RB_EPWMRB19,		19
	.EQU	EPWM13_RB_EPWMRB18,		18
	.EQU	EPWM13_RB_EPWMRB17,		17
	.EQU	EPWM13_RB_EPWMRB16,		16
	.EQU	EPWM13_RB_EPWMRB15,		15
	.EQU	EPWM13_RB_EPWMRB14,		14
	.EQU	EPWM13_RB_EPWMRB13,		13
	.EQU	EPWM13_RB_EPWMRB12,		12
	.EQU	EPWM13_RB_EPWMRB11,		11
	.EQU	EPWM13_RB_EPWMRB10,		10
	.EQU	EPWM13_RB_EPWMRB9,		9
	.EQU	EPWM13_RB_EPWMRB8,		8
	.EQU	EPWM13_RB_EPWMRB7,		7
	.EQU	EPWM13_RB_EPWMRB6,		6
	.EQU	EPWM13_RB_EPWMRB5,		5
	.EQU	EPWM13_RB_EPWMRB4,		4
	.EQU	EPWM13_RB_EPWMRB3,		3
	.EQU	EPWM13_RB_EPWMRB2,		2
	.EQU	EPWM13_RB_EPWMRB1,		1
	.EQU	EPWM13_RB_EPWMRB0,		0
//  register-------------------------------------
	.EQU	EPWM13_CTLA,	0x4000139C
//  0x4000 139C  EPWM13_CTLA   Bits-------------------------------------
	.EQU	EPWM13_CTLA_OTSFA,		16
	.EQU	EPWM13_CTLA_ACTSFA1,		15
	.EQU	EPWM13_CTLA_ACTSFA0,		14
	.EQU	EPWM13_CTLA_CSFA1,		13
	.EQU	EPWM13_CTLA_CSFA0,		12
	.EQU	EPWM13_CTLA_ACBD1,		11
	.EQU	EPWM13_CTLA_ACBD0,		10
	.EQU	EPWM13_CTLA_ACBU1,		9
	.EQU	EPWM13_CTLA_ACBU0,		8
	.EQU	EPWM13_CTLA_ACAD1,		7
	.EQU	EPWM13_CTLA_ACAD0,		6
	.EQU	EPWM13_CTLA_ACAU1,		5
	.EQU	EPWM13_CTLA_ACAU0,		4
	.EQU	EPWM13_CTLA_APRD1,		3
	.EQU	EPWM13_CTLA_APRD0,		2
	.EQU	EPWM13_CTLA_AZRO1,		1
	.EQU	EPWM13_CTLA_AZRO0,		0
//  register-------------------------------------
	.EQU	EPWM13_CTLB,	0x400013A0
//  0x4000 13A0  EPWM13_CTLB   Bits-------------------------------------
	.EQU	EPWM13_CTLB_OTSFB,		16
	.EQU	EPWM13_CTLB_ACTSFB1,		15
	.EQU	EPWM13_CTLB_ACTSFB0,		14
	.EQU	EPWM13_CTLB_CSFB1,		13
	.EQU	EPWM13_CTLB_CSFB0,		12
	.EQU	EPWM13_CTLB_BCBD1,		11
	.EQU	EPWM13_CTLB_BCBD0,		10
	.EQU	EPWM13_CTLB_BCBU1,		9
	.EQU	EPWM13_CTLB_BCBU0,		8
	.EQU	EPWM13_CTLB_BCAD1,		7
	.EQU	EPWM13_CTLB_BCAD0,		6
	.EQU	EPWM13_CTLB_BCAU1,		5
	.EQU	EPWM13_CTLB_BCAU0,		4
	.EQU	EPWM13_CTLB_BPRD1,		3
	.EQU	EPWM13_CTLB_BPRD0,		2
	.EQU	EPWM13_CTLB_BZRO1,		1
	.EQU	EPWM13_CTLB_BZRO0,		0
//  register-------------------------------------
	.EQU	EPWM13_DBCTL,	0x400013A4
//  0x4000 13A4  EPWM13_DBCTL   Bits-------------------------------------
	.EQU	EPWM13_DBCTL_INMODE1,		5
	.EQU	EPWM13_DBCTL_INMODE0,		4
	.EQU	EPWM13_DBCTL_POLSEL1,		3
	.EQU	EPWM13_DBCTL_POLSEL0,		2
	.EQU	EPWM13_DBCTL_OUTMODE1,		1
	.EQU	EPWM13_DBCTL_OUTMODE0,		0
//  register-------------------------------------
	.EQU	EPWM13_DBT,	0x400013A8
//  0x4000 13A8  EPWM13_DBT   Bits-------------------------------------
	.EQU	EPWM13_DBT_RDBT15,		31
	.EQU	EPWM13_DBT_RDBT14,		30
	.EQU	EPWM13_DBT_RDBT13,		29
	.EQU	EPWM13_DBT_RDBT12,		28
	.EQU	EPWM13_DBT_RDBT11,		27
	.EQU	EPWM13_DBT_RDBT10,		26
	.EQU	EPWM13_DBT_RDBT9,		25
	.EQU	EPWM13_DBT_RDBT8,		24
	.EQU	EPWM13_DBT_RDBT7,		23
	.EQU	EPWM13_DBT_RDBT6,		22
	.EQU	EPWM13_DBT_RDBT5,		21
	.EQU	EPWM13_DBT_RDBT4,		20
	.EQU	EPWM13_DBT_RDBT3,		19
	.EQU	EPWM13_DBT_RDBT2,		18
	.EQU	EPWM13_DBT_RDBT1,		17
	.EQU	EPWM13_DBT_RDBT0,		16
	.EQU	EPWM13_DBT_FDBT15,		15
	.EQU	EPWM13_DBT_FDBT14,		14
	.EQU	EPWM13_DBT_FDBT13,		13
	.EQU	EPWM13_DBT_FDBT12,		12
	.EQU	EPWM13_DBT_FDBT11,		11
	.EQU	EPWM13_DBT_FDBT10,		10
	.EQU	EPWM13_DBT_FDBT9,		9
	.EQU	EPWM13_DBT_FDBT8,		8
	.EQU	EPWM13_DBT_FDBT7,		7
	.EQU	EPWM13_DBT_FDBT6,		6
	.EQU	EPWM13_DBT_FDBT5,		5
	.EQU	EPWM13_DBT_FDBT4,		4
	.EQU	EPWM13_DBT_FDBT3,		3
	.EQU	EPWM13_DBT_FDBT2,		2
	.EQU	EPWM13_DBT_FDBT1,		1
	.EQU	EPWM13_DBT_FDBT0,		0
//  register-------------------------------------
	.EQU	EPWM13_PCCTL,	0x400013AC
//  0x4000 13AC  EPWM13_PCCTL   Bits-------------------------------------
	.EQU	EPWM13_PCCTL_CHPFREQ2,		10
	.EQU	EPWM13_PCCTL_CHPFREQ1,		9
	.EQU	EPWM13_PCCTL_CHPFREQ0,		8
	.EQU	EPWM13_PCCTL_CHPDUTY2,		7
	.EQU	EPWM13_PCCTL_CHPDUTY1,		6
	.EQU	EPWM13_PCCTL_CHPDUTY0,		5
	.EQU	EPWM13_PCCTL_OSHTWTH3,		4
	.EQU	EPWM13_PCCTL_OSHTWTH2,		3
	.EQU	EPWM13_PCCTL_OSHTWTH1,		2
	.EQU	EPWM13_PCCTL_OSHTWTH0,		1
	.EQU	EPWM13_PCCTL_CHPEN,		0
//  register-------------------------------------
	.EQU	EPWM13_PXASCTL,	0x400013B0
//  0x4000 13B0  EPWM13_PXASCTL   Bits-------------------------------------
	.EQU	EPWM13_PXASCTL_PXRSEN,		8
	.EQU	EPWM13_PXASCTL_PXSSA1,		7
	.EQU	EPWM13_PXASCTL_PXSSA0,		6
	.EQU	EPWM13_PXASCTL_PXSSB1,		5
	.EQU	EPWM13_PXASCTL_PXSSB0,		4
	.EQU	EPWM13_PXASCTL_PXASE,		3
	.EQU	EPWM13_PXASCTL_PXASS2,		2
	.EQU	EPWM13_PXASCTL_PXASS1,		1
	.EQU	EPWM13_PXASCTL_PXASS0,		0
//  register-------------------------------------
	.EQU	EPWM13_ETCTL,	0x400013B4
//  0x4000 13B4  EPWM13_ETCTL   Bits-------------------------------------
	.EQU	EPWM13_ETCTL_BTSEL1,		25
	.EQU	EPWM13_ETCTL_BTSEL0,		24
	.EQU	EPWM13_ETCTL_BT1,		23
	.EQU	EPWM13_ETCTL_BT0,		22
	.EQU	EPWM13_ETCTL_BPP1,		21
	.EQU	EPWM13_ETCTL_BPP0,		20
	.EQU	EPWM13_ETCTL_FRCB,		19
	.EQU	EPWM13_ETCTL_SELB1,		18
	.EQU	EPWM13_ETCTL_SELB0,		17
	.EQU	EPWM13_ETCTL_TOADENB,		16
	.EQU	EPWM13_ETCTL_ATSEL1,		9
	.EQU	EPWM13_ETCTL_ATSEL0,		8
	.EQU	EPWM13_ETCTL_AT1,		7
	.EQU	EPWM13_ETCTL_AT0,		6
	.EQU	EPWM13_ETCTL_APP1,		5
	.EQU	EPWM13_ETCTL_APP0,		4
	.EQU	EPWM13_ETCTL_FRCA,		3
	.EQU	EPWM13_ETCTL_SELA1,		2
	.EQU	EPWM13_ETCTL_SELA0,		1
	.EQU	EPWM13_ETCTL_TOADENA,		0
//  register-------------------------------------
	.EQU	EPWM13_IE,		0x400013B8
//  0x4000 13B8  EPWM13_IE   Bits-------------------------------------
	.EQU	EPWM13_IE_TXDIE,		8
	.EQU	EPWM13_IE_TXCIE,		7
	.EQU	EPWM13_IE_TXAIE,		6
	.EQU	EPWM13_IE_TXBIE,		5
	.EQU	EPWM13_IE_TXIE,		4
	.EQU	EPWM13_IE_TXUIE,		3
	.EQU	EPWM13_IE_TXGIE,		2
	.EQU	EPWM13_IE_TXTIE1,		1
	.EQU	EPWM13_IE_TXTIE0,		0
//  register-------------------------------------
	.EQU	EPWM13_IF,		0x400013BC
//  0x4000 13BC  EPWM13_IF   Bits-------------------------------------
	.EQU	EPWM13_IF_TXDIF,		8
	.EQU	EPWM13_IF_TXCIF,		7
	.EQU	EPWM13_IF_TXAIF,		6
	.EQU	EPWM13_IF_TXBIF,		5
	.EQU	EPWM13_IF_TXIF,		4
	.EQU	EPWM13_IF_TXUIF,		3
	.EQU	EPWM13_IF_TXGIF,		2
	.EQU	EPWM13_IF_TXTIF1,		1
	.EQU	EPWM13_IF_TXTIF0,		0
//  register-------------------------------------
	.EQU	EPWM13_IC,		0x400013C0
//  0x4000 13C0  EPWM13_IC   Bits-------------------------------------
	.EQU	EPWM13_IC_TXDIC,		8
	.EQU	EPWM13_IC_TXCIC,		7
	.EQU	EPWM13_IC_TXAIC,		6
	.EQU	EPWM13_IC_TXBIC,		5
	.EQU	EPWM13_IC_TXIC,		4
	.EQU	EPWM13_IC_TXUIC,		3
	.EQU	EPWM13_IC_TXGIC,		2
	.EQU	EPWM13_IC_TXTIC1,		1
	.EQU	EPWM13_IC_TXTIC0,		0
//  register-------------------------------------
	.EQU	EPWM13_DE,		0x400013C4
//  0x4000 13C4  EPWM13_DE   Bits-------------------------------------
	.EQU	EPWM13_DE_TXDDE,		8
	.EQU	EPWM13_DE_TXCDE,		7
	.EQU	EPWM13_DE_TXADE,		6
	.EQU	EPWM13_DE_TXBDE,		5
	.EQU	EPWM13_DE_TXDE,		4
	.EQU	EPWM13_DE_TXUDE,		3
	.EQU	EPWM13_DE_TXGDE,		2
	.EQU	EPWM13_DE_TXTDE1,		1
	.EQU	EPWM13_DE_TXTDE0,		0
//  register-------------------------------------
	.EQU	EPWM13_DF,		0x400013C8
//  0x4000 13C8  EPWM13_DF   Bits-------------------------------------
	.EQU	EPWM13_DF_TXDDF,		8
	.EQU	EPWM13_DF_TXCDF,		7
	.EQU	EPWM13_DF_TXADF,		6
	.EQU	EPWM13_DF_TXBDF,		5
	.EQU	EPWM13_DF_TXDF,		4
	.EQU	EPWM13_DF_TXUDF,		3
	.EQU	EPWM13_DF_TXGDF,		2
	.EQU	EPWM13_DF_TXTDF1,		1
	.EQU	EPWM13_DF_TXTDF0,		0
//  register-------------------------------------
	.EQU	EPWM13_HRPWMCTL,	0x400013D0
//  0x4000 13D0  EPWM13_HRPWMCTL   Bits-------------------------------------
	.EQU	EPWM13_HRPWMCTL_HRPOUTB,		1
	.EQU	EPWM13_HRPWMCTL_HRPEN,		0
//  register-------------------------------------
	.EQU	EPWM13_HRCMP,	0x400013D4
//  0x4000 13D4  EPWM13_HRCMP   Bits-------------------------------------
	.EQU	EPWM13_HRCMP_HRCMP7,		7
	.EQU	EPWM13_HRCMP_HRCMP6,		6
	.EQU	EPWM13_HRCMP_HRCMP5,		5
	.EQU	EPWM13_HRCMP_HRCMP4,		4
	.EQU	EPWM13_HRCMP_HRCMP3,		3
	.EQU	EPWM13_HRCMP_HRCMP2,		2
	.EQU	EPWM13_HRCMP_HRCMP1,		1
	.EQU	EPWM13_HRCMP_HRCMP0,		0
//  register-------------------------------------
	.EQU	EPWM13_CAP,	0x400013D8
//  0x4000 13D8  EPWM13_CAP   Bits-------------------------------------
	.EQU	EPWM13_CAP_CAP31,		31
	.EQU	EPWM13_CAP_CAP30,		30
	.EQU	EPWM13_CAP_CAP29,		29
	.EQU	EPWM13_CAP_CAP28,		28
	.EQU	EPWM13_CAP_CAP27,		27
	.EQU	EPWM13_CAP_CAP26,		26
	.EQU	EPWM13_CAP_CAP25,		25
	.EQU	EPWM13_CAP_CAP24,		24
	.EQU	EPWM13_CAP_CAP23,		23
	.EQU	EPWM13_CAP_CAP22,		22
	.EQU	EPWM13_CAP_CAP21,		21
	.EQU	EPWM13_CAP_CAP20,		20
	.EQU	EPWM13_CAP_CAP19,		19
	.EQU	EPWM13_CAP_CAP18,		18
	.EQU	EPWM13_CAP_CAP17,		17
	.EQU	EPWM13_CAP_CAP16,		16
	.EQU	EPWM13_CAP_CAP15,		15
	.EQU	EPWM13_CAP_CAP14,		14
	.EQU	EPWM13_CAP_CAP13,		13
	.EQU	EPWM13_CAP_CAP12,		12
	.EQU	EPWM13_CAP_CAP11,		11
	.EQU	EPWM13_CAP_CAP10,		10
	.EQU	EPWM13_CAP_CAP9,		9
	.EQU	EPWM13_CAP_CAP8,		8
	.EQU	EPWM13_CAP_CAP7,		7
	.EQU	EPWM13_CAP_CAP6,		6
	.EQU	EPWM13_CAP_CAP5,		5
	.EQU	EPWM13_CAP_CAP4,		4
	.EQU	EPWM13_CAP_CAP3,		3
	.EQU	EPWM13_CAP_CAP2,		2
	.EQU	EPWM13_CAP_CAP1,		1
	.EQU	EPWM13_CAP_CAP0,		0
//  register-------------------------------------
	.EQU	 EPWM13_RC,	0x400013DC
//  0x4000 13DC   EPWM13_RC   Bits-------------------------------------
	.EQU	 EPWM13_RC_EPWMRC31,		31
	.EQU	 EPWM13_RC_EPWMRC30,		30
	.EQU	 EPWM13_RC_EPWMRC29,		29
	.EQU	 EPWM13_RC_EPWMRC28,		28
	.EQU	 EPWM13_RC_EPWMRC27,		27
	.EQU	 EPWM13_RC_EPWMRC26,		26
	.EQU	 EPWM13_RC_EPWMRC25,		25
	.EQU	 EPWM13_RC_EPWMRC24,		24
	.EQU	 EPWM13_RC_EPWMRC23,		23
	.EQU	 EPWM13_RC_EPWMRC22,		22
	.EQU	 EPWM13_RC_EPWMRC21,		21
	.EQU	 EPWM13_RC_EPWMRC20,		20
	.EQU	 EPWM13_RC_EPWMRC19,		19
	.EQU	 EPWM13_RC_EPWMRC18,		18
	.EQU	 EPWM13_RC_EPWMRC17,		17
	.EQU	 EPWM13_RC_EPWMRC16,		16
	.EQU	 EPWM13_RC_EPWMRC15,		15
	.EQU	 EPWM13_RC_EPWMRC14,		14
	.EQU	 EPWM13_RC_EPWMRC13,		13
	.EQU	 EPWM13_RC_EPWMRC12,		12
	.EQU	 EPWM13_RC_EPWMRC11,		11
	.EQU	 EPWM13_RC_EPWMRC10,		10
	.EQU	 EPWM13_RC_EPWMRC9,		9
	.EQU	 EPWM13_RC_EPWMRC8,		8
	.EQU	 EPWM13_RC_EPWMRC7,		7
	.EQU	 EPWM13_RC_EPWMRC6,		6
	.EQU	 EPWM13_RC_EPWMRC5,		5
	.EQU	 EPWM13_RC_EPWMRC4,		4
	.EQU	 EPWM13_RC_EPWMRC3,		3
	.EQU	 EPWM13_RC_EPWMRC2,		2
	.EQU	 EPWM13_RC_EPWMRC1,		1
	.EQU	 EPWM13_RC_EPWMRC0,		0
//  register-------------------------------------
	.EQU	EPWM13_RD,		0x400013E0
//  0x4000 13E0  EPWM13_RD   Bits-------------------------------------
	.EQU	EPWM13_RD_EPWMRD31,		31
	.EQU	EPWM13_RD_EPWMRD30,		30
	.EQU	EPWM13_RD_EPWMRD29,		29
	.EQU	EPWM13_RD_EPWMRD28,		28
	.EQU	EPWM13_RD_EPWMRD27,		27
	.EQU	EPWM13_RD_EPWMRD26,		26
	.EQU	EPWM13_RD_EPWMRD25,		25
	.EQU	EPWM13_RD_EPWMRD24,		24
	.EQU	EPWM13_RD_EPWMRD23,		23
	.EQU	EPWM13_RD_EPWMRD22,		22
	.EQU	EPWM13_RD_EPWMRD21,		21
	.EQU	EPWM13_RD_EPWMRD20,		20
	.EQU	EPWM13_RD_EPWMRD19,		19
	.EQU	EPWM13_RD_EPWMRD18,		18
	.EQU	EPWM13_RD_EPWMRD17,		17
	.EQU	EPWM13_RD_EPWMRD16,		16
	.EQU	EPWM13_RD_EPWMRD15,		15
	.EQU	EPWM13_RD_EPWMRD14,		14
	.EQU	EPWM13_RD_EPWMRD13,		13
	.EQU	EPWM13_RD_EPWMRD12,		12
	.EQU	EPWM13_RD_EPWMRD11,		11
	.EQU	EPWM13_RD_EPWMRD10,		10
	.EQU	EPWM13_RD_EPWMRD9,		9
	.EQU	EPWM13_RD_EPWMRD8,		8
	.EQU	EPWM13_RD_EPWMRD7,		7
	.EQU	EPWM13_RD_EPWMRD6,		6
	.EQU	EPWM13_RD_EPWMRD5,		5
	.EQU	EPWM13_RD_EPWMRD4,		4
	.EQU	EPWM13_RD_EPWMRD3,		3
	.EQU	EPWM13_RD_EPWMRD2,		2
	.EQU	EPWM13_RD_EPWMRD1,		1
	.EQU	EPWM13_RD_EPWMRD0,		0
//  register-------------------------------------
	.EQU	EPWM13_UDCTL,	0x400013E4
//  0x4000 13E4  EPWM13_UDCTL   Bits-------------------------------------
	.EQU	EPWM13_UDCTL_GBUDEN,		27
	.EQU	EPWM13_UDCTL_HRPUDSEL1,		26
	.EQU	EPWM13_UDCTL_HRPUDSEL0,		25
	.EQU	EPWM13_UDCTL_HRPUDEN,		24
	.EQU	EPWM13_UDCTL_EBUDSEL1,		23
	.EQU	EPWM13_UDCTL_EBUDSEL0,		22
	.EQU	EPWM13_UDCTL_EBUDEN,		21
	.EQU	EPWM13_UDCTL_EAUDSEL1,		20
	.EQU	EPWM13_UDCTL_EAUDSEL0,		19
	.EQU	EPWM13_UDCTL_EAUDEN,		18
	.EQU	EPWM13_UDCTL_CMDUDSEL1,		17
	.EQU	EPWM13_UDCTL_CMDUDSEL0,		16
	.EQU	EPWM13_UDCTL_CMDUDEN,		15
	.EQU	EPWM13_UDCTL_CMCUDSEL1,		14
	.EQU	EPWM13_UDCTL_CMCUDSEL0,		13
	.EQU	EPWM13_UDCTL_CMCUDEN,		12
	.EQU	EPWM13_UDCTL_CMBUDSEL1,		11
	.EQU	EPWM13_UDCTL_CMBUDSEL0,		10
	.EQU	EPWM13_UDCTL_CMBUDEN,		9
	.EQU	EPWM13_UDCTL_CMAUDSEL1,		8
	.EQU	EPWM13_UDCTL_CMAUDSEL0,		7
	.EQU	EPWM13_UDCTL_CMAUDEN,		6
	.EQU	EPWM13_UDCTL_PRUDSEL1,		5
	.EQU	EPWM13_UDCTL_PRUDSEL0,		4
	.EQU	EPWM13_UDCTL_PRUDEN,		3
	.EQU	EPWM13_UDCTL_PPUDSEL1,		2
	.EQU	EPWM13_UDCTL_PPUDSEL0,		1
	.EQU	EPWM13_UDCTL_PPUDEN,		0
//  register-------------------------------------
	.EQU	T16_CNT,		0x40002E00
//  0x4000 2E00  T16_CNT   Bits-------------------------------------
	.EQU	T16_CNT_TXCNT31,		31
	.EQU	T16_CNT_TXCNT30,		30
	.EQU	T16_CNT_TXCNT29,		29
	.EQU	T16_CNT_TXCNT28,		28
	.EQU	T16_CNT_TXCNT27,		27
	.EQU	T16_CNT_TXCNT26,		26
	.EQU	T16_CNT_TXCNT25,		25
	.EQU	T16_CNT_TXCNT24,		24
	.EQU	T16_CNT_TXCNT23,		23
	.EQU	T16_CNT_TXCNT22,		22
	.EQU	T16_CNT_TXCNT21,		21
	.EQU	T16_CNT_TXCNT20,		20
	.EQU	T16_CNT_TXCNT19,		19
	.EQU	T16_CNT_TXCNT18,		18
	.EQU	T16_CNT_TXCNT17,		17
	.EQU	T16_CNT_TXCNT16,		16
	.EQU	T16_CNT_TXCNT15,		15
	.EQU	T16_CNT_TXCNT14,		14
	.EQU	T16_CNT_TXCNT13,		13
	.EQU	T16_CNT_TXCNT12,		12
	.EQU	T16_CNT_TXCNT11,		11
	.EQU	T16_CNT_TXCNT10,		10
	.EQU	T16_CNT_TXCNT9,		9
	.EQU	T16_CNT_TXCNT8,		8
	.EQU	T16_CNT_TXCNT7,		7
	.EQU	T16_CNT_TXCNT6,		6
	.EQU	T16_CNT_TXCNT5,		5
	.EQU	T16_CNT_TXCNT4,		4
	.EQU	T16_CNT_TXCNT3,		3
	.EQU	T16_CNT_TXCNT2,		2
	.EQU	T16_CNT_TXCNT1,		1
	.EQU	T16_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T16_PHS,		0x40002E04
//  0x4000 2E04  T16_PHS   Bits-------------------------------------
	.EQU	T16_PHS_TXPHS31,		31
	.EQU	T16_PHS_TXPHS30,		30
	.EQU	T16_PHS_TXPHS29,		29
	.EQU	T16_PHS_TXPHS28,		28
	.EQU	T16_PHS_TXPHS27,		27
	.EQU	T16_PHS_TXPHS26,		26
	.EQU	T16_PHS_TXPHS25,		25
	.EQU	T16_PHS_TXPHS24,		24
	.EQU	T16_PHS_TXPHS23,		23
	.EQU	T16_PHS_TXPHS22,		22
	.EQU	T16_PHS_TXPHS21,		21
	.EQU	T16_PHS_TXPHS20,		20
	.EQU	T16_PHS_TXPHS19,		19
	.EQU	T16_PHS_TXPHS18,		18
	.EQU	T16_PHS_TXPHS17,		17
	.EQU	T16_PHS_TXPHS16,		16
	.EQU	T16_PHS_TXPHS15,		15
	.EQU	T16_PHS_TXPHS14,		14
	.EQU	T16_PHS_TXPHS13,		13
	.EQU	T16_PHS_TXPHS12,		12
	.EQU	T16_PHS_TXPHS11,		11
	.EQU	T16_PHS_TXPHS10,		10
	.EQU	T16_PHS_TXPHS9,		9
	.EQU	T16_PHS_TXPHS8,		8
	.EQU	T16_PHS_TXPHS7,		7
	.EQU	T16_PHS_TXPHS6,		6
	.EQU	T16_PHS_TXPHS5,		5
	.EQU	T16_PHS_TXPHS4,		4
	.EQU	T16_PHS_TXPHS3,		3
	.EQU	T16_PHS_TXPHS2,		2
	.EQU	T16_PHS_TXPHS1,		1
	.EQU	T16_PHS_TXPHS0,		0
//  register-------------------------------------
	.EQU	T16_PPX,		0x40002E08
//  0x4000 2E08  T16_PPX   Bits-------------------------------------
	.EQU	T16_PPX_PPX31,		31
	.EQU	T16_PPX_PPX30,		30
	.EQU	T16_PPX_PPX29,		29
	.EQU	T16_PPX_PPX28,		28
	.EQU	T16_PPX_PPX27,		27
	.EQU	T16_PPX_PPX26,		26
	.EQU	T16_PPX_PPX25,		25
	.EQU	T16_PPX_PPX24,		24
	.EQU	T16_PPX_PPX23,		23
	.EQU	T16_PPX_PPX22,		22
	.EQU	T16_PPX_PPX21,		21
	.EQU	T16_PPX_PPX20,		20
	.EQU	T16_PPX_PPX19,		19
	.EQU	T16_PPX_PPX18,		18
	.EQU	T16_PPX_PPX17,		17
	.EQU	T16_PPX_PPX16,		16
	.EQU	T16_PPX_PPX15,		15
	.EQU	T16_PPX_PPX14,		14
	.EQU	T16_PPX_PPX13,		13
	.EQU	T16_PPX_PPX12,		12
	.EQU	T16_PPX_PPX11,		11
	.EQU	T16_PPX_PPX10,		10
	.EQU	T16_PPX_PPX9,		9
	.EQU	T16_PPX_PPX8,		8
	.EQU	T16_PPX_PPX7,		7
	.EQU	T16_PPX_PPX6,		6
	.EQU	T16_PPX_PPX5,		5
	.EQU	T16_PPX_PPX4,		4
	.EQU	T16_PPX_PPX3,		3
	.EQU	T16_PPX_PPX2,		2
	.EQU	T16_PPX_PPX1,		1
	.EQU	T16_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T16_PRSC,		0x40002E0C
//  0x4000 2E0C  T16_PRSC   Bits-------------------------------------
	.EQU	T16_PRSC_TXPRSC31,		31
	.EQU	T16_PRSC_TXPRSC30,		30
	.EQU	T16_PRSC_TXPRSC29,		29
	.EQU	T16_PRSC_TXPRSC28,		28
	.EQU	T16_PRSC_TXPRSC27,		27
	.EQU	T16_PRSC_TXPRSC26,		26
	.EQU	T16_PRSC_TXPRSC25,		25
	.EQU	T16_PRSC_TXPRSC24,		24
	.EQU	T16_PRSC_TXPRSC23,		23
	.EQU	T16_PRSC_TXPRSC22,		22
	.EQU	T16_PRSC_TXPRSC21,		21
	.EQU	T16_PRSC_TXPRSC20,		20
	.EQU	T16_PRSC_TXPRSC19,		19
	.EQU	T16_PRSC_TXPRSC18,		18
	.EQU	T16_PRSC_TXPRSC17,		17
	.EQU	T16_PRSC_TXPRSC16,		16
	.EQU	T16_PRSC_TXPRSC15,		15
	.EQU	T16_PRSC_TXPRSC14,		14
	.EQU	T16_PRSC_TXPRSC13,		13
	.EQU	T16_PRSC_TXPRSC12,		12
	.EQU	T16_PRSC_TXPRSC11,		11
	.EQU	T16_PRSC_TXPRSC10,		10
	.EQU	T16_PRSC_TXPRSC9,		9
	.EQU	T16_PRSC_TXPRSC8,		8
	.EQU	T16_PRSC_TXPRSC7,		7
	.EQU	T16_PRSC_TXPRSC6,		6
	.EQU	T16_PRSC_TXPRSC5,		5
	.EQU	T16_PRSC_TXPRSC4,		4
	.EQU	T16_PRSC_TXPRSC3,		3
	.EQU	T16_PRSC_TXPRSC2,		2
	.EQU	T16_PRSC_TXPRSC1,		1
	.EQU	T16_PRSC_TXPRSC0,		0
//  register-------------------------------------
	.EQU	T16_CTL,		0x40002E10
//  0x4000 2E10  T16_CTL   Bits-------------------------------------
	.EQU	T16_CTL_BLINKEN,		31
	.EQU	T16_CTL_LINKEN,		30
	.EQU	T16_CTL_UDSYNEN,		29
	.EQU	T16_CTL_HRLOCK,		28
	.EQU	T16_CTL_ETLOCK,		27
	.EQU	T16_CTL_PCLOCK,		26
	.EQU	T16_CTL_DBLOCK,		25
	.EQU	T16_CTL_AQLOCKB,		24
	.EQU	T16_CTL_AQLOCKA,		23
	.EQU	T16_CTL_CAPEN,		22
	.EQU	T16_CTL_CAPSEL,		21
	.EQU	T16_CTL_TXMAX,		19
	.EQU	T16_CTL_PHSDIR,		18
	.EQU	T16_CTL_SWFSYNC,		17
	.EQU	T16_CTL_SYNCOSEL1,		16
	.EQU	T16_CTL_SYNCOSEL0,		15
	.EQU	T16_CTL_PHSEN,		14
	.EQU	T16_CTL_SYNCI,		13
	.EQU	T16_CTL_TXUR,		12
	.EQU	T16_CTL_TXUDEVT,		11
	.EQU	T16_CTL_TXUDEN,		10
	.EQU	T16_CTL_TXCMS2,		9
	.EQU	T16_CTL_TXCMS1,		8
	.EQU	T16_CTL_TXCMS0,		7
	.EQU	T16_CTL_TXDIR,		6
	.EQU	T16_CTL_TXCLK1,		5
	.EQU	T16_CTL_TXCLK0,		4
	.EQU	T16_CTL_TXSY,		3
	.EQU	T16_CTL_TXGATE,		2
	.EQU	T16_CTL_TXCS,		1
	.EQU	T16_CTL_TXEN,		0
//  register-------------------------------------
	.EQU	EPWM16_RA,		0x40002E14
//  0x4000 2E14  EPWM16_RA   Bits-------------------------------------
	.EQU	EPWM16_RA_EPWMRA31,		31
	.EQU	EPWM16_RA_EPWMRA30,		30
	.EQU	EPWM16_RA_EPWMRA29,		29
	.EQU	EPWM16_RA_EPWMRA28,		28
	.EQU	EPWM16_RA_EPWMRA27,		27
	.EQU	EPWM16_RA_EPWMRA26,		26
	.EQU	EPWM16_RA_EPWMRA25,		25
	.EQU	EPWM16_RA_EPWMRA24,		24
	.EQU	EPWM16_RA_EPWMRA23,		23
	.EQU	EPWM16_RA_EPWMRA22,		22
	.EQU	EPWM16_RA_EPWMRA21,		21
	.EQU	EPWM16_RA_EPWMRA20,		20
	.EQU	EPWM16_RA_EPWMRA19,		19
	.EQU	EPWM16_RA_EPWMRA18,		18
	.EQU	EPWM16_RA_EPWMRA17,		17
	.EQU	EPWM16_RA_EPWMRA16,		16
	.EQU	EPWM16_RA_EPWMRA15,		15
	.EQU	EPWM16_RA_EPWMRA14,		14
	.EQU	EPWM16_RA_EPWMRA13,		13
	.EQU	EPWM16_RA_EPWMRA12,		12
	.EQU	EPWM16_RA_EPWMRA11,		11
	.EQU	EPWM16_RA_EPWMRA10,		10
	.EQU	EPWM16_RA_EPWMRA9,		9
	.EQU	EPWM16_RA_EPWMRA8,		8
	.EQU	EPWM16_RA_EPWMRA7,		7
	.EQU	EPWM16_RA_EPWMRA6,		6
	.EQU	EPWM16_RA_EPWMRA5,		5
	.EQU	EPWM16_RA_EPWMRA4,		4
	.EQU	EPWM16_RA_EPWMRA3,		3
	.EQU	EPWM16_RA_EPWMRA2,		2
	.EQU	EPWM16_RA_EPWMRA1,		1
	.EQU	EPWM16_RA_EPWMRA0,		0
//  register-------------------------------------
	.EQU	EPWM16_RB,		0x40002E18
//  0x4000 2E18  EPWM16_RB   Bits-------------------------------------
	.EQU	EPWM16_RB_EPWMRB31,		31
	.EQU	EPWM16_RB_EPWMRB30,		30
	.EQU	EPWM16_RB_EPWMRB29,		29
	.EQU	EPWM16_RB_EPWMRB28,		28
	.EQU	EPWM16_RB_EPWMRB27,		27
	.EQU	EPWM16_RB_EPWMRB26,		26
	.EQU	EPWM16_RB_EPWMRB25,		25
	.EQU	EPWM16_RB_EPWMRB24,		24
	.EQU	EPWM16_RB_EPWMRB23,		23
	.EQU	EPWM16_RB_EPWMRB22,		22
	.EQU	EPWM16_RB_EPWMRB21,		21
	.EQU	EPWM16_RB_EPWMRB20,		20
	.EQU	EPWM16_RB_EPWMRB19,		19
	.EQU	EPWM16_RB_EPWMRB18,		18
	.EQU	EPWM16_RB_EPWMRB17,		17
	.EQU	EPWM16_RB_EPWMRB16,		16
	.EQU	EPWM16_RB_EPWMRB15,		15
	.EQU	EPWM16_RB_EPWMRB14,		14
	.EQU	EPWM16_RB_EPWMRB13,		13
	.EQU	EPWM16_RB_EPWMRB12,		12
	.EQU	EPWM16_RB_EPWMRB11,		11
	.EQU	EPWM16_RB_EPWMRB10,		10
	.EQU	EPWM16_RB_EPWMRB9,		9
	.EQU	EPWM16_RB_EPWMRB8,		8
	.EQU	EPWM16_RB_EPWMRB7,		7
	.EQU	EPWM16_RB_EPWMRB6,		6
	.EQU	EPWM16_RB_EPWMRB5,		5
	.EQU	EPWM16_RB_EPWMRB4,		4
	.EQU	EPWM16_RB_EPWMRB3,		3
	.EQU	EPWM16_RB_EPWMRB2,		2
	.EQU	EPWM16_RB_EPWMRB1,		1
	.EQU	EPWM16_RB_EPWMRB0,		0
//  register-------------------------------------
	.EQU	EPWM16_CTLA,	0x40002E1C
//  0x4000 2E1C  EPWM16_CTLA   Bits-------------------------------------
	.EQU	EPWM16_CTLA_OTSFA,		16
	.EQU	EPWM16_CTLA_ACTSFA1,		15
	.EQU	EPWM16_CTLA_ACTSFA0,		14
	.EQU	EPWM16_CTLA_CSFA1,		13
	.EQU	EPWM16_CTLA_CSFA0,		12
	.EQU	EPWM16_CTLA_ACBD1,		11
	.EQU	EPWM16_CTLA_ACBD0,		10
	.EQU	EPWM16_CTLA_ACBU1,		9
	.EQU	EPWM16_CTLA_ACBU0,		8
	.EQU	EPWM16_CTLA_ACAD1,		7
	.EQU	EPWM16_CTLA_ACAD0,		6
	.EQU	EPWM16_CTLA_ACAU1,		5
	.EQU	EPWM16_CTLA_ACAU0,		4
	.EQU	EPWM16_CTLA_APRD1,		3
	.EQU	EPWM16_CTLA_APRD0,		2
	.EQU	EPWM16_CTLA_AZRO1,		1
	.EQU	EPWM16_CTLA_AZRO0,		0
//  register-------------------------------------
	.EQU	EPWM16_CTLB,	0x40002E20
//  0x4000 2E20  EPWM16_CTLB   Bits-------------------------------------
	.EQU	EPWM16_CTLB_OTSFB,		16
	.EQU	EPWM16_CTLB_ACTSFB1,		15
	.EQU	EPWM16_CTLB_ACTSFB0,		14
	.EQU	EPWM16_CTLB_CSFB1,		13
	.EQU	EPWM16_CTLB_CSFB0,		12
	.EQU	EPWM16_CTLB_BCBD1,		11
	.EQU	EPWM16_CTLB_BCBD0,		10
	.EQU	EPWM16_CTLB_BCBU1,		9
	.EQU	EPWM16_CTLB_BCBU0,		8
	.EQU	EPWM16_CTLB_BCAD1,		7
	.EQU	EPWM16_CTLB_BCAD0,		6
	.EQU	EPWM16_CTLB_BCAU1,		5
	.EQU	EPWM16_CTLB_BCAU0,		4
	.EQU	EPWM16_CTLB_BPRD1,		3
	.EQU	EPWM16_CTLB_BPRD0,		2
	.EQU	EPWM16_CTLB_BZRO1,		1
	.EQU	EPWM16_CTLB_BZRO0,		0
//  register-------------------------------------
	.EQU	EPWM16_DBCTL,	0x40002E24
//  0x4000 2E24  EPWM16_DBCTL   Bits-------------------------------------
	.EQU	EPWM16_DBCTL_INMODE1,		5
	.EQU	EPWM16_DBCTL_INMODE0,		4
	.EQU	EPWM16_DBCTL_POLSEL1,		3
	.EQU	EPWM16_DBCTL_POLSEL0,		2
	.EQU	EPWM16_DBCTL_OUTMODE1,		1
	.EQU	EPWM16_DBCTL_OUTMODE0,		0
//  register-------------------------------------
	.EQU	EPWM16_DBT,	0x40002E28
//  0x4000 2E28  EPWM16_DBT   Bits-------------------------------------
	.EQU	EPWM16_DBT_RDBT15,		31
	.EQU	EPWM16_DBT_RDBT14,		30
	.EQU	EPWM16_DBT_RDBT13,		29
	.EQU	EPWM16_DBT_RDBT12,		28
	.EQU	EPWM16_DBT_RDBT11,		27
	.EQU	EPWM16_DBT_RDBT10,		26
	.EQU	EPWM16_DBT_RDBT9,		25
	.EQU	EPWM16_DBT_RDBT8,		24
	.EQU	EPWM16_DBT_RDBT7,		23
	.EQU	EPWM16_DBT_RDBT6,		22
	.EQU	EPWM16_DBT_RDBT5,		21
	.EQU	EPWM16_DBT_RDBT4,		20
	.EQU	EPWM16_DBT_RDBT3,		19
	.EQU	EPWM16_DBT_RDBT2,		18
	.EQU	EPWM16_DBT_RDBT1,		17
	.EQU	EPWM16_DBT_RDBT0,		16
	.EQU	EPWM16_DBT_FDBT15,		15
	.EQU	EPWM16_DBT_FDBT14,		14
	.EQU	EPWM16_DBT_FDBT13,		13
	.EQU	EPWM16_DBT_FDBT12,		12
	.EQU	EPWM16_DBT_FDBT11,		11
	.EQU	EPWM16_DBT_FDBT10,		10
	.EQU	EPWM16_DBT_FDBT9,		9
	.EQU	EPWM16_DBT_FDBT8,		8
	.EQU	EPWM16_DBT_FDBT7,		7
	.EQU	EPWM16_DBT_FDBT6,		6
	.EQU	EPWM16_DBT_FDBT5,		5
	.EQU	EPWM16_DBT_FDBT4,		4
	.EQU	EPWM16_DBT_FDBT3,		3
	.EQU	EPWM16_DBT_FDBT2,		2
	.EQU	EPWM16_DBT_FDBT1,		1
	.EQU	EPWM16_DBT_FDBT0,		0
//  register-------------------------------------
	.EQU	EPWM16_PCCTL,	0x40002E2C
//  0x4000 2E2C  EPWM16_PCCTL   Bits-------------------------------------
	.EQU	EPWM16_PCCTL_CHPFREQ2,		10
	.EQU	EPWM16_PCCTL_CHPFREQ1,		9
	.EQU	EPWM16_PCCTL_CHPFREQ0,		8
	.EQU	EPWM16_PCCTL_CHPDUTY2,		7
	.EQU	EPWM16_PCCTL_CHPDUTY1,		6
	.EQU	EPWM16_PCCTL_CHPDUTY0,		5
	.EQU	EPWM16_PCCTL_OSHTWTH3,		4
	.EQU	EPWM16_PCCTL_OSHTWTH2,		3
	.EQU	EPWM16_PCCTL_OSHTWTH1,		2
	.EQU	EPWM16_PCCTL_OSHTWTH0,		1
	.EQU	EPWM16_PCCTL_CHPEN,		0
//  register-------------------------------------
	.EQU	EPWM16_PXASCTL,	0x40002E30
//  0x4000 2E30  EPWM16_PXASCTL   Bits-------------------------------------
	.EQU	EPWM16_PXASCTL_PXRSEN,		8
	.EQU	EPWM16_PXASCTL_PXSSA1,		7
	.EQU	EPWM16_PXASCTL_PXSSA0,		6
	.EQU	EPWM16_PXASCTL_PXSSB1,		5
	.EQU	EPWM16_PXASCTL_PXSSB0,		4
	.EQU	EPWM16_PXASCTL_PXASE,		3
	.EQU	EPWM16_PXASCTL_PXASS2,		2
	.EQU	EPWM16_PXASCTL_PXASS1,		1
	.EQU	EPWM16_PXASCTL_PXASS0,		0
//  register-------------------------------------
	.EQU	EPWM16_ETCTL,	0x40002E34
//  0x4000 2E34  EPWM16_ETCTL   Bits-------------------------------------
	.EQU	EPWM16_ETCTL_BTSEL1,		25
	.EQU	EPWM16_ETCTL_BTSEL0,		24
	.EQU	EPWM16_ETCTL_BT1,		23
	.EQU	EPWM16_ETCTL_BT0,		22
	.EQU	EPWM16_ETCTL_BPP1,		21
	.EQU	EPWM16_ETCTL_BPP0,		20
	.EQU	EPWM16_ETCTL_FRCB,		19
	.EQU	EPWM16_ETCTL_SELB1,		18
	.EQU	EPWM16_ETCTL_SELB0,		17
	.EQU	EPWM16_ETCTL_TOADENB,		16
	.EQU	EPWM16_ETCTL_ATSEL1,		9
	.EQU	EPWM16_ETCTL_ATSEL0,		8
	.EQU	EPWM16_ETCTL_AT1,		7
	.EQU	EPWM16_ETCTL_AT0,		6
	.EQU	EPWM16_ETCTL_APP1,		5
	.EQU	EPWM16_ETCTL_APP0,		4
	.EQU	EPWM16_ETCTL_FRCA,		3
	.EQU	EPWM16_ETCTL_SELA1,		2
	.EQU	EPWM16_ETCTL_SELA0,		1
	.EQU	EPWM16_ETCTL_TOADENA,		0
//  register-------------------------------------
	.EQU	EPWM16_IE,		0x40002E38
//  0x4000 2E38  EPWM16_IE   Bits-------------------------------------
	.EQU	EPWM16_IE_TXDIE,		8
	.EQU	EPWM16_IE_TXCIE,		7
	.EQU	EPWM16_IE_TXAIE,		6
	.EQU	EPWM16_IE_TXBIE,		5
	.EQU	EPWM16_IE_TXIE,		4
	.EQU	EPWM16_IE_TXUIE,		3
	.EQU	EPWM16_IE_TXGIE,		2
	.EQU	EPWM16_IE_TXTIE1,		1
	.EQU	EPWM16_IE_TXTIE0,		0
//  register-------------------------------------
	.EQU	EPWM16_IF,		0x40002E3C
//  0x4000 2E3C  EPWM16_IF   Bits-------------------------------------
	.EQU	EPWM16_IF_TXDIF,		8
	.EQU	EPWM16_IF_TXCIF,		7
	.EQU	EPWM16_IF_TXAIF,		6
	.EQU	EPWM16_IF_TXBIF,		5
	.EQU	EPWM16_IF_TXIF,		4
	.EQU	EPWM16_IF_TXUIF,		3
	.EQU	EPWM16_IF_TXGIF,		2
	.EQU	EPWM16_IF_TXTIF1,		1
	.EQU	EPWM16_IF_TXTIF0,		0
//  register-------------------------------------
	.EQU	EPWM16_IC,		0x40002E40
//  0x4000 2E40  EPWM16_IC   Bits-------------------------------------
	.EQU	EPWM16_IC_TXDIC,		8
	.EQU	EPWM16_IC_TXCIC,		7
	.EQU	EPWM16_IC_TXAIC,		6
	.EQU	EPWM16_IC_TXBIC,		5
	.EQU	EPWM16_IC_TXIC,		4
	.EQU	EPWM16_IC_TXUIC,		3
	.EQU	EPWM16_IC_TXGIC,		2
	.EQU	EPWM16_IC_TXTIC1,		1
	.EQU	EPWM16_IC_TXTIC0,		0
//  register-------------------------------------
	.EQU	EPWM16_DE,		0x40002E44
//  0x4000 2E44  EPWM16_DE   Bits-------------------------------------
	.EQU	EPWM16_DE_TXDDE,		8
	.EQU	EPWM16_DE_TXCDE,		7
	.EQU	EPWM16_DE_TXADE,		6
	.EQU	EPWM16_DE_TXBDE,		5
	.EQU	EPWM16_DE_TXDE,		4
	.EQU	EPWM16_DE_TXUDE,		3
	.EQU	EPWM16_DE_TXGDE,		2
	.EQU	EPWM16_DE_TXTDE1,		1
	.EQU	EPWM16_DE_TXTDE0,		0
//  register-------------------------------------
	.EQU	EPWM16_DF,		0x40002E48
//  0x4000 2E48  EPWM16_DF   Bits-------------------------------------
	.EQU	EPWM16_DF_TXDDF,		8
	.EQU	EPWM16_DF_TXCDF,		7
	.EQU	EPWM16_DF_TXADF,		6
	.EQU	EPWM16_DF_TXBDF,		5
	.EQU	EPWM16_DF_TXDF,		4
	.EQU	EPWM16_DF_TXUDF,		3
	.EQU	EPWM16_DF_TXGDF,		2
	.EQU	EPWM16_DF_TXTDF1,		1
	.EQU	EPWM16_DF_TXTDF0,		0
//  register-------------------------------------
	.EQU	EPWM16_HRPWMCTL,	0x40002E50
//  0x4000 2E50  EPWM16_HRPWMCTL   Bits-------------------------------------
	.EQU	EPWM16_HRPWMCTL_HRPOUTB,		1
	.EQU	EPWM16_HRPWMCTL_HRPEN,		0
//  register-------------------------------------
	.EQU	EPWM16_HRCMP,	0x40002E54
//  0x4000 2E54  EPWM16_HRCMP   Bits-------------------------------------
	.EQU	EPWM16_HRCMP_HRCMP7,		7
	.EQU	EPWM16_HRCMP_HRCMP6,		6
	.EQU	EPWM16_HRCMP_HRCMP5,		5
	.EQU	EPWM16_HRCMP_HRCMP4,		4
	.EQU	EPWM16_HRCMP_HRCMP3,		3
	.EQU	EPWM16_HRCMP_HRCMP2,		2
	.EQU	EPWM16_HRCMP_HRCMP1,		1
	.EQU	EPWM16_HRCMP_HRCMP0,		0
//  register-------------------------------------
	.EQU	EPWM16_CAP,	0x40002E58
//  0x4000 2E58  EPWM16_CAP   Bits-------------------------------------
	.EQU	EPWM16_CAP_CAP31,		31
	.EQU	EPWM16_CAP_CAP30,		30
	.EQU	EPWM16_CAP_CAP29,		29
	.EQU	EPWM16_CAP_CAP28,		28
	.EQU	EPWM16_CAP_CAP27,		27
	.EQU	EPWM16_CAP_CAP26,		26
	.EQU	EPWM16_CAP_CAP25,		25
	.EQU	EPWM16_CAP_CAP24,		24
	.EQU	EPWM16_CAP_CAP23,		23
	.EQU	EPWM16_CAP_CAP22,		22
	.EQU	EPWM16_CAP_CAP21,		21
	.EQU	EPWM16_CAP_CAP20,		20
	.EQU	EPWM16_CAP_CAP19,		19
	.EQU	EPWM16_CAP_CAP18,		18
	.EQU	EPWM16_CAP_CAP17,		17
	.EQU	EPWM16_CAP_CAP16,		16
	.EQU	EPWM16_CAP_CAP15,		15
	.EQU	EPWM16_CAP_CAP14,		14
	.EQU	EPWM16_CAP_CAP13,		13
	.EQU	EPWM16_CAP_CAP12,		12
	.EQU	EPWM16_CAP_CAP11,		11
	.EQU	EPWM16_CAP_CAP10,		10
	.EQU	EPWM16_CAP_CAP9,		9
	.EQU	EPWM16_CAP_CAP8,		8
	.EQU	EPWM16_CAP_CAP7,		7
	.EQU	EPWM16_CAP_CAP6,		6
	.EQU	EPWM16_CAP_CAP5,		5
	.EQU	EPWM16_CAP_CAP4,		4
	.EQU	EPWM16_CAP_CAP3,		3
	.EQU	EPWM16_CAP_CAP2,		2
	.EQU	EPWM16_CAP_CAP1,		1
	.EQU	EPWM16_CAP_CAP0,		0
//  register-------------------------------------
	.EQU	 EPWM16_RC,	0x40002E5C
//  0x4000 2E5C   EPWM16_RC   Bits-------------------------------------
	.EQU	 EPWM16_RC_EPWMRC31,		31
	.EQU	 EPWM16_RC_EPWMRC30,		30
	.EQU	 EPWM16_RC_EPWMRC29,		29
	.EQU	 EPWM16_RC_EPWMRC28,		28
	.EQU	 EPWM16_RC_EPWMRC27,		27
	.EQU	 EPWM16_RC_EPWMRC26,		26
	.EQU	 EPWM16_RC_EPWMRC25,		25
	.EQU	 EPWM16_RC_EPWMRC24,		24
	.EQU	 EPWM16_RC_EPWMRC23,		23
	.EQU	 EPWM16_RC_EPWMRC22,		22
	.EQU	 EPWM16_RC_EPWMRC21,		21
	.EQU	 EPWM16_RC_EPWMRC20,		20
	.EQU	 EPWM16_RC_EPWMRC19,		19
	.EQU	 EPWM16_RC_EPWMRC18,		18
	.EQU	 EPWM16_RC_EPWMRC17,		17
	.EQU	 EPWM16_RC_EPWMRC16,		16
	.EQU	 EPWM16_RC_EPWMRC15,		15
	.EQU	 EPWM16_RC_EPWMRC14,		14
	.EQU	 EPWM16_RC_EPWMRC13,		13
	.EQU	 EPWM16_RC_EPWMRC12,		12
	.EQU	 EPWM16_RC_EPWMRC11,		11
	.EQU	 EPWM16_RC_EPWMRC10,		10
	.EQU	 EPWM16_RC_EPWMRC9,		9
	.EQU	 EPWM16_RC_EPWMRC8,		8
	.EQU	 EPWM16_RC_EPWMRC7,		7
	.EQU	 EPWM16_RC_EPWMRC6,		6
	.EQU	 EPWM16_RC_EPWMRC5,		5
	.EQU	 EPWM16_RC_EPWMRC4,		4
	.EQU	 EPWM16_RC_EPWMRC3,		3
	.EQU	 EPWM16_RC_EPWMRC2,		2
	.EQU	 EPWM16_RC_EPWMRC1,		1
	.EQU	 EPWM16_RC_EPWMRC0,		0
//  register-------------------------------------
	.EQU	EPWM16_RD,		0x40002E60
//  0x4000 2E60  EPWM16_RD   Bits-------------------------------------
	.EQU	EPWM16_RD_EPWMRD31,		31
	.EQU	EPWM16_RD_EPWMRD30,		30
	.EQU	EPWM16_RD_EPWMRD29,		29
	.EQU	EPWM16_RD_EPWMRD28,		28
	.EQU	EPWM16_RD_EPWMRD27,		27
	.EQU	EPWM16_RD_EPWMRD26,		26
	.EQU	EPWM16_RD_EPWMRD25,		25
	.EQU	EPWM16_RD_EPWMRD24,		24
	.EQU	EPWM16_RD_EPWMRD23,		23
	.EQU	EPWM16_RD_EPWMRD22,		22
	.EQU	EPWM16_RD_EPWMRD21,		21
	.EQU	EPWM16_RD_EPWMRD20,		20
	.EQU	EPWM16_RD_EPWMRD19,		19
	.EQU	EPWM16_RD_EPWMRD18,		18
	.EQU	EPWM16_RD_EPWMRD17,		17
	.EQU	EPWM16_RD_EPWMRD16,		16
	.EQU	EPWM16_RD_EPWMRD15,		15
	.EQU	EPWM16_RD_EPWMRD14,		14
	.EQU	EPWM16_RD_EPWMRD13,		13
	.EQU	EPWM16_RD_EPWMRD12,		12
	.EQU	EPWM16_RD_EPWMRD11,		11
	.EQU	EPWM16_RD_EPWMRD10,		10
	.EQU	EPWM16_RD_EPWMRD9,		9
	.EQU	EPWM16_RD_EPWMRD8,		8
	.EQU	EPWM16_RD_EPWMRD7,		7
	.EQU	EPWM16_RD_EPWMRD6,		6
	.EQU	EPWM16_RD_EPWMRD5,		5
	.EQU	EPWM16_RD_EPWMRD4,		4
	.EQU	EPWM16_RD_EPWMRD3,		3
	.EQU	EPWM16_RD_EPWMRD2,		2
	.EQU	EPWM16_RD_EPWMRD1,		1
	.EQU	EPWM16_RD_EPWMRD0,		0
//  register-------------------------------------
	.EQU	EPWM16_UDCTL,	0x40002E64
//  0x4000 2E64  EPWM16_UDCTL   Bits-------------------------------------
	.EQU	EPWM16_UDCTL_GBUDEN,		27
	.EQU	EPWM16_UDCTL_HRPUDSEL1,		26
	.EQU	EPWM16_UDCTL_HRPUDSEL0,		25
	.EQU	EPWM16_UDCTL_HRPUDEN,		24
	.EQU	EPWM16_UDCTL_EBUDSEL1,		23
	.EQU	EPWM16_UDCTL_EBUDSEL0,		22
	.EQU	EPWM16_UDCTL_EBUDEN,		21
	.EQU	EPWM16_UDCTL_EAUDSEL1,		20
	.EQU	EPWM16_UDCTL_EAUDSEL0,		19
	.EQU	EPWM16_UDCTL_EAUDEN,		18
	.EQU	EPWM16_UDCTL_CMDUDSEL1,		17
	.EQU	EPWM16_UDCTL_CMDUDSEL0,		16
	.EQU	EPWM16_UDCTL_CMDUDEN,		15
	.EQU	EPWM16_UDCTL_CMCUDSEL1,		14
	.EQU	EPWM16_UDCTL_CMCUDSEL0,		13
	.EQU	EPWM16_UDCTL_CMCUDEN,		12
	.EQU	EPWM16_UDCTL_CMBUDSEL1,		11
	.EQU	EPWM16_UDCTL_CMBUDSEL0,		10
	.EQU	EPWM16_UDCTL_CMBUDEN,		9
	.EQU	EPWM16_UDCTL_CMAUDSEL1,		8
	.EQU	EPWM16_UDCTL_CMAUDSEL0,		7
	.EQU	EPWM16_UDCTL_CMAUDEN,		6
	.EQU	EPWM16_UDCTL_PRUDSEL1,		5
	.EQU	EPWM16_UDCTL_PRUDSEL0,		4
	.EQU	EPWM16_UDCTL_PRUDEN,		3
	.EQU	EPWM16_UDCTL_PPUDSEL1,		2
	.EQU	EPWM16_UDCTL_PPUDSEL0,		1
	.EQU	EPWM16_UDCTL_PPUDEN,		0
//  register-------------------------------------
	.EQU	HC0_CTL,		0x40002400
//  0x4000 2400  HC0_CTL   Bits-------------------------------------
	.EQU	HC0_CTL_CLKSEL1,		6
	.EQU	HC0_CTL_CLKSEL0,		5
	.EQU	HC0_CTL_SOFTRESET,		4
	.EQU	HC0_CTL_OVERINTE,		3
	.EQU	HC0_CTL_FALLINTE,		2
	.EQU	HC0_CTL_RISEINTE,		1
	.EQU	HC0_CTL_HCINSEL,		0
//  register-------------------------------------
	.EQU	HC0_COUNTER,	0x40002404
//  0x4000 2404  HC0_COUNTER   Bits-------------------------------------
	.EQU	HC0_COUNTER_COUNTERSR15,		31
	.EQU	HC0_COUNTER_COUNTERSR14,		30
	.EQU	HC0_COUNTER_COUNTERSR13,		29
	.EQU	HC0_COUNTER_COUNTERSR12,		28
	.EQU	HC0_COUNTER_COUNTERSR11,		27
	.EQU	HC0_COUNTER_COUNTERSR10,		26
	.EQU	HC0_COUNTER_COUNTERSR9,		25
	.EQU	HC0_COUNTER_COUNTERSR8,		24
	.EQU	HC0_COUNTER_COUNTERSR7,		23
	.EQU	HC0_COUNTER_COUNTERSR6,		22
	.EQU	HC0_COUNTER_COUNTERSR5,		21
	.EQU	HC0_COUNTER_COUNTERSR4,		20
	.EQU	HC0_COUNTER_COUNTERSR3,		19
	.EQU	HC0_COUNTER_COUNTERSR2,		18
	.EQU	HC0_COUNTER_COUNTERSR1,		17
	.EQU	HC0_COUNTER_COUNTERSR0,		16
	.EQU	HC0_COUNTER_COUNTER15,		15
	.EQU	HC0_COUNTER_COUNTER14,		14
	.EQU	HC0_COUNTER_COUNTER13,		13
	.EQU	HC0_COUNTER_COUNTER12,		12
	.EQU	HC0_COUNTER_COUNTER11,		11
	.EQU	HC0_COUNTER_COUNTER10,		10
	.EQU	HC0_COUNTER_COUNTER9,		9
	.EQU	HC0_COUNTER_COUNTER8,		8
	.EQU	HC0_COUNTER_COUNTER7,		7
	.EQU	HC0_COUNTER_COUNTER6,		6
	.EQU	HC0_COUNTER_COUNTER5,		5
	.EQU	HC0_COUNTER_COUNTER4,		4
	.EQU	HC0_COUNTER_COUNTER3,		3
	.EQU	HC0_COUNTER_COUNTER2,		2
	.EQU	HC0_COUNTER_COUNTER1,		1
	.EQU	HC0_COUNTER_COUNTER0,		0
//  register-------------------------------------
	.EQU	HC0_RISE0,		0x40002408
//  0x4000 2408  HC0_RISE0   Bits-------------------------------------
	.EQU	HC0_RISE0_RISE0_15,		15
	.EQU	HC0_RISE0_RISE0_14,		14
	.EQU	HC0_RISE0_RISE0_13,		13
	.EQU	HC0_RISE0_RISE0_12,		12
	.EQU	HC0_RISE0_RISE0_11,		11
	.EQU	HC0_RISE0_RISE0_10,		10
	.EQU	HC0_RISE0_RISE0_9,		9
	.EQU	HC0_RISE0_RISE0_8,		8
	.EQU	HC0_RISE0_RISE0_7,		7
	.EQU	HC0_RISE0_RISE0_6,		6
	.EQU	HC0_RISE0_RISE0_5,		5
	.EQU	HC0_RISE0_RISE0_4,		4
	.EQU	HC0_RISE0_RISE0_3,		3
	.EQU	HC0_RISE0_RISE0_2,		2
	.EQU	HC0_RISE0_RISE0_1,		1
	.EQU	HC0_RISE0_RISE0_0,		0
//  register-------------------------------------
	.EQU	HC0_RISE1,		0x4000240C
//  0x4000 240C  HC0_RISE1   Bits-------------------------------------
	.EQU	HC0_RISE1_RISE1_15,		15
	.EQU	HC0_RISE1_RISE1_14,		14
	.EQU	HC0_RISE1_RISE1_13,		13
	.EQU	HC0_RISE1_RISE1_12,		12
	.EQU	HC0_RISE1_RISE1_11,		11
	.EQU	HC0_RISE1_RISE1_10,		10
	.EQU	HC0_RISE1_RISE1_9,		9
	.EQU	HC0_RISE1_RISE1_8,		8
	.EQU	HC0_RISE1_RISE1_7,		7
	.EQU	HC0_RISE1_RISE1_6,		6
	.EQU	HC0_RISE1_RISE1_5,		5
	.EQU	HC0_RISE1_RISE1_4,		4
	.EQU	HC0_RISE1_RISE1_3,		3
	.EQU	HC0_RISE1_RISE1_2,		2
	.EQU	HC0_RISE1_RISE1_1,		1
	.EQU	HC0_RISE1_RISE1_0,		0
//  register-------------------------------------
	.EQU	HC0_FALL0,		0x40002410
//  0x4000 2410  HC0_FALL0   Bits-------------------------------------
	.EQU	HC0_FALL0_FALL0_15,		15
	.EQU	HC0_FALL0_FALL0_14,		14
	.EQU	HC0_FALL0_FALL0_13,		13
	.EQU	HC0_FALL0_FALL0_12,		12
	.EQU	HC0_FALL0_FALL0_11,		11
	.EQU	HC0_FALL0_FALL0_10,		10
	.EQU	HC0_FALL0_FALL0_9,		9
	.EQU	HC0_FALL0_FALL0_8,		8
	.EQU	HC0_FALL0_FALL0_7,		7
	.EQU	HC0_FALL0_FALL0_6,		6
	.EQU	HC0_FALL0_FALL0_5,		5
	.EQU	HC0_FALL0_FALL0_4,		4
	.EQU	HC0_FALL0_FALL0_3,		3
	.EQU	HC0_FALL0_FALL0_2,		2
	.EQU	HC0_FALL0_FALL0_1,		1
	.EQU	HC0_FALL0_FALL0_0,		0
//  register-------------------------------------
	.EQU	HC0_FALL1,		0x40002414
//  0x4000 2414  HC0_FALL1   Bits-------------------------------------
	.EQU	HC0_FALL1_FALL1_15,		15
	.EQU	HC0_FALL1_FALL1_14,		14
	.EQU	HC0_FALL1_FALL1_13,		13
	.EQU	HC0_FALL1_FALL1_12,		12
	.EQU	HC0_FALL1_FALL1_11,		11
	.EQU	HC0_FALL1_FALL1_10,		10
	.EQU	HC0_FALL1_FALL1_9,		9
	.EQU	HC0_FALL1_FALL1_8,		8
	.EQU	HC0_FALL1_FALL1_7,		7
	.EQU	HC0_FALL1_FALL1_6,		6
	.EQU	HC0_FALL1_FALL1_5,		5
	.EQU	HC0_FALL1_FALL1_4,		4
	.EQU	HC0_FALL1_FALL1_3,		3
	.EQU	HC0_FALL1_FALL1_2,		2
	.EQU	HC0_FALL1_FALL1_1,		1
	.EQU	HC0_FALL1_FALL1_0,		0
//  register-------------------------------------
	.EQU	HC0_HRRISE0,	0x40002418
//  0x4000 2418  HC0_HRRISE0   Bits-------------------------------------
	.EQU	HC0_HRRISE0_HRRISE0_15,		15
	.EQU	HC0_HRRISE0_HRRISE0_14,		14
	.EQU	HC0_HRRISE0_HRRISE0_13,		13
	.EQU	HC0_HRRISE0_HRRISE0_12,		12
	.EQU	HC0_HRRISE0_HRRISE0_11,		11
	.EQU	HC0_HRRISE0_HRRISE0_10,		10
	.EQU	HC0_HRRISE0_HRRISE0_9,		9
	.EQU	HC0_HRRISE0_HRRISE0_8,		8
	.EQU	HC0_HRRISE0_HRRISE0_7,		7
	.EQU	HC0_HRRISE0_HRRISE0_6,		6
	.EQU	HC0_HRRISE0_HRRISE0_5,		5
	.EQU	HC0_HRRISE0_HRRISE0_4,		4
	.EQU	HC0_HRRISE0_HRRISE0_3,		3
	.EQU	HC0_HRRISE0_HRRISE0_2,		2
	.EQU	HC0_HRRISE0_HRRISE0_1,		1
	.EQU	HC0_HRRISE0_HRRISE0_0,		0
//  register-------------------------------------
	.EQU	HC0_HRRISE1,	0x4000241C
//  0x4000 241C  HC0_HRRISE1   Bits-------------------------------------
	.EQU	HC0_HRRISE1_HRRISE1_15,		15
	.EQU	HC0_HRRISE1_HRRISE1_14,		14
	.EQU	HC0_HRRISE1_HRRISE1_13,		13
	.EQU	HC0_HRRISE1_HRRISE1_12,		12
	.EQU	HC0_HRRISE1_HRRISE1_11,		11
	.EQU	HC0_HRRISE1_HRRISE1_10,		10
	.EQU	HC0_HRRISE1_HRRISE1_9,		9
	.EQU	HC0_HRRISE1_HRRISE1_8,		8
	.EQU	HC0_HRRISE1_HRRISE1_7,		7
	.EQU	HC0_HRRISE1_HRRISE1_6,		6
	.EQU	HC0_HRRISE1_HRRISE1_5,		5
	.EQU	HC0_HRRISE1_HRRISE1_4,		4
	.EQU	HC0_HRRISE1_HRRISE1_3,		3
	.EQU	HC0_HRRISE1_HRRISE1_2,		2
	.EQU	HC0_HRRISE1_HRRISE1_1,		1
	.EQU	HC0_HRRISE1_HRRISE1_0,		0
//  register-------------------------------------
	.EQU	HC0_HRFALL0,	0x40002420
//  0x4000 2420  HC0_HRFALL0   Bits-------------------------------------
	.EQU	HC0_HRFALL0_HRFALL0_15,		15
	.EQU	HC0_HRFALL0_HRFALL0_14,		14
	.EQU	HC0_HRFALL0_HRFALL0_13,		13
	.EQU	HC0_HRFALL0_HRFALL0_12,		12
	.EQU	HC0_HRFALL0_HRFALL0_11,		11
	.EQU	HC0_HRFALL0_HRFALL0_10,		10
	.EQU	HC0_HRFALL0_HRFALL0_9,		9
	.EQU	HC0_HRFALL0_HRFALL0_8,		8
	.EQU	HC0_HRFALL0_HRFALL0_7,		7
	.EQU	HC0_HRFALL0_HRFALL0_6,		6
	.EQU	HC0_HRFALL0_HRFALL0_5,		5
	.EQU	HC0_HRFALL0_HRFALL0_4,		4
	.EQU	HC0_HRFALL0_HRFALL0_3,		3
	.EQU	HC0_HRFALL0_HRFALL0_2,		2
	.EQU	HC0_HRFALL0_HRFALL0_1,		1
	.EQU	HC0_HRFALL0_HRFALL0_0,		0
//  register-------------------------------------
	.EQU	HC0_HRFALL1,	0x40002424
//  0x4000 2424  HC0_HRFALL1   Bits-------------------------------------
	.EQU	HC0_HRFALL1_HRFALL1_15,		15
	.EQU	HC0_HRFALL1_HRFALL1_14,		14
	.EQU	HC0_HRFALL1_HRFALL1_13,		13
	.EQU	HC0_HRFALL1_HRFALL1_12,		12
	.EQU	HC0_HRFALL1_HRFALL1_11,		11
	.EQU	HC0_HRFALL1_HRFALL1_10,		10
	.EQU	HC0_HRFALL1_HRFALL1_9,		9
	.EQU	HC0_HRFALL1_HRFALL1_8,		8
	.EQU	HC0_HRFALL1_HRFALL1_7,		7
	.EQU	HC0_HRFALL1_HRFALL1_6,		6
	.EQU	HC0_HRFALL1_HRFALL1_5,		5
	.EQU	HC0_HRFALL1_HRFALL1_4,		4
	.EQU	HC0_HRFALL1_HRFALL1_3,		3
	.EQU	HC0_HRFALL1_HRFALL1_2,		2
	.EQU	HC0_HRFALL1_HRFALL1_1,		1
	.EQU	HC0_HRFALL1_HRFALL1_0,		0
//  register-------------------------------------
	.EQU	HC0_SR,			0x40002428
//  0x4000 2428  HC0_SR   Bits-------------------------------------
	.EQU	HC0_SR_RISEOVF,		4
	.EQU	HC0_SR_COUNTEROVF,		3
	.EQU	HC0_SR_FALLIF,		2
	.EQU	HC0_SR_RISEIF,		1
//  register-------------------------------------
	.EQU	HC0_SRIC,		0x4000242C
//  0x4000 242C  HC0_SRIC   Bits-------------------------------------
	.EQU	HC0_SRIC_RISEOVC,		4
	.EQU	HC0_SRIC_COUNTEROVC,		3
	.EQU	HC0_SRIC_FALLIC,		2
	.EQU	HC0_SRIC_RISEIC,		1
//  register-------------------------------------
	.EQU	HC0_IFRC,		0x40002430
//  0x4000 2430  HC0_IFRC   Bits-------------------------------------
	.EQU	HC0_IFRC_COUNTEROVFRC,		3
	.EQU	HC0_IFRC_FALLIFRC,		2
	.EQU	HC0_IFRC_RISEIFRC,		1
//  register-------------------------------------
	.EQU	HC1_CTL,		0x40002480
//  0x4000 2480  HC1_CTL   Bits-------------------------------------
	.EQU	HC1_CTL_CLKSEL1,		6
	.EQU	HC1_CTL_CLKSEL0,		5
	.EQU	HC1_CTL_SOFTRESET,		4
	.EQU	HC1_CTL_OVERINTE,		3
	.EQU	HC1_CTL_FALLINTE,		2
	.EQU	HC1_CTL_RISEINTE,		1
	.EQU	HC1_CTL_HCINSEL,		0
//  register-------------------------------------
	.EQU	HC1_COUNTER,	0x40002484
//  0x4000 2484  HC1_COUNTER   Bits-------------------------------------
	.EQU	HC1_COUNTER_COUNTERSR15,		31
	.EQU	HC1_COUNTER_COUNTERSR14,		30
	.EQU	HC1_COUNTER_COUNTERSR13,		29
	.EQU	HC1_COUNTER_COUNTERSR12,		28
	.EQU	HC1_COUNTER_COUNTERSR11,		27
	.EQU	HC1_COUNTER_COUNTERSR10,		26
	.EQU	HC1_COUNTER_COUNTERSR9,		25
	.EQU	HC1_COUNTER_COUNTERSR8,		24
	.EQU	HC1_COUNTER_COUNTERSR7,		23
	.EQU	HC1_COUNTER_COUNTERSR6,		22
	.EQU	HC1_COUNTER_COUNTERSR5,		21
	.EQU	HC1_COUNTER_COUNTERSR4,		20
	.EQU	HC1_COUNTER_COUNTERSR3,		19
	.EQU	HC1_COUNTER_COUNTERSR2,		18
	.EQU	HC1_COUNTER_COUNTERSR1,		17
	.EQU	HC1_COUNTER_COUNTERSR0,		16
	.EQU	HC1_COUNTER_COUNTER15,		15
	.EQU	HC1_COUNTER_COUNTER14,		14
	.EQU	HC1_COUNTER_COUNTER13,		13
	.EQU	HC1_COUNTER_COUNTER12,		12
	.EQU	HC1_COUNTER_COUNTER11,		11
	.EQU	HC1_COUNTER_COUNTER10,		10
	.EQU	HC1_COUNTER_COUNTER9,		9
	.EQU	HC1_COUNTER_COUNTER8,		8
	.EQU	HC1_COUNTER_COUNTER7,		7
	.EQU	HC1_COUNTER_COUNTER6,		6
	.EQU	HC1_COUNTER_COUNTER5,		5
	.EQU	HC1_COUNTER_COUNTER4,		4
	.EQU	HC1_COUNTER_COUNTER3,		3
	.EQU	HC1_COUNTER_COUNTER2,		2
	.EQU	HC1_COUNTER_COUNTER1,		1
	.EQU	HC1_COUNTER_COUNTER0,		0
//  register-------------------------------------
	.EQU	HC1_RISE0,		0x40002488
//  0x4000 2488  HC1_RISE0   Bits-------------------------------------
	.EQU	HC1_RISE0_RISE0_15,		15
	.EQU	HC1_RISE0_RISE0_14,		14
	.EQU	HC1_RISE0_RISE0_13,		13
	.EQU	HC1_RISE0_RISE0_12,		12
	.EQU	HC1_RISE0_RISE0_11,		11
	.EQU	HC1_RISE0_RISE0_10,		10
	.EQU	HC1_RISE0_RISE0_9,		9
	.EQU	HC1_RISE0_RISE0_8,		8
	.EQU	HC1_RISE0_RISE0_7,		7
	.EQU	HC1_RISE0_RISE0_6,		6
	.EQU	HC1_RISE0_RISE0_5,		5
	.EQU	HC1_RISE0_RISE0_4,		4
	.EQU	HC1_RISE0_RISE0_3,		3
	.EQU	HC1_RISE0_RISE0_2,		2
	.EQU	HC1_RISE0_RISE0_1,		1
	.EQU	HC1_RISE0_RISE0_0,		0
//  register-------------------------------------
	.EQU	HC1_RISE1,		0x4000248C
//  0x4000 248C  HC1_RISE1   Bits-------------------------------------
	.EQU	HC1_RISE1_RISE1_15,		15
	.EQU	HC1_RISE1_RISE1_14,		14
	.EQU	HC1_RISE1_RISE1_13,		13
	.EQU	HC1_RISE1_RISE1_12,		12
	.EQU	HC1_RISE1_RISE1_11,		11
	.EQU	HC1_RISE1_RISE1_10,		10
	.EQU	HC1_RISE1_RISE1_9,		9
	.EQU	HC1_RISE1_RISE1_8,		8
	.EQU	HC1_RISE1_RISE1_7,		7
	.EQU	HC1_RISE1_RISE1_6,		6
	.EQU	HC1_RISE1_RISE1_5,		5
	.EQU	HC1_RISE1_RISE1_4,		4
	.EQU	HC1_RISE1_RISE1_3,		3
	.EQU	HC1_RISE1_RISE1_2,		2
	.EQU	HC1_RISE1_RISE1_1,		1
	.EQU	HC1_RISE1_RISE1_0,		0
//  register-------------------------------------
	.EQU	HC1_FALL0,		0x40002490
//  0x4000 2490  HC1_FALL0   Bits-------------------------------------
	.EQU	HC1_FALL0_FALL0_15,		15
	.EQU	HC1_FALL0_FALL0_14,		14
	.EQU	HC1_FALL0_FALL0_13,		13
	.EQU	HC1_FALL0_FALL0_12,		12
	.EQU	HC1_FALL0_FALL0_11,		11
	.EQU	HC1_FALL0_FALL0_10,		10
	.EQU	HC1_FALL0_FALL0_9,		9
	.EQU	HC1_FALL0_FALL0_8,		8
	.EQU	HC1_FALL0_FALL0_7,		7
	.EQU	HC1_FALL0_FALL0_6,		6
	.EQU	HC1_FALL0_FALL0_5,		5
	.EQU	HC1_FALL0_FALL0_4,		4
	.EQU	HC1_FALL0_FALL0_3,		3
	.EQU	HC1_FALL0_FALL0_2,		2
	.EQU	HC1_FALL0_FALL0_1,		1
	.EQU	HC1_FALL0_FALL0_0,		0
//  register-------------------------------------
	.EQU	HC1_FALL1,		0x40002494
//  0x4000 2494  HC1_FALL1   Bits-------------------------------------
	.EQU	HC1_FALL1_FALL1_15,		15
	.EQU	HC1_FALL1_FALL1_14,		14
	.EQU	HC1_FALL1_FALL1_13,		13
	.EQU	HC1_FALL1_FALL1_12,		12
	.EQU	HC1_FALL1_FALL1_11,		11
	.EQU	HC1_FALL1_FALL1_10,		10
	.EQU	HC1_FALL1_FALL1_9,		9
	.EQU	HC1_FALL1_FALL1_8,		8
	.EQU	HC1_FALL1_FALL1_7,		7
	.EQU	HC1_FALL1_FALL1_6,		6
	.EQU	HC1_FALL1_FALL1_5,		5
	.EQU	HC1_FALL1_FALL1_4,		4
	.EQU	HC1_FALL1_FALL1_3,		3
	.EQU	HC1_FALL1_FALL1_2,		2
	.EQU	HC1_FALL1_FALL1_1,		1
	.EQU	HC1_FALL1_FALL1_0,		0
//  register-------------------------------------
	.EQU	HC1_HRRISE0,	0x40002498
//  0x4000 2498  HC1_HRRISE0   Bits-------------------------------------
	.EQU	HC1_HRRISE0_HRRISE0_15,		15
	.EQU	HC1_HRRISE0_HRRISE0_14,		14
	.EQU	HC1_HRRISE0_HRRISE0_13,		13
	.EQU	HC1_HRRISE0_HRRISE0_12,		12
	.EQU	HC1_HRRISE0_HRRISE0_11,		11
	.EQU	HC1_HRRISE0_HRRISE0_10,		10
	.EQU	HC1_HRRISE0_HRRISE0_9,		9
	.EQU	HC1_HRRISE0_HRRISE0_8,		8
	.EQU	HC1_HRRISE0_HRRISE0_7,		7
	.EQU	HC1_HRRISE0_HRRISE0_6,		6
	.EQU	HC1_HRRISE0_HRRISE0_5,		5
	.EQU	HC1_HRRISE0_HRRISE0_4,		4
	.EQU	HC1_HRRISE0_HRRISE0_3,		3
	.EQU	HC1_HRRISE0_HRRISE0_2,		2
	.EQU	HC1_HRRISE0_HRRISE0_1,		1
	.EQU	HC1_HRRISE0_HRRISE0_0,		0
//  register-------------------------------------
	.EQU	HC1_HRRISE1,	0x4000249C
//  0x4000 249C  HC1_HRRISE1   Bits-------------------------------------
	.EQU	HC1_HRRISE1_HRRISE1_15,		15
	.EQU	HC1_HRRISE1_HRRISE1_14,		14
	.EQU	HC1_HRRISE1_HRRISE1_13,		13
	.EQU	HC1_HRRISE1_HRRISE1_12,		12
	.EQU	HC1_HRRISE1_HRRISE1_11,		11
	.EQU	HC1_HRRISE1_HRRISE1_10,		10
	.EQU	HC1_HRRISE1_HRRISE1_9,		9
	.EQU	HC1_HRRISE1_HRRISE1_8,		8
	.EQU	HC1_HRRISE1_HRRISE1_7,		7
	.EQU	HC1_HRRISE1_HRRISE1_6,		6
	.EQU	HC1_HRRISE1_HRRISE1_5,		5
	.EQU	HC1_HRRISE1_HRRISE1_4,		4
	.EQU	HC1_HRRISE1_HRRISE1_3,		3
	.EQU	HC1_HRRISE1_HRRISE1_2,		2
	.EQU	HC1_HRRISE1_HRRISE1_1,		1
	.EQU	HC1_HRRISE1_HRRISE1_0,		0
//  register-------------------------------------
	.EQU	HC1_HRFALL0,	0x400024A0
//  0x4000 24A0  HC1_HRFALL0   Bits-------------------------------------
	.EQU	HC1_HRFALL0_HRFALL0_15,		15
	.EQU	HC1_HRFALL0_HRFALL0_14,		14
	.EQU	HC1_HRFALL0_HRFALL0_13,		13
	.EQU	HC1_HRFALL0_HRFALL0_12,		12
	.EQU	HC1_HRFALL0_HRFALL0_11,		11
	.EQU	HC1_HRFALL0_HRFALL0_10,		10
	.EQU	HC1_HRFALL0_HRFALL0_9,		9
	.EQU	HC1_HRFALL0_HRFALL0_8,		8
	.EQU	HC1_HRFALL0_HRFALL0_7,		7
	.EQU	HC1_HRFALL0_HRFALL0_6,		6
	.EQU	HC1_HRFALL0_HRFALL0_5,		5
	.EQU	HC1_HRFALL0_HRFALL0_4,		4
	.EQU	HC1_HRFALL0_HRFALL0_3,		3
	.EQU	HC1_HRFALL0_HRFALL0_2,		2
	.EQU	HC1_HRFALL0_HRFALL0_1,		1
	.EQU	HC1_HRFALL0_HRFALL0_0,		0
//  register-------------------------------------
	.EQU	HC1_HRFALL1,	0x400024A4
//  0x4000 24A4  HC1_HRFALL1   Bits-------------------------------------
	.EQU	HC1_HRFALL1_HRFALL1_15,		15
	.EQU	HC1_HRFALL1_HRFALL1_14,		14
	.EQU	HC1_HRFALL1_HRFALL1_13,		13
	.EQU	HC1_HRFALL1_HRFALL1_12,		12
	.EQU	HC1_HRFALL1_HRFALL1_11,		11
	.EQU	HC1_HRFALL1_HRFALL1_10,		10
	.EQU	HC1_HRFALL1_HRFALL1_9,		9
	.EQU	HC1_HRFALL1_HRFALL1_8,		8
	.EQU	HC1_HRFALL1_HRFALL1_7,		7
	.EQU	HC1_HRFALL1_HRFALL1_6,		6
	.EQU	HC1_HRFALL1_HRFALL1_5,		5
	.EQU	HC1_HRFALL1_HRFALL1_4,		4
	.EQU	HC1_HRFALL1_HRFALL1_3,		3
	.EQU	HC1_HRFALL1_HRFALL1_2,		2
	.EQU	HC1_HRFALL1_HRFALL1_1,		1
	.EQU	HC1_HRFALL1_HRFALL1_0,		0
//  register-------------------------------------
	.EQU	HC1_SR,			0x400024A8
//  0x4000 24A8  HC1_SR   Bits-------------------------------------
	.EQU	HC1_SR_RISEOVF,		4
	.EQU	HC1_SR_COUNTEROVF,		3
	.EQU	HC1_SR_FALLIF,		2
	.EQU	HC1_SR_RISEIF,		1
//  register-------------------------------------
	.EQU	HC1_SRIC,		0x400024AC
//  0x4000 24AC  HC1_SRIC   Bits-------------------------------------
	.EQU	HC1_SRIC_RISEOVC,		4
	.EQU	HC1_SRIC_COUNTEROVC,		3
	.EQU	HC1_SRIC_FALLIC,		2
	.EQU	HC1_SRIC_RISEIC,		1
//  register-------------------------------------
	.EQU	HC1_IFRC,		0x400024B0
//  0x4000 24B0  HC1_IFRC   Bits-------------------------------------
	.EQU	HC1_IFRC_COUNTEROVFRC,		3
	.EQU	HC1_IFRC_FALLIFRC,		2
	.EQU	HC1_IFRC_RISEIFRC,		1
//  register-------------------------------------
	.EQU	HC2_CTL,		0x40002500
//  0x4000 2500  HC2_CTL   Bits-------------------------------------
	.EQU	HC2_CTL_CLKSEL1,		6
	.EQU	HC2_CTL_CLKSEL0,		5
	.EQU	HC2_CTL_SOFTRESET,		4
	.EQU	HC2_CTL_OVERINTE,		3
	.EQU	HC2_CTL_FALLINTE,		2
	.EQU	HC2_CTL_RISEINTE,		1
	.EQU	HC2_CTL_HCINSEL,		0
//  register-------------------------------------
	.EQU	HC2_COUNTER,	0x40002504
//  0x4000 2504  HC2_COUNTER   Bits-------------------------------------
	.EQU	HC2_COUNTER_COUNTERSR15,		31
	.EQU	HC2_COUNTER_COUNTERSR14,		30
	.EQU	HC2_COUNTER_COUNTERSR13,		29
	.EQU	HC2_COUNTER_COUNTERSR12,		28
	.EQU	HC2_COUNTER_COUNTERSR11,		27
	.EQU	HC2_COUNTER_COUNTERSR10,		26
	.EQU	HC2_COUNTER_COUNTERSR9,		25
	.EQU	HC2_COUNTER_COUNTERSR8,		24
	.EQU	HC2_COUNTER_COUNTERSR7,		23
	.EQU	HC2_COUNTER_COUNTERSR6,		22
	.EQU	HC2_COUNTER_COUNTERSR5,		21
	.EQU	HC2_COUNTER_COUNTERSR4,		20
	.EQU	HC2_COUNTER_COUNTERSR3,		19
	.EQU	HC2_COUNTER_COUNTERSR2,		18
	.EQU	HC2_COUNTER_COUNTERSR1,		17
	.EQU	HC2_COUNTER_COUNTERSR0,		16
	.EQU	HC2_COUNTER_COUNTER15,		15
	.EQU	HC2_COUNTER_COUNTER14,		14
	.EQU	HC2_COUNTER_COUNTER13,		13
	.EQU	HC2_COUNTER_COUNTER12,		12
	.EQU	HC2_COUNTER_COUNTER11,		11
	.EQU	HC2_COUNTER_COUNTER10,		10
	.EQU	HC2_COUNTER_COUNTER9,		9
	.EQU	HC2_COUNTER_COUNTER8,		8
	.EQU	HC2_COUNTER_COUNTER7,		7
	.EQU	HC2_COUNTER_COUNTER6,		6
	.EQU	HC2_COUNTER_COUNTER5,		5
	.EQU	HC2_COUNTER_COUNTER4,		4
	.EQU	HC2_COUNTER_COUNTER3,		3
	.EQU	HC2_COUNTER_COUNTER2,		2
	.EQU	HC2_COUNTER_COUNTER1,		1
	.EQU	HC2_COUNTER_COUNTER0,		0
//  register-------------------------------------
	.EQU	HC2_RISE0,		0x40002508
//  0x4000 2508  HC2_RISE0   Bits-------------------------------------
	.EQU	HC2_RISE0_RISE0_15,		15
	.EQU	HC2_RISE0_RISE0_14,		14
	.EQU	HC2_RISE0_RISE0_13,		13
	.EQU	HC2_RISE0_RISE0_12,		12
	.EQU	HC2_RISE0_RISE0_11,		11
	.EQU	HC2_RISE0_RISE0_10,		10
	.EQU	HC2_RISE0_RISE0_9,		9
	.EQU	HC2_RISE0_RISE0_8,		8
	.EQU	HC2_RISE0_RISE0_7,		7
	.EQU	HC2_RISE0_RISE0_6,		6
	.EQU	HC2_RISE0_RISE0_5,		5
	.EQU	HC2_RISE0_RISE0_4,		4
	.EQU	HC2_RISE0_RISE0_3,		3
	.EQU	HC2_RISE0_RISE0_2,		2
	.EQU	HC2_RISE0_RISE0_1,		1
	.EQU	HC2_RISE0_RISE0_0,		0
//  register-------------------------------------
	.EQU	HC2_RISE1,		0x4000250C
//  0x4000 250C  HC2_RISE1   Bits-------------------------------------
	.EQU	HC2_RISE1_RISE1_15,		15
	.EQU	HC2_RISE1_RISE1_14,		14
	.EQU	HC2_RISE1_RISE1_13,		13
	.EQU	HC2_RISE1_RISE1_12,		12
	.EQU	HC2_RISE1_RISE1_11,		11
	.EQU	HC2_RISE1_RISE1_10,		10
	.EQU	HC2_RISE1_RISE1_9,		9
	.EQU	HC2_RISE1_RISE1_8,		8
	.EQU	HC2_RISE1_RISE1_7,		7
	.EQU	HC2_RISE1_RISE1_6,		6
	.EQU	HC2_RISE1_RISE1_5,		5
	.EQU	HC2_RISE1_RISE1_4,		4
	.EQU	HC2_RISE1_RISE1_3,		3
	.EQU	HC2_RISE1_RISE1_2,		2
	.EQU	HC2_RISE1_RISE1_1,		1
	.EQU	HC2_RISE1_RISE1_0,		0
//  register-------------------------------------
	.EQU	HC2_FALL0,		0x40002510
//  0x4000 2510  HC2_FALL0   Bits-------------------------------------
	.EQU	HC2_FALL0_FALL0_15,		15
	.EQU	HC2_FALL0_FALL0_14,		14
	.EQU	HC2_FALL0_FALL0_13,		13
	.EQU	HC2_FALL0_FALL0_12,		12
	.EQU	HC2_FALL0_FALL0_11,		11
	.EQU	HC2_FALL0_FALL0_10,		10
	.EQU	HC2_FALL0_FALL0_9,		9
	.EQU	HC2_FALL0_FALL0_8,		8
	.EQU	HC2_FALL0_FALL0_7,		7
	.EQU	HC2_FALL0_FALL0_6,		6
	.EQU	HC2_FALL0_FALL0_5,		5
	.EQU	HC2_FALL0_FALL0_4,		4
	.EQU	HC2_FALL0_FALL0_3,		3
	.EQU	HC2_FALL0_FALL0_2,		2
	.EQU	HC2_FALL0_FALL0_1,		1
	.EQU	HC2_FALL0_FALL0_0,		0
//  register-------------------------------------
	.EQU	HC2_FALL1,		0x40002514
//  0x4000 2514  HC2_FALL1   Bits-------------------------------------
	.EQU	HC2_FALL1_FALL1_15,		15
	.EQU	HC2_FALL1_FALL1_14,		14
	.EQU	HC2_FALL1_FALL1_13,		13
	.EQU	HC2_FALL1_FALL1_12,		12
	.EQU	HC2_FALL1_FALL1_11,		11
	.EQU	HC2_FALL1_FALL1_10,		10
	.EQU	HC2_FALL1_FALL1_9,		9
	.EQU	HC2_FALL1_FALL1_8,		8
	.EQU	HC2_FALL1_FALL1_7,		7
	.EQU	HC2_FALL1_FALL1_6,		6
	.EQU	HC2_FALL1_FALL1_5,		5
	.EQU	HC2_FALL1_FALL1_4,		4
	.EQU	HC2_FALL1_FALL1_3,		3
	.EQU	HC2_FALL1_FALL1_2,		2
	.EQU	HC2_FALL1_FALL1_1,		1
	.EQU	HC2_FALL1_FALL1_0,		0
//  register-------------------------------------
	.EQU	HC2_HRRISE0,	0x40002518
//  0x4000 2518  HC2_HRRISE0   Bits-------------------------------------
	.EQU	HC2_HRRISE0_HRRISE0_15,		15
	.EQU	HC2_HRRISE0_HRRISE0_14,		14
	.EQU	HC2_HRRISE0_HRRISE0_13,		13
	.EQU	HC2_HRRISE0_HRRISE0_12,		12
	.EQU	HC2_HRRISE0_HRRISE0_11,		11
	.EQU	HC2_HRRISE0_HRRISE0_10,		10
	.EQU	HC2_HRRISE0_HRRISE0_9,		9
	.EQU	HC2_HRRISE0_HRRISE0_8,		8
	.EQU	HC2_HRRISE0_HRRISE0_7,		7
	.EQU	HC2_HRRISE0_HRRISE0_6,		6
	.EQU	HC2_HRRISE0_HRRISE0_5,		5
	.EQU	HC2_HRRISE0_HRRISE0_4,		4
	.EQU	HC2_HRRISE0_HRRISE0_3,		3
	.EQU	HC2_HRRISE0_HRRISE0_2,		2
	.EQU	HC2_HRRISE0_HRRISE0_1,		1
	.EQU	HC2_HRRISE0_HRRISE0_0,		0
//  register-------------------------------------
	.EQU	HC2_HRRISE1,	0x4000251C
//  0x4000 251C  HC2_HRRISE1   Bits-------------------------------------
	.EQU	HC2_HRRISE1_HRRISE1_15,		15
	.EQU	HC2_HRRISE1_HRRISE1_14,		14
	.EQU	HC2_HRRISE1_HRRISE1_13,		13
	.EQU	HC2_HRRISE1_HRRISE1_12,		12
	.EQU	HC2_HRRISE1_HRRISE1_11,		11
	.EQU	HC2_HRRISE1_HRRISE1_10,		10
	.EQU	HC2_HRRISE1_HRRISE1_9,		9
	.EQU	HC2_HRRISE1_HRRISE1_8,		8
	.EQU	HC2_HRRISE1_HRRISE1_7,		7
	.EQU	HC2_HRRISE1_HRRISE1_6,		6
	.EQU	HC2_HRRISE1_HRRISE1_5,		5
	.EQU	HC2_HRRISE1_HRRISE1_4,		4
	.EQU	HC2_HRRISE1_HRRISE1_3,		3
	.EQU	HC2_HRRISE1_HRRISE1_2,		2
	.EQU	HC2_HRRISE1_HRRISE1_1,		1
	.EQU	HC2_HRRISE1_HRRISE1_0,		0
//  register-------------------------------------
	.EQU	HC2_HRFALL0,	0x40002520
//  0x4000 2520  HC2_HRFALL0   Bits-------------------------------------
	.EQU	HC2_HRFALL0_HRFALL0_15,		15
	.EQU	HC2_HRFALL0_HRFALL0_14,		14
	.EQU	HC2_HRFALL0_HRFALL0_13,		13
	.EQU	HC2_HRFALL0_HRFALL0_12,		12
	.EQU	HC2_HRFALL0_HRFALL0_11,		11
	.EQU	HC2_HRFALL0_HRFALL0_10,		10
	.EQU	HC2_HRFALL0_HRFALL0_9,		9
	.EQU	HC2_HRFALL0_HRFALL0_8,		8
	.EQU	HC2_HRFALL0_HRFALL0_7,		7
	.EQU	HC2_HRFALL0_HRFALL0_6,		6
	.EQU	HC2_HRFALL0_HRFALL0_5,		5
	.EQU	HC2_HRFALL0_HRFALL0_4,		4
	.EQU	HC2_HRFALL0_HRFALL0_3,		3
	.EQU	HC2_HRFALL0_HRFALL0_2,		2
	.EQU	HC2_HRFALL0_HRFALL0_1,		1
	.EQU	HC2_HRFALL0_HRFALL0_0,		0
//  register-------------------------------------
	.EQU	HC2_HRFALL1,	0x40002524
//  0x4000 2524  HC2_HRFALL1   Bits-------------------------------------
	.EQU	HC2_HRFALL1_HRFALL1_15,		15
	.EQU	HC2_HRFALL1_HRFALL1_14,		14
	.EQU	HC2_HRFALL1_HRFALL1_13,		13
	.EQU	HC2_HRFALL1_HRFALL1_12,		12
	.EQU	HC2_HRFALL1_HRFALL1_11,		11
	.EQU	HC2_HRFALL1_HRFALL1_10,		10
	.EQU	HC2_HRFALL1_HRFALL1_9,		9
	.EQU	HC2_HRFALL1_HRFALL1_8,		8
	.EQU	HC2_HRFALL1_HRFALL1_7,		7
	.EQU	HC2_HRFALL1_HRFALL1_6,		6
	.EQU	HC2_HRFALL1_HRFALL1_5,		5
	.EQU	HC2_HRFALL1_HRFALL1_4,		4
	.EQU	HC2_HRFALL1_HRFALL1_3,		3
	.EQU	HC2_HRFALL1_HRFALL1_2,		2
	.EQU	HC2_HRFALL1_HRFALL1_1,		1
	.EQU	HC2_HRFALL1_HRFALL1_0,		0
//  register-------------------------------------
	.EQU	HC2_SR,			0x40002528
//  0x4000 2528  HC2_SR   Bits-------------------------------------
	.EQU	HC2_SR_RISEOVF,		4
	.EQU	HC2_SR_COUNTEROVF,		3
	.EQU	HC2_SR_FALLIF,		2
	.EQU	HC2_SR_RISEIF,		1
//  register-------------------------------------
	.EQU	HC2_SRIC,		0x4000252C
//  0x4000 252C  HC2_SRIC   Bits-------------------------------------
	.EQU	HC2_SRIC_RISEOVC,		4
	.EQU	HC2_SRIC_COUNTEROVC,		3
	.EQU	HC2_SRIC_FALLIC,		2
	.EQU	HC2_SRIC_RISEIC,		1
//  register-------------------------------------
	.EQU	HC2_IFRC,		0x40002530
//  0x4000 2530  HC2_IFRC   Bits-------------------------------------
	.EQU	HC2_IFRC_COUNTEROVFRC,		3
	.EQU	HC2_IFRC_FALLIFRC,		2
	.EQU	HC2_IFRC_RISEIFRC,		1
//  register-------------------------------------
	.EQU	RNG_CTL,		0x40002F80
//  0x4000 2F80  RNG_CTL   Bits-------------------------------------
	.EQU	RNG_CTL_RECEN,		13
	.EQU	RNG_CTL_HIPOW,		12
	.EQU	RNG_CTL_TSEEDGO,		9
	.EQU	RNG_CTL_TSEEDEN,		8
	.EQU	RNG_CTL_CLKDIV3,		7
	.EQU	RNG_CTL_CLKDIV2,		6
	.EQU	RNG_CTL_CLKDIV1,		5
	.EQU	RNG_CTL_CLKDIV0,		4
	.EQU	RNG_CTL_CLKS1,		3
	.EQU	RNG_CTL_CLKS0,		2
	.EQU	RNG_CTL_RNGSEL,		1
	.EQU	RNG_CTL_RNGEN,		0
//  register-------------------------------------
	.EQU	RNG_STATE,		0x40002F84
//  0x4000 2F84  RNG_STATE   Bits-------------------------------------
	.EQU	RNG_STATE_DEIS,		15
	.EQU	RNG_STATE_HSPD1,		13
	.EQU	RNG_STATE_HSPD0,		12
	.EQU	RNG_STATE_TSRIE,		10
	.EQU	RNG_STATE_DRIE,		9
	.EQU	RNG_STATE_DEIE,		8
	.EQU	RNG_STATE_TSRIC,		6
	.EQU	RNG_STATE_DRIC,		5
	.EQU	RNG_STATE_DEIC,		4
	.EQU	RNG_STATE_TSRIF,		2
	.EQU	RNG_STATE_DRIF,		1
	.EQU	RNG_STATE_DEIF,		0
//  register-------------------------------------
	.EQU	RNG_SEED,		0x40002F88
//  0x4000 2F88  RNG_SEED   Bits-------------------------------------
	.EQU	RNG_SEED_SEED31,		15
	.EQU	RNG_SEED_SEED30,		14
	.EQU	RNG_SEED_SEED29,		13
	.EQU	RNG_SEED_SEED28,		12
	.EQU	RNG_SEED_SEED27,		11
	.EQU	RNG_SEED_SEED26,		10
	.EQU	RNG_SEED_SEED25,		9
	.EQU	RNG_SEED_SEED24,		8
	.EQU	RNG_SEED_SEED23,		7
	.EQU	RNG_SEED_SEED22,		6
	.EQU	RNG_SEED_SEED21,		5
	.EQU	RNG_SEED_SEED20,		4
	.EQU	RNG_SEED_SEED19,		3
	.EQU	RNG_SEED_SEED18,		2
	.EQU	RNG_SEED_SEED17,		1
	.EQU	RNG_SEED_SEED16,		0
	.EQU	RNG_SEED_SEED15,		-1
	.EQU	RNG_SEED_SEED14,		-2
	.EQU	RNG_SEED_SEED13,		-3
	.EQU	RNG_SEED_SEED12,		-4
	.EQU	RNG_SEED_SEED11,		-5
	.EQU	RNG_SEED_SEED10,		-6
	.EQU	RNG_SEED_SEED9,		-7
	.EQU	RNG_SEED_SEED8,		-8
	.EQU	RNG_SEED_SEED7,		-9
	.EQU	RNG_SEED_SEED6,		-10
	.EQU	RNG_SEED_SEED5,		-11
	.EQU	RNG_SEED_SEED4,		-12
	.EQU	RNG_SEED_SEED3,		-13
	.EQU	RNG_SEED_SEED2,		-14
	.EQU	RNG_SEED_SEED1,		-15
	.EQU	RNG_SEED_SEED0,		-16
//  register-------------------------------------
	.EQU	RNG_DR,			0x40002F8C
//  0x4000 2F8C  RNG_DR   Bits-------------------------------------
	.EQU	RNG_DR_DR31,			31
	.EQU	RNG_DR_DR30,			30
	.EQU	RNG_DR_DR29,			29
	.EQU	RNG_DR_DR28,			28
	.EQU	RNG_DR_DR27,			27
	.EQU	RNG_DR_DR26,			26
	.EQU	RNG_DR_DR25,			25
	.EQU	RNG_DR_DR24,			24
	.EQU	RNG_DR_DR23,			23
	.EQU	RNG_DR_DR22,			22
	.EQU	RNG_DR_DR21,			21
	.EQU	RNG_DR_DR20,			20
	.EQU	RNG_DR_DR19,			19
	.EQU	RNG_DR_DR18,			18
	.EQU	RNG_DR_DR17,			17
	.EQU	RNG_DR_DR16,			16
	.EQU	RNG_DR_DR15,			15
	.EQU	RNG_DR_DR14,			14
	.EQU	RNG_DR_DR13,			13
	.EQU	RNG_DR_DR12,			12
	.EQU	RNG_DR_DR11,			11
	.EQU	RNG_DR_DR10,			10
	.EQU	RNG_DR_DR9,			9
	.EQU	RNG_DR_DR8,			8
	.EQU	RNG_DR_DR7,			7
	.EQU	RNG_DR_DR6,			6
	.EQU	RNG_DR_DR5,			5
	.EQU	RNG_DR_DR4,			4
	.EQU	RNG_DR_DR3,			3
	.EQU	RNG_DR_DR2,			2
	.EQU	RNG_DR_DR1,			1
	.EQU	RNG_DR_DR0,			0
//  register-------------------------------------
	.EQU	T18_CNT,		0x40001A80
//  0x4000 1A80  T18_CNT   Bits-------------------------------------
	.EQU	T18_CNT_TXCNT15,		15
	.EQU	T18_CNT_TXCNT14,		14
	.EQU	T18_CNT_TXCNT13,		13
	.EQU	T18_CNT_TXCNT12,		12
	.EQU	T18_CNT_TXCNT11,		11
	.EQU	T18_CNT_TXCNT10,		10
	.EQU	T18_CNT_TXCNT9,		9
	.EQU	T18_CNT_TXCNT8,		8
	.EQU	T18_CNT_TXCNT7,		7
	.EQU	T18_CNT_TXCNT6,		6
	.EQU	T18_CNT_TXCNT5,		5
	.EQU	T18_CNT_TXCNT4,		4
	.EQU	T18_CNT_TXCNT3,		3
	.EQU	T18_CNT_TXCNT2,		2
	.EQU	T18_CNT_TXCNT1,		1
	.EQU	T18_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T18_CTL1,		0x40001A84
//  0x4000 1A84  T18_CTL1   Bits-------------------------------------
	.EQU	T18_CTL1_TXIF,		13
	.EQU	T18_CTL1_TXIE,		12
	.EQU	T18_CTL1_TXCMS2,		10
	.EQU	T18_CTL1_TXCMS1,		9
	.EQU	T18_CTL1_TXCMS0,		8
	.EQU	T18_CTL1_TXDIR,		7
	.EQU	T18_CTL1_TXCLK1,		6
	.EQU	T18_CTL1_TXCLK0,		5
	.EQU	T18_CTL1_TXSY,		3
	.EQU	T18_CTL1_TXCS,		1
	.EQU	T18_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T18_CTL2,		0x40001A88
//  0x4000 1A88  T18_CTL2   Bits-------------------------------------
	.EQU	T18_CTL2_TRGSEL1,		15
	.EQU	T18_CTL2_TRGSEL0,		14
	.EQU	T18_CTL2_TXUR,		13
	.EQU	T18_CTL2_TXMSSYNC,		12
	.EQU	T18_CTL2_TXTS3,		11
	.EQU	T18_CTL2_TXTS2,		10
	.EQU	T18_CTL2_TXTS1,		9
	.EQU	T18_CTL2_TXTS0,		8
	.EQU	T18_CTL2_TXSMS2,		7
	.EQU	T18_CTL2_TXSMS1,		6
	.EQU	T18_CTL2_TXSMS0,		5
	.EQU	T18_CTL2_TXMMS2,		4
	.EQU	T18_CTL2_TXMMS1,		3
	.EQU	T18_CTL2_TXMMS0,		2
	.EQU	T18_CTL2_TXUDEVT,		1
	.EQU	T18_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T18_PRSC,		0x40001A8C
//  0x4000 1A8C  T18_PRSC   Bits-------------------------------------
	.EQU	T18_PRSC_TXCKS15,		15
	.EQU	T18_PRSC_TXCKS14,		14
	.EQU	T18_PRSC_TXCKS13,		13
	.EQU	T18_PRSC_TXCKS12,		12
	.EQU	T18_PRSC_TXCKS11,		11
	.EQU	T18_PRSC_TXCKS10,		10
	.EQU	T18_PRSC_TXCKS9,		9
	.EQU	T18_PRSC_TXCKS8,		8
	.EQU	T18_PRSC_TXCKS7,		7
	.EQU	T18_PRSC_TXCKS6,		6
	.EQU	T18_PRSC_TXCKS5,		5
	.EQU	T18_PRSC_TXCKS4,		4
	.EQU	T18_PRSC_TXCKS3,		3
	.EQU	T18_PRSC_TXCKS2,		2
	.EQU	T18_PRSC_TXCKS1,		1
	.EQU	T18_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T18_PPX,		0x40001A90
//  0x4000 1A90  T18_PPX   Bits-------------------------------------
	.EQU	T18_PPX_PPX15,		15
	.EQU	T18_PPX_PPX14,		14
	.EQU	T18_PPX_PPX13,		13
	.EQU	T18_PPX_PPX12,		12
	.EQU	T18_PPX_PPX11,		11
	.EQU	T18_PPX_PPX10,		10
	.EQU	T18_PPX_PPX9,		9
	.EQU	T18_PPX_PPX8,		8
	.EQU	T18_PPX_PPX7,		7
	.EQU	T18_PPX_PPX6,		6
	.EQU	T18_PPX_PPX5,		5
	.EQU	T18_PPX_PPX4,		4
	.EQU	T18_PPX_PPX3,		3
	.EQU	T18_PPX_PPX2,		2
	.EQU	T18_PPX_PPX1,		1
	.EQU	T18_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T18_UDTIMx,	0x40001A94
//  0x4000 1A94  T18_UDTIMx   Bits-------------------------------------
	.EQU	T18_UDTIMx_TXUD7,		7
	.EQU	T18_UDTIMx_TXUD6,		6
	.EQU	T18_UDTIMx_TXUD5,		5
	.EQU	T18_UDTIMx_TXUD4,		4
	.EQU	T18_UDTIMx_TXUD3,		3
	.EQU	T18_UDTIMx_TXUD2,		2
	.EQU	T18_UDTIMx_TXUD1,		1
	.EQU	T18_UDTIMx_TXUD0,		0
//  register-------------------------------------
	.EQU	CCP18_C1,		0x40001AA0
//  0x4000 1AA0  CCP18_C1   Bits-------------------------------------
	.EQU	CCP18_C1_CCPXCY15,		15
	.EQU	CCP18_C1_CCPXCY14,		14
	.EQU	CCP18_C1_CCPXCY13,		13
	.EQU	CCP18_C1_CCPXCY12,		12
	.EQU	CCP18_C1_CCPXCY11,		11
	.EQU	CCP18_C1_CCPXCY10,		10
	.EQU	CCP18_C1_CCPXCY9,		9
	.EQU	CCP18_C1_CCPXCY8,		8
	.EQU	CCP18_C1_CCPXCY7,		7
	.EQU	CCP18_C1_CCPXCY6,		6
	.EQU	CCP18_C1_CCPXCY5,		5
	.EQU	CCP18_C1_CCPXCY4,		4
	.EQU	CCP18_C1_CCPXCY3,		3
	.EQU	CCP18_C1_CCPXCY2,		2
	.EQU	CCP18_C1_CCPXCY1,		1
	.EQU	CCP18_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP18_C2,		0x40001AA4
//  0x4000 1AA4  CCP18_C2   Bits-------------------------------------
	.EQU	CCP18_C2_CCPXCY15,		15
	.EQU	CCP18_C2_CCPXCY14,		14
	.EQU	CCP18_C2_CCPXCY13,		13
	.EQU	CCP18_C2_CCPXCY12,		12
	.EQU	CCP18_C2_CCPXCY11,		11
	.EQU	CCP18_C2_CCPXCY10,		10
	.EQU	CCP18_C2_CCPXCY9,		9
	.EQU	CCP18_C2_CCPXCY8,		8
	.EQU	CCP18_C2_CCPXCY7,		7
	.EQU	CCP18_C2_CCPXCY6,		6
	.EQU	CCP18_C2_CCPXCY5,		5
	.EQU	CCP18_C2_CCPXCY4,		4
	.EQU	CCP18_C2_CCPXCY3,		3
	.EQU	CCP18_C2_CCPXCY2,		2
	.EQU	CCP18_C2_CCPXCY1,		1
	.EQU	CCP18_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP18_C3,		0x40001AA8
//  0x4000 1AA8  CCP18_C3   Bits-------------------------------------
	.EQU	CCP18_C3_CCPXCY15,		15
	.EQU	CCP18_C3_CCPXCY14,		14
	.EQU	CCP18_C3_CCPXCY13,		13
	.EQU	CCP18_C3_CCPXCY12,		12
	.EQU	CCP18_C3_CCPXCY11,		11
	.EQU	CCP18_C3_CCPXCY10,		10
	.EQU	CCP18_C3_CCPXCY9,		9
	.EQU	CCP18_C3_CCPXCY8,		8
	.EQU	CCP18_C3_CCPXCY7,		7
	.EQU	CCP18_C3_CCPXCY6,		6
	.EQU	CCP18_C3_CCPXCY5,		5
	.EQU	CCP18_C3_CCPXCY4,		4
	.EQU	CCP18_C3_CCPXCY3,		3
	.EQU	CCP18_C3_CCPXCY2,		2
	.EQU	CCP18_C3_CCPXCY1,		1
	.EQU	CCP18_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP18_C4,		0x40001AAC
//  0x4000 1AAC  CCP18_C4   Bits-------------------------------------
	.EQU	CCP18_C4_CCPXCY15,		15
	.EQU	CCP18_C4_CCPXCY14,		14
	.EQU	CCP18_C4_CCPXCY13,		13
	.EQU	CCP18_C4_CCPXCY12,		12
	.EQU	CCP18_C4_CCPXCY11,		11
	.EQU	CCP18_C4_CCPXCY10,		10
	.EQU	CCP18_C4_CCPXCY9,		9
	.EQU	CCP18_C4_CCPXCY8,		8
	.EQU	CCP18_C4_CCPXCY7,		7
	.EQU	CCP18_C4_CCPXCY6,		6
	.EQU	CCP18_C4_CCPXCY5,		5
	.EQU	CCP18_C4_CCPXCY4,		4
	.EQU	CCP18_C4_CCPXCY3,		3
	.EQU	CCP18_C4_CCPXCY2,		2
	.EQU	CCP18_C4_CCPXCY1,		1
	.EQU	CCP18_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP18_SRIC,	0x40001AB0
//  0x4000 1AB0  CCP18_SRIC   Bits-------------------------------------
	.EQU	CCP18_SRIC_TXIC,		6
	.EQU	CCP18_SRIC_TXUIC,		5
	.EQU	CCP18_SRIC_TXTIC,		4
	.EQU	CCP18_SRIC_CC4IC,		3
	.EQU	CCP18_SRIC_CC3IC,		2
	.EQU	CCP18_SRIC_CC2IC,		1
	.EQU	CCP18_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP18_DF,		0x40001AB4
//  0x4000 1AB4  CCP18_DF   Bits-------------------------------------
	.EQU	CCP18_DF_TXUDF,		5
	.EQU	CCP18_DF_TXTDF,		4
	.EQU	CCP18_DF_CC4DF,		3
	.EQU	CCP18_DF_CC3DF,		2
	.EQU	CCP18_DF_CC2DF,		1
	.EQU	CCP18_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP18_CTL1,	0x40001AC0
//  0x4000 1AC0  CCP18_CTL1   Bits-------------------------------------
	.EQU	CCP18_CTL1_CH4M3,		15
	.EQU	CCP18_CTL1_CH4M2,		14
	.EQU	CCP18_CTL1_CH4M1,		13
	.EQU	CCP18_CTL1_CH4M0,		12
	.EQU	CCP18_CTL1_CH3M3,		11
	.EQU	CCP18_CTL1_CH3M2,		10
	.EQU	CCP18_CTL1_CH3M1,		9
	.EQU	CCP18_CTL1_CH3M0,		8
	.EQU	CCP18_CTL1_CH2M3,		7
	.EQU	CCP18_CTL1_CH2M2,		6
	.EQU	CCP18_CTL1_CH2M1,		5
	.EQU	CCP18_CTL1_CH2M0,		4
	.EQU	CCP18_CTL1_CH1M3,		3
	.EQU	CCP18_CTL1_CH1M2,		2
	.EQU	CCP18_CTL1_CH1M1,		1
	.EQU	CCP18_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP18_R1,		0x40001AC4
//  0x4000 1AC4  CCP18_R1   Bits-------------------------------------
	.EQU	CCP18_R1_CCPXRY15,		15
	.EQU	CCP18_R1_CCPXRY14,		14
	.EQU	CCP18_R1_CCPXRY13,		13
	.EQU	CCP18_R1_CCPXRY12,		12
	.EQU	CCP18_R1_CCPXRY11,		11
	.EQU	CCP18_R1_CCPXRY10,		10
	.EQU	CCP18_R1_CCPXRY9,		9
	.EQU	CCP18_R1_CCPXRY8,		8
	.EQU	CCP18_R1_CCPXRY7,		7
	.EQU	CCP18_R1_CCPXRY6,		6
	.EQU	CCP18_R1_CCPXRY5,		5
	.EQU	CCP18_R1_CCPXRY4,		4
	.EQU	CCP18_R1_CCPXRY3,		3
	.EQU	CCP18_R1_CCPXRY2,		2
	.EQU	CCP18_R1_CCPXRY1,		1
	.EQU	CCP18_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP18_R2,		0x40001AC8
//  0x4000 1AC8  CCP18_R2   Bits-------------------------------------
	.EQU	CCP18_R2_CCPXRY15,		15
	.EQU	CCP18_R2_CCPXRY14,		14
	.EQU	CCP18_R2_CCPXRY13,		13
	.EQU	CCP18_R2_CCPXRY12,		12
	.EQU	CCP18_R2_CCPXRY11,		11
	.EQU	CCP18_R2_CCPXRY10,		10
	.EQU	CCP18_R2_CCPXRY9,		9
	.EQU	CCP18_R2_CCPXRY8,		8
	.EQU	CCP18_R2_CCPXRY7,		7
	.EQU	CCP18_R2_CCPXRY6,		6
	.EQU	CCP18_R2_CCPXRY5,		5
	.EQU	CCP18_R2_CCPXRY4,		4
	.EQU	CCP18_R2_CCPXRY3,		3
	.EQU	CCP18_R2_CCPXRY2,		2
	.EQU	CCP18_R2_CCPXRY1,		1
	.EQU	CCP18_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP18_R3,		0x40001ACC
//  0x4000 1ACC  CCP18_R3   Bits-------------------------------------
	.EQU	CCP18_R3_CCPXRY15,		15
	.EQU	CCP18_R3_CCPXRY14,		14
	.EQU	CCP18_R3_CCPXRY13,		13
	.EQU	CCP18_R3_CCPXRY12,		12
	.EQU	CCP18_R3_CCPXRY11,		11
	.EQU	CCP18_R3_CCPXRY10,		10
	.EQU	CCP18_R3_CCPXRY9,		9
	.EQU	CCP18_R3_CCPXRY8,		8
	.EQU	CCP18_R3_CCPXRY7,		7
	.EQU	CCP18_R3_CCPXRY6,		6
	.EQU	CCP18_R3_CCPXRY5,		5
	.EQU	CCP18_R3_CCPXRY4,		4
	.EQU	CCP18_R3_CCPXRY3,		3
	.EQU	CCP18_R3_CCPXRY2,		2
	.EQU	CCP18_R3_CCPXRY1,		1
	.EQU	CCP18_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP18_R4,		0x40001AD0
//  0x4000 1AD0  CCP18_R4   Bits-------------------------------------
	.EQU	CCP18_R4_CCPXRY15,		15
	.EQU	CCP18_R4_CCPXRY14,		14
	.EQU	CCP18_R4_CCPXRY13,		13
	.EQU	CCP18_R4_CCPXRY12,		12
	.EQU	CCP18_R4_CCPXRY11,		11
	.EQU	CCP18_R4_CCPXRY10,		10
	.EQU	CCP18_R4_CCPXRY9,		9
	.EQU	CCP18_R4_CCPXRY8,		8
	.EQU	CCP18_R4_CCPXRY7,		7
	.EQU	CCP18_R4_CCPXRY6,		6
	.EQU	CCP18_R4_CCPXRY5,		5
	.EQU	CCP18_R4_CCPXRY4,		4
	.EQU	CCP18_R4_CCPXRY3,		3
	.EQU	CCP18_R4_CCPXRY2,		2
	.EQU	CCP18_R4_CCPXRY1,		1
	.EQU	CCP18_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP18_CTL2,	0x40001AD4
//  0x4000 1AD4  CCP18_CTL2   Bits-------------------------------------
	.EQU	CCP18_CTL2_PXOC4CE,		15
	.EQU	CCP18_CTL2_PXOC3CE,		14
	.EQU	CCP18_CTL2_PXOC2CE,		13
	.EQU	CCP18_CTL2_PXOC1CE,		12
	.EQU	CCP18_CTL2_PXASS1,		11
	.EQU	CCP18_CTL2_PXASS0,		10
	.EQU	CCP18_CTL2_TCKSEL1,		9
	.EQU	CCP18_CTL2_TCKSEL0,		8
	.EQU	CCP18_CTL2_PXOC4_1,		7
	.EQU	CCP18_CTL2_PXOC4_0,		6
	.EQU	CCP18_CTL2_PXOC3_1,		5
	.EQU	CCP18_CTL2_PXOC3_0,		4
	.EQU	CCP18_CTL2_PXOC2_1,		3
	.EQU	CCP18_CTL2_PXOC2_0,		2
	.EQU	CCP18_CTL2_PXOC1_1,		1
	.EQU	CCP18_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP18_CTL3,	0x40001AD8
//  0x4000 1AD8  CCP18_CTL3   Bits-------------------------------------
	.EQU	CCP18_CTL3_PXSPMST,		15
	.EQU	CCP18_CTL3_PXPWMI,		14
	.EQU	CCP18_CTL3_PXXORM,		13
	.EQU	CCP18_CTL3_PXSPM,		12
	.EQU	CCP18_CTL3_TXTDE,		11
	.EQU	CCP18_CTL3_CC4DE,		10
	.EQU	CCP18_CTL3_CC3DE,		9
	.EQU	CCP18_CTL3_CC2DE,		8
	.EQU	CCP18_CTL3_CC1DE,		7
	.EQU	CCP18_CTL3_TXUDE,		6
	.EQU	CCP18_CTL3_TXUIE,		5
	.EQU	CCP18_CTL3_TXTIE,		4
	.EQU	CCP18_CTL3_CC4IE,		3
	.EQU	CCP18_CTL3_CC3IE,		2
	.EQU	CCP18_CTL3_CC2IE,		1
	.EQU	CCP18_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP18_EGIF,	0x40001ADC
//  0x4000 1ADC  CCP18_EGIF   Bits-------------------------------------
	.EQU	CCP18_EGIF_POSSEL,		13
	.EQU	CCP18_EGIF_PXSEL,		12
	.EQU	CCP18_EGIF_TXUIF,		11
	.EQU	CCP18_EGIF_TXTIF,		10
	.EQU	CCP18_EGIF_CC4IF,		9
	.EQU	CCP18_EGIF_CC3IF,		8
	.EQU	CCP18_EGIF_CC2IF,		7
	.EQU	CCP18_EGIF_CC1IF,		6
	.EQU	CCP18_EGIF_TXTRG,		5
	.EQU	CCP18_EGIF_CC4G,		4
	.EQU	CCP18_EGIF_CC3G,		3
	.EQU	CCP18_EGIF_CC2G,		2
	.EQU	CCP18_EGIF_CC1G,		1
	.EQU	CCP18_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	T19_CNT,		0x40001B00
//  0x4000 1B00  T19_CNT   Bits-------------------------------------
	.EQU	T19_CNT_TXCNT15,		15
	.EQU	T19_CNT_TXCNT14,		14
	.EQU	T19_CNT_TXCNT13,		13
	.EQU	T19_CNT_TXCNT12,		12
	.EQU	T19_CNT_TXCNT11,		11
	.EQU	T19_CNT_TXCNT10,		10
	.EQU	T19_CNT_TXCNT9,		9
	.EQU	T19_CNT_TXCNT8,		8
	.EQU	T19_CNT_TXCNT7,		7
	.EQU	T19_CNT_TXCNT6,		6
	.EQU	T19_CNT_TXCNT5,		5
	.EQU	T19_CNT_TXCNT4,		4
	.EQU	T19_CNT_TXCNT3,		3
	.EQU	T19_CNT_TXCNT2,		2
	.EQU	T19_CNT_TXCNT1,		1
	.EQU	T19_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T19_CTL1,		0x40001B04
//  0x4000 1B04  T19_CTL1   Bits-------------------------------------
	.EQU	T19_CTL1_TXIF,		13
	.EQU	T19_CTL1_TXIE,		12
	.EQU	T19_CTL1_TXCMS2,		10
	.EQU	T19_CTL1_TXCMS1,		9
	.EQU	T19_CTL1_TXCMS0,		8
	.EQU	T19_CTL1_TXDIR,		7
	.EQU	T19_CTL1_TXCLK1,		6
	.EQU	T19_CTL1_TXCLK0,		5
	.EQU	T19_CTL1_TXSY,		3
	.EQU	T19_CTL1_TXCS,		1
	.EQU	T19_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T19_CTL2,		0x40001B08
//  0x4000 1B08  T19_CTL2   Bits-------------------------------------
	.EQU	T19_CTL2_TRGRSEL1,		15
	.EQU	T19_CTL2_TRGRSEL0,		14
	.EQU	T19_CTL2_TXUR,		13
	.EQU	T19_CTL2_TXMSSYNC,		12
	.EQU	T19_CTL2_TXTS3,		11
	.EQU	T19_CTL2_TXTS2,		10
	.EQU	T19_CTL2_TXTS1,		9
	.EQU	T19_CTL2_TXTS0,		8
	.EQU	T19_CTL2_TXSMS2,		7
	.EQU	T19_CTL2_TXSMS1,		6
	.EQU	T19_CTL2_TXSMS0,		5
	.EQU	T19_CTL2_TXMMS2,		4
	.EQU	T19_CTL2_TXMMS1,		3
	.EQU	T19_CTL2_TXMMS0,		2
	.EQU	T19_CTL2_TXUDEVT,		1
	.EQU	T19_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T19_PRSC,		0x40001B0C
//  0x4000 1B0C  T19_PRSC   Bits-------------------------------------
	.EQU	T19_PRSC_TXCKS15,		15
	.EQU	T19_PRSC_TXCKS14,		14
	.EQU	T19_PRSC_TXCKS13,		13
	.EQU	T19_PRSC_TXCKS12,		12
	.EQU	T19_PRSC_TXCKS11,		11
	.EQU	T19_PRSC_TXCKS10,		10
	.EQU	T19_PRSC_TXCKS9,		9
	.EQU	T19_PRSC_TXCKS8,		8
	.EQU	T19_PRSC_TXCKS7,		7
	.EQU	T19_PRSC_TXCKS6,		6
	.EQU	T19_PRSC_TXCKS5,		5
	.EQU	T19_PRSC_TXCKS4,		4
	.EQU	T19_PRSC_TXCKS3,		3
	.EQU	T19_PRSC_TXCKS2,		2
	.EQU	T19_PRSC_TXCKS1,		1
	.EQU	T19_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T19_PPX,		0x40001B10
//  0x4000 1B10  T19_PPX   Bits-------------------------------------
	.EQU	T19_PPX_PPX15,		15
	.EQU	T19_PPX_PPX14,		14
	.EQU	T19_PPX_PPX13,		13
	.EQU	T19_PPX_PPX12,		12
	.EQU	T19_PPX_PPX11,		11
	.EQU	T19_PPX_PPX10,		10
	.EQU	T19_PPX_PPX9,		9
	.EQU	T19_PPX_PPX8,		8
	.EQU	T19_PPX_PPX7,		7
	.EQU	T19_PPX_PPX6,		6
	.EQU	T19_PPX_PPX5,		5
	.EQU	T19_PPX_PPX4,		4
	.EQU	T19_PPX_PPX3,		3
	.EQU	T19_PPX_PPX2,		2
	.EQU	T19_PPX_PPX1,		1
	.EQU	T19_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T19_UDTIMx,	0x40001B14
//  0x4000 1B14  T19_UDTIMx   Bits-------------------------------------
	.EQU	T19_UDTIMx_TXUD7,		7
	.EQU	T19_UDTIMx_TXUD6,		6
	.EQU	T19_UDTIMx_TXUD5,		5
	.EQU	T19_UDTIMx_TXUD4,		4
	.EQU	T19_UDTIMx_TXUD3,		3
	.EQU	T19_UDTIMx_TXUD2,		2
	.EQU	T19_UDTIMx_TXUD1,		1
	.EQU	T19_UDTIMx_TXUD0,		0
//  register-------------------------------------
	.EQU	CCP19_C1,		0x40001B20
//  0x4000 1B20  CCP19_C1   Bits-------------------------------------
	.EQU	CCP19_C1_CCPXCY15,		15
	.EQU	CCP19_C1_CCPXCY14,		14
	.EQU	CCP19_C1_CCPXCY13,		13
	.EQU	CCP19_C1_CCPXCY12,		12
	.EQU	CCP19_C1_CCPXCY11,		11
	.EQU	CCP19_C1_CCPXCY10,		10
	.EQU	CCP19_C1_CCPXCY9,		9
	.EQU	CCP19_C1_CCPXCY8,		8
	.EQU	CCP19_C1_CCPXCY7,		7
	.EQU	CCP19_C1_CCPXCY6,		6
	.EQU	CCP19_C1_CCPXCY5,		5
	.EQU	CCP19_C1_CCPXCY4,		4
	.EQU	CCP19_C1_CCPXCY3,		3
	.EQU	CCP19_C1_CCPXCY2,		2
	.EQU	CCP19_C1_CCPXCY1,		1
	.EQU	CCP19_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP19_C2,		0x40001B24
//  0x4000 1B24  CCP19_C2   Bits-------------------------------------
	.EQU	CCP19_C2_CCPXCY15,		15
	.EQU	CCP19_C2_CCPXCY14,		14
	.EQU	CCP19_C2_CCPXCY13,		13
	.EQU	CCP19_C2_CCPXCY12,		12
	.EQU	CCP19_C2_CCPXCY11,		11
	.EQU	CCP19_C2_CCPXCY10,		10
	.EQU	CCP19_C2_CCPXCY9,		9
	.EQU	CCP19_C2_CCPXCY8,		8
	.EQU	CCP19_C2_CCPXCY7,		7
	.EQU	CCP19_C2_CCPXCY6,		6
	.EQU	CCP19_C2_CCPXCY5,		5
	.EQU	CCP19_C2_CCPXCY4,		4
	.EQU	CCP19_C2_CCPXCY3,		3
	.EQU	CCP19_C2_CCPXCY2,		2
	.EQU	CCP19_C2_CCPXCY1,		1
	.EQU	CCP19_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP19_C3,		0x40001B28
//  0x4000 1B28  CCP19_C3   Bits-------------------------------------
	.EQU	CCP19_C3_CCPXCY15,		15
	.EQU	CCP19_C3_CCPXCY14,		14
	.EQU	CCP19_C3_CCPXCY13,		13
	.EQU	CCP19_C3_CCPXCY12,		12
	.EQU	CCP19_C3_CCPXCY11,		11
	.EQU	CCP19_C3_CCPXCY10,		10
	.EQU	CCP19_C3_CCPXCY9,		9
	.EQU	CCP19_C3_CCPXCY8,		8
	.EQU	CCP19_C3_CCPXCY7,		7
	.EQU	CCP19_C3_CCPXCY6,		6
	.EQU	CCP19_C3_CCPXCY5,		5
	.EQU	CCP19_C3_CCPXCY4,		4
	.EQU	CCP19_C3_CCPXCY3,		3
	.EQU	CCP19_C3_CCPXCY2,		2
	.EQU	CCP19_C3_CCPXCY1,		1
	.EQU	CCP19_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP19_C4,		0x40001B2C
//  0x4000 1B2C  CCP19_C4   Bits-------------------------------------
	.EQU	CCP19_C4_CCPXCY15,		15
	.EQU	CCP19_C4_CCPXCY14,		14
	.EQU	CCP19_C4_CCPXCY13,		13
	.EQU	CCP19_C4_CCPXCY12,		12
	.EQU	CCP19_C4_CCPXCY11,		11
	.EQU	CCP19_C4_CCPXCY10,		10
	.EQU	CCP19_C4_CCPXCY9,		9
	.EQU	CCP19_C4_CCPXCY8,		8
	.EQU	CCP19_C4_CCPXCY7,		7
	.EQU	CCP19_C4_CCPXCY6,		6
	.EQU	CCP19_C4_CCPXCY5,		5
	.EQU	CCP19_C4_CCPXCY4,		4
	.EQU	CCP19_C4_CCPXCY3,		3
	.EQU	CCP19_C4_CCPXCY2,		2
	.EQU	CCP19_C4_CCPXCY1,		1
	.EQU	CCP19_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP19_SRIC,	0x40001B30
//  0x4000 1B30  CCP19_SRIC   Bits-------------------------------------
	.EQU	CCP19_SRIC_TXIC,		6
	.EQU	CCP19_SRIC_TXUIC,		5
	.EQU	CCP19_SRIC_TXTIC,		4
	.EQU	CCP19_SRIC_CC4IC,		3
	.EQU	CCP19_SRIC_CC3IC,		2
	.EQU	CCP19_SRIC_CC2IC,		1
	.EQU	CCP19_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP19_DF,		0x40001B34
//  0x4000 1B34  CCP19_DF   Bits-------------------------------------
	.EQU	CCP19_DF_TXUDF,		5
	.EQU	CCP19_DF_TXTDF,		4
	.EQU	CCP19_DF_CC4DF,		3
	.EQU	CCP19_DF_CC3DF,		2
	.EQU	CCP19_DF_CC2DF,		1
	.EQU	CCP19_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP19_CTL1,	0x40001B40
//  0x4000 1B40  CCP19_CTL1   Bits-------------------------------------
	.EQU	CCP19_CTL1_CH4M3,		15
	.EQU	CCP19_CTL1_CH4M2,		14
	.EQU	CCP19_CTL1_CH4M1,		13
	.EQU	CCP19_CTL1_CH4M0,		12
	.EQU	CCP19_CTL1_CH3M3,		11
	.EQU	CCP19_CTL1_CH3M2,		10
	.EQU	CCP19_CTL1_CH3M1,		9
	.EQU	CCP19_CTL1_CH3M0,		8
	.EQU	CCP19_CTL1_CH2M3,		7
	.EQU	CCP19_CTL1_CH2M2,		6
	.EQU	CCP19_CTL1_CH2M1,		5
	.EQU	CCP19_CTL1_CH2M0,		4
	.EQU	CCP19_CTL1_CH1M3,		3
	.EQU	CCP19_CTL1_CH1M2,		2
	.EQU	CCP19_CTL1_CH1M1,		1
	.EQU	CCP19_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP19_R1,		0x40001B44
//  0x4000 1B44  CCP19_R1   Bits-------------------------------------
	.EQU	CCP19_R1_CCPXRY15,		15
	.EQU	CCP19_R1_CCPXRY14,		14
	.EQU	CCP19_R1_CCPXRY13,		13
	.EQU	CCP19_R1_CCPXRY12,		12
	.EQU	CCP19_R1_CCPXRY11,		11
	.EQU	CCP19_R1_CCPXRY10,		10
	.EQU	CCP19_R1_CCPXRY9,		9
	.EQU	CCP19_R1_CCPXRY8,		8
	.EQU	CCP19_R1_CCPXRY7,		7
	.EQU	CCP19_R1_CCPXRY6,		6
	.EQU	CCP19_R1_CCPXRY5,		5
	.EQU	CCP19_R1_CCPXRY4,		4
	.EQU	CCP19_R1_CCPXRY3,		3
	.EQU	CCP19_R1_CCPXRY2,		2
	.EQU	CCP19_R1_CCPXRY1,		1
	.EQU	CCP19_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP19_R2,		0x40001B48
//  0x4000 1B48  CCP19_R2   Bits-------------------------------------
	.EQU	CCP19_R2_CCPXRY15,		15
	.EQU	CCP19_R2_CCPXRY14,		14
	.EQU	CCP19_R2_CCPXRY13,		13
	.EQU	CCP19_R2_CCPXRY12,		12
	.EQU	CCP19_R2_CCPXRY11,		11
	.EQU	CCP19_R2_CCPXRY10,		10
	.EQU	CCP19_R2_CCPXRY9,		9
	.EQU	CCP19_R2_CCPXRY8,		8
	.EQU	CCP19_R2_CCPXRY7,		7
	.EQU	CCP19_R2_CCPXRY6,		6
	.EQU	CCP19_R2_CCPXRY5,		5
	.EQU	CCP19_R2_CCPXRY4,		4
	.EQU	CCP19_R2_CCPXRY3,		3
	.EQU	CCP19_R2_CCPXRY2,		2
	.EQU	CCP19_R2_CCPXRY1,		1
	.EQU	CCP19_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP19_R3,		0x40001B4C
//  0x4000 1B4C  CCP19_R3   Bits-------------------------------------
	.EQU	CCP19_R3_CCPXRY15,		15
	.EQU	CCP19_R3_CCPXRY14,		14
	.EQU	CCP19_R3_CCPXRY13,		13
	.EQU	CCP19_R3_CCPXRY12,		12
	.EQU	CCP19_R3_CCPXRY11,		11
	.EQU	CCP19_R3_CCPXRY10,		10
	.EQU	CCP19_R3_CCPXRY9,		9
	.EQU	CCP19_R3_CCPXRY8,		8
	.EQU	CCP19_R3_CCPXRY7,		7
	.EQU	CCP19_R3_CCPXRY6,		6
	.EQU	CCP19_R3_CCPXRY5,		5
	.EQU	CCP19_R3_CCPXRY4,		4
	.EQU	CCP19_R3_CCPXRY3,		3
	.EQU	CCP19_R3_CCPXRY2,		2
	.EQU	CCP19_R3_CCPXRY1,		1
	.EQU	CCP19_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP19_R4,		0x40001B50
//  0x4000 1B50  CCP19_R4   Bits-------------------------------------
	.EQU	CCP19_R4_CCPXRY15,		15
	.EQU	CCP19_R4_CCPXRY14,		14
	.EQU	CCP19_R4_CCPXRY13,		13
	.EQU	CCP19_R4_CCPXRY12,		12
	.EQU	CCP19_R4_CCPXRY11,		11
	.EQU	CCP19_R4_CCPXRY10,		10
	.EQU	CCP19_R4_CCPXRY9,		9
	.EQU	CCP19_R4_CCPXRY8,		8
	.EQU	CCP19_R4_CCPXRY7,		7
	.EQU	CCP19_R4_CCPXRY6,		6
	.EQU	CCP19_R4_CCPXRY5,		5
	.EQU	CCP19_R4_CCPXRY4,		4
	.EQU	CCP19_R4_CCPXRY3,		3
	.EQU	CCP19_R4_CCPXRY2,		2
	.EQU	CCP19_R4_CCPXRY1,		1
	.EQU	CCP19_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP19_CTL2,	0x40001B54
//  0x4000 1B54  CCP19_CTL2   Bits-------------------------------------
	.EQU	CCP19_CTL2_PXOC4CE,		15
	.EQU	CCP19_CTL2_PXOC3CE,		14
	.EQU	CCP19_CTL2_PXOC2CE,		13
	.EQU	CCP19_CTL2_PXOC1CE,		12
	.EQU	CCP19_CTL2_PXASS1,		11
	.EQU	CCP19_CTL2_PXASS0,		10
	.EQU	CCP19_CTL2_TCKSEL1,		9
	.EQU	CCP19_CTL2_TCKSEL0,		8
	.EQU	CCP19_CTL2_PXOC4_1,		7
	.EQU	CCP19_CTL2_PXOC4_0,		6
	.EQU	CCP19_CTL2_PXOC3_1,		5
	.EQU	CCP19_CTL2_PXOC3_0,		4
	.EQU	CCP19_CTL2_PXOC2_1,		3
	.EQU	CCP19_CTL2_PXOC2_0,		2
	.EQU	CCP19_CTL2_PXOC1_1,		1
	.EQU	CCP19_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP19_CTL3,	0x40001B58
//  0x4000 1B58  CCP19_CTL3   Bits-------------------------------------
	.EQU	CCP19_CTL3_PXSPMST,		15
	.EQU	CCP19_CTL3_PXPWMI,		14
	.EQU	CCP19_CTL3_PXXORM,		13
	.EQU	CCP19_CTL3_PXSPM,		12
	.EQU	CCP19_CTL3_TXTDE,		11
	.EQU	CCP19_CTL3_CC4DE,		10
	.EQU	CCP19_CTL3_CC3DE,		9
	.EQU	CCP19_CTL3_CC2DE,		8
	.EQU	CCP19_CTL3_CC1DE,		7
	.EQU	CCP19_CTL3_TXUDE,		6
	.EQU	CCP19_CTL3_TXUIE,		5
	.EQU	CCP19_CTL3_TXTIE,		4
	.EQU	CCP19_CTL3_CC4IE,		3
	.EQU	CCP19_CTL3_CC3IE,		2
	.EQU	CCP19_CTL3_CC2IE,		1
	.EQU	CCP19_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP19_EGIF,	0x40001B5C
//  0x4000 1B5C  CCP19_EGIF   Bits-------------------------------------
	.EQU	CCP19_EGIF_POSSEL,		13
	.EQU	CCP19_EGIF_PXSEL,		12
	.EQU	CCP19_EGIF_TXUIF,		11
	.EQU	CCP19_EGIF_TXTIF,		10
	.EQU	CCP19_EGIF_CC4IF,		9
	.EQU	CCP19_EGIF_CC3IF,		8
	.EQU	CCP19_EGIF_CC2IF,		7
	.EQU	CCP19_EGIF_CC1IF,		6
	.EQU	CCP19_EGIF_TXTRG,		5
	.EQU	CCP19_EGIF_CC4G,		4
	.EQU	CCP19_EGIF_CC3G,		3
	.EQU	CCP19_EGIF_CC2G,		2
	.EQU	CCP19_EGIF_CC1G,		1
	.EQU	CCP19_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	T21_CNT,		0x40001C00
//  0x4000 1C00  T21_CNT   Bits-------------------------------------
	.EQU	T21_CNT_TXCNT31,		31
	.EQU	T21_CNT_TXCNT30,		30
	.EQU	T21_CNT_TXCNT29,		29
	.EQU	T21_CNT_TXCNT28,		28
	.EQU	T21_CNT_TXCNT27,		27
	.EQU	T21_CNT_TXCNT26,		26
	.EQU	T21_CNT_TXCNT25,		25
	.EQU	T21_CNT_TXCNT24,		24
	.EQU	T21_CNT_TXCNT23,		23
	.EQU	T21_CNT_TXCNT22,		22
	.EQU	T21_CNT_TXCNT21,		21
	.EQU	T21_CNT_TXCNT20,		20
	.EQU	T21_CNT_TXCNT19,		19
	.EQU	T21_CNT_TXCNT18,		18
	.EQU	T21_CNT_TXCNT17,		17
	.EQU	T21_CNT_TXCNT16,		16
	.EQU	T21_CNT_TXCNT15,		15
	.EQU	T21_CNT_TXCNT14,		14
	.EQU	T21_CNT_TXCNT13,		13
	.EQU	T21_CNT_TXCNT12,		12
	.EQU	T21_CNT_TXCNT11,		11
	.EQU	T21_CNT_TXCNT10,		10
	.EQU	T21_CNT_TXCNT9,		9
	.EQU	T21_CNT_TXCNT8,		8
	.EQU	T21_CNT_TXCNT7,		7
	.EQU	T21_CNT_TXCNT6,		6
	.EQU	T21_CNT_TXCNT5,		5
	.EQU	T21_CNT_TXCNT4,		4
	.EQU	T21_CNT_TXCNT3,		3
	.EQU	T21_CNT_TXCNT2,		2
	.EQU	T21_CNT_TXCNT1,		1
	.EQU	T21_CNT_TXCNT0,		0
//  register-------------------------------------
	.EQU	T21_CTL1,		0x40001C04
//  0x4000 1C04  T21_CTL1   Bits-------------------------------------
	.EQU	T21_CTL1_TXIF,		13
	.EQU	T21_CTL1_TXIE,		12
	.EQU	T21_CTL1_TXCMS2,		10
	.EQU	T21_CTL1_TXCMS1,		9
	.EQU	T21_CTL1_TXCMS0,		8
	.EQU	T21_CTL1_TXDIR,		7
	.EQU	T21_CTL1_TXCLK1,		6
	.EQU	T21_CTL1_TXCLK0,		5
	.EQU	T21_CTL1_TXSY,		3
	.EQU	T21_CTL1_TXCS,		1
	.EQU	T21_CTL1_TXEN,		0
//  register-------------------------------------
	.EQU	T21_CTL2,		0x40001C08
//  0x4000 1C08  T21_CTL2   Bits-------------------------------------
	.EQU	T21_CTL2_TRGSEL1,		15
	.EQU	T21_CTL2_TRGSEL0,		14
	.EQU	T21_CTL2_TXUR,		13
	.EQU	T21_CTL2_TXMSSYNC,		12
	.EQU	T21_CTL2_TXTS3,		11
	.EQU	T21_CTL2_TXTS2,		10
	.EQU	T21_CTL2_TXTS1,		9
	.EQU	T21_CTL2_TXTS0,		8
	.EQU	T21_CTL2_TXSMS2,		7
	.EQU	T21_CTL2_TXSMS1,		6
	.EQU	T21_CTL2_TXSMS0,		5
	.EQU	T21_CTL2_TXMMS2,		4
	.EQU	T21_CTL2_TXMMS1,		3
	.EQU	T21_CTL2_TXMMS0,		2
	.EQU	T21_CTL2_TXUDEVT,		1
	.EQU	T21_CTL2_TXUDEN,		0
//  register-------------------------------------
	.EQU	T21_PRSC,		0x40001C0C
//  0x4000 1C0C  T21_PRSC   Bits-------------------------------------
	.EQU	T21_PRSC_TXCKS31,		31
	.EQU	T21_PRSC_TXCKS30,		30
	.EQU	T21_PRSC_TXCKS29,		29
	.EQU	T21_PRSC_TXCKS28,		28
	.EQU	T21_PRSC_TXCKS27,		27
	.EQU	T21_PRSC_TXCKS26,		26
	.EQU	T21_PRSC_TXCKS25,		25
	.EQU	T21_PRSC_TXCKS24,		24
	.EQU	T21_PRSC_TXCKS23,		23
	.EQU	T21_PRSC_TXCKS22,		22
	.EQU	T21_PRSC_TXCKS21,		21
	.EQU	T21_PRSC_TXCKS20,		20
	.EQU	T21_PRSC_TXCKS19,		19
	.EQU	T21_PRSC_TXCKS18,		18
	.EQU	T21_PRSC_TXCKS17,		17
	.EQU	T21_PRSC_TXCKS16,		16
	.EQU	T21_PRSC_TXCKS15,		15
	.EQU	T21_PRSC_TXCKS14,		14
	.EQU	T21_PRSC_TXCKS13,		13
	.EQU	T21_PRSC_TXCKS12,		12
	.EQU	T21_PRSC_TXCKS11,		11
	.EQU	T21_PRSC_TXCKS10,		10
	.EQU	T21_PRSC_TXCKS9,		9
	.EQU	T21_PRSC_TXCKS8,		8
	.EQU	T21_PRSC_TXCKS7,		7
	.EQU	T21_PRSC_TXCKS6,		6
	.EQU	T21_PRSC_TXCKS5,		5
	.EQU	T21_PRSC_TXCKS4,		4
	.EQU	T21_PRSC_TXCKS3,		3
	.EQU	T21_PRSC_TXCKS2,		2
	.EQU	T21_PRSC_TXCKS1,		1
	.EQU	T21_PRSC_TXCKS0,		0
//  register-------------------------------------
	.EQU	T21_PPX,		0x40001C10
//  0x4000 1C10  T21_PPX   Bits-------------------------------------
	.EQU	T21_PPX_PPX31,		31
	.EQU	T21_PPX_PPX30,		30
	.EQU	T21_PPX_PPX29,		29
	.EQU	T21_PPX_PPX28,		28
	.EQU	T21_PPX_PPX27,		27
	.EQU	T21_PPX_PPX26,		26
	.EQU	T21_PPX_PPX25,		25
	.EQU	T21_PPX_PPX24,		24
	.EQU	T21_PPX_PPX23,		23
	.EQU	T21_PPX_PPX22,		22
	.EQU	T21_PPX_PPX21,		21
	.EQU	T21_PPX_PPX20,		20
	.EQU	T21_PPX_PPX19,		19
	.EQU	T21_PPX_PPX18,		18
	.EQU	T21_PPX_PPX17,		17
	.EQU	T21_PPX_PPX16,		16
	.EQU	T21_PPX_PPX15,		15
	.EQU	T21_PPX_PPX14,		14
	.EQU	T21_PPX_PPX13,		13
	.EQU	T21_PPX_PPX12,		12
	.EQU	T21_PPX_PPX11,		11
	.EQU	T21_PPX_PPX10,		10
	.EQU	T21_PPX_PPX9,		9
	.EQU	T21_PPX_PPX8,		8
	.EQU	T21_PPX_PPX7,		7
	.EQU	T21_PPX_PPX6,		6
	.EQU	T21_PPX_PPX5,		5
	.EQU	T21_PPX_PPX4,		4
	.EQU	T21_PPX_PPX3,		3
	.EQU	T21_PPX_PPX2,		2
	.EQU	T21_PPX_PPX1,		1
	.EQU	T21_PPX_PPX0,		0
//  register-------------------------------------
	.EQU	T21_UDTIMx,	0x40001C14
//  0x4000 1C14  T21_UDTIMx   Bits-------------------------------------
	.EQU	T21_UDTIMx_TXUD7,		7
	.EQU	T21_UDTIMx_TXUD6,		6
	.EQU	T21_UDTIMx_TXUD5,		5
	.EQU	T21_UDTIMx_TXUD4,		4
	.EQU	T21_UDTIMx_TXUD3,		3
	.EQU	T21_UDTIMx_TXUD2,		2
	.EQU	T21_UDTIMx_TXUD1,		1
	.EQU	T21_UDTIMx_TXUD0,		0
//  register-------------------------------------
	.EQU	CCP21_C1,		0x40001C20
//  0x4000 1C20  CCP21_C1   Bits-------------------------------------
	.EQU	CCP21_C1_CCPXCY31,		31
	.EQU	CCP21_C1_CCPXCY30,		30
	.EQU	CCP21_C1_CCPXCY29,		29
	.EQU	CCP21_C1_CCPXCY28,		28
	.EQU	CCP21_C1_CCPXCY27,		27
	.EQU	CCP21_C1_CCPXCY26,		26
	.EQU	CCP21_C1_CCPXCY25,		25
	.EQU	CCP21_C1_CCPXCY24,		24
	.EQU	CCP21_C1_CCPXCY23,		23
	.EQU	CCP21_C1_CCPXCY22,		22
	.EQU	CCP21_C1_CCPXCY21,		21
	.EQU	CCP21_C1_CCPXCY20,		20
	.EQU	CCP21_C1_CCPXCY19,		19
	.EQU	CCP21_C1_CCPXCY18,		18
	.EQU	CCP21_C1_CCPXCY17,		17
	.EQU	CCP21_C1_CCPXCY16,		16
	.EQU	CCP21_C1_CCPXCY15,		15
	.EQU	CCP21_C1_CCPXCY14,		14
	.EQU	CCP21_C1_CCPXCY13,		13
	.EQU	CCP21_C1_CCPXCY12,		12
	.EQU	CCP21_C1_CCPXCY11,		11
	.EQU	CCP21_C1_CCPXCY10,		10
	.EQU	CCP21_C1_CCPXCY9,		9
	.EQU	CCP21_C1_CCPXCY8,		8
	.EQU	CCP21_C1_CCPXCY7,		7
	.EQU	CCP21_C1_CCPXCY6,		6
	.EQU	CCP21_C1_CCPXCY5,		5
	.EQU	CCP21_C1_CCPXCY4,		4
	.EQU	CCP21_C1_CCPXCY3,		3
	.EQU	CCP21_C1_CCPXCY2,		2
	.EQU	CCP21_C1_CCPXCY1,		1
	.EQU	CCP21_C1_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP21_C2,		0x40001C24
//  0x4000 1C24  CCP21_C2   Bits-------------------------------------
	.EQU	CCP21_C2_CCPXCY31,		31
	.EQU	CCP21_C2_CCPXCY30,		30
	.EQU	CCP21_C2_CCPXCY29,		29
	.EQU	CCP21_C2_CCPXCY28,		28
	.EQU	CCP21_C2_CCPXCY27,		27
	.EQU	CCP21_C2_CCPXCY26,		26
	.EQU	CCP21_C2_CCPXCY25,		25
	.EQU	CCP21_C2_CCPXCY24,		24
	.EQU	CCP21_C2_CCPXCY23,		23
	.EQU	CCP21_C2_CCPXCY22,		22
	.EQU	CCP21_C2_CCPXCY21,		21
	.EQU	CCP21_C2_CCPXCY20,		20
	.EQU	CCP21_C2_CCPXCY19,		19
	.EQU	CCP21_C2_CCPXCY18,		18
	.EQU	CCP21_C2_CCPXCY17,		17
	.EQU	CCP21_C2_CCPXCY16,		16
	.EQU	CCP21_C2_CCPXCY15,		15
	.EQU	CCP21_C2_CCPXCY14,		14
	.EQU	CCP21_C2_CCPXCY13,		13
	.EQU	CCP21_C2_CCPXCY12,		12
	.EQU	CCP21_C2_CCPXCY11,		11
	.EQU	CCP21_C2_CCPXCY10,		10
	.EQU	CCP21_C2_CCPXCY9,		9
	.EQU	CCP21_C2_CCPXCY8,		8
	.EQU	CCP21_C2_CCPXCY7,		7
	.EQU	CCP21_C2_CCPXCY6,		6
	.EQU	CCP21_C2_CCPXCY5,		5
	.EQU	CCP21_C2_CCPXCY4,		4
	.EQU	CCP21_C2_CCPXCY3,		3
	.EQU	CCP21_C2_CCPXCY2,		2
	.EQU	CCP21_C2_CCPXCY1,		1
	.EQU	CCP21_C2_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP21_C3,		0x40001C28
//  0x4000 1C28  CCP21_C3   Bits-------------------------------------
	.EQU	CCP21_C3_CCPXCY31,		31
	.EQU	CCP21_C3_CCPXCY30,		30
	.EQU	CCP21_C3_CCPXCY29,		29
	.EQU	CCP21_C3_CCPXCY28,		28
	.EQU	CCP21_C3_CCPXCY27,		27
	.EQU	CCP21_C3_CCPXCY26,		26
	.EQU	CCP21_C3_CCPXCY25,		25
	.EQU	CCP21_C3_CCPXCY24,		24
	.EQU	CCP21_C3_CCPXCY23,		23
	.EQU	CCP21_C3_CCPXCY22,		22
	.EQU	CCP21_C3_CCPXCY21,		21
	.EQU	CCP21_C3_CCPXCY20,		20
	.EQU	CCP21_C3_CCPXCY19,		19
	.EQU	CCP21_C3_CCPXCY18,		18
	.EQU	CCP21_C3_CCPXCY17,		17
	.EQU	CCP21_C3_CCPXCY16,		16
	.EQU	CCP21_C3_CCPXCY15,		15
	.EQU	CCP21_C3_CCPXCY14,		14
	.EQU	CCP21_C3_CCPXCY13,		13
	.EQU	CCP21_C3_CCPXCY12,		12
	.EQU	CCP21_C3_CCPXCY11,		11
	.EQU	CCP21_C3_CCPXCY10,		10
	.EQU	CCP21_C3_CCPXCY9,		9
	.EQU	CCP21_C3_CCPXCY8,		8
	.EQU	CCP21_C3_CCPXCY7,		7
	.EQU	CCP21_C3_CCPXCY6,		6
	.EQU	CCP21_C3_CCPXCY5,		5
	.EQU	CCP21_C3_CCPXCY4,		4
	.EQU	CCP21_C3_CCPXCY3,		3
	.EQU	CCP21_C3_CCPXCY2,		2
	.EQU	CCP21_C3_CCPXCY1,		1
	.EQU	CCP21_C3_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP21_C4,		0x40001C2C
//  0x4000 1C2C  CCP21_C4   Bits-------------------------------------
	.EQU	CCP21_C4_CCPXCY31,		31
	.EQU	CCP21_C4_CCPXCY30,		30
	.EQU	CCP21_C4_CCPXCY29,		29
	.EQU	CCP21_C4_CCPXCY28,		28
	.EQU	CCP21_C4_CCPXCY27,		27
	.EQU	CCP21_C4_CCPXCY26,		26
	.EQU	CCP21_C4_CCPXCY25,		25
	.EQU	CCP21_C4_CCPXCY24,		24
	.EQU	CCP21_C4_CCPXCY23,		23
	.EQU	CCP21_C4_CCPXCY22,		22
	.EQU	CCP21_C4_CCPXCY21,		21
	.EQU	CCP21_C4_CCPXCY20,		20
	.EQU	CCP21_C4_CCPXCY19,		19
	.EQU	CCP21_C4_CCPXCY18,		18
	.EQU	CCP21_C4_CCPXCY17,		17
	.EQU	CCP21_C4_CCPXCY16,		16
	.EQU	CCP21_C4_CCPXCY15,		15
	.EQU	CCP21_C4_CCPXCY14,		14
	.EQU	CCP21_C4_CCPXCY13,		13
	.EQU	CCP21_C4_CCPXCY12,		12
	.EQU	CCP21_C4_CCPXCY11,		11
	.EQU	CCP21_C4_CCPXCY10,		10
	.EQU	CCP21_C4_CCPXCY9,		9
	.EQU	CCP21_C4_CCPXCY8,		8
	.EQU	CCP21_C4_CCPXCY7,		7
	.EQU	CCP21_C4_CCPXCY6,		6
	.EQU	CCP21_C4_CCPXCY5,		5
	.EQU	CCP21_C4_CCPXCY4,		4
	.EQU	CCP21_C4_CCPXCY3,		3
	.EQU	CCP21_C4_CCPXCY2,		2
	.EQU	CCP21_C4_CCPXCY1,		1
	.EQU	CCP21_C4_CCPXCY0,		0
//  register-------------------------------------
	.EQU	CCP21_SRIC,	0x40001C30
//  0x4000 1C30  CCP21_SRIC   Bits-------------------------------------
	.EQU	CCP21_SRIC_TXIC,		6
	.EQU	CCP21_SRIC_TXUIC,		5
	.EQU	CCP21_SRIC_TXTIC,		4
	.EQU	CCP21_SRIC_CC4IC,		3
	.EQU	CCP21_SRIC_CC3IC,		2
	.EQU	CCP21_SRIC_CC2IC,		1
	.EQU	CCP21_SRIC_CC1IC,		0
//  register-------------------------------------
	.EQU	CCP21_DF,		0x40001C34
//  0x4000 1C34  CCP21_DF   Bits-------------------------------------
	.EQU	CCP21_DF_TXUDF,		5
	.EQU	CCP21_DF_TXTDF,		4
	.EQU	CCP21_DF_CC4DF,		3
	.EQU	CCP21_DF_CC3DF,		2
	.EQU	CCP21_DF_CC2DF,		1
	.EQU	CCP21_DF_CC1DF,		0
//  register-------------------------------------
	.EQU	CCP21_CTL1,	0x40001C40
//  0x4000 1C40  CCP21_CTL1   Bits-------------------------------------
	.EQU	CCP21_CTL1_CH4M3,		15
	.EQU	CCP21_CTL1_CH4M2,		14
	.EQU	CCP21_CTL1_CH4M1,		13
	.EQU	CCP21_CTL1_CH4M0,		12
	.EQU	CCP21_CTL1_CH3M3,		11
	.EQU	CCP21_CTL1_CH3M2,		10
	.EQU	CCP21_CTL1_CH3M1,		9
	.EQU	CCP21_CTL1_CH3M0,		8
	.EQU	CCP21_CTL1_CH2M3,		7
	.EQU	CCP21_CTL1_CH2M2,		6
	.EQU	CCP21_CTL1_CH2M1,		5
	.EQU	CCP21_CTL1_CH2M0,		4
	.EQU	CCP21_CTL1_CH1M3,		3
	.EQU	CCP21_CTL1_CH1M2,		2
	.EQU	CCP21_CTL1_CH1M1,		1
	.EQU	CCP21_CTL1_CH1M0,		0
//  register-------------------------------------
	.EQU	CCP21_R1,		0x40001C44
//  0x4000 1C44  CCP21_R1   Bits-------------------------------------
	.EQU	CCP21_R1_CCPXRY31,		31
	.EQU	CCP21_R1_CCPXRY30,		30
	.EQU	CCP21_R1_CCPXRY29,		29
	.EQU	CCP21_R1_CCPXRY28,		28
	.EQU	CCP21_R1_CCPXRY27,		27
	.EQU	CCP21_R1_CCPXRY26,		26
	.EQU	CCP21_R1_CCPXRY25,		25
	.EQU	CCP21_R1_CCPXRY24,		24
	.EQU	CCP21_R1_CCPXRY23,		23
	.EQU	CCP21_R1_CCPXRY22,		22
	.EQU	CCP21_R1_CCPXRY21,		21
	.EQU	CCP21_R1_CCPXRY20,		20
	.EQU	CCP21_R1_CCPXRY19,		19
	.EQU	CCP21_R1_CCPXRY18,		18
	.EQU	CCP21_R1_CCPXRY17,		17
	.EQU	CCP21_R1_CCPXRY16,		16
	.EQU	CCP21_R1_CCPXRY15,		15
	.EQU	CCP21_R1_CCPXRY14,		14
	.EQU	CCP21_R1_CCPXRY13,		13
	.EQU	CCP21_R1_CCPXRY12,		12
	.EQU	CCP21_R1_CCPXRY11,		11
	.EQU	CCP21_R1_CCPXRY10,		10
	.EQU	CCP21_R1_CCPXRY9,		9
	.EQU	CCP21_R1_CCPXRY8,		8
	.EQU	CCP21_R1_CCPXRY7,		7
	.EQU	CCP21_R1_CCPXRY6,		6
	.EQU	CCP21_R1_CCPXRY5,		5
	.EQU	CCP21_R1_CCPXRY4,		4
	.EQU	CCP21_R1_CCPXRY3,		3
	.EQU	CCP21_R1_CCPXRY2,		2
	.EQU	CCP21_R1_CCPXRY1,		1
	.EQU	CCP21_R1_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP21_R2,		0x40001C48
//  0x4000 1C48  CCP21_R2   Bits-------------------------------------
	.EQU	CCP21_R2_CCPXRY31,		31
	.EQU	CCP21_R2_CCPXRY30,		30
	.EQU	CCP21_R2_CCPXRY29,		29
	.EQU	CCP21_R2_CCPXRY28,		28
	.EQU	CCP21_R2_CCPXRY27,		27
	.EQU	CCP21_R2_CCPXRY26,		26
	.EQU	CCP21_R2_CCPXRY25,		25
	.EQU	CCP21_R2_CCPXRY24,		24
	.EQU	CCP21_R2_CCPXRY23,		23
	.EQU	CCP21_R2_CCPXRY22,		22
	.EQU	CCP21_R2_CCPXRY21,		21
	.EQU	CCP21_R2_CCPXRY20,		20
	.EQU	CCP21_R2_CCPXRY19,		19
	.EQU	CCP21_R2_CCPXRY18,		18
	.EQU	CCP21_R2_CCPXRY17,		17
	.EQU	CCP21_R2_CCPXRY16,		16
	.EQU	CCP21_R2_CCPXRY15,		15
	.EQU	CCP21_R2_CCPXRY14,		14
	.EQU	CCP21_R2_CCPXRY13,		13
	.EQU	CCP21_R2_CCPXRY12,		12
	.EQU	CCP21_R2_CCPXRY11,		11
	.EQU	CCP21_R2_CCPXRY10,		10
	.EQU	CCP21_R2_CCPXRY9,		9
	.EQU	CCP21_R2_CCPXRY8,		8
	.EQU	CCP21_R2_CCPXRY7,		7
	.EQU	CCP21_R2_CCPXRY6,		6
	.EQU	CCP21_R2_CCPXRY5,		5
	.EQU	CCP21_R2_CCPXRY4,		4
	.EQU	CCP21_R2_CCPXRY3,		3
	.EQU	CCP21_R2_CCPXRY2,		2
	.EQU	CCP21_R2_CCPXRY1,		1
	.EQU	CCP21_R2_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP21_R3,		0x40001C4C
//  0x4000 1C4C  CCP21_R3   Bits-------------------------------------
	.EQU	CCP21_R3_CCPXRY31,		31
	.EQU	CCP21_R3_CCPXRY30,		30
	.EQU	CCP21_R3_CCPXRY29,		29
	.EQU	CCP21_R3_CCPXRY28,		28
	.EQU	CCP21_R3_CCPXRY27,		27
	.EQU	CCP21_R3_CCPXRY26,		26
	.EQU	CCP21_R3_CCPXRY25,		25
	.EQU	CCP21_R3_CCPXRY24,		24
	.EQU	CCP21_R3_CCPXRY23,		23
	.EQU	CCP21_R3_CCPXRY22,		22
	.EQU	CCP21_R3_CCPXRY21,		21
	.EQU	CCP21_R3_CCPXRY20,		20
	.EQU	CCP21_R3_CCPXRY19,		19
	.EQU	CCP21_R3_CCPXRY18,		18
	.EQU	CCP21_R3_CCPXRY17,		17
	.EQU	CCP21_R3_CCPXRY16,		16
	.EQU	CCP21_R3_CCPXRY15,		15
	.EQU	CCP21_R3_CCPXRY14,		14
	.EQU	CCP21_R3_CCPXRY13,		13
	.EQU	CCP21_R3_CCPXRY12,		12
	.EQU	CCP21_R3_CCPXRY11,		11
	.EQU	CCP21_R3_CCPXRY10,		10
	.EQU	CCP21_R3_CCPXRY9,		9
	.EQU	CCP21_R3_CCPXRY8,		8
	.EQU	CCP21_R3_CCPXRY7,		7
	.EQU	CCP21_R3_CCPXRY6,		6
	.EQU	CCP21_R3_CCPXRY5,		5
	.EQU	CCP21_R3_CCPXRY4,		4
	.EQU	CCP21_R3_CCPXRY3,		3
	.EQU	CCP21_R3_CCPXRY2,		2
	.EQU	CCP21_R3_CCPXRY1,		1
	.EQU	CCP21_R3_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP21_R4,		0x40001C50
//  0x4000 1C50  CCP21_R4   Bits-------------------------------------
	.EQU	CCP21_R4_CCPXRY31,		31
	.EQU	CCP21_R4_CCPXRY30,		30
	.EQU	CCP21_R4_CCPXRY29,		29
	.EQU	CCP21_R4_CCPXRY28,		28
	.EQU	CCP21_R4_CCPXRY27,		27
	.EQU	CCP21_R4_CCPXRY26,		26
	.EQU	CCP21_R4_CCPXRY25,		25
	.EQU	CCP21_R4_CCPXRY24,		24
	.EQU	CCP21_R4_CCPXRY23,		23
	.EQU	CCP21_R4_CCPXRY22,		22
	.EQU	CCP21_R4_CCPXRY21,		21
	.EQU	CCP21_R4_CCPXRY20,		20
	.EQU	CCP21_R4_CCPXRY19,		19
	.EQU	CCP21_R4_CCPXRY18,		18
	.EQU	CCP21_R4_CCPXRY17,		17
	.EQU	CCP21_R4_CCPXRY16,		16
	.EQU	CCP21_R4_CCPXRY15,		15
	.EQU	CCP21_R4_CCPXRY14,		14
	.EQU	CCP21_R4_CCPXRY13,		13
	.EQU	CCP21_R4_CCPXRY12,		12
	.EQU	CCP21_R4_CCPXRY11,		11
	.EQU	CCP21_R4_CCPXRY10,		10
	.EQU	CCP21_R4_CCPXRY9,		9
	.EQU	CCP21_R4_CCPXRY8,		8
	.EQU	CCP21_R4_CCPXRY7,		7
	.EQU	CCP21_R4_CCPXRY6,		6
	.EQU	CCP21_R4_CCPXRY5,		5
	.EQU	CCP21_R4_CCPXRY4,		4
	.EQU	CCP21_R4_CCPXRY3,		3
	.EQU	CCP21_R4_CCPXRY2,		2
	.EQU	CCP21_R4_CCPXRY1,		1
	.EQU	CCP21_R4_CCPXRY0,		0
//  register-------------------------------------
	.EQU	CCP21_CTL2,	0x40001C54
//  0x4000 1C54  CCP21_CTL2   Bits-------------------------------------
	.EQU	CCP21_CTL2_PXOC4CE,		15
	.EQU	CCP21_CTL2_PXOC3CE,		14
	.EQU	CCP21_CTL2_PXOC2CE,		13
	.EQU	CCP21_CTL2_PXOC1CE,		12
	.EQU	CCP21_CTL2_PXASS1,		11
	.EQU	CCP21_CTL2_PXASS0,		10
	.EQU	CCP21_CTL2_TCKSEL1,		9
	.EQU	CCP21_CTL2_TCKSEL0,		8
	.EQU	CCP21_CTL2_PXOC4_1,		7
	.EQU	CCP21_CTL2_PXOC4_0,		6
	.EQU	CCP21_CTL2_PXOC3_1,		5
	.EQU	CCP21_CTL2_PXOC3_0,		4
	.EQU	CCP21_CTL2_PXOC2_1,		3
	.EQU	CCP21_CTL2_PXOC2_0,		2
	.EQU	CCP21_CTL2_PXOC1_1,		1
	.EQU	CCP21_CTL2_PXOC1_0,		0
//  register-------------------------------------
	.EQU	CCP21_CTL3,	0x40001C58
//  0x4000 1C58  CCP21_CTL3   Bits-------------------------------------
	.EQU	CCP21_CTL3_PXSPMST,		15
	.EQU	CCP21_CTL3_PXPWMI,		14
	.EQU	CCP21_CTL3_PXXORM,		13
	.EQU	CCP21_CTL3_PXSPM,		12
	.EQU	CCP21_CTL3_TXTDE,		11
	.EQU	CCP21_CTL3_CC4DE,		10
	.EQU	CCP21_CTL3_CC3DE,		9
	.EQU	CCP21_CTL3_CC2DE,		8
	.EQU	CCP21_CTL3_CC1DE,		7
	.EQU	CCP21_CTL3_TXUDE,		6
	.EQU	CCP21_CTL3_TXUIE,		5
	.EQU	CCP21_CTL3_TXTIE,		4
	.EQU	CCP21_CTL3_CC4IE,		3
	.EQU	CCP21_CTL3_CC3IE,		2
	.EQU	CCP21_CTL3_CC2IE,		1
	.EQU	CCP21_CTL3_CC1IE,		0
//  register-------------------------------------
	.EQU	CCP21_EGIF,	0x40001C5C
//  0x4000 1C5C  CCP21_EGIF   Bits-------------------------------------
	.EQU	CCP21_EGIF_POSSEL,		13
	.EQU	CCP21_EGIF_PXSEL,		12
	.EQU	CCP21_EGIF_TXUIF,		11
	.EQU	CCP21_EGIF_TXTIF,		10
	.EQU	CCP21_EGIF_CC4IF,		9
	.EQU	CCP21_EGIF_CC3IF,		8
	.EQU	CCP21_EGIF_CC2IF,		7
	.EQU	CCP21_EGIF_CC1IF,		6
	.EQU	CCP21_EGIF_TXTRG,		5
	.EQU	CCP21_EGIF_CC4G,		4
	.EQU	CCP21_EGIF_CC3G,		3
	.EQU	CCP21_EGIF_CC2G,		2
	.EQU	CCP21_EGIF_CC1G,		1
	.EQU	CCP21_EGIF_UARTRXEN,		0
//  register-------------------------------------
	.EQU	USART5_CTLR,	0x40001E80
//  0x4000 1E80  USART5_CTLR   Bits-------------------------------------
	.EQU	USART5_CTLR_SLMEN,		31
	.EQU	USART5_CTLR_RESHD,		30
	.EQU	USART5_CTLR_IRDAEN,		29
	.EQU	USART5_CTLR_BKPWS,		26
	.EQU	USART5_CTLR_RTSE,		25
	.EQU	USART5_CTLR_CTSE,		24
	.EQU	USART5_CTLR_TRGSEL1,		23
	.EQU	USART5_CTLR_TRGSEL0,		22
	.EQU	USART5_CTLR_DT9EN,		21
	.EQU	USART5_CTLR_PARM,		20
	.EQU	USART5_CTLR_TX9SEL,		19
	.EQU	USART5_CTLR_STPW,		18
	.EQU	USART5_CTLR_TIDLEEN,		17
	.EQU	USART5_CTLR_RXEN,		16
	.EQU	USART5_CTLR_TXEN,		15
	.EQU	USART5_CTLR_SYNC,		14
	.EQU	USART5_CTLR_SENDB,		13
	.EQU	USART5_CTLR_RIDLES,		12
	.EQU	USART5_CTLR_ABRDEN,		11
	.EQU	USART5_CTLR_ADREN,		9
	.EQU	USART5_CTLR_CSRS,		8
	.EQU	USART5_CTLR_WUEN,		7
	.EQU	USART5_CTLR_DINV,		6
	.EQU	USART5_CTLR_RCONV,		5
	.EQU	USART5_CTLR_TCONV,		4
	.EQU	USART5_CTLR_SCKPS,		3
	.EQU	USART5_CTLR_BRCKS1,		2
	.EQU	USART5_CTLR_BRCKS0,		1
	.EQU	USART5_CTLR_USARTEN,		0
//  register-------------------------------------
	.EQU	USART5_BRGR,	0x40001E84
//  0x4000 1E84  USART5_BRGR   Bits-------------------------------------
	.EQU	USART5_BRGR_BRGF2_3,		23
	.EQU	USART5_BRGR_BRGF2_2,		22
	.EQU	USART5_BRGR_BRGF2_1,		21
	.EQU	USART5_BRGR_BRGF2_0,		20
	.EQU	USART5_BRGR_BRGF1_3,		19
	.EQU	USART5_BRGR_BRGF1_2,		18
	.EQU	USART5_BRGR_BRGF1_1,		17
	.EQU	USART5_BRGR_BRGF1_0,		16
	.EQU	USART5_BRGR_BRGM15,		15
	.EQU	USART5_BRGR_BRGM14,		14
	.EQU	USART5_BRGR_BRGM13,		13
	.EQU	USART5_BRGR_BRGM12,		12
	.EQU	USART5_BRGR_BRGM11,		11
	.EQU	USART5_BRGR_BRGM10,		10
	.EQU	USART5_BRGR_BRGM9,		9
	.EQU	USART5_BRGR_BRGM8,		8
	.EQU	USART5_BRGR_BRGM7,		7
	.EQU	USART5_BRGR_BRGM6,		6
	.EQU	USART5_BRGR_BRGM5,		5
	.EQU	USART5_BRGR_BRGM4,		4
	.EQU	USART5_BRGR_BRGM3,		3
	.EQU	USART5_BRGR_BRGM2,		2
	.EQU	USART5_BRGR_BRGM1,		1
	.EQU	USART5_BRGR_BRGM0,		0
//  register-------------------------------------
	.EQU	USART5_STR,	0x40001E88
//  0x4000 1E88  USART5_STR   Bits-------------------------------------
	.EQU	USART5_STR_TX0SEL,		31
	.EQU	USART5_STR_TX1SEL,		30
	.EQU	USART5_STR_RXDSEL,		29
	.EQU	USART5_STR_CTSSEL,		28
	.EQU	USART5_STR_TFEIF1,		27
	.EQU	USART5_STR_IDLEIC,		26
	.EQU	USART5_STR_UADMIC,		25
	.EQU	USART5_STR_CTSIC,		24
	.EQU	USART5_STR_REIC,		23
	.EQU	USART5_STR_TEIC,		22
	.EQU	USART5_STR_WUIC,		21
	.EQU	USART5_STR_ABTOIC,		20
	.EQU	USART5_STR_BRIC,		19
	.EQU	USART5_STR_FREIC,		18
	.EQU	USART5_STR_PAREIC,		17
	.EQU	USART5_STR_OVFEIC,		16
	.EQU	USART5_STR_IDLFIF,		15
	.EQU	USART5_STR_UADMIF,		14
	.EQU	USART5_STR_TXEIF,		13
	.EQU	USART5_STR_TFEIF,		12
	.EQU	USART5_STR_RDRIF,		11
	.EQU	USART5_STR_TXFR,		10
	.EQU	USART5_STR_RCFR,		9
	.EQU	USART5_STR_CTSIF,		8
	.EQU	USART5_STR_REIF,		7
	.EQU	USART5_STR_TEIF,		6
	.EQU	USART5_STR_WUIF,		5
	.EQU	USART5_STR_ABTOIF,		4
	.EQU	USART5_STR_BRIF,		3
	.EQU	USART5_STR_FREIF,		2
	.EQU	USART5_STR_PAREIF,		1
	.EQU	USART5_STR_OVFEIF,		0
//  register-------------------------------------
	.EQU	USART5_TBUFR,	0x40001E8C
//  0x4000 1E8C  USART5_TBUFR   Bits-------------------------------------
	.EQU	USART5_TBUFR_TBUF7,		7
	.EQU	USART5_TBUFR_TBUF6,		6
	.EQU	USART5_TBUFR_TBUF5,		5
	.EQU	USART5_TBUFR_TBUF4,		4
	.EQU	USART5_TBUFR_TBUF3,		3
	.EQU	USART5_TBUFR_TBUF2,		2
	.EQU	USART5_TBUFR_TBUF1,		1
	.EQU	USART5_TBUFR_TBUF0,		0
//  register-------------------------------------
	.EQU	USART5_RBUFR,	0x40001E8C
//  0x4000 1E8C  USART5_RBUFR   Bits-------------------------------------
	.EQU	USART5_RBUFR_RBUF8,		8
	.EQU	USART5_RBUFR_RBUF7,		7
	.EQU	USART5_RBUFR_RBUF6,		6
	.EQU	USART5_RBUFR_RBUF5,		5
	.EQU	USART5_RBUFR_RBUF4,		4
	.EQU	USART5_RBUFR_RBUF3,		3
	.EQU	USART5_RBUFR_RBUF2,		2
	.EQU	USART5_RBUFR_RBUF1,		1
	.EQU	USART5_RBUFR_RBUF0,		0
//  register-------------------------------------
	.EQU	USART5_U7816R,	0x40001E90
//  0x4000 1E90  USART5_U7816R   Bits-------------------------------------
	.EQU	USART5_U7816R_EGT7,		31
	.EQU	USART5_U7816R_EGT6,		30
	.EQU	USART5_U7816R_EGT5,		29
	.EQU	USART5_U7816R_EGT4,		28
	.EQU	USART5_U7816R_EGT3,		27
	.EQU	USART5_U7816R_EGT2,		26
	.EQU	USART5_U7816R_EGT1,		25
	.EQU	USART5_U7816R_EGT0,		24
	.EQU	USART5_U7816R_CLKDIV7,		22
	.EQU	USART5_U7816R_CLKDIV6,		21
	.EQU	USART5_U7816R_CLKDIV5,		20
	.EQU	USART5_U7816R_CLKDIV4,		19
	.EQU	USART5_U7816R_CLKDIV3,		18
	.EQU	USART5_U7816R_CLKDIV2,		17
	.EQU	USART5_U7816R_CLKDIV1,		16
	.EQU	USART5_U7816R_CLKDIV0,		15
	.EQU	USART5_U7816R_TREPMS,		14
	.EQU	USART5_U7816R_RXRE1,		13
	.EQU	USART5_U7816R_RXRE0,		12
	.EQU	USART5_U7816R_TXRE1,		11
	.EQU	USART5_U7816R_TXRE0,		10
	.EQU	USART5_U7816R_RREPEN,		9
	.EQU	USART5_U7816R_TREPEN,		8
	.EQU	USART5_U7816R_BGTEN,		5
	.EQU	USART5_U7816R_PSEL,		4
	.EQU	USART5_U7816R_ERSW1,		3
	.EQU	USART5_U7816R_ERSW0,		2
	.EQU	USART5_U7816R_CLKOUT,		1
//  register-------------------------------------
	.EQU	USART5_IER,	0x40001E94
//  0x4000 1E94  USART5_IER   Bits-------------------------------------
	.EQU	USART5_IER_UADMIE,		18
	.EQU	USART5_IER_UTXDE,		17
	.EQU	USART5_IER_URCDE,		16
	.EQU	USART5_IER_IDLEIE,		12
	.EQU	USART5_IER_TXEIE,		11
	.EQU	USART5_IER_TFEIE,		10
	.EQU	USART5_IER_RDRIE,		9
	.EQU	USART5_IER_CTSIE,		8
	.EQU	USART5_IER_REIE,		7
	.EQU	USART5_IER_TEIE,		6
	.EQU	USART5_IER_WUIE,		5
	.EQU	USART5_IER_ABTOIE,		4
	.EQU	USART5_IER_BRIE,		3
	.EQU	USART5_IER_FREIE,		2
	.EQU	USART5_IER_PAREIE,		1
	.EQU	USART5_IER_OVFEIE,		0
//  register-------------------------------------
	.EQU	USART5_ADM,	0x40001E98
//  0x4000 1E98  USART5_ADM   Bits-------------------------------------
	.EQU	USART5_ADM_ADM7,		7
	.EQU	USART5_ADM_ADM6,		6
	.EQU	USART5_ADM_ADM5,		5
	.EQU	USART5_ADM_ADM4,		4
	.EQU	USART5_ADM_ADM3,		3
	.EQU	USART5_ADM_ADM2,		2
	.EQU	USART5_ADM_ADM1,		1
	.EQU	USART5_ADM_ADM0,		0
//  register-------------------------------------
	.EQU	USART7_CTLR,	0x40001F80
//  0x4000 1F80  USART7_CTLR   Bits-------------------------------------
	.EQU	USART7_CTLR_SLMEN,		31
	.EQU	USART7_CTLR_RESHD,		30
	.EQU	USART7_CTLR_IRDAEN,		29
	.EQU	USART7_CTLR_BKPWS,		26
	.EQU	USART7_CTLR_RTSE,		25
	.EQU	USART7_CTLR_CTSE,		24
	.EQU	USART7_CTLR_TRGSEL1,		23
	.EQU	USART7_CTLR_TRGSEL0,		22
	.EQU	USART7_CTLR_DT9EN,		21
	.EQU	USART7_CTLR_PARM,		20
	.EQU	USART7_CTLR_TX9SEL,		19
	.EQU	USART7_CTLR_STPW,		18
	.EQU	USART7_CTLR_TIDLEEN,		17
	.EQU	USART7_CTLR_RXEN,		16
	.EQU	USART7_CTLR_TXEN,		15
	.EQU	USART7_CTLR_SYNC,		14
	.EQU	USART7_CTLR_SENDB,		13
	.EQU	USART7_CTLR_RIDLES,		12
	.EQU	USART7_CTLR_ABRDEN,		11
	.EQU	USART7_CTLR_ADREN,		9
	.EQU	USART7_CTLR_CSRS,		8
	.EQU	USART7_CTLR_WUEN,		7
	.EQU	USART7_CTLR_DINV,		6
	.EQU	USART7_CTLR_RCONV,		5
	.EQU	USART7_CTLR_TCONV,		4
	.EQU	USART7_CTLR_SCKPS,		3
	.EQU	USART7_CTLR_BRCKS1,		2
	.EQU	USART7_CTLR_BRCKS0,		1
	.EQU	USART7_CTLR_USARTEN,		0
//  register-------------------------------------
	.EQU	USART7_BRGR,	0x40001F84
//  0x4000 1F84  USART7_BRGR   Bits-------------------------------------
	.EQU	USART7_BRGR_BRGF2_3,		23
	.EQU	USART7_BRGR_BRGF2_2,		22
	.EQU	USART7_BRGR_BRGF2_1,		21
	.EQU	USART7_BRGR_BRGF2_0,		20
	.EQU	USART7_BRGR_BRGF1_3,		19
	.EQU	USART7_BRGR_BRGF1_2,		18
	.EQU	USART7_BRGR_BRGF1_1,		17
	.EQU	USART7_BRGR_BRGF1_0,		16
	.EQU	USART7_BRGR_BRGM15,		15
	.EQU	USART7_BRGR_BRGM14,		14
	.EQU	USART7_BRGR_BRGM13,		13
	.EQU	USART7_BRGR_BRGM12,		12
	.EQU	USART7_BRGR_BRGM11,		11
	.EQU	USART7_BRGR_BRGM10,		10
	.EQU	USART7_BRGR_BRGM9,		9
	.EQU	USART7_BRGR_BRGM8,		8
	.EQU	USART7_BRGR_BRGM7,		7
	.EQU	USART7_BRGR_BRGM6,		6
	.EQU	USART7_BRGR_BRGM5,		5
	.EQU	USART7_BRGR_BRGM4,		4
	.EQU	USART7_BRGR_BRGM3,		3
	.EQU	USART7_BRGR_BRGM2,		2
	.EQU	USART7_BRGR_BRGM1,		1
	.EQU	USART7_BRGR_BRGM0,		0
//  register-------------------------------------
	.EQU	USART7_STR,	0x40001F88
//  0x4000 1F88  USART7_STR   Bits-------------------------------------
	.EQU	USART7_STR_TX0SEL,		31
	.EQU	USART7_STR_TX1SEL,		30
	.EQU	USART7_STR_RXDSEL,		29
	.EQU	USART7_STR_CTSSEL,		28
	.EQU	USART7_STR_TFEIF1,		27
	.EQU	USART7_STR_IDLEIC,		26
	.EQU	USART7_STR_UADMIC,		25
	.EQU	USART7_STR_CTSIC,		24
	.EQU	USART7_STR_REIC,		23
	.EQU	USART7_STR_TEIC,		22
	.EQU	USART7_STR_WUIC,		21
	.EQU	USART7_STR_ABTOIC,		20
	.EQU	USART7_STR_BRIC,		19
	.EQU	USART7_STR_FREIC,		18
	.EQU	USART7_STR_PAREIC,		17
	.EQU	USART7_STR_OVFEIC,		16
	.EQU	USART7_STR_IDLFIF,		15
	.EQU	USART7_STR_UADMIF,		14
	.EQU	USART7_STR_TXEIF,		13
	.EQU	USART7_STR_TFEIF,		12
	.EQU	USART7_STR_RDRIF,		11
	.EQU	USART7_STR_TXFR,		10
	.EQU	USART7_STR_RCFR,		9
	.EQU	USART7_STR_CTSIF,		8
	.EQU	USART7_STR_REIF,		7
	.EQU	USART7_STR_TEIF,		6
	.EQU	USART7_STR_WUIF,		5
	.EQU	USART7_STR_ABTOIF,		4
	.EQU	USART7_STR_BRIF,		3
	.EQU	USART7_STR_FREIF,		2
	.EQU	USART7_STR_PAREIF,		1
	.EQU	USART7_STR_OVFEIF,		0
//  register-------------------------------------
	.EQU	USART7_TBUFR,	0x40001F8C
//  0x4000 1F8C  USART7_TBUFR   Bits-------------------------------------
	.EQU	USART7_TBUFR_TBUF7,		7
	.EQU	USART7_TBUFR_TBUF6,		6
	.EQU	USART7_TBUFR_TBUF5,		5
	.EQU	USART7_TBUFR_TBUF4,		4
	.EQU	USART7_TBUFR_TBUF3,		3
	.EQU	USART7_TBUFR_TBUF2,		2
	.EQU	USART7_TBUFR_TBUF1,		1
	.EQU	USART7_TBUFR_TBUF0,		0
//  register-------------------------------------
	.EQU	USART7_RBUFR,	0x40001F8C
//  0x4000 1F8C  USART7_RBUFR   Bits-------------------------------------
	.EQU	USART7_RBUFR_RBUF8,		8
	.EQU	USART7_RBUFR_RBUF7,		7
	.EQU	USART7_RBUFR_RBUF6,		6
	.EQU	USART7_RBUFR_RBUF5,		5
	.EQU	USART7_RBUFR_RBUF4,		4
	.EQU	USART7_RBUFR_RBUF3,		3
	.EQU	USART7_RBUFR_RBUF2,		2
	.EQU	USART7_RBUFR_RBUF1,		1
	.EQU	USART7_RBUFR_RBUF0,		0
//  register-------------------------------------
	.EQU	USART7_U7816R,	0x40001F90
//  0x4000 1F90  USART7_U7816R   Bits-------------------------------------
	.EQU	USART7_U7816R_EGT7,		31
	.EQU	USART7_U7816R_EGT6,		30
	.EQU	USART7_U7816R_EGT5,		29
	.EQU	USART7_U7816R_EGT4,		28
	.EQU	USART7_U7816R_EGT3,		27
	.EQU	USART7_U7816R_EGT2,		26
	.EQU	USART7_U7816R_EGT1,		25
	.EQU	USART7_U7816R_EGT0,		24
	.EQU	USART7_U7816R_CLKDIV7,		22
	.EQU	USART7_U7816R_CLKDIV6,		21
	.EQU	USART7_U7816R_CLKDIV5,		20
	.EQU	USART7_U7816R_CLKDIV4,		19
	.EQU	USART7_U7816R_CLKDIV3,		18
	.EQU	USART7_U7816R_CLKDIV2,		17
	.EQU	USART7_U7816R_CLKDIV1,		16
	.EQU	USART7_U7816R_CLKDIV0,		15
	.EQU	USART7_U7816R_TREPMS,		14
	.EQU	USART7_U7816R_RXRE1,		13
	.EQU	USART7_U7816R_RXRE0,		12
	.EQU	USART7_U7816R_TXRE1,		11
	.EQU	USART7_U7816R_TXRE0,		10
	.EQU	USART7_U7816R_RREPEN,		9
	.EQU	USART7_U7816R_TREPEN,		8
	.EQU	USART7_U7816R_BGTEN,		5
	.EQU	USART7_U7816R_PSEL,		4
	.EQU	USART7_U7816R_ERSW1,		3
	.EQU	USART7_U7816R_ERSW0,		2
	.EQU	USART7_U7816R_CLKOUT,		1
//  register-------------------------------------
	.EQU	USART7_IER,	0x40001F94
//  0x4000 1F94  USART7_IER   Bits-------------------------------------
	.EQU	USART7_IER_UADMIE,		18
	.EQU	USART7_IER_UTXDE,		17
	.EQU	USART7_IER_URCDE,		16
	.EQU	USART7_IER_IDLEIE,		12
	.EQU	USART7_IER_TXEIE,		11
	.EQU	USART7_IER_TFEIE,		10
	.EQU	USART7_IER_RDRIE,		9
	.EQU	USART7_IER_CTSIE,		8
	.EQU	USART7_IER_REIE,		7
	.EQU	USART7_IER_TEIE,		6
	.EQU	USART7_IER_WUIE,		5
	.EQU	USART7_IER_ABTOIE,		4
	.EQU	USART7_IER_BRIE,		3
	.EQU	USART7_IER_FREIE,		2
	.EQU	USART7_IER_PAREIE,		1
	.EQU	USART7_IER_OVFEIE,		0
//  register-------------------------------------
	.EQU	USART7_ADM,	0x40001F98
//  0x4000 1F98  USART7_ADM   Bits-------------------------------------
	.EQU	USART7_ADM_ADM7,		7
	.EQU	USART7_ADM_ADM6,		6
	.EQU	USART7_ADM_ADM5,		5
	.EQU	USART7_ADM_ADM4,		4
	.EQU	USART7_ADM_ADM3,		3
	.EQU	USART7_ADM_ADM2,		2
	.EQU	USART7_ADM_ADM1,		1
	.EQU	USART7_ADM_ADM0,		0
//  register-------------------------------------
	.EQU	SPI2_BRGR,		0x40002080
//  0x4000 2080  SPI2_BRGR   Bits-------------------------------------
	.EQU	SPI2_BRGR_I2SODD,		25
	.EQU	SPI2_BRGR_MCKEN,		24
	.EQU	SPI2_BRGR_I2SDIV7,		23
	.EQU	SPI2_BRGR_I2SDIV6,		22
	.EQU	SPI2_BRGR_I2SDIV5,		21
	.EQU	SPI2_BRGR_I2SDIV4,		20
	.EQU	SPI2_BRGR_I2SDIV3,		19
	.EQU	SPI2_BRGR_I2SDIV2,		18
	.EQU	SPI2_BRGR_I2SDIV1,		17
	.EQU	SPI2_BRGR_I2SDIV0,		16
	.EQU	SPI2_BRGR_SPIBRG15,		15
	.EQU	SPI2_BRGR_SPIBRG14,		14
	.EQU	SPI2_BRGR_SPIBRG13,		13
	.EQU	SPI2_BRGR_SPIBRG12,		12
	.EQU	SPI2_BRGR_SPIBRG11,		11
	.EQU	SPI2_BRGR_SPIBRG10,		10
	.EQU	SPI2_BRGR_SPIBRG9,		9
	.EQU	SPI2_BRGR_SPIBRG8,		8
	.EQU	SPI2_BRGR_SPIBRG7,		7
	.EQU	SPI2_BRGR_SPIBRG6,		6
	.EQU	SPI2_BRGR_SPIBRG5,		5
	.EQU	SPI2_BRGR_SPIBRG4,		4
	.EQU	SPI2_BRGR_SPIBRG3,		3
	.EQU	SPI2_BRGR_SPIBRG2,		2
	.EQU	SPI2_BRGR_SPIBRG1,		1
	.EQU	SPI2_BRGR_SPIBRG0,		0
//  register-------------------------------------
	.EQU	SPI2_CTLR,		0x40002084
//  0x4000 2084  SPI2_CTLR   Bits-------------------------------------
	.EQU	SPI2_CTLR_PCMCKP,		27
	.EQU	SPI2_CTLR_I2SCKS1,		26
	.EQU	SPI2_CTLR_I2SCKS0,		25
	.EQU	SPI2_CTLR_PCMS,		24
	.EQU	SPI2_CTLR_I2SSS1,		23
	.EQU	SPI2_CTLR_I2SSS0,		22
	.EQU	SPI2_CTLR_I2SMC1,		21
	.EQU	SPI2_CTLR_I2SMC0,		20
	.EQU	SPI2_CTLR_MCKOS,		18
	.EQU	SPI2_CTLR_I2SMD,		16
	.EQU	SPI2_CTLR_SSEL1,		15
	.EQU	SPI2_CTLR_SSEL0,		14
	.EQU	SPI2_CTLR_SPIBS1,		13
	.EQU	SPI2_CTLR_SPIBS0,		12
	.EQU	SPI2_CTLR_SPICKE,		9
	.EQU	SPI2_CTLR_SPICKP,		8
	.EQU	SPI2_CTLR_SPIIOS,		7
	.EQU	SPI2_CTLR_SPIDS,		6
	.EQU	SPI2_CTLR_SPICKS1,		5
	.EQU	SPI2_CTLR_SPICKS0,		4
	.EQU	SPI2_CTLR_SPIMS2,		3
	.EQU	SPI2_CTLR_SPIMS1,		2
	.EQU	SPI2_CTLR_SPIMS0,		1
	.EQU	SPI2_CTLR_SPIEN,		0
//  register-------------------------------------
	.EQU	SPI2_BUFR,		0x40002088
//  0x4000 2088  SPI2_BUFR   Bits-------------------------------------
	.EQU	SPI2_BUFR_SPIBUF31,		31
	.EQU	SPI2_BUFR_SPIBUF30,		30
	.EQU	SPI2_BUFR_SPIBUF29,		29
	.EQU	SPI2_BUFR_SPIBUF28,		28
	.EQU	SPI2_BUFR_SPIBUF27,		27
	.EQU	SPI2_BUFR_SPIBUF26,		26
	.EQU	SPI2_BUFR_SPIBUF25,		25
	.EQU	SPI2_BUFR_SPIBUF24,		24
	.EQU	SPI2_BUFR_SPIBUF23,		23
	.EQU	SPI2_BUFR_SPIBUF22,		22
	.EQU	SPI2_BUFR_SPIBUF21,		21
	.EQU	SPI2_BUFR_SPIBUF20,		20
	.EQU	SPI2_BUFR_SPIBUF19,		19
	.EQU	SPI2_BUFR_SPIBUF18,		18
	.EQU	SPI2_BUFR_SPIBUF17,		17
	.EQU	SPI2_BUFR_SPIBUF16,		16
	.EQU	SPI2_BUFR_SPIBUF15,		15
	.EQU	SPI2_BUFR_SPIBUF14,		14
	.EQU	SPI2_BUFR_SPIBUF13,		13
	.EQU	SPI2_BUFR_SPIBUF12,		12
	.EQU	SPI2_BUFR_SPIBUF11,		11
	.EQU	SPI2_BUFR_SPIBUF10,		10
	.EQU	SPI2_BUFR_SPIBUF9,		9
	.EQU	SPI2_BUFR_SPIBUF8,		8
	.EQU	SPI2_BUFR_SPIBUF7,		7
	.EQU	SPI2_BUFR_SPIBUF6,		6
	.EQU	SPI2_BUFR_SPIBUF5,		5
	.EQU	SPI2_BUFR_SPIBUF4,		4
	.EQU	SPI2_BUFR_SPIBUF3,		3
	.EQU	SPI2_BUFR_SPIBUF2,		2
	.EQU	SPI2_BUFR_SPIBUF1,		1
	.EQU	SPI2_BUFR_SPIBUF0,		0
//  register-------------------------------------
	.EQU	SPI2_STR,		0x4000208C
//  0x4000 208C  SPI2_STR   Bits-------------------------------------
	.EQU	SPI2_STR_STXDE,		21
	.EQU	SPI2_STR_SRCDE,		20
	.EQU	SPI2_STR_UDRIC,		18
	.EQU	SPI2_STR_TOVFIC,		17
	.EQU	SPI2_STR_ROVFIC,		16
	.EQU	SPI2_STR_TNEIE,		15
	.EQU	SPI2_STR_RNEIE,		14
	.EQU	SPI2_STR_TOVFIE,		13
	.EQU	SPI2_STR_ROVFIE,		12
	.EQU	SPI2_STR_UDRIE,		11
	.EQU	SPI2_STR_UDRIF,		6
	.EQU	SPI2_STR_TOVFIF,		5
	.EQU	SPI2_STR_ROVFIF,		4
	.EQU	SPI2_STR_CHSIDE,		3
	.EQU	SPI2_STR_TNE,		2
	.EQU	SPI2_STR_RNE,		1
	.EQU	SPI2_STR_SPIBUSY,		0
//  register-------------------------------------
	.EQU	SPI3_BRGR,		0x40002100
//  0x4000 2100  SPI3_BRGR   Bits-------------------------------------
	.EQU	SPI3_BRGR_I2SODD,		25
	.EQU	SPI3_BRGR_MCKEN,		24
	.EQU	SPI3_BRGR_I2SDIV7,		23
	.EQU	SPI3_BRGR_I2SDIV6,		22
	.EQU	SPI3_BRGR_I2SDIV5,		21
	.EQU	SPI3_BRGR_I2SDIV4,		20
	.EQU	SPI3_BRGR_I2SDIV3,		19
	.EQU	SPI3_BRGR_I2SDIV2,		18
	.EQU	SPI3_BRGR_I2SDIV1,		17
	.EQU	SPI3_BRGR_I2SDIV0,		16
	.EQU	SPI3_BRGR_SPIBRG15,		15
	.EQU	SPI3_BRGR_SPIBRG14,		14
	.EQU	SPI3_BRGR_SPIBRG13,		13
	.EQU	SPI3_BRGR_SPIBRG12,		12
	.EQU	SPI3_BRGR_SPIBRG11,		11
	.EQU	SPI3_BRGR_SPIBRG10,		10
	.EQU	SPI3_BRGR_SPIBRG9,		9
	.EQU	SPI3_BRGR_SPIBRG8,		8
	.EQU	SPI3_BRGR_SPIBRG7,		7
	.EQU	SPI3_BRGR_SPIBRG6,		6
	.EQU	SPI3_BRGR_SPIBRG5,		5
	.EQU	SPI3_BRGR_SPIBRG4,		4
	.EQU	SPI3_BRGR_SPIBRG3,		3
	.EQU	SPI3_BRGR_SPIBRG2,		2
	.EQU	SPI3_BRGR_SPIBRG1,		1
	.EQU	SPI3_BRGR_SPIBRG0,		0
//  register-------------------------------------
	.EQU	SPI3_CTLR,		0x40002104
//  0x4000 2104  SPI3_CTLR   Bits-------------------------------------
	.EQU	SPI3_CTLR_PCMCKP,		27
	.EQU	SPI3_CTLR_I2SCKS1,		26
	.EQU	SPI3_CTLR_I2SCKS0,		25
	.EQU	SPI3_CTLR_PCMS,		24
	.EQU	SPI3_CTLR_I2SSS1,		23
	.EQU	SPI3_CTLR_I2SSS0,		22
	.EQU	SPI3_CTLR_I2SMC1,		21
	.EQU	SPI3_CTLR_I2SMC0,		20
	.EQU	SPI3_CTLR_MCKOS,		18
	.EQU	SPI3_CTLR_I2SMD,		16
	.EQU	SPI3_CTLR_SSEL1,		15
	.EQU	SPI3_CTLR_SSEL0,		14
	.EQU	SPI3_CTLR_SPIBS1,		13
	.EQU	SPI3_CTLR_SPIBS0,		12
	.EQU	SPI3_CTLR_SPICKE,		9
	.EQU	SPI3_CTLR_SPICKP,		8
	.EQU	SPI3_CTLR_SPIIOS,		7
	.EQU	SPI3_CTLR_SPIDS,		6
	.EQU	SPI3_CTLR_SPICKS1,		5
	.EQU	SPI3_CTLR_SPICKS0,		4
	.EQU	SPI3_CTLR_SPIMS2,		3
	.EQU	SPI3_CTLR_SPIMS1,		2
	.EQU	SPI3_CTLR_SPIMS0,		1
	.EQU	SPI3_CTLR_SPIEN,		0
//  register-------------------------------------
	.EQU	SPI3_BUFR,		0x40002108
//  0x4000 2108  SPI3_BUFR   Bits-------------------------------------
	.EQU	SPI3_BUFR_SPIBUF31,		31
	.EQU	SPI3_BUFR_SPIBUF30,		30
	.EQU	SPI3_BUFR_SPIBUF29,		29
	.EQU	SPI3_BUFR_SPIBUF28,		28
	.EQU	SPI3_BUFR_SPIBUF27,		27
	.EQU	SPI3_BUFR_SPIBUF26,		26
	.EQU	SPI3_BUFR_SPIBUF25,		25
	.EQU	SPI3_BUFR_SPIBUF24,		24
	.EQU	SPI3_BUFR_SPIBUF23,		23
	.EQU	SPI3_BUFR_SPIBUF22,		22
	.EQU	SPI3_BUFR_SPIBUF21,		21
	.EQU	SPI3_BUFR_SPIBUF20,		20
	.EQU	SPI3_BUFR_SPIBUF19,		19
	.EQU	SPI3_BUFR_SPIBUF18,		18
	.EQU	SPI3_BUFR_SPIBUF17,		17
	.EQU	SPI3_BUFR_SPIBUF16,		16
	.EQU	SPI3_BUFR_SPIBUF15,		15
	.EQU	SPI3_BUFR_SPIBUF14,		14
	.EQU	SPI3_BUFR_SPIBUF13,		13
	.EQU	SPI3_BUFR_SPIBUF12,		12
	.EQU	SPI3_BUFR_SPIBUF11,		11
	.EQU	SPI3_BUFR_SPIBUF10,		10
	.EQU	SPI3_BUFR_SPIBUF9,		9
	.EQU	SPI3_BUFR_SPIBUF8,		8
	.EQU	SPI3_BUFR_SPIBUF7,		7
	.EQU	SPI3_BUFR_SPIBUF6,		6
	.EQU	SPI3_BUFR_SPIBUF5,		5
	.EQU	SPI3_BUFR_SPIBUF4,		4
	.EQU	SPI3_BUFR_SPIBUF3,		3
	.EQU	SPI3_BUFR_SPIBUF2,		2
	.EQU	SPI3_BUFR_SPIBUF1,		1
	.EQU	SPI3_BUFR_SPIBUF0,		0
//  register-------------------------------------
	.EQU	SPI3_STR,		0x4000210C
//  0x4000 210C  SPI3_STR   Bits-------------------------------------
	.EQU	SPI3_STR_STXDE,		21
	.EQU	SPI3_STR_SRCDE,		20
	.EQU	SPI3_STR_UDRIC,		18
	.EQU	SPI3_STR_TOVFIC,		17
	.EQU	SPI3_STR_ROVFIC,		16
	.EQU	SPI3_STR_TNEIE,		15
	.EQU	SPI3_STR_RNEIE,		14
	.EQU	SPI3_STR_TOVFIE,		13
	.EQU	SPI3_STR_ROVFIE,		12
	.EQU	SPI3_STR_UDRIE,		11
	.EQU	SPI3_STR_UDRIF,		6
	.EQU	SPI3_STR_TOVFIF,		5
	.EQU	SPI3_STR_ROVFIF,		4
	.EQU	SPI3_STR_CHSIDE,		3
	.EQU	SPI3_STR_TNE,		2
	.EQU	SPI3_STR_RNE,		1
	.EQU	SPI3_STR_SPIBUSY,		0
//  register-------------------------------------
	.EQU	I2C3_CTLR,		0x40002380
//  0x4000 2380  I2C3_CTLR   Bits-------------------------------------
	.EQU	I2C3_CTLR_ADRL,		31
	.EQU	I2C3_CTLR_ALERT,		27
	.EQU	I2C3_CTLR_ARPEN,		26
	.EQU	I2C3_CTLR_SMBT,		25
	.EQU	I2C3_CTLR_SMBUS,		24
	.EQU	I2C3_CTLR_NMENA,		22
	.EQU	I2C3_CTLR_ENASCL,		21
	.EQU	I2C3_CTLR_MTHALL,		20
	.EQU	I2C3_CTLR_I2CCKDIV1,		19
	.EQU	I2C3_CTLR_I2CCKDIV0,		18
	.EQU	I2C3_CTLR_I2CCKS1,		17
	.EQU	I2C3_CTLR_I2CCKS0,		16
	.EQU	I2C3_CTLR_A10MSKEN,		15
	.EQU	I2C3_CTLR_GCEN,		14
	.EQU	I2C3_CTLR_ACKDT,		13
	.EQU	I2C3_CTLR_ACKEN,		12
	.EQU	I2C3_CTLR_SCLNOSTR,		11
	.EQU	I2C3_CTLR_PEN,		10
	.EQU	I2C3_CTLR_SEN,		8
	.EQU	I2C3_CTLR_DHCNT3,		7
	.EQU	I2C3_CTLR_DHCNT2,		6
	.EQU	I2C3_CTLR_DHCNT1,		5
	.EQU	I2C3_CTLR_DHCNT0,		4
	.EQU	I2C3_CTLR_BADR10,		1
	.EQU	I2C3_CTLR_I2CEN,		0
//  register-------------------------------------
	.EQU	I2C3_SR,		0x40002384
//  0x4000 2384  I2C3_SR   Bits-------------------------------------
	.EQU	I2C3_SR_BUSY,		20
	.EQU	I2C3_SR_OVERIF,		19
	.EQU	I2C3_SR_BERRIF,		18
	.EQU	I2C3_SR_ITXDF,		17
	.EQU	I2C3_SR_IRCDF,		16
	.EQU	I2C3_SR_TXBE,		13
	.EQU	I2C3_SR_RCBF,		12
	.EQU	I2C3_SR_ISIF,		11
	.EQU	I2C3_SR_SMBDIF,		10
	.EQU	I2C3_SR_SMBHIF,		9
	.EQU	I2C3_SR_SMBAIF,		8
	.EQU	I2C3_SR_RNW,		7
	.EQU	I2C3_SR_ARBLIF,		6
	.EQU	I2C3_SR_AFIF,		5
	.EQU	I2C3_SR_DATA,		4
	.EQU	I2C3_SR_ADD10,		3
	.EQU	I2C3_SR_ADDR,		2
	.EQU	I2C3_SR_PIF,		1
	.EQU	I2C3_SR_SIF,		0
//  register-------------------------------------
	.EQU	I2C3_BUFR,		0x40002388
//  0x4000 2388  I2C3_BUFR   Bits-------------------------------------
	.EQU	I2C3_BUFR_I2CBUF9,		9
	.EQU	I2C3_BUFR_I2CBUF8,		8
	.EQU	I2C3_BUFR_I2CBUF7,		7
	.EQU	I2C3_BUFR_I2CBUF6,		6
	.EQU	I2C3_BUFR_I2CBUF5,		5
	.EQU	I2C3_BUFR_I2CBUF4,		4
	.EQU	I2C3_BUFR_I2CBUF3,		3
	.EQU	I2C3_BUFR_I2CBUF2,		2
	.EQU	I2C3_BUFR_I2CBUF1,		1
	.EQU	I2C3_BUFR_I2CBUF0,		0
//  register-------------------------------------
	.EQU	I2C3_ADDR0,	0x4000238C
//  0x4000 238C  I2C3_ADDR0   Bits-------------------------------------
	.EQU	I2C3_ADDR0_I2CMSK9,		25
	.EQU	I2C3_ADDR0_I2CMSK8,		24
	.EQU	I2C3_ADDR0_I2CMSK7,		23
	.EQU	I2C3_ADDR0_I2CMSK6,		22
	.EQU	I2C3_ADDR0_I2CMSK5,		21
	.EQU	I2C3_ADDR0_I2CMSK4,		20
	.EQU	I2C3_ADDR0_I2CMSK3,		19
	.EQU	I2C3_ADDR0_I2CMSK2,		18
	.EQU	I2C3_ADDR0_I2CMSK1,		17
	.EQU	I2C3_ADDR0_I2CMSK0,		16
	.EQU	I2C3_ADDR0_I2CADD9,		9
	.EQU	I2C3_ADDR0_I2CADD8,		8
	.EQU	I2C3_ADDR0_I2CADD7,		7
	.EQU	I2C3_ADDR0_I2CADD6,		6
	.EQU	I2C3_ADDR0_I2CADD5,		5
	.EQU	I2C3_ADDR0_I2CADD4,		4
	.EQU	I2C3_ADDR0_I2CADD3,		3
	.EQU	I2C3_ADDR0_I2CADD2,		2
	.EQU	I2C3_ADDR0_I2CADD1,		1
	.EQU	I2C3_ADDR0_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C3_BRGR,		0x40002390
//  0x4000 2390  I2C3_BRGR   Bits-------------------------------------
	.EQU	I2C3_BRGR_I2CBRGL15,		31
	.EQU	I2C3_BRGR_I2CBRGL14,		30
	.EQU	I2C3_BRGR_I2CBRGL13,		29
	.EQU	I2C3_BRGR_I2CBRGL12,		28
	.EQU	I2C3_BRGR_I2CBRGL11,		27
	.EQU	I2C3_BRGR_I2CBRGL10,		26
	.EQU	I2C3_BRGR_I2CBRGL9,		25
	.EQU	I2C3_BRGR_I2CBRGL8,		24
	.EQU	I2C3_BRGR_I2CBRGL7,		23
	.EQU	I2C3_BRGR_I2CBRGL6,		22
	.EQU	I2C3_BRGR_I2CBRGL5,		21
	.EQU	I2C3_BRGR_I2CBRGL4,		20
	.EQU	I2C3_BRGR_I2CBRGL3,		19
	.EQU	I2C3_BRGR_I2CBRGL2,		18
	.EQU	I2C3_BRGR_I2CBRGL1,		17
	.EQU	I2C3_BRGR_I2CBRGL0,		16
	.EQU	I2C3_BRGR_I2CBRGH15,		15
	.EQU	I2C3_BRGR_I2CBRGH14,		14
	.EQU	I2C3_BRGR_I2CBRGH13,		13
	.EQU	I2C3_BRGR_I2CBRGH12,		12
	.EQU	I2C3_BRGR_I2CBRGH11,		11
	.EQU	I2C3_BRGR_I2CBRGH10,		10
	.EQU	I2C3_BRGR_I2CBRGH9,		9
	.EQU	I2C3_BRGR_I2CBRGH8,		8
	.EQU	I2C3_BRGR_I2CBRGH7,		7
	.EQU	I2C3_BRGR_I2CBRGH6,		6
	.EQU	I2C3_BRGR_I2CBRGH5,		5
	.EQU	I2C3_BRGR_I2CBRGH4,		4
	.EQU	I2C3_BRGR_I2CBRGH3,		3
	.EQU	I2C3_BRGR_I2CBRGH2,		2
	.EQU	I2C3_BRGR_I2CBRGH1,		1
	.EQU	I2C3_BRGR_I2CBRGH0,		0
//  register-------------------------------------
	.EQU	I2C3_ADDR1,	0x40002394
//  0x4000 2394  I2C3_ADDR1   Bits-------------------------------------
	.EQU	I2C3_ADDR1_I2CMSK9,		25
	.EQU	I2C3_ADDR1_I2CMSK8,		24
	.EQU	I2C3_ADDR1_I2CMSK7,		23
	.EQU	I2C3_ADDR1_I2CMSK6,		22
	.EQU	I2C3_ADDR1_I2CMSK5,		21
	.EQU	I2C3_ADDR1_I2CMSK4,		20
	.EQU	I2C3_ADDR1_I2CMSK3,		19
	.EQU	I2C3_ADDR1_I2CMSK2,		18
	.EQU	I2C3_ADDR1_I2CMSK1,		17
	.EQU	I2C3_ADDR1_I2CMSK0,		16
	.EQU	I2C3_ADDR1_I2CADD9,		9
	.EQU	I2C3_ADDR1_I2CADD8,		8
	.EQU	I2C3_ADDR1_I2CADD7,		7
	.EQU	I2C3_ADDR1_I2CADD6,		6
	.EQU	I2C3_ADDR1_I2CADD5,		5
	.EQU	I2C3_ADDR1_I2CADD4,		4
	.EQU	I2C3_ADDR1_I2CADD3,		3
	.EQU	I2C3_ADDR1_I2CADD2,		2
	.EQU	I2C3_ADDR1_I2CADD1,		1
	.EQU	I2C3_ADDR1_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C3_ADDR2,	0x40002398
//  0x4000 2398  I2C3_ADDR2   Bits-------------------------------------
	.EQU	I2C3_ADDR2_I2CMSK9,		25
	.EQU	I2C3_ADDR2_I2CMSK8,		24
	.EQU	I2C3_ADDR2_I2CMSK7,		23
	.EQU	I2C3_ADDR2_I2CMSK6,		22
	.EQU	I2C3_ADDR2_I2CMSK5,		21
	.EQU	I2C3_ADDR2_I2CMSK4,		20
	.EQU	I2C3_ADDR2_I2CMSK3,		19
	.EQU	I2C3_ADDR2_I2CMSK2,		18
	.EQU	I2C3_ADDR2_I2CMSK1,		17
	.EQU	I2C3_ADDR2_I2CMSK0,		16
	.EQU	I2C3_ADDR2_I2CADD9,		9
	.EQU	I2C3_ADDR2_I2CADD8,		8
	.EQU	I2C3_ADDR2_I2CADD7,		7
	.EQU	I2C3_ADDR2_I2CADD6,		6
	.EQU	I2C3_ADDR2_I2CADD5,		5
	.EQU	I2C3_ADDR2_I2CADD4,		4
	.EQU	I2C3_ADDR2_I2CADD3,		3
	.EQU	I2C3_ADDR2_I2CADD2,		2
	.EQU	I2C3_ADDR2_I2CADD1,		1
	.EQU	I2C3_ADDR2_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C3_ADDR3,	0x4000239C
//  0x4000 239C  I2C3_ADDR3   Bits-------------------------------------
	.EQU	I2C3_ADDR3_I2CMSK9,		25
	.EQU	I2C3_ADDR3_I2CMSK8,		24
	.EQU	I2C3_ADDR3_I2CMSK7,		23
	.EQU	I2C3_ADDR3_I2CMSK6,		22
	.EQU	I2C3_ADDR3_I2CMSK5,		21
	.EQU	I2C3_ADDR3_I2CMSK4,		20
	.EQU	I2C3_ADDR3_I2CMSK3,		19
	.EQU	I2C3_ADDR3_I2CMSK2,		18
	.EQU	I2C3_ADDR3_I2CMSK1,		17
	.EQU	I2C3_ADDR3_I2CMSK0,		16
	.EQU	I2C3_ADDR3_I2CADD9,		9
	.EQU	I2C3_ADDR3_I2CADD8,		8
	.EQU	I2C3_ADDR3_I2CADD7,		7
	.EQU	I2C3_ADDR3_I2CADD6,		6
	.EQU	I2C3_ADDR3_I2CADD5,		5
	.EQU	I2C3_ADDR3_I2CADD4,		4
	.EQU	I2C3_ADDR3_I2CADD3,		3
	.EQU	I2C3_ADDR3_I2CADD2,		2
	.EQU	I2C3_ADDR3_I2CADD1,		1
	.EQU	I2C3_ADDR3_I2CADD0,		0
//  register-------------------------------------
	.EQU	I2C3_IER,		0x400023A0
//  0x4000 23A0  I2C3_IER   Bits-------------------------------------
	.EQU	I2C3_IER_OVERIE,		19
	.EQU	I2C3_IER_BERRIE,		18
	.EQU	I2C3_IER_ITXDE,		17
	.EQU	I2C3_IER_IRCDE,		16
	.EQU	I2C3_IER_ISIE,		11
	.EQU	I2C3_IER_SMBDIE,		10
	.EQU	I2C3_IER_SMBHIE,		9
	.EQU	I2C3_IER_SMBAIE,		8
	.EQU	I2C3_IER_ARBLIE,		6
	.EQU	I2C3_IER_AFIE,		5
	.EQU	I2C3_IER_PIE,		1
	.EQU	I2C3_IER_SIE,		0
//  register-------------------------------------
	.EQU	PLL_CTL,		0x40002580
//  0x4000 2580  PLL_CTL   Bits-------------------------------------
	.EQU	PLL_CTL_OD1,		21
	.EQU	PLL_CTL_OD0,		20
	.EQU	PLL_CTL_N3,			19
	.EQU	PLL_CTL_N2,			18
	.EQU	PLL_CTL_N1,			17
	.EQU	PLL_CTL_N0,			16
	.EQU	PLL_CTL_M13,			15
	.EQU	PLL_CTL_M12,			14
	.EQU	PLL_CTL_M11,			13
	.EQU	PLL_CTL_M10,			12
	.EQU	PLL_CTL_M9,			11
	.EQU	PLL_CTL_M8,			10
	.EQU	PLL_CTL_M7,			9
	.EQU	PLL_CTL_M6,			8
	.EQU	PLL_CTL_M5,			7
	.EQU	PLL_CTL_M4,			6
	.EQU	PLL_CTL_M3,			5
	.EQU	PLL_CTL_M2,			4
	.EQU	PLL_CTL_M1,			3
	.EQU	PLL_CTL_M0,			2
	.EQU	PLL_CTL_PDRST,		0
//  register-------------------------------------
	.EQU	PCLK_CTL0,		0x40002640
//  0x4000 2640  PCLK_CTL0   Bits-------------------------------------
	.EQU	PCLK_CTL0_GPIOHCLKEN,		7
	.EQU	PCLK_CTL0_GPIOGCLKEN,		6
	.EQU	PCLK_CTL0_GPIOFCLKEN,		5
	.EQU	PCLK_CTL0_GPIOECLKEN,		4
	.EQU	PCLK_CTL0_GPIODCLKEN,		3
	.EQU	PCLK_CTL0_GPIOCCLKEN,		2
	.EQU	PCLK_CTL0_GPIOBCLKEN,		1
	.EQU	PCLK_CTL0_GPIOACLKEN,		0
//  register-------------------------------------
	.EQU	PCLK_CTL1,		0x40002644
//  0x4000 2644  PCLK_CTL1   Bits-------------------------------------
	.EQU	PCLK_CTL1_I2C2CLKEN,		28
	.EQU	PCLK_CTL1_I2C1CLKEN,		27
	.EQU	PCLK_CTL1_I2C0CLKEN,		26
	.EQU	PCLK_CTL1_SPI1CLKEN,		25
	.EQU	PCLK_CTL1_SPI0CLKEN,		24
	.EQU	PCLK_CTL1_USART4CLKEN,		23
	.EQU	PCLK_CTL1_USART2CLKEN,		21
	.EQU	PCLK_CTL1_USART1CLKEN,		20
	.EQU	PCLK_CTL1_USART0CLKEN,		19
	.EQU	PCLK_CTL1_T0CLKEN,		17
	.EQU	PCLK_CTL1_CMPCLKEN,		16
	.EQU	PCLK_CTL1_DAC1CLKEN,		15
	.EQU	PCLK_CTL1_DAC0CLKEN,		14
	.EQU	PCLK_CTL1_ADC2CLKEN,		13
	.EQU	PCLK_CTL1_ADC1CLKEN,		12
	.EQU	PCLK_CTL1_ADC0CLKEN,		11
	.EQU	PCLK_CTL1_QEI0CLKEN,		10
	.EQU	PCLK_CTL1_T5T6CLKEN,		6
	.EQU	PCLK_CTL1_T4CLKEN,		5
	.EQU	PCLK_CTL1_T3CLKEN,		4
	.EQU	PCLK_CTL1_T2CLKEN,		3
	.EQU	PCLK_CTL1_T1CLKEN,		2
	.EQU	PCLK_CTL1_QEI1CLKEN,		1
//  register-------------------------------------
	.EQU	PCLK_CTL2,		0x40002648
//  0x4000 2648  PCLK_CTL2   Bits-------------------------------------
	.EQU	PCLK_CTL2_USART7CLKEN,		31
	.EQU	PCLK_CTL2_USART5CLKEN,		29
	.EQU	PCLK_CTL2_DAC3CLKEN,		28
	.EQU	PCLK_CTL2_DAC2CLKEN,		27
	.EQU	PCLK_CTL2_T21CLKEN,		24
	.EQU	PCLK_CTL2_T19CLKEN,		22
	.EQU	PCLK_CTL2_T18CLKEN,		21
	.EQU	PCLK_CTL2_T14CLKEN,		16
	.EQU	PCLK_CTL2_DMA1CLKEN,		14
	.EQU	PCLK_CTL2_DMA0CLKEN,		12
	.EQU	PCLK_CTL2_EPWM16CLKEN,		11
	.EQU	PCLK_CTL2_EPWM13CLKEN,		10
	.EQU	PCLK_CTL2_EPWM12CLKEN,		9
	.EQU	PCLK_CTL2_EPWM11CLKEN,		8
	.EQU	PCLK_CTL2_WWDTCLKEN,		5
//  register-------------------------------------
	.EQU	PCLK_CTL3,		0x4000264C
//  0x4000 264C  PCLK_CTL3   Bits-------------------------------------
	.EQU	PCLK_CTL3_RTCCLKEN,		31
	.EQU	PCLK_CTL3_CANFD7CLKEN,		30
	.EQU	PCLK_CTL3_CANFD6CLKEN,		29
	.EQU	PCLK_CTL3_RNGCLKEN,		28
	.EQU	PCLK_CTL3_EWDTCLKEN,		27
	.EQU	PCLK_CTL3_ECFLGPCLKEN,		26
	.EQU	PCLK_CTL3_FLEXRMCLKEN,		25
	.EQU	PCLK_CTL3_FDC2CLKEN,		24
	.EQU	PCLK_CTL3_FDC1CLKEN,		23
	.EQU	PCLK_CTL3_FDC0CLKEN,		22
	.EQU	PCLK_CTL3_FLEXMUXCLKEN,		21
	.EQU	PCLK_CTL3_OPCLKEN,		20
	.EQU	PCLK_CTL3_CFGLCLKEN,		19
	.EQU	PCLK_CTL3_CAN4CLKEN,		17
	.EQU	PCLK_CTL3_EXICCLKEN,		16
	.EQU	PCLK_CTL3_AESCLKEN,		14
	.EQU	PCLK_CTL3_CRCCLKEN,		13
	.EQU	PCLK_CTL3_HRCAP2CLKEN,		10
	.EQU	PCLK_CTL3_HRCAP1CLKEN,		9
	.EQU	PCLK_CTL3_HRCAP0CLKEN,		8
	.EQU	PCLK_CTL3_I2C3CLKEN,		7
	.EQU	PCLK_CTL3_SPI3CLKEN,		2
	.EQU	PCLK_CTL3_SPI2CLKEN,		1
//  register-------------------------------------
	.EQU	CRC_CTL,		0x40002680
//  0X4000 2680  CRC_CTL   Bits-------------------------------------
	.EQU	CRC_CTL_RSLTREV,		7
	.EQU	CRC_CTL_DATAREV,		5
	.EQU	CRC_CTL_DATASIZE1,		3
	.EQU	CRC_CTL_DATASIZE0,		2
	.EQU	CRC_CTL_RSET,		0
//  register-------------------------------------
	.EQU	CRC_DATA,		0x40002684
//  0X4000 2684  CRC_DATA   Bits-------------------------------------
	.EQU	CRC_DATA_CRCDATA31,		31
	.EQU	CRC_DATA_CRCDATA30,		30
	.EQU	CRC_DATA_CRCDATA29,		29
	.EQU	CRC_DATA_CRCDATA28,		28
	.EQU	CRC_DATA_CRCDATA27,		27
	.EQU	CRC_DATA_CRCDATA26,		26
	.EQU	CRC_DATA_CRCDATA25,		25
	.EQU	CRC_DATA_CRCDATA24,		24
	.EQU	CRC_DATA_CRCDATA23,		23
	.EQU	CRC_DATA_CRCDATA22,		22
	.EQU	CRC_DATA_CRCDATA21,		21
	.EQU	CRC_DATA_CRCDATA20,		20
	.EQU	CRC_DATA_CRCDATA19,		19
	.EQU	CRC_DATA_CRCDATA18,		18
	.EQU	CRC_DATA_CRCDATA17,		17
	.EQU	CRC_DATA_CRCDATA16,		16
	.EQU	CRC_DATA_CRCDATA15,		15
	.EQU	CRC_DATA_CRCDATA14,		14
	.EQU	CRC_DATA_CRCDATA13,		13
	.EQU	CRC_DATA_CRCDATA12,		12
	.EQU	CRC_DATA_CRCDATA11,		11
	.EQU	CRC_DATA_CRCDATA10,		10
	.EQU	CRC_DATA_CRCDATA9,		9
	.EQU	CRC_DATA_CRCDATA8,		8
	.EQU	CRC_DATA_CRCDATA7,		7
	.EQU	CRC_DATA_CRCDATA6,		6
	.EQU	CRC_DATA_CRCDATA5,		5
	.EQU	CRC_DATA_CRCDATA4,		4
	.EQU	CRC_DATA_CRCDATA3,		3
	.EQU	CRC_DATA_CRCDATA2,		2
	.EQU	CRC_DATA_CRCDATA1,		1
	.EQU	CRC_DATA_CRCDATA0,		0
//  register-------------------------------------
	.EQU	CRC_RSLT,		0x40002688
//  0X4000 2688  CRC_RSLT   Bits-------------------------------------
	.EQU	CRC_RSLT_CRCRSLT31,		31
	.EQU	CRC_RSLT_CRCRSLT30,		30
	.EQU	CRC_RSLT_CRCRSLT29,		29
	.EQU	CRC_RSLT_CRCRSLT28,		28
	.EQU	CRC_RSLT_CRCRSLT27,		27
	.EQU	CRC_RSLT_CRCRSLT26,		26
	.EQU	CRC_RSLT_CRCRSLT25,		25
	.EQU	CRC_RSLT_CRCRSLT24,		24
	.EQU	CRC_RSLT_CRCRSLT23,		23
	.EQU	CRC_RSLT_CRCRSLT22,		22
	.EQU	CRC_RSLT_CRCRSLT21,		21
	.EQU	CRC_RSLT_CRCRSLT20,		20
	.EQU	CRC_RSLT_CRCRSLT19,		19
	.EQU	CRC_RSLT_CRCRSLT18,		18
	.EQU	CRC_RSLT_CRCRSLT17,		17
	.EQU	CRC_RSLT_CRCRSLT16,		16
	.EQU	CRC_RSLT_CRCRSLT15,		15
	.EQU	CRC_RSLT_CRCRSLT14,		14
	.EQU	CRC_RSLT_CRCRSLT13,		13
	.EQU	CRC_RSLT_CRCRSLT12,		12
	.EQU	CRC_RSLT_CRCRSLT11,		11
	.EQU	CRC_RSLT_CRCRSLT10,		10
	.EQU	CRC_RSLT_CRCRSLT9,		9
	.EQU	CRC_RSLT_CRCRSLT8,		8
	.EQU	CRC_RSLT_CRCRSLT7,		7
	.EQU	CRC_RSLT_CRCRSLT6,		6
	.EQU	CRC_RSLT_CRCRSLT5,		5
	.EQU	CRC_RSLT_CRCRSLT4,		4
	.EQU	CRC_RSLT_CRCRSLT3,		3
	.EQU	CRC_RSLT_CRCRSLT2,		2
	.EQU	CRC_RSLT_CRCRSLT1,		1
	.EQU	CRC_RSLT_CRCRSLT0,		0
//  register-------------------------------------
	.EQU	CRC_INIT,		0x4000268C
//  0X4000 268C  CRC_INIT   Bits-------------------------------------
	.EQU	CRC_INIT_CRCINIT31,		31
	.EQU	CRC_INIT_CRCINIT30,		30
	.EQU	CRC_INIT_CRCINIT29,		29
	.EQU	CRC_INIT_CRCINIT28,		28
	.EQU	CRC_INIT_CRCINIT27,		27
	.EQU	CRC_INIT_CRCINIT26,		26
	.EQU	CRC_INIT_CRCINIT25,		25
	.EQU	CRC_INIT_CRCINIT24,		24
	.EQU	CRC_INIT_CRCINIT23,		23
	.EQU	CRC_INIT_CRCINIT22,		22
	.EQU	CRC_INIT_CRCINIT21,		21
	.EQU	CRC_INIT_CRCINIT20,		20
	.EQU	CRC_INIT_CRCINIT19,		19
	.EQU	CRC_INIT_CRCINIT18,		18
	.EQU	CRC_INIT_CRCINIT17,		17
	.EQU	CRC_INIT_CRCINIT16,		16
	.EQU	CRC_INIT_CRCINIT15,		15
	.EQU	CRC_INIT_CRCINIT14,		14
	.EQU	CRC_INIT_CRCINIT13,		13
	.EQU	CRC_INIT_CRCINIT12,		12
	.EQU	CRC_INIT_CRCINIT11,		11
	.EQU	CRC_INIT_CRCINIT10,		10
	.EQU	CRC_INIT_CRCINIT9,		9
	.EQU	CRC_INIT_CRCINIT8,		8
	.EQU	CRC_INIT_CRCINIT7,		7
	.EQU	CRC_INIT_CRCINIT6,		6
	.EQU	CRC_INIT_CRCINIT5,		5
	.EQU	CRC_INIT_CRCINIT4,		4
	.EQU	CRC_INIT_CRCINIT3,		3
	.EQU	CRC_INIT_CRCINIT2,		2
	.EQU	CRC_INIT_CRCINIT1,		1
	.EQU	CRC_INIT_CRCINIT0,		0
//  register-------------------------------------
	.EQU	CRC_PLN,		0x40002690
//  0X4000 2690  CRC_PLN   Bits-------------------------------------
	.EQU	CRC_PLN_CRCPLN31,		31
	.EQU	CRC_PLN_CRCPLN30,		30
	.EQU	CRC_PLN_CRCPLN29,		29
	.EQU	CRC_PLN_CRCPLN28,		28
	.EQU	CRC_PLN_CRCPLN27,		27
	.EQU	CRC_PLN_CRCPLN26,		26
	.EQU	CRC_PLN_CRCPLN25,		25
	.EQU	CRC_PLN_CRCPLN24,		24
	.EQU	CRC_PLN_CRCPLN23,		23
	.EQU	CRC_PLN_CRCPLN22,		22
	.EQU	CRC_PLN_CRCPLN21,		21
	.EQU	CRC_PLN_CRCPLN20,		20
	.EQU	CRC_PLN_CRCPLN19,		19
	.EQU	CRC_PLN_CRCPLN18,		18
	.EQU	CRC_PLN_CRCPLN17,		17
	.EQU	CRC_PLN_CRCPLN16,		16
	.EQU	CRC_PLN_CRCPLN15,		15
	.EQU	CRC_PLN_CRCPLN14,		14
	.EQU	CRC_PLN_CRCPLN13,		13
	.EQU	CRC_PLN_CRCPLN12,		12
	.EQU	CRC_PLN_CRCPLN11,		11
	.EQU	CRC_PLN_CRCPLN10,		10
	.EQU	CRC_PLN_CRCPLN9,		9
	.EQU	CRC_PLN_CRCPLN8,		8
	.EQU	CRC_PLN_CRCPLN7,		7
	.EQU	CRC_PLN_CRCPLN6,		6
	.EQU	CRC_PLN_CRCPLN5,		5
	.EQU	CRC_PLN_CRCPLN4,		4
	.EQU	CRC_PLN_CRCPLN3,		3
	.EQU	CRC_PLN_CRCPLN2,		2
	.EQU	CRC_PLN_CRCPLN1,		1
	.EQU	CRC_PLN_CRCPLN0,		0
//  register-------------------------------------
	.EQU	CRC_RXOR,		0x40002694
//  0X4000 2694  CRC_RXOR   Bits-------------------------------------
	.EQU	CRC_RXOR_CRCRXOR31,		31
	.EQU	CRC_RXOR_CRCRXOR30,		30
	.EQU	CRC_RXOR_CRCRXOR29,		29
	.EQU	CRC_RXOR_CRCRXOR28,		28
	.EQU	CRC_RXOR_CRCRXOR27,		27
	.EQU	CRC_RXOR_CRCRXOR26,		26
	.EQU	CRC_RXOR_CRCRXOR25,		25
	.EQU	CRC_RXOR_CRCRXOR24,		24
	.EQU	CRC_RXOR_CRCRXOR23,		23
	.EQU	CRC_RXOR_CRCRXOR22,		22
	.EQU	CRC_RXOR_CRCRXOR21,		21
	.EQU	CRC_RXOR_CRCRXOR20,		20
	.EQU	CRC_RXOR_CRCRXOR19,		19
	.EQU	CRC_RXOR_CRCRXOR18,		18
	.EQU	CRC_RXOR_CRCRXOR17,		17
	.EQU	CRC_RXOR_CRCRXOR16,		16
	.EQU	CRC_RXOR_CRCRXOR15,		15
	.EQU	CRC_RXOR_CRCRXOR14,		14
	.EQU	CRC_RXOR_CRCRXOR13,		13
	.EQU	CRC_RXOR_CRCRXOR12,		12
	.EQU	CRC_RXOR_CRCRXOR11,		11
	.EQU	CRC_RXOR_CRCRXOR10,		10
	.EQU	CRC_RXOR_CRCRXOR9,		9
	.EQU	CRC_RXOR_CRCRXOR8,		8
	.EQU	CRC_RXOR_CRCRXOR7,		7
	.EQU	CRC_RXOR_CRCRXOR6,		6
	.EQU	CRC_RXOR_CRCRXOR5,		5
	.EQU	CRC_RXOR_CRCRXOR4,		4
	.EQU	CRC_RXOR_CRCRXOR3,		3
	.EQU	CRC_RXOR_CRCRXOR2,		2
	.EQU	CRC_RXOR_CRCRXOR1,		1
	.EQU	CRC_RXOR_CRCRXOR0,		0
//  register-------------------------------------
	.EQU	CRC_IDATA,		0x40002698
//  0X4000 2698  CRC_IDATA   Bits-------------------------------------
	.EQU	CRC_IDATA_CRCIDATA31,		31
	.EQU	CRC_IDATA_CRCIDATA30,		30
	.EQU	CRC_IDATA_CRCIDATA29,		29
	.EQU	CRC_IDATA_CRCIDATA28,		28
	.EQU	CRC_IDATA_CRCIDATA27,		27
	.EQU	CRC_IDATA_CRCIDATA26,		26
	.EQU	CRC_IDATA_CRCIDATA25,		25
	.EQU	CRC_IDATA_CRCIDATA24,		24
	.EQU	CRC_IDATA_CRCIDATA23,		23
	.EQU	CRC_IDATA_CRCIDATA22,		22
	.EQU	CRC_IDATA_CRCIDATA21,		21
	.EQU	CRC_IDATA_CRCIDATA20,		20
	.EQU	CRC_IDATA_CRCIDATA19,		19
	.EQU	CRC_IDATA_CRCIDATA18,		18
	.EQU	CRC_IDATA_CRCIDATA17,		17
	.EQU	CRC_IDATA_CRCIDATA16,		16
	.EQU	CRC_IDATA_CRCIDATA15,		15
	.EQU	CRC_IDATA_CRCIDATA14,		14
	.EQU	CRC_IDATA_CRCIDATA13,		13
	.EQU	CRC_IDATA_CRCIDATA12,		12
	.EQU	CRC_IDATA_CRCIDATA11,		11
	.EQU	CRC_IDATA_CRCIDATA10,		10
	.EQU	CRC_IDATA_CRCIDATA9,		9
	.EQU	CRC_IDATA_CRCIDATA8,		8
	.EQU	CRC_IDATA_CRCIDATA7,		7
	.EQU	CRC_IDATA_CRCIDATA6,		6
	.EQU	CRC_IDATA_CRCIDATA5,		5
	.EQU	CRC_IDATA_CRCIDATA4,		4
	.EQU	CRC_IDATA_CRCIDATA3,		3
	.EQU	CRC_IDATA_CRCIDATA2,		2
	.EQU	CRC_IDATA_CRCIDATA1,		1
	.EQU	CRC_IDATA_CRCIDATA0,		0
//  register-------------------------------------
	.EQU	CRC_TEMP,		0x4000269C
//  0X4000 269C  CRC_TEMP   Bits-------------------------------------
	.EQU	CRC_TEMP_CRCTEMP31,		31
	.EQU	CRC_TEMP_CRCTEMP30,		30
	.EQU	CRC_TEMP_CRCTEMP29,		29
	.EQU	CRC_TEMP_CRCTEMP28,		28
	.EQU	CRC_TEMP_CRCTEMP27,		27
	.EQU	CRC_TEMP_CRCTEMP26,		26
	.EQU	CRC_TEMP_CRCTEMP25,		25
	.EQU	CRC_TEMP_CRCTEMP24,		24
	.EQU	CRC_TEMP_CRCTEMP23,		23
	.EQU	CRC_TEMP_CRCTEMP22,		22
	.EQU	CRC_TEMP_CRCTEMP21,		21
	.EQU	CRC_TEMP_CRCTEMP20,		20
	.EQU	CRC_TEMP_CRCTEMP19,		19
	.EQU	CRC_TEMP_CRCTEMP18,		18
	.EQU	CRC_TEMP_CRCTEMP17,		17
	.EQU	CRC_TEMP_CRCTEMP16,		16
	.EQU	CRC_TEMP_CRCTEMP15,		15
	.EQU	CRC_TEMP_CRCTEMP14,		14
	.EQU	CRC_TEMP_CRCTEMP13,		13
	.EQU	CRC_TEMP_CRCTEMP12,		12
	.EQU	CRC_TEMP_CRCTEMP11,		11
	.EQU	CRC_TEMP_CRCTEMP10,		10
	.EQU	CRC_TEMP_CRCTEMP9,		9
	.EQU	CRC_TEMP_CRCTEMP8,		8
	.EQU	CRC_TEMP_CRCTEMP7,		7
	.EQU	CRC_TEMP_CRCTEMP6,		6
	.EQU	CRC_TEMP_CRCTEMP5,		5
	.EQU	CRC_TEMP_CRCTEMP4,		4
	.EQU	CRC_TEMP_CRCTEMP3,		3
	.EQU	CRC_TEMP_CRCTEMP2,		2
	.EQU	CRC_TEMP_CRCTEMP1,		1
	.EQU	CRC_TEMP_CRCTEMP0,		0
//  register-------------------------------------
	.EQU	AES_CTL,		0x40002700
//  0x4000 2700  AES_CTL   Bits-------------------------------------
	.EQU	AES_CTL_AESRUN,		31
	.EQU	AES_CTL_HSMODE,		30
	.EQU	AES_CTL_CBCEN,		20
	.EQU	AES_CTL_CKS1,		17
	.EQU	AES_CTL_CKS0,		16
	.EQU	AES_CTL_DIV2,		15
	.EQU	AES_CTL_DIV1,		14
	.EQU	AES_CTL_DIV0,		13
	.EQU	AES_CTL_RNDNUM4,		12
	.EQU	AES_CTL_RNDNUM3,		11
	.EQU	AES_CTL_RNDNUM2,		10
	.EQU	AES_CTL_RNDNUM1,		9
	.EQU	AES_CTL_RNDNUM0,		8
	.EQU	AES_CTL_KEYLEN2,		6
	.EQU	AES_CTL_KEYLEN1,		5
	.EQU	AES_CTL_KEYLEN0,		4
	.EQU	AES_CTL_SB0XINV,		3
	.EQU	AES_CTL_ENCRYPT,		2
	.EQU	AES_CTL_AESLIKE,		1
	.EQU	AES_CTL_AESEN,		0
//  register-------------------------------------
	.EQU	AES_INT,		0x40002704
//  0X4000 2704  AES_INT   Bits-------------------------------------
	.EQU	AES_INT_AESFIF,		2
	.EQU	AES_INT_AESFIC,		1
	.EQU	AES_INT_AESFIE,		0
//  register-------------------------------------
	.EQU	AES_INPUT0,	0x40002710
//  0X4000 2710  AES_INPUT0   Bits-------------------------------------
	.EQU	AES_INPUT0_AESINPUT31,		31
	.EQU	AES_INPUT0_AESINPUT30,		30
	.EQU	AES_INPUT0_AESINPUT29,		29
	.EQU	AES_INPUT0_AESINPUT28,		28
	.EQU	AES_INPUT0_AESINPUT27,		27
	.EQU	AES_INPUT0_AESINPUT26,		26
	.EQU	AES_INPUT0_AESINPUT25,		25
	.EQU	AES_INPUT0_AESINPUT24,		24
	.EQU	AES_INPUT0_AESINPUT23,		23
	.EQU	AES_INPUT0_AESINPUT22,		22
	.EQU	AES_INPUT0_AESINPUT21,		21
	.EQU	AES_INPUT0_AESINPUT20,		20
	.EQU	AES_INPUT0_AESINPUT19,		19
	.EQU	AES_INPUT0_AESINPUT18,		18
	.EQU	AES_INPUT0_AESINPUT17,		17
	.EQU	AES_INPUT0_AESINPUT16,		16
	.EQU	AES_INPUT0_AESINPUT15,		15
	.EQU	AES_INPUT0_AESINPUT14,		14
	.EQU	AES_INPUT0_AESINPUT13,		13
	.EQU	AES_INPUT0_AESINPUT12,		12
	.EQU	AES_INPUT0_AESINPUT11,		11
	.EQU	AES_INPUT0_AESINPUT10,		10
	.EQU	AES_INPUT0_AESINPUT9,		9
	.EQU	AES_INPUT0_AESINPUT8,		8
	.EQU	AES_INPUT0_AESINPUT7,		7
	.EQU	AES_INPUT0_AESINPUT6,		6
	.EQU	AES_INPUT0_AESINPUT5,		5
	.EQU	AES_INPUT0_AESINPUT4,		4
	.EQU	AES_INPUT0_AESINPUT3,		3
	.EQU	AES_INPUT0_AESINPUT2,		2
	.EQU	AES_INPUT0_AESINPUT1,		1
	.EQU	AES_INPUT0_AESINPUT0,		0
//  register-------------------------------------
	.EQU	AES_INPUT1,	0x40002714
//  0X4000 2714  AES_INPUT1   Bits-------------------------------------
	.EQU	AES_INPUT1_AESINPUT31,		31
	.EQU	AES_INPUT1_AESINPUT30,		30
	.EQU	AES_INPUT1_AESINPUT29,		29
	.EQU	AES_INPUT1_AESINPUT28,		28
	.EQU	AES_INPUT1_AESINPUT27,		27
	.EQU	AES_INPUT1_AESINPUT26,		26
	.EQU	AES_INPUT1_AESINPUT25,		25
	.EQU	AES_INPUT1_AESINPUT24,		24
	.EQU	AES_INPUT1_AESINPUT23,		23
	.EQU	AES_INPUT1_AESINPUT22,		22
	.EQU	AES_INPUT1_AESINPUT21,		21
	.EQU	AES_INPUT1_AESINPUT20,		20
	.EQU	AES_INPUT1_AESINPUT19,		19
	.EQU	AES_INPUT1_AESINPUT18,		18
	.EQU	AES_INPUT1_AESINPUT17,		17
	.EQU	AES_INPUT1_AESINPUT16,		16
	.EQU	AES_INPUT1_AESINPUT15,		15
	.EQU	AES_INPUT1_AESINPUT14,		14
	.EQU	AES_INPUT1_AESINPUT13,		13
	.EQU	AES_INPUT1_AESINPUT12,		12
	.EQU	AES_INPUT1_AESINPUT11,		11
	.EQU	AES_INPUT1_AESINPUT10,		10
	.EQU	AES_INPUT1_AESINPUT9,		9
	.EQU	AES_INPUT1_AESINPUT8,		8
	.EQU	AES_INPUT1_AESINPUT7,		7
	.EQU	AES_INPUT1_AESINPUT6,		6
	.EQU	AES_INPUT1_AESINPUT5,		5
	.EQU	AES_INPUT1_AESINPUT4,		4
	.EQU	AES_INPUT1_AESINPUT3,		3
	.EQU	AES_INPUT1_AESINPUT2,		2
	.EQU	AES_INPUT1_AESINPUT1,		1
	.EQU	AES_INPUT1_AESINPUT0,		0
//  register-------------------------------------
	.EQU	AES_INPUT2,	0x40002718
//  0X4000 2718  AES_INPUT2   Bits-------------------------------------
	.EQU	AES_INPUT2_AESINPUT31,		31
	.EQU	AES_INPUT2_AESINPUT30,		30
	.EQU	AES_INPUT2_AESINPUT29,		29
	.EQU	AES_INPUT2_AESINPUT28,		28
	.EQU	AES_INPUT2_AESINPUT27,		27
	.EQU	AES_INPUT2_AESINPUT26,		26
	.EQU	AES_INPUT2_AESINPUT25,		25
	.EQU	AES_INPUT2_AESINPUT24,		24
	.EQU	AES_INPUT2_AESINPUT23,		23
	.EQU	AES_INPUT2_AESINPUT22,		22
	.EQU	AES_INPUT2_AESINPUT21,		21
	.EQU	AES_INPUT2_AESINPUT20,		20
	.EQU	AES_INPUT2_AESINPUT19,		19
	.EQU	AES_INPUT2_AESINPUT18,		18
	.EQU	AES_INPUT2_AESINPUT17,		17
	.EQU	AES_INPUT2_AESINPUT16,		16
	.EQU	AES_INPUT2_AESINPUT15,		15
	.EQU	AES_INPUT2_AESINPUT14,		14
	.EQU	AES_INPUT2_AESINPUT13,		13
	.EQU	AES_INPUT2_AESINPUT12,		12
	.EQU	AES_INPUT2_AESINPUT11,		11
	.EQU	AES_INPUT2_AESINPUT10,		10
	.EQU	AES_INPUT2_AESINPUT9,		9
	.EQU	AES_INPUT2_AESINPUT8,		8
	.EQU	AES_INPUT2_AESINPUT7,		7
	.EQU	AES_INPUT2_AESINPUT6,		6
	.EQU	AES_INPUT2_AESINPUT5,		5
	.EQU	AES_INPUT2_AESINPUT4,		4
	.EQU	AES_INPUT2_AESINPUT3,		3
	.EQU	AES_INPUT2_AESINPUT2,		2
	.EQU	AES_INPUT2_AESINPUT1,		1
	.EQU	AES_INPUT2_AESINPUT0,		0
//  register-------------------------------------
	.EQU	AES_INPUT3,	0x4000271C
//  0X4000 271C  AES_INPUT3   Bits-------------------------------------
	.EQU	AES_INPUT3_AESINPUT31,		31
	.EQU	AES_INPUT3_AESINPUT30,		30
	.EQU	AES_INPUT3_AESINPUT29,		29
	.EQU	AES_INPUT3_AESINPUT28,		28
	.EQU	AES_INPUT3_AESINPUT27,		27
	.EQU	AES_INPUT3_AESINPUT26,		26
	.EQU	AES_INPUT3_AESINPUT25,		25
	.EQU	AES_INPUT3_AESINPUT24,		24
	.EQU	AES_INPUT3_AESINPUT23,		23
	.EQU	AES_INPUT3_AESINPUT22,		22
	.EQU	AES_INPUT3_AESINPUT21,		21
	.EQU	AES_INPUT3_AESINPUT20,		20
	.EQU	AES_INPUT3_AESINPUT19,		19
	.EQU	AES_INPUT3_AESINPUT18,		18
	.EQU	AES_INPUT3_AESINPUT17,		17
	.EQU	AES_INPUT3_AESINPUT16,		16
	.EQU	AES_INPUT3_AESINPUT15,		15
	.EQU	AES_INPUT3_AESINPUT14,		14
	.EQU	AES_INPUT3_AESINPUT13,		13
	.EQU	AES_INPUT3_AESINPUT12,		12
	.EQU	AES_INPUT3_AESINPUT11,		11
	.EQU	AES_INPUT3_AESINPUT10,		10
	.EQU	AES_INPUT3_AESINPUT9,		9
	.EQU	AES_INPUT3_AESINPUT8,		8
	.EQU	AES_INPUT3_AESINPUT7,		7
	.EQU	AES_INPUT3_AESINPUT6,		6
	.EQU	AES_INPUT3_AESINPUT5,		5
	.EQU	AES_INPUT3_AESINPUT4,		4
	.EQU	AES_INPUT3_AESINPUT3,		3
	.EQU	AES_INPUT3_AESINPUT2,		2
	.EQU	AES_INPUT3_AESINPUT1,		1
	.EQU	AES_INPUT3_AESINPUT0,		0
//  register-------------------------------------
	.EQU	AES_OUTPUT0,	0x40002720
//  0X4000 2720  AES_OUTPUT0   Bits-------------------------------------
	.EQU	AES_OUTPUT0_AESOUTPUT31,		31
	.EQU	AES_OUTPUT0_AESOUTPUT30,		30
	.EQU	AES_OUTPUT0_AESOUTPUT29,		29
	.EQU	AES_OUTPUT0_AESOUTPUT28,		28
	.EQU	AES_OUTPUT0_AESOUTPUT27,		27
	.EQU	AES_OUTPUT0_AESOUTPUT26,		26
	.EQU	AES_OUTPUT0_AESOUTPUT25,		25
	.EQU	AES_OUTPUT0_AESOUTPUT24,		24
	.EQU	AES_OUTPUT0_AESOUTPUT23,		23
	.EQU	AES_OUTPUT0_AESOUTPUT22,		22
	.EQU	AES_OUTPUT0_AESOUTPUT21,		21
	.EQU	AES_OUTPUT0_AESOUTPUT20,		20
	.EQU	AES_OUTPUT0_AESOUTPUT19,		19
	.EQU	AES_OUTPUT0_AESOUTPUT18,		18
	.EQU	AES_OUTPUT0_AESOUTPUT17,		17
	.EQU	AES_OUTPUT0_AESOUTPUT16,		16
	.EQU	AES_OUTPUT0_AESOUTPUT15,		15
	.EQU	AES_OUTPUT0_AESOUTPUT14,		14
	.EQU	AES_OUTPUT0_AESOUTPUT13,		13
	.EQU	AES_OUTPUT0_AESOUTPUT12,		12
	.EQU	AES_OUTPUT0_AESOUTPUT11,		11
	.EQU	AES_OUTPUT0_AESOUTPUT10,		10
	.EQU	AES_OUTPUT0_AESOUTPUT9,		9
	.EQU	AES_OUTPUT0_AESOUTPUT8,		8
	.EQU	AES_OUTPUT0_AESOUTPUT7,		7
	.EQU	AES_OUTPUT0_AESOUTPUT6,		6
	.EQU	AES_OUTPUT0_AESOUTPUT5,		5
	.EQU	AES_OUTPUT0_AESOUTPUT4,		4
	.EQU	AES_OUTPUT0_AESOUTPUT3,		3
	.EQU	AES_OUTPUT0_AESOUTPUT2,		2
	.EQU	AES_OUTPUT0_AESOUTPUT1,		1
	.EQU	AES_OUTPUT0_AESOUTPUT0,		0
//  register-------------------------------------
	.EQU	AES_OUTPUT1,	0x40002724
//  0X4000 2724  AES_OUTPUT1   Bits-------------------------------------
	.EQU	AES_OUTPUT1_AESOUTPUT31,		31
	.EQU	AES_OUTPUT1_AESOUTPUT30,		30
	.EQU	AES_OUTPUT1_AESOUTPUT29,		29
	.EQU	AES_OUTPUT1_AESOUTPUT28,		28
	.EQU	AES_OUTPUT1_AESOUTPUT27,		27
	.EQU	AES_OUTPUT1_AESOUTPUT26,		26
	.EQU	AES_OUTPUT1_AESOUTPUT25,		25
	.EQU	AES_OUTPUT1_AESOUTPUT24,		24
	.EQU	AES_OUTPUT1_AESOUTPUT23,		23
	.EQU	AES_OUTPUT1_AESOUTPUT22,		22
	.EQU	AES_OUTPUT1_AESOUTPUT21,		21
	.EQU	AES_OUTPUT1_AESOUTPUT20,		20
	.EQU	AES_OUTPUT1_AESOUTPUT19,		19
	.EQU	AES_OUTPUT1_AESOUTPUT18,		18
	.EQU	AES_OUTPUT1_AESOUTPUT17,		17
	.EQU	AES_OUTPUT1_AESOUTPUT16,		16
	.EQU	AES_OUTPUT1_AESOUTPUT15,		15
	.EQU	AES_OUTPUT1_AESOUTPUT14,		14
	.EQU	AES_OUTPUT1_AESOUTPUT13,		13
	.EQU	AES_OUTPUT1_AESOUTPUT12,		12
	.EQU	AES_OUTPUT1_AESOUTPUT11,		11
	.EQU	AES_OUTPUT1_AESOUTPUT10,		10
	.EQU	AES_OUTPUT1_AESOUTPUT9,		9
	.EQU	AES_OUTPUT1_AESOUTPUT8,		8
	.EQU	AES_OUTPUT1_AESOUTPUT7,		7
	.EQU	AES_OUTPUT1_AESOUTPUT6,		6
	.EQU	AES_OUTPUT1_AESOUTPUT5,		5
	.EQU	AES_OUTPUT1_AESOUTPUT4,		4
	.EQU	AES_OUTPUT1_AESOUTPUT3,		3
	.EQU	AES_OUTPUT1_AESOUTPUT2,		2
	.EQU	AES_OUTPUT1_AESOUTPUT1,		1
	.EQU	AES_OUTPUT1_AESOUTPUT0,		0
//  register-------------------------------------
	.EQU	AES_OUTPUT2,	0x40002728
//  0X4000 2728  AES_OUTPUT2   Bits-------------------------------------
	.EQU	AES_OUTPUT2_AESOUTPUT31,		31
	.EQU	AES_OUTPUT2_AESOUTPUT30,		30
	.EQU	AES_OUTPUT2_AESOUTPUT29,		29
	.EQU	AES_OUTPUT2_AESOUTPUT28,		28
	.EQU	AES_OUTPUT2_AESOUTPUT27,		27
	.EQU	AES_OUTPUT2_AESOUTPUT26,		26
	.EQU	AES_OUTPUT2_AESOUTPUT25,		25
	.EQU	AES_OUTPUT2_AESOUTPUT24,		24
	.EQU	AES_OUTPUT2_AESOUTPUT23,		23
	.EQU	AES_OUTPUT2_AESOUTPUT22,		22
	.EQU	AES_OUTPUT2_AESOUTPUT21,		21
	.EQU	AES_OUTPUT2_AESOUTPUT20,		20
	.EQU	AES_OUTPUT2_AESOUTPUT19,		19
	.EQU	AES_OUTPUT2_AESOUTPUT18,		18
	.EQU	AES_OUTPUT2_AESOUTPUT17,		17
	.EQU	AES_OUTPUT2_AESOUTPUT16,		16
	.EQU	AES_OUTPUT2_AESOUTPUT15,		15
	.EQU	AES_OUTPUT2_AESOUTPUT14,		14
	.EQU	AES_OUTPUT2_AESOUTPUT13,		13
	.EQU	AES_OUTPUT2_AESOUTPUT12,		12
	.EQU	AES_OUTPUT2_AESOUTPUT11,		11
	.EQU	AES_OUTPUT2_AESOUTPUT10,		10
	.EQU	AES_OUTPUT2_AESOUTPUT9,		9
	.EQU	AES_OUTPUT2_AESOUTPUT8,		8
	.EQU	AES_OUTPUT2_AESOUTPUT7,		7
	.EQU	AES_OUTPUT2_AESOUTPUT6,		6
	.EQU	AES_OUTPUT2_AESOUTPUT5,		5
	.EQU	AES_OUTPUT2_AESOUTPUT4,		4
	.EQU	AES_OUTPUT2_AESOUTPUT3,		3
	.EQU	AES_OUTPUT2_AESOUTPUT2,		2
	.EQU	AES_OUTPUT2_AESOUTPUT1,		1
	.EQU	AES_OUTPUT2_AESOUTPUT0,		0
//  register-------------------------------------
	.EQU	AES_OUTPUT3,	0x4000272C
//  0X4000 272C  AES_OUTPUT3   Bits-------------------------------------
	.EQU	AES_OUTPUT3_AESOUTPUT31,		31
	.EQU	AES_OUTPUT3_AESOUTPUT30,		30
	.EQU	AES_OUTPUT3_AESOUTPUT29,		29
	.EQU	AES_OUTPUT3_AESOUTPUT28,		28
	.EQU	AES_OUTPUT3_AESOUTPUT27,		27
	.EQU	AES_OUTPUT3_AESOUTPUT26,		26
	.EQU	AES_OUTPUT3_AESOUTPUT25,		25
	.EQU	AES_OUTPUT3_AESOUTPUT24,		24
	.EQU	AES_OUTPUT3_AESOUTPUT23,		23
	.EQU	AES_OUTPUT3_AESOUTPUT22,		22
	.EQU	AES_OUTPUT3_AESOUTPUT21,		21
	.EQU	AES_OUTPUT3_AESOUTPUT20,		20
	.EQU	AES_OUTPUT3_AESOUTPUT19,		19
	.EQU	AES_OUTPUT3_AESOUTPUT18,		18
	.EQU	AES_OUTPUT3_AESOUTPUT17,		17
	.EQU	AES_OUTPUT3_AESOUTPUT16,		16
	.EQU	AES_OUTPUT3_AESOUTPUT15,		15
	.EQU	AES_OUTPUT3_AESOUTPUT14,		14
	.EQU	AES_OUTPUT3_AESOUTPUT13,		13
	.EQU	AES_OUTPUT3_AESOUTPUT12,		12
	.EQU	AES_OUTPUT3_AESOUTPUT11,		11
	.EQU	AES_OUTPUT3_AESOUTPUT10,		10
	.EQU	AES_OUTPUT3_AESOUTPUT9,		9
	.EQU	AES_OUTPUT3_AESOUTPUT8,		8
	.EQU	AES_OUTPUT3_AESOUTPUT7,		7
	.EQU	AES_OUTPUT3_AESOUTPUT6,		6
	.EQU	AES_OUTPUT3_AESOUTPUT5,		5
	.EQU	AES_OUTPUT3_AESOUTPUT4,		4
	.EQU	AES_OUTPUT3_AESOUTPUT3,		3
	.EQU	AES_OUTPUT3_AESOUTPUT2,		2
	.EQU	AES_OUTPUT3_AESOUTPUT1,		1
	.EQU	AES_OUTPUT3_AESOUTPUT0,		0
//  register-------------------------------------
	.EQU	EXIC_CTL0,		0x40002800
//  0X4000 2800  EXIC_CTL0   Bits-------------------------------------
	.EQU	EXIC_CTL0_MODESEL,		31
	.EQU	EXIC_CTL0_DATATR,		30
	.EQU	EXIC_CTL0_READ1EN,		29
	.EQU	EXIC_CTL0_WRITE1EN,		28
	.EQU	EXIC_CTL0_RENDIE,		17
	.EQU	EXIC_CTL0_WENDEN,		16
	.EQU	EXIC_CTL0_RDMAEN,		9
	.EQU	EXIC_CTL0_TDMAEN,		8
	.EQU	EXIC_CTL0_READEN,		4
	.EQU	EXIC_CTL0_WRITEEN,		3
	.EQU	EXIC_CTL0_DCSEL,		2
	.EQU	EXIC_CTL0_CSEN,		1
	.EQU	EXIC_CTL0_EXICEN,		0
//  register-------------------------------------
	.EQU	EXIC_CTL1,		0x40002804
//  0X4000 2804  EXIC_CTL1   Bits-------------------------------------
	.EQU	EXIC_CTL1_PULSEWIDTH3,		7
	.EQU	EXIC_CTL1_PULSEWIDTH2,		6
	.EQU	EXIC_CTL1_PULSEWIDTH1,		5
	.EQU	EXIC_CTL1_PULSEWIDTH0,		4
	.EQU	EXIC_CTL1_EXICCS1,		1
	.EQU	EXIC_CTL1_EXICCS0,		0
//  register-------------------------------------
	.EQU	EXIC_STATE,	0x40002808
//  0X4000 2808  EXIC_STATE   Bits-------------------------------------
	.EQU	EXIC_STATE_RENDIF,		1
	.EQU	EXIC_STATE_WENDIF,		0
//  register-------------------------------------
	.EQU	EXIC_WRITEBUF,	0x40002810
//  0X4000 2810  EXIC_WRITEBUF   Bits-------------------------------------
	.EQU	EXIC_WRITEBUF_WRITEBUF17,		17
	.EQU	EXIC_WRITEBUF_WRITEBUF16,		16
	.EQU	EXIC_WRITEBUF_WRITEBUF15,		15
	.EQU	EXIC_WRITEBUF_WRITEBUF14,		14
	.EQU	EXIC_WRITEBUF_WRITEBUF13,		13
	.EQU	EXIC_WRITEBUF_WRITEBUF12,		12
	.EQU	EXIC_WRITEBUF_WRITEBUF11,		11
	.EQU	EXIC_WRITEBUF_WRITEBUF10,		10
	.EQU	EXIC_WRITEBUF_WRITEBUF9,		9
	.EQU	EXIC_WRITEBUF_WRITEBUF8,		8
	.EQU	EXIC_WRITEBUF_WRITEBUF7,		7
	.EQU	EXIC_WRITEBUF_WRITEBUF6,		6
	.EQU	EXIC_WRITEBUF_WRITEBUF5,		5
	.EQU	EXIC_WRITEBUF_WRITEBUF4,		4
	.EQU	EXIC_WRITEBUF_WRITEBUF3,		3
	.EQU	EXIC_WRITEBUF_WRITEBUF2,		2
	.EQU	EXIC_WRITEBUF_WRITEBUF1,		1
	.EQU	EXIC_WRITEBUF_WRITEBUF0,		0
//  register-------------------------------------
	.EQU	EXIC_READBUF,	0x40002814
//  0X4000 2814  EXIC_READBUF   Bits-------------------------------------
	.EQU	EXIC_READBUF_READBUF17,		17
	.EQU	EXIC_READBUF_READBUF16,		16
	.EQU	EXIC_READBUF_READBUF15,		15
	.EQU	EXIC_READBUF_READBUF14,		14
	.EQU	EXIC_READBUF_READBUF13,		13
	.EQU	EXIC_READBUF_READBUF12,		12
	.EQU	EXIC_READBUF_READBUF11,		11
	.EQU	EXIC_READBUF_READBUF10,		10
	.EQU	EXIC_READBUF_READBUF9,		9
	.EQU	EXIC_READBUF_READBUF8,		8
	.EQU	EXIC_READBUF_READBUF7,		7
	.EQU	EXIC_READBUF_READBUF6,		6
	.EQU	EXIC_READBUF_READBUF5,		5
	.EQU	EXIC_READBUF_READBUF4,		4
	.EQU	EXIC_READBUF_READBUF3,		3
	.EQU	EXIC_READBUF_READBUF2,		2
	.EQU	EXIC_READBUF_READBUF1,		1
	.EQU	EXIC_READBUF_READBUF0,		0
//  register-------------------------------------
	.EQU	CAN4_CTLR,		0x40002880
//  0x4000 2880  CAN4_CTLR   Bits-------------------------------------
	.EQU	CAN4_CTLR_CANRMC6,		30
	.EQU	CAN4_CTLR_CANRMC5,		29
	.EQU	CAN4_CTLR_CANRMC4,		28
	.EQU	CAN4_CTLR_CANRMC3,		27
	.EQU	CAN4_CTLR_CANRMC2,		26
	.EQU	CAN4_CTLR_CANRMC1,		25
	.EQU	CAN4_CTLR_CANRMC0,		24
	.EQU	CAN4_CTLR_BOFF,		23
	.EQU	CAN4_CTLR_CERROR,		22
	.EQU	CAN4_CTLR_TXSTA,		21
	.EQU	CAN4_CTLR_RXSTA,		20
	.EQU	CAN4_CTLR_TCSTA,		19
	.EQU	CAN4_CTLR_TXBSTA,		18
	.EQU	CAN4_CTLR_DOSTA,		17
	.EQU	CAN4_CTLR_RXBSTA,		16
	.EQU	CAN4_CTLR_RELRXALL,		15
	.EQU	CAN4_CTLR_CKMODE,		14
	.EQU	CAN4_CTLR_BOFFREC,		13
	.EQU	CAN4_CTLR_LBSEL,		12
	.EQU	CAN4_CTLR_RELF,		11
	.EQU	CAN4_CTLR_RELRX,		10
	.EQU	CAN4_CTLR_ATX,		9
	.EQU	CAN4_CTLR_TXR,		8
	.EQU	CAN4_CTLR_CANEN,		7
	.EQU	CAN4_CTLR_CANCKS1,		6
	.EQU	CAN4_CTLR_CANCKS0,		5
	.EQU	CAN4_CTLR_FILTEREXT,		4
	.EQU	CAN4_CTLR_SLEEP,		3
	.EQU	CAN4_CTLR_LBACK,		2
	.EQU	CAN4_CTLR_SILENT,		1
	.EQU	CAN4_CTLR_RSMOD,		0
//  register-------------------------------------
	.EQU	CAN4_BRGR,		0x40002884
//  0x4000 2884  CAN4_BRGR   Bits-------------------------------------
	.EQU	CAN4_BRGR_SAM,		15
	.EQU	CAN4_BRGR_TSEG2_2,		14
	.EQU	CAN4_BRGR_TSEG2_1,		13
	.EQU	CAN4_BRGR_TSEG2_0,		12
	.EQU	CAN4_BRGR_TSEG1_3,		11
	.EQU	CAN4_BRGR_TSEG1_2,		10
	.EQU	CAN4_BRGR_TSEG1_1,		9
	.EQU	CAN4_BRGR_TSEG1_0,		8
	.EQU	CAN4_BRGR_SJW1,		7
	.EQU	CAN4_BRGR_SJW0,		6
	.EQU	CAN4_BRGR_CANBRP5,		5
	.EQU	CAN4_BRGR_CANBRP4,		4
	.EQU	CAN4_BRGR_CANBRP3,		3
	.EQU	CAN4_BRGR_CANBRP2,		2
	.EQU	CAN4_BRGR_CANBRP1,		1
	.EQU	CAN4_BRGR_CANBRP0,		0
//  register-------------------------------------
	.EQU	CAN4_RCR,		0x40002888
//  0x4000 2888  CAN4_RCR   Bits-------------------------------------
	.EQU	CAN4_RCR_RAMMB5,		21
	.EQU	CAN4_RCR_RAMMB4,		20
	.EQU	CAN4_RCR_RAMMB3,		19
	.EQU	CAN4_RCR_RAMMB2,		18
	.EQU	CAN4_RCR_RAMMB1,		17
	.EQU	CAN4_RCR_RAMMB0,		16
	.EQU	CAN4_RCR_CANERRC1,		15
	.EQU	CAN4_RCR_CANERRC0,		14
	.EQU	CAN4_RCR_CANDIR,		13
	.EQU	CAN4_RCR_CANSEG4,		12
	.EQU	CAN4_RCR_CANSEG3,		11
	.EQU	CAN4_RCR_CANSEG2,		10
	.EQU	CAN4_RCR_CANSEG1,		9
	.EQU	CAN4_RCR_CANSEG0,		8
	.EQU	CAN4_RCR_CANALC4,		4
	.EQU	CAN4_RCR_CANALC3,		3
	.EQU	CAN4_RCR_CANALC2,		2
	.EQU	CAN4_RCR_CANALC1,		1
	.EQU	CAN4_RCR_CANALC0,		0
//  register-------------------------------------
	.EQU	CAN4_EROR,		0x4000288C
//  0x4000 288C  CAN4_EROR   Bits-------------------------------------
	.EQU	CAN4_EROR_CANEWL7,		23
	.EQU	CAN4_EROR_CANEWL6,		22
	.EQU	CAN4_EROR_CANEWL5,		21
	.EQU	CAN4_EROR_CANEWL4,		20
	.EQU	CAN4_EROR_CANEWL3,		19
	.EQU	CAN4_EROR_CANEWL2,		18
	.EQU	CAN4_EROR_CANEWL1,		17
	.EQU	CAN4_EROR_CANEWL0,		16
	.EQU	CAN4_EROR_CANTXE7,		15
	.EQU	CAN4_EROR_CANTXE6,		14
	.EQU	CAN4_EROR_CANTXE5,		13
	.EQU	CAN4_EROR_CANTXE4,		12
	.EQU	CAN4_EROR_CANTXE3,		11
	.EQU	CAN4_EROR_CANTXE2,		10
	.EQU	CAN4_EROR_CANTXE1,		9
	.EQU	CAN4_EROR_CANTXE0,		8
	.EQU	CAN4_EROR_CANRXE7,		7
	.EQU	CAN4_EROR_CANRXE6,		6
	.EQU	CAN4_EROR_CANRXE5,		5
	.EQU	CAN4_EROR_CANRXE4,		4
	.EQU	CAN4_EROR_CANRXE3,		3
	.EQU	CAN4_EROR_CANRXE2,		2
	.EQU	CAN4_EROR_CANRXE1,		1
	.EQU	CAN4_EROR_CANRXE0,		0
//  register-------------------------------------
	.EQU	CAN4_ACRR,		0x40002890
//  0x4000 2890  CAN4_ACRR   Bits-------------------------------------
	.EQU	CAN4_ACRR_ACR31,		31
	.EQU	CAN4_ACRR_ACR30,		30
	.EQU	CAN4_ACRR_ACR29,		29
	.EQU	CAN4_ACRR_ACR28,		28
	.EQU	CAN4_ACRR_ACR27,		27
	.EQU	CAN4_ACRR_ACR26,		26
	.EQU	CAN4_ACRR_ACR25,		25
	.EQU	CAN4_ACRR_ACR24,		24
	.EQU	CAN4_ACRR_ACR23,		23
	.EQU	CAN4_ACRR_ACR22,		22
	.EQU	CAN4_ACRR_ACR21,		21
	.EQU	CAN4_ACRR_ACR20,		20
	.EQU	CAN4_ACRR_ACR19,		19
	.EQU	CAN4_ACRR_ACR18,		18
	.EQU	CAN4_ACRR_ACR17,		17
	.EQU	CAN4_ACRR_ACR16,		16
	.EQU	CAN4_ACRR_ACR15,		15
	.EQU	CAN4_ACRR_ACR14,		14
	.EQU	CAN4_ACRR_ACR13,		13
	.EQU	CAN4_ACRR_ACR12,		12
	.EQU	CAN4_ACRR_ACR11,		11
	.EQU	CAN4_ACRR_ACR10,		10
	.EQU	CAN4_ACRR_ACR9,		9
	.EQU	CAN4_ACRR_ACR8,		8
	.EQU	CAN4_ACRR_ACR7,		7
	.EQU	CAN4_ACRR_ACR6,		6
	.EQU	CAN4_ACRR_ACR5,		5
	.EQU	CAN4_ACRR_ACR4,		4
	.EQU	CAN4_ACRR_ACR3,		3
	.EQU	CAN4_ACRR_ACR2,		2
	.EQU	CAN4_ACRR_ACR1,		1
	.EQU	CAN4_ACRR_ACR0,		0
//  register-------------------------------------
	.EQU	CAN4_MSKR,		0x40002894
//  0x4000 2894  CAN4_MSKR   Bits-------------------------------------
	.EQU	CAN4_MSKR_MSK31,		31
	.EQU	CAN4_MSKR_MSK30,		30
	.EQU	CAN4_MSKR_MSK29,		29
	.EQU	CAN4_MSKR_MSK28,		28
	.EQU	CAN4_MSKR_MSK27,		27
	.EQU	CAN4_MSKR_MSK26,		26
	.EQU	CAN4_MSKR_MSK25,		25
	.EQU	CAN4_MSKR_MSK24,		24
	.EQU	CAN4_MSKR_MSK23,		23
	.EQU	CAN4_MSKR_MSK22,		22
	.EQU	CAN4_MSKR_MSK21,		21
	.EQU	CAN4_MSKR_MSK20,		20
	.EQU	CAN4_MSKR_MSK19,		19
	.EQU	CAN4_MSKR_MSK18,		18
	.EQU	CAN4_MSKR_MSK17,		17
	.EQU	CAN4_MSKR_MSK16,		16
	.EQU	CAN4_MSKR_MSK15,		15
	.EQU	CAN4_MSKR_MSK14,		14
	.EQU	CAN4_MSKR_MSK13,		13
	.EQU	CAN4_MSKR_MSK12,		12
	.EQU	CAN4_MSKR_MSK11,		11
	.EQU	CAN4_MSKR_MSK10,		10
	.EQU	CAN4_MSKR_MSK9,		9
	.EQU	CAN4_MSKR_MSK8,		8
	.EQU	CAN4_MSKR_MSK7,		7
	.EQU	CAN4_MSKR_MSK6,		6
	.EQU	CAN4_MSKR_MSK5,		5
	.EQU	CAN4_MSKR_MSK4,		4
	.EQU	CAN4_MSKR_MSK3,		3
	.EQU	CAN4_MSKR_MSK2,		2
	.EQU	CAN4_MSKR_MSK1,		1
	.EQU	CAN4_MSKR_MSK0,		0
//  register-------------------------------------
	.EQU	CAN4_IER,		0x40002898
//  0x4000 2898  CAN4_IER   Bits-------------------------------------
	.EQU	CAN4_IER_BOFFIC,		28
	.EQU	CAN4_IER_BEIC,		23
	.EQU	CAN4_IER_ALIC,		22
	.EQU	CAN4_IER_ENIC,		21
	.EQU	CAN4_IER_WUIC,		20
	.EQU	CAN4_IER_DOVFIC,		19
	.EQU	CAN4_IER_EAIC,		18
	.EQU	CAN4_IER_CANTXIC,		17
	.EQU	CAN4_IER_CANRFIC,		16
	.EQU	CAN4_IER_BOFFIE,		12
	.EQU	CAN4_IER_CANRFIE,		10
	.EQU	CAN4_IER_CANRXDE,		9
	.EQU	CAN4_IER_CANTXDE,		8
	.EQU	CAN4_IER_BEIE,		7
	.EQU	CAN4_IER_ALIE,		6
	.EQU	CAN4_IER_ENIE,		5
	.EQU	CAN4_IER_WUIE,		4
	.EQU	CAN4_IER_DOVFIE,		3
	.EQU	CAN4_IER_EAIE,		2
	.EQU	CAN4_IER_CANTXIE,		1
	.EQU	CAN4_IER_CANRXIE,		0
//  register-------------------------------------
	.EQU	CAN4_IFR,		0x4000289C
//  0x4000 289C  CAN4_IFR   Bits-------------------------------------
	.EQU	CAN4_IFR_BOFFIF,		12
	.EQU	CAN4_IFR_CANRFIF,		10
	.EQU	CAN4_IFR_CANRXDF,		9
	.EQU	CAN4_IFR_CANTXDF,		8
	.EQU	CAN4_IFR_BEIF,		7
	.EQU	CAN4_IFR_ALIF,		6
	.EQU	CAN4_IFR_ENIF,		5
	.EQU	CAN4_IFR_WUIF,		4
	.EQU	CAN4_IFR_DOVFIF,		3
	.EQU	CAN4_IFR_EAIF,		2
	.EQU	CAN4_IFR_CANTXIF,		1
	.EQU	CAN4_IFR_CANRXIF,		0
//  register-------------------------------------
	.EQU	CAN4_INFR,		0x400028A0
//  0x4000 28A0  CAN4_INFR   Bits-------------------------------------
	.EQU	CAN4_INFR_IDE,		7
	.EQU	CAN4_INFR_RTR,		6
	.EQU	CAN4_INFR_DLC3,		3
	.EQU	CAN4_INFR_DLC2,		2
	.EQU	CAN4_INFR_DLC1,		1
	.EQU	CAN4_INFR_DLC0,		0
//  register-------------------------------------
	.EQU	CAN4_TX0R,		0x400028A4
//  0x4000 28A4  CAN4_TX0R   Bits-------------------------------------
	.EQU	CAN4_TX0R_CANTX0_31,		31
	.EQU	CAN4_TX0R_CANTX0_30,		30
	.EQU	CAN4_TX0R_CANTX0_29,		29
	.EQU	CAN4_TX0R_CANTX0_28,		28
	.EQU	CAN4_TX0R_CANTX0_27,		27
	.EQU	CAN4_TX0R_CANTX0_26,		26
	.EQU	CAN4_TX0R_CANTX0_25,		25
	.EQU	CAN4_TX0R_CANTX0_24,		24
	.EQU	CAN4_TX0R_CANTX0_23,		23
	.EQU	CAN4_TX0R_CANTX0_22,		22
	.EQU	CAN4_TX0R_CANTX0_21,		21
	.EQU	CAN4_TX0R_CANTX0_20,		20
	.EQU	CAN4_TX0R_CANTX0_19,		19
	.EQU	CAN4_TX0R_CANTX0_18,		18
	.EQU	CAN4_TX0R_CANTX0_17,		17
	.EQU	CAN4_TX0R_CANTX0_16,		16
	.EQU	CAN4_TX0R_CANTX0_15,		15
	.EQU	CAN4_TX0R_CANTX0_14,		14
	.EQU	CAN4_TX0R_CANTX0_13,		13
	.EQU	CAN4_TX0R_CANTX0_12,		12
	.EQU	CAN4_TX0R_CANTX0_11,		11
	.EQU	CAN4_TX0R_CANTX0_10,		10
	.EQU	CAN4_TX0R_CANTX0_9,		9
	.EQU	CAN4_TX0R_CANTX0_8,		8
	.EQU	CAN4_TX0R_CANTX0_7,		7
	.EQU	CAN4_TX0R_CANTX0_6,		6
	.EQU	CAN4_TX0R_CANTX0_5,		5
	.EQU	CAN4_TX0R_CANTX0_4,		4
	.EQU	CAN4_TX0R_CANTX0_3,		3
	.EQU	CAN4_TX0R_CANTX0_2,		2
	.EQU	CAN4_TX0R_CANTX0_1,		1
	.EQU	CAN4_TX0R_CANTX0_0,		0
//  register-------------------------------------
	.EQU	CAN4_TX1R,		0x400028A8
//  0x4000 28A8  CAN4_TX1R   Bits-------------------------------------
	.EQU	CAN4_TX1R_CANTX1_31,		31
	.EQU	CAN4_TX1R_CANTX1_30,		30
	.EQU	CAN4_TX1R_CANTX1_29,		29
	.EQU	CAN4_TX1R_CANTX1_28,		28
	.EQU	CAN4_TX1R_CANTX1_27,		27
	.EQU	CAN4_TX1R_CANTX1_26,		26
	.EQU	CAN4_TX1R_CANTX1_25,		25
	.EQU	CAN4_TX1R_CANTX1_24,		24
	.EQU	CAN4_TX1R_CANTX1_23,		23
	.EQU	CAN4_TX1R_CANTX1_22,		22
	.EQU	CAN4_TX1R_CANTX1_21,		21
	.EQU	CAN4_TX1R_CANTX1_20,		20
	.EQU	CAN4_TX1R_CANTX1_19,		19
	.EQU	CAN4_TX1R_CANTX1_18,		18
	.EQU	CAN4_TX1R_CANTX1_17,		17
	.EQU	CAN4_TX1R_CANTX1_16,		16
	.EQU	CAN4_TX1R_CANTX1_15,		15
	.EQU	CAN4_TX1R_CANTX1_14,		14
	.EQU	CAN4_TX1R_CANTX1_13,		13
	.EQU	CAN4_TX1R_CANTX1_12,		12
	.EQU	CAN4_TX1R_CANTX1_11,		11
	.EQU	CAN4_TX1R_CANTX1_10,		10
	.EQU	CAN4_TX1R_CANTX1_9,		9
	.EQU	CAN4_TX1R_CANTX1_8,		8
	.EQU	CAN4_TX1R_CANTX1_7,		7
	.EQU	CAN4_TX1R_CANTX1_6,		6
	.EQU	CAN4_TX1R_CANTX1_5,		5
	.EQU	CAN4_TX1R_CANTX1_4,		4
	.EQU	CAN4_TX1R_CANTX1_3,		3
	.EQU	CAN4_TX1R_CANTX1_2,		2
	.EQU	CAN4_TX1R_CANTX1_1,		1
	.EQU	CAN4_TX1R_CANTX1_0,		0
//  register-------------------------------------
	.EQU	CAN4_TX2R,		0x400028AC
//  0x4000 28AC  CAN4_TX2R   Bits-------------------------------------
	.EQU	CAN4_TX2R_CANTX2_31,		31
	.EQU	CAN4_TX2R_CANTX2_30,		30
	.EQU	CAN4_TX2R_CANTX2_29,		29
	.EQU	CAN4_TX2R_CANTX2_28,		28
	.EQU	CAN4_TX2R_CANTX2_27,		27
	.EQU	CAN4_TX2R_CANTX2_26,		26
	.EQU	CAN4_TX2R_CANTX2_25,		25
	.EQU	CAN4_TX2R_CANTX2_24,		24
	.EQU	CAN4_TX2R_CANTX2_23,		23
	.EQU	CAN4_TX2R_CANTX2_22,		22
	.EQU	CAN4_TX2R_CANTX2_21,		21
	.EQU	CAN4_TX2R_CANTX2_20,		20
	.EQU	CAN4_TX2R_CANTX2_19,		19
	.EQU	CAN4_TX2R_CANTX2_18,		18
	.EQU	CAN4_TX2R_CANTX2_17,		17
	.EQU	CAN4_TX2R_CANTX2_16,		16
	.EQU	CAN4_TX2R_CANTX2_15,		15
	.EQU	CAN4_TX2R_CANTX2_14,		14
	.EQU	CAN4_TX2R_CANTX2_13,		13
	.EQU	CAN4_TX2R_CANTX2_12,		12
	.EQU	CAN4_TX2R_CANTX2_11,		11
	.EQU	CAN4_TX2R_CANTX2_10,		10
	.EQU	CAN4_TX2R_CANTX2_9,		9
	.EQU	CAN4_TX2R_CANTX2_8,		8
	.EQU	CAN4_TX2R_CANTX2_7,		7
	.EQU	CAN4_TX2R_CANTX2_6,		6
	.EQU	CAN4_TX2R_CANTX2_5,		5
	.EQU	CAN4_TX2R_CANTX2_4,		4
	.EQU	CAN4_TX2R_CANTX2_3,		3
	.EQU	CAN4_TX2R_CANTX2_2,		2
	.EQU	CAN4_TX2R_CANTX2_1,		1
	.EQU	CAN4_TX2R_CANTX2_0,		0
//  register-------------------------------------
	.EQU	CAN4_RXDATA0,	0x400028B0
//  0x4000 28B0  CAN4_RXDATA0   Bits-------------------------------------
	.EQU	CAN4_RXDATA0_IDE,		7
	.EQU	CAN4_RXDATA0_RTR,		6
	.EQU	CAN4_RXDATA0_DLC3,		3
	.EQU	CAN4_RXDATA0_DLC2,		2
	.EQU	CAN4_RXDATA0_DLC1,		1
	.EQU	CAN4_RXDATA0_DLC0,		0
//  register-------------------------------------
	.EQU	CAN4_RXDATA1,	0x400028B4
//  0x4000 28B4  CAN4_RXDATA1   Bits-------------------------------------
	.EQU	CAN4_RXDATA1_ID28,		31
	.EQU	CAN4_RXDATA1_ID27,		30
	.EQU	CAN4_RXDATA1_ID26,		29
	.EQU	CAN4_RXDATA1_ID25,		28
	.EQU	CAN4_RXDATA1_ID24,		27
	.EQU	CAN4_RXDATA1_ID23,		26
	.EQU	CAN4_RXDATA1_ID22,		25
	.EQU	CAN4_RXDATA1_ID21,		24
	.EQU	CAN4_RXDATA1_ID20,		23
	.EQU	CAN4_RXDATA1_ID19,		22
	.EQU	CAN4_RXDATA1_ID18,		21
	.EQU	CAN4_RXDATA1_ID17,		20
	.EQU	CAN4_RXDATA1_ID16,		19
	.EQU	CAN4_RXDATA1_ID15,		18
	.EQU	CAN4_RXDATA1_ID14,		17
	.EQU	CAN4_RXDATA1_ID13,		16
	.EQU	CAN4_RXDATA1_ID12,		15
	.EQU	CAN4_RXDATA1_ID11,		14
	.EQU	CAN4_RXDATA1_ID10,		13
	.EQU	CAN4_RXDATA1_ID9,		12
	.EQU	CAN4_RXDATA1_ID8,		11
	.EQU	CAN4_RXDATA1_ID7,		10
	.EQU	CAN4_RXDATA1_ID6,		9
	.EQU	CAN4_RXDATA1_ID5,		8
	.EQU	CAN4_RXDATA1_ID4,		7
	.EQU	CAN4_RXDATA1_ID3,		6
	.EQU	CAN4_RXDATA1_ID2,		5
	.EQU	CAN4_RXDATA1_ID1,		4
	.EQU	CAN4_RXDATA1_ID0,		3
	.EQU	CAN4_RXDATA1_RTR,		2
//  register-------------------------------------
	.EQU	CAN4_RXDATA2,	0x400028B8
//  0x4000 28B8  CAN4_RXDATA2   Bits-------------------------------------
	.EQU	CAN4_RXDATA2_CANRXDT0,		31
	.EQU	CAN4_RXDATA2_CANRXDT1,		23
	.EQU	CAN4_RXDATA2_CANRXDT2,		15
	.EQU	CAN4_RXDATA2_CANRXDT3,		7
//  register-------------------------------------
	.EQU	CAN4_RXDATA3,	0x400028BC
//  0x4000 28BC  CAN4_RXDATA3   Bits-------------------------------------
	.EQU	CAN4_RXDATA3_CANRXDT4,		31
	.EQU	CAN4_RXDATA3_CANRXDT5,		23
	.EQU	CAN4_RXDATA3_CANRXDT6,		15
	.EQU	CAN4_RXDATA3_CANRXDT7,		7
//  register-------------------------------------
	.EQU	CAN4_ACR1R,	0x40002900
//  0x4000 2900  CAN4_ACR1R   Bits-------------------------------------
	.EQU	CAN4_ACR1R_ACR31,		31
	.EQU	CAN4_ACR1R_ACR30,		30
	.EQU	CAN4_ACR1R_ACR29,		29
	.EQU	CAN4_ACR1R_ACR28,		28
	.EQU	CAN4_ACR1R_ACR27,		27
	.EQU	CAN4_ACR1R_ACR26,		26
	.EQU	CAN4_ACR1R_ACR25,		25
	.EQU	CAN4_ACR1R_ACR24,		24
	.EQU	CAN4_ACR1R_ACR23,		23
	.EQU	CAN4_ACR1R_ACR22,		22
	.EQU	CAN4_ACR1R_ACR21,		21
	.EQU	CAN4_ACR1R_ACR20,		20
	.EQU	CAN4_ACR1R_ACR19,		19
	.EQU	CAN4_ACR1R_ACR18,		18
	.EQU	CAN4_ACR1R_ACR17,		17
	.EQU	CAN4_ACR1R_ACR16,		16
	.EQU	CAN4_ACR1R_ACR15,		15
	.EQU	CAN4_ACR1R_ACR14,		14
	.EQU	CAN4_ACR1R_ACR13,		13
	.EQU	CAN4_ACR1R_ACR12,		12
	.EQU	CAN4_ACR1R_ACR11,		11
	.EQU	CAN4_ACR1R_ACR10,		10
	.EQU	CAN4_ACR1R_ACR9,		9
	.EQU	CAN4_ACR1R_ACR8,		8
	.EQU	CAN4_ACR1R_ACR7,		7
	.EQU	CAN4_ACR1R_ACR6,		6
	.EQU	CAN4_ACR1R_ACR5,		5
	.EQU	CAN4_ACR1R_ACR4,		4
	.EQU	CAN4_ACR1R_ACR3,		3
	.EQU	CAN4_ACR1R_ACR2,		2
	.EQU	CAN4_ACR1R_ACR1,		1
	.EQU	CAN4_ACR1R_ACR0,		0
//  register-------------------------------------
	.EQU	CAN4_MSK1R,	0x40002904
//  0x4000 2904  CAN4_MSK1R   Bits-------------------------------------
	.EQU	CAN4_MSK1R_MSK31,		31
	.EQU	CAN4_MSK1R_MSK30,		30
	.EQU	CAN4_MSK1R_MSK29,		29
	.EQU	CAN4_MSK1R_MSK28,		28
	.EQU	CAN4_MSK1R_MSK27,		27
	.EQU	CAN4_MSK1R_MSK26,		26
	.EQU	CAN4_MSK1R_MSK25,		25
	.EQU	CAN4_MSK1R_MSK24,		24
	.EQU	CAN4_MSK1R_MSK23,		23
	.EQU	CAN4_MSK1R_MSK22,		22
	.EQU	CAN4_MSK1R_MSK21,		21
	.EQU	CAN4_MSK1R_MSK20,		20
	.EQU	CAN4_MSK1R_MSK19,		19
	.EQU	CAN4_MSK1R_MSK18,		18
	.EQU	CAN4_MSK1R_MSK17,		17
	.EQU	CAN4_MSK1R_MSK16,		16
	.EQU	CAN4_MSK1R_MSK15,		15
	.EQU	CAN4_MSK1R_MSK14,		14
	.EQU	CAN4_MSK1R_MSK13,		13
	.EQU	CAN4_MSK1R_MSK12,		12
	.EQU	CAN4_MSK1R_MSK11,		11
	.EQU	CAN4_MSK1R_MSK10,		10
	.EQU	CAN4_MSK1R_MSK9,		9
	.EQU	CAN4_MSK1R_MSK8,		8
	.EQU	CAN4_MSK1R_MSK7,		7
	.EQU	CAN4_MSK1R_MSK6,		6
	.EQU	CAN4_MSK1R_MSK5,		5
	.EQU	CAN4_MSK1R_MSK4,		4
	.EQU	CAN4_MSK1R_MSK3,		3
	.EQU	CAN4_MSK1R_MSK2,		2
	.EQU	CAN4_MSK1R_MSK1,		1
	.EQU	CAN4_MSK1R_MSK0,		0
//  register-------------------------------------
	.EQU	CAN4_ACR2R,	0x40002908
//  0x4000 2908  CAN4_ACR2R   Bits-------------------------------------
	.EQU	CAN4_ACR2R_ACR31,		31
	.EQU	CAN4_ACR2R_ACR30,		30
	.EQU	CAN4_ACR2R_ACR29,		29
	.EQU	CAN4_ACR2R_ACR28,		28
	.EQU	CAN4_ACR2R_ACR27,		27
	.EQU	CAN4_ACR2R_ACR26,		26
	.EQU	CAN4_ACR2R_ACR25,		25
	.EQU	CAN4_ACR2R_ACR24,		24
	.EQU	CAN4_ACR2R_ACR23,		23
	.EQU	CAN4_ACR2R_ACR22,		22
	.EQU	CAN4_ACR2R_ACR21,		21
	.EQU	CAN4_ACR2R_ACR20,		20
	.EQU	CAN4_ACR2R_ACR19,		19
	.EQU	CAN4_ACR2R_ACR18,		18
	.EQU	CAN4_ACR2R_ACR17,		17
	.EQU	CAN4_ACR2R_ACR16,		16
	.EQU	CAN4_ACR2R_ACR15,		15
	.EQU	CAN4_ACR2R_ACR14,		14
	.EQU	CAN4_ACR2R_ACR13,		13
	.EQU	CAN4_ACR2R_ACR12,		12
	.EQU	CAN4_ACR2R_ACR11,		11
	.EQU	CAN4_ACR2R_ACR10,		10
	.EQU	CAN4_ACR2R_ACR9,		9
	.EQU	CAN4_ACR2R_ACR8,		8
	.EQU	CAN4_ACR2R_ACR7,		7
	.EQU	CAN4_ACR2R_ACR6,		6
	.EQU	CAN4_ACR2R_ACR5,		5
	.EQU	CAN4_ACR2R_ACR4,		4
	.EQU	CAN4_ACR2R_ACR3,		3
	.EQU	CAN4_ACR2R_ACR2,		2
	.EQU	CAN4_ACR2R_ACR1,		1
	.EQU	CAN4_ACR2R_ACR0,		0
//  register-------------------------------------
	.EQU	CAN4_MSK2R,	0x4000290C
//  0x4000 290C  CAN4_MSK2R   Bits-------------------------------------
	.EQU	CAN4_MSK2R_MSK31,		31
	.EQU	CAN4_MSK2R_MSK30,		30
	.EQU	CAN4_MSK2R_MSK29,		29
	.EQU	CAN4_MSK2R_MSK28,		28
	.EQU	CAN4_MSK2R_MSK27,		27
	.EQU	CAN4_MSK2R_MSK26,		26
	.EQU	CAN4_MSK2R_MSK25,		25
	.EQU	CAN4_MSK2R_MSK24,		24
	.EQU	CAN4_MSK2R_MSK23,		23
	.EQU	CAN4_MSK2R_MSK22,		22
	.EQU	CAN4_MSK2R_MSK21,		21
	.EQU	CAN4_MSK2R_MSK20,		20
	.EQU	CAN4_MSK2R_MSK19,		19
	.EQU	CAN4_MSK2R_MSK18,		18
	.EQU	CAN4_MSK2R_MSK17,		17
	.EQU	CAN4_MSK2R_MSK16,		16
	.EQU	CAN4_MSK2R_MSK15,		15
	.EQU	CAN4_MSK2R_MSK14,		14
	.EQU	CAN4_MSK2R_MSK13,		13
	.EQU	CAN4_MSK2R_MSK12,		12
	.EQU	CAN4_MSK2R_MSK11,		11
	.EQU	CAN4_MSK2R_MSK10,		10
	.EQU	CAN4_MSK2R_MSK9,		9
	.EQU	CAN4_MSK2R_MSK8,		8
	.EQU	CAN4_MSK2R_MSK7,		7
	.EQU	CAN4_MSK2R_MSK6,		6
	.EQU	CAN4_MSK2R_MSK5,		5
	.EQU	CAN4_MSK2R_MSK4,		4
	.EQU	CAN4_MSK2R_MSK3,		3
	.EQU	CAN4_MSK2R_MSK2,		2
	.EQU	CAN4_MSK2R_MSK1,		1
	.EQU	CAN4_MSK2R_MSK0,		0
//  register-------------------------------------
	.EQU	CAN4_ACR3R,	0x40002910
//  0x4000 2910  CAN4_ACR3R   Bits-------------------------------------
	.EQU	CAN4_ACR3R_ACR31,		31
	.EQU	CAN4_ACR3R_ACR30,		30
	.EQU	CAN4_ACR3R_ACR29,		29
	.EQU	CAN4_ACR3R_ACR28,		28
	.EQU	CAN4_ACR3R_ACR27,		27
	.EQU	CAN4_ACR3R_ACR26,		26
	.EQU	CAN4_ACR3R_ACR25,		25
	.EQU	CAN4_ACR3R_ACR24,		24
	.EQU	CAN4_ACR3R_ACR23,		23
	.EQU	CAN4_ACR3R_ACR22,		22
	.EQU	CAN4_ACR3R_ACR21,		21
	.EQU	CAN4_ACR3R_ACR20,		20
	.EQU	CAN4_ACR3R_ACR19,		19
	.EQU	CAN4_ACR3R_ACR18,		18
	.EQU	CAN4_ACR3R_ACR17,		17
	.EQU	CAN4_ACR3R_ACR16,		16
	.EQU	CAN4_ACR3R_ACR15,		15
	.EQU	CAN4_ACR3R_ACR14,		14
	.EQU	CAN4_ACR3R_ACR13,		13
	.EQU	CAN4_ACR3R_ACR12,		12
	.EQU	CAN4_ACR3R_ACR11,		11
	.EQU	CAN4_ACR3R_ACR10,		10
	.EQU	CAN4_ACR3R_ACR9,		9
	.EQU	CAN4_ACR3R_ACR8,		8
	.EQU	CAN4_ACR3R_ACR7,		7
	.EQU	CAN4_ACR3R_ACR6,		6
	.EQU	CAN4_ACR3R_ACR5,		5
	.EQU	CAN4_ACR3R_ACR4,		4
	.EQU	CAN4_ACR3R_ACR3,		3
	.EQU	CAN4_ACR3R_ACR2,		2
	.EQU	CAN4_ACR3R_ACR1,		1
	.EQU	CAN4_ACR3R_ACR0,		0
//  register-------------------------------------
	.EQU	CAN4_MSK3R,	0x40002914
//  0x4000 2914  CAN4_MSK3R   Bits-------------------------------------
	.EQU	CAN4_MSK3R_MSK31,		31
	.EQU	CAN4_MSK3R_MSK30,		30
	.EQU	CAN4_MSK3R_MSK29,		29
	.EQU	CAN4_MSK3R_MSK28,		28
	.EQU	CAN4_MSK3R_MSK27,		27
	.EQU	CAN4_MSK3R_MSK26,		26
	.EQU	CAN4_MSK3R_MSK25,		25
	.EQU	CAN4_MSK3R_MSK24,		24
	.EQU	CAN4_MSK3R_MSK23,		23
	.EQU	CAN4_MSK3R_MSK22,		22
	.EQU	CAN4_MSK3R_MSK21,		21
	.EQU	CAN4_MSK3R_MSK20,		20
	.EQU	CAN4_MSK3R_MSK19,		19
	.EQU	CAN4_MSK3R_MSK18,		18
	.EQU	CAN4_MSK3R_MSK17,		17
	.EQU	CAN4_MSK3R_MSK16,		16
	.EQU	CAN4_MSK3R_MSK15,		15
	.EQU	CAN4_MSK3R_MSK14,		14
	.EQU	CAN4_MSK3R_MSK13,		13
	.EQU	CAN4_MSK3R_MSK12,		12
	.EQU	CAN4_MSK3R_MSK11,		11
	.EQU	CAN4_MSK3R_MSK10,		10
	.EQU	CAN4_MSK3R_MSK9,		9
	.EQU	CAN4_MSK3R_MSK8,		8
	.EQU	CAN4_MSK3R_MSK7,		7
	.EQU	CAN4_MSK3R_MSK6,		6
	.EQU	CAN4_MSK3R_MSK5,		5
	.EQU	CAN4_MSK3R_MSK4,		4
	.EQU	CAN4_MSK3R_MSK3,		3
	.EQU	CAN4_MSK3R_MSK2,		2
	.EQU	CAN4_MSK3R_MSK1,		1
	.EQU	CAN4_MSK3R_MSK0,		0
//  register-------------------------------------
	.EQU	CAN4_ACR4R,	0x40002918
//  0x4000 2918  CAN4_ACR4R   Bits-------------------------------------
	.EQU	CAN4_ACR4R_ACR31,		31
	.EQU	CAN4_ACR4R_ACR30,		30
	.EQU	CAN4_ACR4R_ACR29,		29
	.EQU	CAN4_ACR4R_ACR28,		28
	.EQU	CAN4_ACR4R_ACR27,		27
	.EQU	CAN4_ACR4R_ACR26,		26
	.EQU	CAN4_ACR4R_ACR25,		25
	.EQU	CAN4_ACR4R_ACR24,		24
	.EQU	CAN4_ACR4R_ACR23,		23
	.EQU	CAN4_ACR4R_ACR22,		22
	.EQU	CAN4_ACR4R_ACR21,		21
	.EQU	CAN4_ACR4R_ACR20,		20
	.EQU	CAN4_ACR4R_ACR19,		19
	.EQU	CAN4_ACR4R_ACR18,		18
	.EQU	CAN4_ACR4R_ACR17,		17
	.EQU	CAN4_ACR4R_ACR16,		16
	.EQU	CAN4_ACR4R_ACR15,		15
	.EQU	CAN4_ACR4R_ACR14,		14
	.EQU	CAN4_ACR4R_ACR13,		13
	.EQU	CAN4_ACR4R_ACR12,		12
	.EQU	CAN4_ACR4R_ACR11,		11
	.EQU	CAN4_ACR4R_ACR10,		10
	.EQU	CAN4_ACR4R_ACR9,		9
	.EQU	CAN4_ACR4R_ACR8,		8
	.EQU	CAN4_ACR4R_ACR7,		7
	.EQU	CAN4_ACR4R_ACR6,		6
	.EQU	CAN4_ACR4R_ACR5,		5
	.EQU	CAN4_ACR4R_ACR4,		4
	.EQU	CAN4_ACR4R_ACR3,		3
	.EQU	CAN4_ACR4R_ACR2,		2
	.EQU	CAN4_ACR4R_ACR1,		1
	.EQU	CAN4_ACR4R_ACR0,		0
//  register-------------------------------------
	.EQU	CAN4_MSK4R,	0x4000291C
//  0x4000 291C  CAN4_MSK4R   Bits-------------------------------------
	.EQU	CAN4_MSK4R_MSK31,		31
	.EQU	CAN4_MSK4R_MSK30,		30
	.EQU	CAN4_MSK4R_MSK29,		29
	.EQU	CAN4_MSK4R_MSK28,		28
	.EQU	CAN4_MSK4R_MSK27,		27
	.EQU	CAN4_MSK4R_MSK26,		26
	.EQU	CAN4_MSK4R_MSK25,		25
	.EQU	CAN4_MSK4R_MSK24,		24
	.EQU	CAN4_MSK4R_MSK23,		23
	.EQU	CAN4_MSK4R_MSK22,		22
	.EQU	CAN4_MSK4R_MSK21,		21
	.EQU	CAN4_MSK4R_MSK20,		20
	.EQU	CAN4_MSK4R_MSK19,		19
	.EQU	CAN4_MSK4R_MSK18,		18
	.EQU	CAN4_MSK4R_MSK17,		17
	.EQU	CAN4_MSK4R_MSK16,		16
	.EQU	CAN4_MSK4R_MSK15,		15
	.EQU	CAN4_MSK4R_MSK14,		14
	.EQU	CAN4_MSK4R_MSK13,		13
	.EQU	CAN4_MSK4R_MSK12,		12
	.EQU	CAN4_MSK4R_MSK11,		11
	.EQU	CAN4_MSK4R_MSK10,		10
	.EQU	CAN4_MSK4R_MSK9,		9
	.EQU	CAN4_MSK4R_MSK8,		8
	.EQU	CAN4_MSK4R_MSK7,		7
	.EQU	CAN4_MSK4R_MSK6,		6
	.EQU	CAN4_MSK4R_MSK5,		5
	.EQU	CAN4_MSK4R_MSK4,		4
	.EQU	CAN4_MSK4R_MSK3,		3
	.EQU	CAN4_MSK4R_MSK2,		2
	.EQU	CAN4_MSK4R_MSK1,		1
	.EQU	CAN4_MSK4R_MSK0,		0
//  register-------------------------------------
	.EQU	CAN4_ACR5R,	0x40002920
//  0x4000 2920  CAN4_ACR5R   Bits-------------------------------------
	.EQU	CAN4_ACR5R_ACR31,		31
	.EQU	CAN4_ACR5R_ACR30,		30
	.EQU	CAN4_ACR5R_ACR29,		29
	.EQU	CAN4_ACR5R_ACR28,		28
	.EQU	CAN4_ACR5R_ACR27,		27
	.EQU	CAN4_ACR5R_ACR26,		26
	.EQU	CAN4_ACR5R_ACR25,		25
	.EQU	CAN4_ACR5R_ACR24,		24
	.EQU	CAN4_ACR5R_ACR23,		23
	.EQU	CAN4_ACR5R_ACR22,		22
	.EQU	CAN4_ACR5R_ACR21,		21
	.EQU	CAN4_ACR5R_ACR20,		20
	.EQU	CAN4_ACR5R_ACR19,		19
	.EQU	CAN4_ACR5R_ACR18,		18
	.EQU	CAN4_ACR5R_ACR17,		17
	.EQU	CAN4_ACR5R_ACR16,		16
	.EQU	CAN4_ACR5R_ACR15,		15
	.EQU	CAN4_ACR5R_ACR14,		14
	.EQU	CAN4_ACR5R_ACR13,		13
	.EQU	CAN4_ACR5R_ACR12,		12
	.EQU	CAN4_ACR5R_ACR11,		11
	.EQU	CAN4_ACR5R_ACR10,		10
	.EQU	CAN4_ACR5R_ACR9,		9
	.EQU	CAN4_ACR5R_ACR8,		8
	.EQU	CAN4_ACR5R_ACR7,		7
	.EQU	CAN4_ACR5R_ACR6,		6
	.EQU	CAN4_ACR5R_ACR5,		5
	.EQU	CAN4_ACR5R_ACR4,		4
	.EQU	CAN4_ACR5R_ACR3,		3
	.EQU	CAN4_ACR5R_ACR2,		2
	.EQU	CAN4_ACR5R_ACR1,		1
	.EQU	CAN4_ACR5R_ACR0,		0
//  register-------------------------------------
	.EQU	CAN4_MSK5R,	0x40002924
//  0x4000 2924  CAN4_MSK5R   Bits-------------------------------------
	.EQU	CAN4_MSK5R_MSK31,		31
	.EQU	CAN4_MSK5R_MSK30,		30
	.EQU	CAN4_MSK5R_MSK29,		29
	.EQU	CAN4_MSK5R_MSK28,		28
	.EQU	CAN4_MSK5R_MSK27,		27
	.EQU	CAN4_MSK5R_MSK26,		26
	.EQU	CAN4_MSK5R_MSK25,		25
	.EQU	CAN4_MSK5R_MSK24,		24
	.EQU	CAN4_MSK5R_MSK23,		23
	.EQU	CAN4_MSK5R_MSK22,		22
	.EQU	CAN4_MSK5R_MSK21,		21
	.EQU	CAN4_MSK5R_MSK20,		20
	.EQU	CAN4_MSK5R_MSK19,		19
	.EQU	CAN4_MSK5R_MSK18,		18
	.EQU	CAN4_MSK5R_MSK17,		17
	.EQU	CAN4_MSK5R_MSK16,		16
	.EQU	CAN4_MSK5R_MSK15,		15
	.EQU	CAN4_MSK5R_MSK14,		14
	.EQU	CAN4_MSK5R_MSK13,		13
	.EQU	CAN4_MSK5R_MSK12,		12
	.EQU	CAN4_MSK5R_MSK11,		11
	.EQU	CAN4_MSK5R_MSK10,		10
	.EQU	CAN4_MSK5R_MSK9,		9
	.EQU	CAN4_MSK5R_MSK8,		8
	.EQU	CAN4_MSK5R_MSK7,		7
	.EQU	CAN4_MSK5R_MSK6,		6
	.EQU	CAN4_MSK5R_MSK5,		5
	.EQU	CAN4_MSK5R_MSK4,		4
	.EQU	CAN4_MSK5R_MSK3,		3
	.EQU	CAN4_MSK5R_MSK2,		2
	.EQU	CAN4_MSK5R_MSK1,		1
	.EQU	CAN4_MSK5R_MSK0,		0
//  register-------------------------------------
	.EQU	CAN4_ACR6R,	0x40002928
//  0x4000 2928  CAN4_ACR6R   Bits-------------------------------------
	.EQU	CAN4_ACR6R_ACR31,		31
	.EQU	CAN4_ACR6R_ACR30,		30
	.EQU	CAN4_ACR6R_ACR29,		29
	.EQU	CAN4_ACR6R_ACR28,		28
	.EQU	CAN4_ACR6R_ACR27,		27
	.EQU	CAN4_ACR6R_ACR26,		26
	.EQU	CAN4_ACR6R_ACR25,		25
	.EQU	CAN4_ACR6R_ACR24,		24
	.EQU	CAN4_ACR6R_ACR23,		23
	.EQU	CAN4_ACR6R_ACR22,		22
	.EQU	CAN4_ACR6R_ACR21,		21
	.EQU	CAN4_ACR6R_ACR20,		20
	.EQU	CAN4_ACR6R_ACR19,		19
	.EQU	CAN4_ACR6R_ACR18,		18
	.EQU	CAN4_ACR6R_ACR17,		17
	.EQU	CAN4_ACR6R_ACR16,		16
	.EQU	CAN4_ACR6R_ACR15,		15
	.EQU	CAN4_ACR6R_ACR14,		14
	.EQU	CAN4_ACR6R_ACR13,		13
	.EQU	CAN4_ACR6R_ACR12,		12
	.EQU	CAN4_ACR6R_ACR11,		11
	.EQU	CAN4_ACR6R_ACR10,		10
	.EQU	CAN4_ACR6R_ACR9,		9
	.EQU	CAN4_ACR6R_ACR8,		8
	.EQU	CAN4_ACR6R_ACR7,		7
	.EQU	CAN4_ACR6R_ACR6,		6
	.EQU	CAN4_ACR6R_ACR5,		5
	.EQU	CAN4_ACR6R_ACR4,		4
	.EQU	CAN4_ACR6R_ACR3,		3
	.EQU	CAN4_ACR6R_ACR2,		2
	.EQU	CAN4_ACR6R_ACR1,		1
	.EQU	CAN4_ACR6R_ACR0,		0
//  register-------------------------------------
	.EQU	CAN4_MSK6R,	0x4000292C
//  0x4000 292C  CAN4_MSK6R   Bits-------------------------------------
	.EQU	CAN4_MSK6R_MSK31,		31
	.EQU	CAN4_MSK6R_MSK30,		30
	.EQU	CAN4_MSK6R_MSK29,		29
	.EQU	CAN4_MSK6R_MSK28,		28
	.EQU	CAN4_MSK6R_MSK27,		27
	.EQU	CAN4_MSK6R_MSK26,		26
	.EQU	CAN4_MSK6R_MSK25,		25
	.EQU	CAN4_MSK6R_MSK24,		24
	.EQU	CAN4_MSK6R_MSK23,		23
	.EQU	CAN4_MSK6R_MSK22,		22
	.EQU	CAN4_MSK6R_MSK21,		21
	.EQU	CAN4_MSK6R_MSK20,		20
	.EQU	CAN4_MSK6R_MSK19,		19
	.EQU	CAN4_MSK6R_MSK18,		18
	.EQU	CAN4_MSK6R_MSK17,		17
	.EQU	CAN4_MSK6R_MSK16,		16
	.EQU	CAN4_MSK6R_MSK15,		15
	.EQU	CAN4_MSK6R_MSK14,		14
	.EQU	CAN4_MSK6R_MSK13,		13
	.EQU	CAN4_MSK6R_MSK12,		12
	.EQU	CAN4_MSK6R_MSK11,		11
	.EQU	CAN4_MSK6R_MSK10,		10
	.EQU	CAN4_MSK6R_MSK9,		9
	.EQU	CAN4_MSK6R_MSK8,		8
	.EQU	CAN4_MSK6R_MSK7,		7
	.EQU	CAN4_MSK6R_MSK6,		6
	.EQU	CAN4_MSK6R_MSK5,		5
	.EQU	CAN4_MSK6R_MSK4,		4
	.EQU	CAN4_MSK6R_MSK3,		3
	.EQU	CAN4_MSK6R_MSK2,		2
	.EQU	CAN4_MSK6R_MSK1,		1
	.EQU	CAN4_MSK6R_MSK0,		0
//  register-------------------------------------
	.EQU	CAN4_ACR7R,	0x40002930
//  0x4000 2930  CAN4_ACR7R   Bits-------------------------------------
	.EQU	CAN4_ACR7R_ACR31,		31
	.EQU	CAN4_ACR7R_ACR30,		30
	.EQU	CAN4_ACR7R_ACR29,		29
	.EQU	CAN4_ACR7R_ACR28,		28
	.EQU	CAN4_ACR7R_ACR27,		27
	.EQU	CAN4_ACR7R_ACR26,		26
	.EQU	CAN4_ACR7R_ACR25,		25
	.EQU	CAN4_ACR7R_ACR24,		24
	.EQU	CAN4_ACR7R_ACR23,		23
	.EQU	CAN4_ACR7R_ACR22,		22
	.EQU	CAN4_ACR7R_ACR21,		21
	.EQU	CAN4_ACR7R_ACR20,		20
	.EQU	CAN4_ACR7R_ACR19,		19
	.EQU	CAN4_ACR7R_ACR18,		18
	.EQU	CAN4_ACR7R_ACR17,		17
	.EQU	CAN4_ACR7R_ACR16,		16
	.EQU	CAN4_ACR7R_ACR15,		15
	.EQU	CAN4_ACR7R_ACR14,		14
	.EQU	CAN4_ACR7R_ACR13,		13
	.EQU	CAN4_ACR7R_ACR12,		12
	.EQU	CAN4_ACR7R_ACR11,		11
	.EQU	CAN4_ACR7R_ACR10,		10
	.EQU	CAN4_ACR7R_ACR9,		9
	.EQU	CAN4_ACR7R_ACR8,		8
	.EQU	CAN4_ACR7R_ACR7,		7
	.EQU	CAN4_ACR7R_ACR6,		6
	.EQU	CAN4_ACR7R_ACR5,		5
	.EQU	CAN4_ACR7R_ACR4,		4
	.EQU	CAN4_ACR7R_ACR3,		3
	.EQU	CAN4_ACR7R_ACR2,		2
	.EQU	CAN4_ACR7R_ACR1,		1
	.EQU	CAN4_ACR7R_ACR0,		0
//  register-------------------------------------
	.EQU	CAN4_MSK7R,	0x40002934
//  0x4000 2934  CAN4_MSK7R   Bits-------------------------------------
	.EQU	CAN4_MSK7R_MSK31,		31
	.EQU	CAN4_MSK7R_MSK30,		30
	.EQU	CAN4_MSK7R_MSK29,		29
	.EQU	CAN4_MSK7R_MSK28,		28
	.EQU	CAN4_MSK7R_MSK27,		27
	.EQU	CAN4_MSK7R_MSK26,		26
	.EQU	CAN4_MSK7R_MSK25,		25
	.EQU	CAN4_MSK7R_MSK24,		24
	.EQU	CAN4_MSK7R_MSK23,		23
	.EQU	CAN4_MSK7R_MSK22,		22
	.EQU	CAN4_MSK7R_MSK21,		21
	.EQU	CAN4_MSK7R_MSK20,		20
	.EQU	CAN4_MSK7R_MSK19,		19
	.EQU	CAN4_MSK7R_MSK18,		18
	.EQU	CAN4_MSK7R_MSK17,		17
	.EQU	CAN4_MSK7R_MSK16,		16
	.EQU	CAN4_MSK7R_MSK15,		15
	.EQU	CAN4_MSK7R_MSK14,		14
	.EQU	CAN4_MSK7R_MSK13,		13
	.EQU	CAN4_MSK7R_MSK12,		12
	.EQU	CAN4_MSK7R_MSK11,		11
	.EQU	CAN4_MSK7R_MSK10,		10
	.EQU	CAN4_MSK7R_MSK9,		9
	.EQU	CAN4_MSK7R_MSK8,		8
	.EQU	CAN4_MSK7R_MSK7,		7
	.EQU	CAN4_MSK7R_MSK6,		6
	.EQU	CAN4_MSK7R_MSK5,		5
	.EQU	CAN4_MSK7R_MSK4,		4
	.EQU	CAN4_MSK7R_MSK3,		3
	.EQU	CAN4_MSK7R_MSK2,		2
	.EQU	CAN4_MSK7R_MSK1,		1
	.EQU	CAN4_MSK7R_MSK0,		0
//  register-------------------------------------
	.EQU	CAN4_ACR8R,	0x40002938
//  0x4000 2938  CAN4_ACR8R   Bits-------------------------------------
	.EQU	CAN4_ACR8R_ACR31,		31
	.EQU	CAN4_ACR8R_ACR30,		30
	.EQU	CAN4_ACR8R_ACR29,		29
	.EQU	CAN4_ACR8R_ACR28,		28
	.EQU	CAN4_ACR8R_ACR27,		27
	.EQU	CAN4_ACR8R_ACR26,		26
	.EQU	CAN4_ACR8R_ACR25,		25
	.EQU	CAN4_ACR8R_ACR24,		24
	.EQU	CAN4_ACR8R_ACR23,		23
	.EQU	CAN4_ACR8R_ACR22,		22
	.EQU	CAN4_ACR8R_ACR21,		21
	.EQU	CAN4_ACR8R_ACR20,		20
	.EQU	CAN4_ACR8R_ACR19,		19
	.EQU	CAN4_ACR8R_ACR18,		18
	.EQU	CAN4_ACR8R_ACR17,		17
	.EQU	CAN4_ACR8R_ACR16,		16
	.EQU	CAN4_ACR8R_ACR15,		15
	.EQU	CAN4_ACR8R_ACR14,		14
	.EQU	CAN4_ACR8R_ACR13,		13
	.EQU	CAN4_ACR8R_ACR12,		12
	.EQU	CAN4_ACR8R_ACR11,		11
	.EQU	CAN4_ACR8R_ACR10,		10
	.EQU	CAN4_ACR8R_ACR9,		9
	.EQU	CAN4_ACR8R_ACR8,		8
	.EQU	CAN4_ACR8R_ACR7,		7
	.EQU	CAN4_ACR8R_ACR6,		6
	.EQU	CAN4_ACR8R_ACR5,		5
	.EQU	CAN4_ACR8R_ACR4,		4
	.EQU	CAN4_ACR8R_ACR3,		3
	.EQU	CAN4_ACR8R_ACR2,		2
	.EQU	CAN4_ACR8R_ACR1,		1
	.EQU	CAN4_ACR8R_ACR0,		0
//  register-------------------------------------
	.EQU	CAN4_MSK8R,	0x4000293C
//  0x4000 293C  CAN4_MSK8R   Bits-------------------------------------
	.EQU	CAN4_MSK8R_MSK31,		31
	.EQU	CAN4_MSK8R_MSK30,		30
	.EQU	CAN4_MSK8R_MSK29,		29
	.EQU	CAN4_MSK8R_MSK28,		28
	.EQU	CAN4_MSK8R_MSK27,		27
	.EQU	CAN4_MSK8R_MSK26,		26
	.EQU	CAN4_MSK8R_MSK25,		25
	.EQU	CAN4_MSK8R_MSK24,		24
	.EQU	CAN4_MSK8R_MSK23,		23
	.EQU	CAN4_MSK8R_MSK22,		22
	.EQU	CAN4_MSK8R_MSK21,		21
	.EQU	CAN4_MSK8R_MSK20,		20
	.EQU	CAN4_MSK8R_MSK19,		19
	.EQU	CAN4_MSK8R_MSK18,		18
	.EQU	CAN4_MSK8R_MSK17,		17
	.EQU	CAN4_MSK8R_MSK16,		16
	.EQU	CAN4_MSK8R_MSK15,		15
	.EQU	CAN4_MSK8R_MSK14,		14
	.EQU	CAN4_MSK8R_MSK13,		13
	.EQU	CAN4_MSK8R_MSK12,		12
	.EQU	CAN4_MSK8R_MSK11,		11
	.EQU	CAN4_MSK8R_MSK10,		10
	.EQU	CAN4_MSK8R_MSK9,		9
	.EQU	CAN4_MSK8R_MSK8,		8
	.EQU	CAN4_MSK8R_MSK7,		7
	.EQU	CAN4_MSK8R_MSK6,		6
	.EQU	CAN4_MSK8R_MSK5,		5
	.EQU	CAN4_MSK8R_MSK4,		4
	.EQU	CAN4_MSK8R_MSK3,		3
	.EQU	CAN4_MSK8R_MSK2,		2
	.EQU	CAN4_MSK8R_MSK1,		1
	.EQU	CAN4_MSK8R_MSK0,		0
//  register-------------------------------------
	.EQU	CFGL1_CTL0,	0x40002980
//  0x4000 2980  CFGL1_CTL0   Bits-------------------------------------
	.EQU	CFGL1_CTL0_EN,		31
	.EQU	CFGL1_CTL0_OE,		30
	.EQU	CFGL1_CTL0_INTP,		29
	.EQU	CFGL1_CTL0_INTN,		28
	.EQU	CFGL1_CTL0_MD2,		27
	.EQU	CFGL1_CTL0_MD1,		26
	.EQU	CFGL1_CTL0_MD0,		25
	.EQU	CFGL1_CTL0_POL,		24
	.EQU	CFGL1_CTL0_G4POL,		23
	.EQU	CFGL1_CTL0_G3POL,		22
	.EQU	CFGL1_CTL0_G2POL,		21
	.EQU	CFGL1_CTL0_G1POL,		20
	.EQU	CFGL1_CTL0_D4S2,		18
	.EQU	CFGL1_CTL0_D4S1,		17
	.EQU	CFGL1_CTL0_D4S0,		16
	.EQU	CFGL1_CTL0_D3S2,		14
	.EQU	CFGL1_CTL0_D3S1,		13
	.EQU	CFGL1_CTL0_D3S0,		12
	.EQU	CFGL1_CTL0_D2S2,		10
	.EQU	CFGL1_CTL0_D2S1,		9
	.EQU	CFGL1_CTL0_D2S0,		8
	.EQU	CFGL1_CTL0_D1S2,		6
	.EQU	CFGL1_CTL0_D1S1,		5
	.EQU	CFGL1_CTL0_D1S0,		4
	.EQU	CFGL1_CTL0_REGIN,		3
	.EQU	CFGL1_CTL0_TPSEL2,		2
	.EQU	CFGL1_CTL0_TPSEL1,		1
	.EQU	CFGL1_CTL0_TPSEL0,		0
//  register-------------------------------------
	.EQU	CFGL1_CTL1,	0x40002984
//  0x4000 2984  CFGL1_CTL1   Bits-------------------------------------
	.EQU	CFGL1_CTL1_G4D4T,		31
	.EQU	CFGL1_CTL1_G4D4N,		30
	.EQU	CFGL1_CTL1_G4D3T,		29
	.EQU	CFGL1_CTL1_G4D3N,		28
	.EQU	CFGL1_CTL1_G4D2T,		27
	.EQU	CFGL1_CTL1_G4D2N,		26
	.EQU	CFGL1_CTL1_G4D1T,		25
	.EQU	CFGL1_CTL1_G4D1N,		24
	.EQU	CFGL1_CTL1_G3D4T,		23
	.EQU	CFGL1_CTL1_G3D4N,		22
	.EQU	CFGL1_CTL1_G3D3T,		21
	.EQU	CFGL1_CTL1_G3D3N,		20
	.EQU	CFGL1_CTL1_G3D2T,		19
	.EQU	CFGL1_CTL1_G3D2N,		18
	.EQU	CFGL1_CTL1_G3D1T,		17
	.EQU	CFGL1_CTL1_G3D1N,		16
	.EQU	CFGL1_CTL1_G2D4T,		15
	.EQU	CFGL1_CTL1_G2D4N,		14
	.EQU	CFGL1_CTL1_G2D3T,		13
	.EQU	CFGL1_CTL1_G2D3N,		12
	.EQU	CFGL1_CTL1_G2D2T,		11
	.EQU	CFGL1_CTL1_G2D2N,		10
	.EQU	CFGL1_CTL1_G2D1T,		9
	.EQU	CFGL1_CTL1_G2D1N,		8
	.EQU	CFGL1_CTL1_G1D4T,		7
	.EQU	CFGL1_CTL1_G1D4N,		6
	.EQU	CFGL1_CTL1_G1D3T,		5
	.EQU	CFGL1_CTL1_G1D3N,		4
	.EQU	CFGL1_CTL1_G1D2T,		3
	.EQU	CFGL1_CTL1_G1D2N,		2
	.EQU	CFGL1_CTL1_G1D1T,		1
	.EQU	CFGL1_CTL1_G1D1N,		0
//  register-------------------------------------
	.EQU	CFGL2_CTL0,	0x40002988
//  0x4000 2988  CFGL2_CTL0   Bits-------------------------------------
	.EQU	CFGL2_CTL0_EN,		31
	.EQU	CFGL2_CTL0_OE,		30
	.EQU	CFGL2_CTL0_INTP,		29
	.EQU	CFGL2_CTL0_INTN,		28
	.EQU	CFGL2_CTL0_MD2,		27
	.EQU	CFGL2_CTL0_MD1,		26
	.EQU	CFGL2_CTL0_MD0,		25
	.EQU	CFGL2_CTL0_POL,		24
	.EQU	CFGL2_CTL0_G4POL,		23
	.EQU	CFGL2_CTL0_G3POL,		22
	.EQU	CFGL2_CTL0_G2POL,		21
	.EQU	CFGL2_CTL0_G1POL,		20
	.EQU	CFGL2_CTL0_D4S2,		18
	.EQU	CFGL2_CTL0_D4S1,		17
	.EQU	CFGL2_CTL0_D4S0,		16
	.EQU	CFGL2_CTL0_D3S2,		14
	.EQU	CFGL2_CTL0_D3S1,		13
	.EQU	CFGL2_CTL0_D3S0,		12
	.EQU	CFGL2_CTL0_D2S2,		10
	.EQU	CFGL2_CTL0_D2S1,		9
	.EQU	CFGL2_CTL0_D2S0,		8
	.EQU	CFGL2_CTL0_D1S2,		6
	.EQU	CFGL2_CTL0_D1S1,		5
	.EQU	CFGL2_CTL0_D1S0,		4
	.EQU	CFGL2_CTL0_REGIN,		3
	.EQU	CFGL2_CTL0_TPSEL2,		2
	.EQU	CFGL2_CTL0_TPSEL1,		1
	.EQU	CFGL2_CTL0_TPSEL0,		0
//  register-------------------------------------
	.EQU	CFGL2_CTL1,	0x4000298C
//  0x4000 298C  CFGL2_CTL1   Bits-------------------------------------
	.EQU	CFGL2_CTL1_G4D4T,		31
	.EQU	CFGL2_CTL1_G4D4N,		30
	.EQU	CFGL2_CTL1_G4D3T,		29
	.EQU	CFGL2_CTL1_G4D3N,		28
	.EQU	CFGL2_CTL1_G4D2T,		27
	.EQU	CFGL2_CTL1_G4D2N,		26
	.EQU	CFGL2_CTL1_G4D1T,		25
	.EQU	CFGL2_CTL1_G4D1N,		24
	.EQU	CFGL2_CTL1_G3D4T,		23
	.EQU	CFGL2_CTL1_G3D4N,		22
	.EQU	CFGL2_CTL1_G3D3T,		21
	.EQU	CFGL2_CTL1_G3D3N,		20
	.EQU	CFGL2_CTL1_G3D2T,		19
	.EQU	CFGL2_CTL1_G3D2N,		18
	.EQU	CFGL2_CTL1_G3D1T,		17
	.EQU	CFGL2_CTL1_G3D1N,		16
	.EQU	CFGL2_CTL1_G2D4T,		15
	.EQU	CFGL2_CTL1_G2D4N,		14
	.EQU	CFGL2_CTL1_G2D3T,		13
	.EQU	CFGL2_CTL1_G2D3N,		12
	.EQU	CFGL2_CTL1_G2D2T,		11
	.EQU	CFGL2_CTL1_G2D2N,		10
	.EQU	CFGL2_CTL1_G2D1T,		9
	.EQU	CFGL2_CTL1_G2D1N,		8
	.EQU	CFGL2_CTL1_G1D4T,		7
	.EQU	CFGL2_CTL1_G1D4N,		6
	.EQU	CFGL2_CTL1_G1D3T,		5
	.EQU	CFGL2_CTL1_G1D3N,		4
	.EQU	CFGL2_CTL1_G1D2T,		3
	.EQU	CFGL2_CTL1_G1D2N,		2
	.EQU	CFGL2_CTL1_G1D1T,		1
	.EQU	CFGL2_CTL1_G1D1N,		0
//  register-------------------------------------
	.EQU	CFGL_IFR,		0x40002990
//  0x4000 2990  CFGL_IFR   Bits-------------------------------------
	.EQU	CFGL_IFR_CFGL2SYNCEN,		31
	.EQU	CFGL_IFR_CFGL1SYNCEN,		30
	.EQU	CFGL_IFR_CFGL2IE,		29
	.EQU	CFGL_IFR_CFGL1IE,		28
	.EQU	CFGL_IFR_CFGL2IF,		9
	.EQU	CFGL_IFR_CFGL1IF,		8
	.EQU	CFGL_IFR_CFGL1C,		2
	.EQU	CFGL_IFR_CFGL2OUT,		1
	.EQU	CFGL_IFR_CFGL1OUT,		0
//  register-------------------------------------
	.EQU	OP_CTL0,		0x40002A00
//  0x4000 2A00  OP_CTL0   Bits-------------------------------------
	.EQU	OP_CTL0_OP3GAIN64X,		31
	.EQU	OP_CTL0_OP3GAIN32X,		30
	.EQU	OP_CTL0_OP3GAIN16X,		29
	.EQU	OP_CTL0_OP3GAIN8X,		28
	.EQU	OP_CTL0_OP3GAIN4X,		27
	.EQU	OP_CTL0_OP3GAIN2X,		26
	.EQU	OP_CTL0_OP2GAIN64X,		25
	.EQU	OP_CTL0_OP2GAIN32X,		24
	.EQU	OP_CTL0_OP2GAIN16X,		23
	.EQU	OP_CTL0_OP2GAIN8X,		22
	.EQU	OP_CTL0_OP2GAIN4X,		21
	.EQU	OP_CTL0_OP2GAIN2X,		20
	.EQU	OP_CTL0_OP1GAIN64X,		19
	.EQU	OP_CTL0_OP1GAIN32X,		18
	.EQU	OP_CTL0_OP1GAIN16X,		17
	.EQU	OP_CTL0_OP1GAIN8X,		16
	.EQU	OP_CTL0_OP1GAIN4X,		15
	.EQU	OP_CTL0_OP1GAIN2X,		14
	.EQU	OP_CTL0_OP0GAIN64X,		13
	.EQU	OP_CTL0_OP0GAIN32X,		12
	.EQU	OP_CTL0_OP0GAIN16X,		11
	.EQU	OP_CTL0_OP0GAIN8X,		10
	.EQU	OP_CTL0_OP0GAIN4X,		9
	.EQU	OP_CTL0_OP0GAIN2X,		8
	.EQU	OP_CTL0_OP3OUTEN,		7
	.EQU	OP_CTL0_OP2OUTEN,		6
	.EQU	OP_CTL0_OP1OUTEN,		5
	.EQU	OP_CTL0_OP0OUTEN,		4
	.EQU	OP_CTL0_OP3EN,		3
	.EQU	OP_CTL0_OP2EN,		2
	.EQU	OP_CTL0_OP1EN,		1
	.EQU	OP_CTL0_OP0EN,		0
//  register-------------------------------------
	.EQU	OP_CTL1,		0x40002A04
//  0X4000 2A04  OP_CTL1   Bits-------------------------------------
	.EQU	OP_CTL1_OP310KSEL,		31
	.EQU	OP_CTL1_OP210KSEL,		30
	.EQU	OP_CTL1_OP110KSEL,		29
	.EQU	OP_CTL1_OP010KSEL,		28
	.EQU	OP_CTL1_OP3TOCW,		27
	.EQU	OP_CTL1_OP3TOCV,		26
	.EQU	OP_CTL1_OP3TOCU,		25
	.EQU	OP_CTL1_OP2TOCW,		24
	.EQU	OP_CTL1_OP2TOCV,		23
	.EQU	OP_CTL1_OP2TOCU,		22
	.EQU	OP_CTL1_OP1TOCW,		21
	.EQU	OP_CTL1_OP1TOCV,		20
	.EQU	OP_CTL1_OP1TOCU,		19
	.EQU	OP_CTL1_OP0TOCW,		18
	.EQU	OP_CTL1_OP0TOCV,		17
	.EQU	OP_CTL1_OP0TOCU,		16
	.EQU	OP_CTL1_ENOP3INSHORT,		8
	.EQU	OP_CTL1_ENOP2INSHORT,		7
	.EQU	OP_CTL1_ENOP1INSHORT,		6
	.EQU	OP_CTL1_ENOP0INSHORT,		5
	.EQU	OP_CTL1_VCOMPSEL1,		4
	.EQU	OP_CTL1_VCOMPSEL0,		3
	.EQU	OP_CTL1_OPVCOMOUTEN,		2
	.EQU	OP_CTL1_ENOPVCOM,		1
	.EQU	OP_CTL1_ENCMP3,		0
//  register-------------------------------------
	.EQU	OP0_TRIM,		0x40002A08
//  0X4000 2A08  OP0_TRIM   Bits-------------------------------------
	.EQU	OP0_TRIM_OPTRIMHIEN,		31
	.EQU	OP0_TRIM_OPTRIMLOWEN,		30
	.EQU	OP0_TRIM_OP0TRIMOUT,		24
	.EQU	OP0_TRIM_OP0TRIMP5,		13
	.EQU	OP0_TRIM_OP0TRIMP4,		12
	.EQU	OP0_TRIM_OP0TRIMP3,		11
	.EQU	OP0_TRIM_OP0TRIMP2,		10
	.EQU	OP0_TRIM_OP0TRIMP1,		9
	.EQU	OP0_TRIM_OP0TRIMP0,		8
	.EQU	OP0_TRIM_OP0TRIMPPOL,		7
	.EQU	OP0_TRIM_OP0TRIMN5,		6
	.EQU	OP0_TRIM_OP0TRIMN4,		5
	.EQU	OP0_TRIM_OP0TRIMN3,		4
	.EQU	OP0_TRIM_OP0TRIMN2,		3
	.EQU	OP0_TRIM_OP0TRIMN1,		2
	.EQU	OP0_TRIM_OP0TRIMN0,		1
	.EQU	OP0_TRIM_OP0TRIMNPOL,		0
//  register-------------------------------------
	.EQU	OP1_TRIM,		0x40002A0C
//  0X4000 2A0C  OP1_TRIM   Bits-------------------------------------
	.EQU	OP1_TRIM_OP1TRIMOUT,		24
	.EQU	OP1_TRIM_OP1TRIMP5,		13
	.EQU	OP1_TRIM_OP1TRIMP4,		12
	.EQU	OP1_TRIM_OP1TRIMP3,		11
	.EQU	OP1_TRIM_OP1TRIMP2,		10
	.EQU	OP1_TRIM_OP1TRIMP1,		9
	.EQU	OP1_TRIM_OP1TRIMP0,		8
	.EQU	OP1_TRIM_OP1TRIMPPOL,		7
	.EQU	OP1_TRIM_OP1TRIMN5,		6
	.EQU	OP1_TRIM_OP1TRIMN4,		5
	.EQU	OP1_TRIM_OP1TRIMN3,		4
	.EQU	OP1_TRIM_OP1TRIMN2,		3
	.EQU	OP1_TRIM_OP1TRIMN1,		2
	.EQU	OP1_TRIM_OP1TRIMN0,		1
	.EQU	OP1_TRIM_OP1TRIMNPOL,		0
//  register-------------------------------------
	.EQU	OP2_TRIM,		0x40002A10
//  0X4000 2A10  OP2_TRIM   Bits-------------------------------------
	.EQU	OP2_TRIM_OP2TRIMOUT,		24
	.EQU	OP2_TRIM_OP2TRIMP5,		13
	.EQU	OP2_TRIM_OP2TRIMP4,		12
	.EQU	OP2_TRIM_OP2TRIMP3,		11
	.EQU	OP2_TRIM_OP2TRIMP2,		10
	.EQU	OP2_TRIM_OP2TRIMP1,		9
	.EQU	OP2_TRIM_OP2TRIMP0,		8
	.EQU	OP2_TRIM_OP2TRIMPPOL,		7
	.EQU	OP2_TRIM_OP2TRIMN5,		6
	.EQU	OP2_TRIM_OP2TRIMN4,		5
	.EQU	OP2_TRIM_OP2TRIMN3,		4
	.EQU	OP2_TRIM_OP2TRIMN2,		3
	.EQU	OP2_TRIM_OP2TRIMN1,		2
	.EQU	OP2_TRIM_OP2TRIMN0,		1
	.EQU	OP2_TRIM_OP2TRIMNPOL,		0
//  register-------------------------------------
	.EQU	OP3_TRIM,		0x40002A14
//  0X4000 2A14  OP3_TRIM   Bits-------------------------------------
	.EQU	OP3_TRIM_OP0TRIMOUT,		24
	.EQU	OP3_TRIM_OP3TRIMP5,		13
	.EQU	OP3_TRIM_OP3TRIMP4,		12
	.EQU	OP3_TRIM_OP3TRIMP3,		11
	.EQU	OP3_TRIM_OP3TRIMP2,		10
	.EQU	OP3_TRIM_OP3TRIMP1,		9
	.EQU	OP3_TRIM_OP3TRIMP0,		8
	.EQU	OP3_TRIM_OP3TRIMPPOL,		7
	.EQU	OP3_TRIM_OP3TRIMN5,		6
	.EQU	OP3_TRIM_OP3TRIMN4,		5
	.EQU	OP3_TRIM_OP3TRIMN3,		4
	.EQU	OP3_TRIM_OP3TRIMN2,		3
	.EQU	OP3_TRIM_OP3TRIMN1,		2
	.EQU	OP3_TRIM_OP3TRIMN0,		1
	.EQU	OP3_TRIM_OP3TRIMNPOL,		0
//  register-------------------------------------
	.EQU	EWDT_CTL,		0x40002B00
//  0X4000 2B00  EWDT_CTL   Bits-------------------------------------
	.EQU	EWDT_CTL_OUTSEL,		24
	.EQU	EWDT_CTL_EWDTRSTIF,		23
	.EQU	EWDT_CTL_EWDTRSTIC,		22
	.EQU	EWDT_CTL_EWDTRSTIE,		21
	.EQU	EWDT_CTL_CLKS1,		19
	.EQU	EWDT_CTL_CLKS0,		18
	.EQU	EWDT_CTL_EWDTINPOL,		17
	.EQU	EWDT_CTL_EWDTINEN,		16
	.EQU	EWDT_CTL_WT40IC,		15
	.EQU	EWDT_CTL_WW6,		14
	.EQU	EWDT_CTL_WW5,		13
	.EQU	EWDT_CTL_WW4,		12
	.EQU	EWDT_CTL_WW3,		11
	.EQU	EWDT_CTL_WW2,		10
	.EQU	EWDT_CTL_WW1,		9
	.EQU	EWDT_CTL_WW0,		8
	.EQU	EWDT_CTL_WPS4,		7
	.EQU	EWDT_CTL_WPS3,		6
	.EQU	EWDT_CTL_WPS2,		5
	.EQU	EWDT_CTL_WPS1,		4
	.EQU	EWDT_CTL_WPS0,		3
	.EQU	EWDT_CTL_WT40IF,		2
	.EQU	EWDT_CTL_WT40IE,		1
	.EQU	EWDT_CTL_EWDTEN,		0
//  register-------------------------------------
	.EQU	EWDT_CNT,		0x40002B04
//  0X4000 2B04  EWDT_CNT   Bits-------------------------------------
	.EQU	EWDT_CNT_WT6,		6
	.EQU	EWDT_CNT_WT5,		5
	.EQU	EWDT_CNT_WT4,		4
	.EQU	EWDT_CNT_WT3,		3
	.EQU	EWDT_CNT_WT2,		2
	.EQU	EWDT_CNT_WT1,		1
	.EQU	EWDT_CNT_WT0,		0
//  register-------------------------------------
	.EQU	FDC0_CTL,		0x40002B80
//  0X4000 2B80  FDC0_CTL   Bits-------------------------------------
	.EQU	FDC0_CTL_TCLR,		26
	.EQU	FDC0_CTL_CLKSEL1,		25
	.EQU	FDC0_CTL_CLKSEL0,		24
	.EQU	FDC0_CTL_MDLIC,		23
	.EQU	FDC0_CTL_CMODE,		22
	.EQU	FDC0_CTL_BBMODE,		21
	.EQU	FDC0_CTL_LDMOD1,		20
	.EQU	FDC0_CTL_LDMOD0,		19
	.EQU	FDC0_CTL_FDCEIE,		18
	.EQU	FDC0_CTL_SWTRIG,		17
	.EQU	FDC0_CTL_FDCDE,		16
	.EQU	FDC0_CTL_PRESC2,		15
	.EQU	FDC0_CTL_PRESC1,		14
	.EQU	FDC0_CTL_PRESC0,		13
	.EQU	FDC0_CTL_MULSEL5,		12
	.EQU	FDC0_CTL_MULSEL4,		11
	.EQU	FDC0_CTL_MULSEL3,		10
	.EQU	FDC0_CTL_MULSEL2,		9
	.EQU	FDC0_CTL_MULSEL1,		8
	.EQU	FDC0_CTL_MULSEL0,		7
	.EQU	FDC0_CTL_TRGSEL,		6
	.EQU	FDC0_CTL_MDLIE,		5
	.EQU	FDC0_CTL_MDLIF,		4
	.EQU	FDC0_CTL_CONT,		3
	.EQU	FDC0_CTL_LDOK,		2
	.EQU	FDC0_CTL_POEN,		1
	.EQU	FDC0_CTL_FDCEN,		0
//  register-------------------------------------
	.EQU	FDC0_MOD,		0x40002B84
//  0X4000 2B84  FDC0_MOD   Bits-------------------------------------
	.EQU	FDC0_MOD_MOD15,		15
	.EQU	FDC0_MOD_MOD14,		14
	.EQU	FDC0_MOD_MOD13,		13
	.EQU	FDC0_MOD_MOD12,		12
	.EQU	FDC0_MOD_MOD11,		11
	.EQU	FDC0_MOD_MOD10,		10
	.EQU	FDC0_MOD_MOD9,		9
	.EQU	FDC0_MOD_MOD8,		8
	.EQU	FDC0_MOD_MOD7,		7
	.EQU	FDC0_MOD_MOD6,		6
	.EQU	FDC0_MOD_MOD5,		5
	.EQU	FDC0_MOD_MOD4,		4
	.EQU	FDC0_MOD_MOD3,		3
	.EQU	FDC0_MOD_MOD2,		2
	.EQU	FDC0_MOD_MOD1,		1
	.EQU	FDC0_MOD_MOD0,		0
//  register-------------------------------------
	.EQU	FDC0_CNT,		0x40002B88
//  0X4000 2B88  FDC0_CNT   Bits-------------------------------------
	.EQU	FDC0_CNT_CNT15,		15
	.EQU	FDC0_CNT_CNT14,		14
	.EQU	FDC0_CNT_CNT13,		13
	.EQU	FDC0_CNT_CNT12,		12
	.EQU	FDC0_CNT_CNT11,		11
	.EQU	FDC0_CNT_CNT10,		10
	.EQU	FDC0_CNT_CNT9,		9
	.EQU	FDC0_CNT_CNT8,		8
	.EQU	FDC0_CNT_CNT7,		7
	.EQU	FDC0_CNT_CNT6,		6
	.EQU	FDC0_CNT_CNT5,		5
	.EQU	FDC0_CNT_CNT4,		4
	.EQU	FDC0_CNT_CNT3,		3
	.EQU	FDC0_CNT_CNT2,		2
	.EQU	FDC0_CNT_CNT1,		1
	.EQU	FDC0_CNT_CNT0,		0
//  register-------------------------------------
	.EQU	FDC0_IDLY,		0x40002B8C
//  0X4000 2B8C  FDC0_IDLY   Bits-------------------------------------
	.EQU	FDC0_IDLY_IDLY15,		15
	.EQU	FDC0_IDLY_IDLY14,		14
	.EQU	FDC0_IDLY_IDLY13,		13
	.EQU	FDC0_IDLY_IDLY12,		12
	.EQU	FDC0_IDLY_IDLY11,		11
	.EQU	FDC0_IDLY_IDLY10,		10
	.EQU	FDC0_IDLY_IDLY9,		9
	.EQU	FDC0_IDLY_IDLY8,		8
	.EQU	FDC0_IDLY_IDLY7,		7
	.EQU	FDC0_IDLY_IDLY6,		6
	.EQU	FDC0_IDLY_IDLY5,		5
	.EQU	FDC0_IDLY_IDLY4,		4
	.EQU	FDC0_IDLY_IDLY3,		3
	.EQU	FDC0_IDLY_IDLY2,		2
	.EQU	FDC0_IDLY_IDLY1,		1
	.EQU	FDC0_IDLY_IDLY0,		0
//  register-------------------------------------
	.EQU	FDC0_CH0CTL,	0x40002B90
//  0X4000 2B90  FDC0_CH0CTL   Bits-------------------------------------
	.EQU	FDC0_CH0CTL_ERRIC4,		24
	.EQU	FDC0_CH0CTL_ERRIC3,		23
	.EQU	FDC0_CH0CTL_ERRIC2,		22
	.EQU	FDC0_CH0CTL_ERRIC1,		21
	.EQU	FDC0_CH0CTL_ERRIC0,		20
	.EQU	FDC0_CH0CTL_ERR4,		19
	.EQU	FDC0_CH0CTL_ERR3,		18
	.EQU	FDC0_CH0CTL_ERR2,		17
	.EQU	FDC0_CH0CTL_ERR1,		16
	.EQU	FDC0_CH0CTL_ERR0,		15
	.EQU	FDC0_CH0CTL_CF4,		14
	.EQU	FDC0_CH0CTL_CF3,		13
	.EQU	FDC0_CH0CTL_CF2,		12
	.EQU	FDC0_CH0CTL_CF1,		11
	.EQU	FDC0_CH0CTL_CF0,		10
	.EQU	FDC0_CH0CTL_TOS4,		9
	.EQU	FDC0_CH0CTL_TOS3,		8
	.EQU	FDC0_CH0CTL_TOS2,		7
	.EQU	FDC0_CH0CTL_TOS1,		6
	.EQU	FDC0_CH0CTL_TOS0,		5
	.EQU	FDC0_CH0CTL_PREN4,		4
	.EQU	FDC0_CH0CTL_PREN3,		3
	.EQU	FDC0_CH0CTL_PREN2,		2
	.EQU	FDC0_CH0CTL_PREN1,		1
	.EQU	FDC0_CH0CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC0_CH1CTL,	0x40002B94
//  0X4000 2B94  FDC0_CH1CTL   Bits-------------------------------------
	.EQU	FDC0_CH1CTL_ERRIC4,		24
	.EQU	FDC0_CH1CTL_ERRIC3,		23
	.EQU	FDC0_CH1CTL_ERRIC2,		22
	.EQU	FDC0_CH1CTL_ERRIC1,		21
	.EQU	FDC0_CH1CTL_ERRIC0,		20
	.EQU	FDC0_CH1CTL_ERR4,		19
	.EQU	FDC0_CH1CTL_ERR3,		18
	.EQU	FDC0_CH1CTL_ERR2,		17
	.EQU	FDC0_CH1CTL_ERR1,		16
	.EQU	FDC0_CH1CTL_ERR0,		15
	.EQU	FDC0_CH1CTL_CF4,		14
	.EQU	FDC0_CH1CTL_CF3,		13
	.EQU	FDC0_CH1CTL_CF2,		12
	.EQU	FDC0_CH1CTL_CF1,		11
	.EQU	FDC0_CH1CTL_CF0,		10
	.EQU	FDC0_CH1CTL_TOS4,		9
	.EQU	FDC0_CH1CTL_TOS3,		8
	.EQU	FDC0_CH1CTL_TOS2,		7
	.EQU	FDC0_CH1CTL_TOS1,		6
	.EQU	FDC0_CH1CTL_TOS0,		5
	.EQU	FDC0_CH1CTL_PREN4,		4
	.EQU	FDC0_CH1CTL_PREN3,		3
	.EQU	FDC0_CH1CTL_PREN2,		2
	.EQU	FDC0_CH1CTL_PREN1,		1
	.EQU	FDC0_CH1CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC0_CH2CTL,	0x40002B98
//  0X4000 2B98  FDC0_CH2CTL   Bits-------------------------------------
	.EQU	FDC0_CH2CTL_ERRIC4,		24
	.EQU	FDC0_CH2CTL_ERRIC3,		23
	.EQU	FDC0_CH2CTL_ERRIC2,		22
	.EQU	FDC0_CH2CTL_ERRIC1,		21
	.EQU	FDC0_CH2CTL_ERRIC0,		20
	.EQU	FDC0_CH2CTL_ERR4,		19
	.EQU	FDC0_CH2CTL_ERR3,		18
	.EQU	FDC0_CH2CTL_ERR2,		17
	.EQU	FDC0_CH2CTL_ERR1,		16
	.EQU	FDC0_CH2CTL_ERR0,		15
	.EQU	FDC0_CH2CTL_CF4,		14
	.EQU	FDC0_CH2CTL_CF3,		13
	.EQU	FDC0_CH2CTL_CF2,		12
	.EQU	FDC0_CH2CTL_CF1,		11
	.EQU	FDC0_CH2CTL_CF0,		10
	.EQU	FDC0_CH2CTL_TOS4,		9
	.EQU	FDC0_CH2CTL_TOS3,		8
	.EQU	FDC0_CH2CTL_TOS2,		7
	.EQU	FDC0_CH2CTL_TOS1,		6
	.EQU	FDC0_CH2CTL_TOS0,		5
	.EQU	FDC0_CH2CTL_PREN4,		4
	.EQU	FDC0_CH2CTL_PREN3,		3
	.EQU	FDC0_CH2CTL_PREN2,		2
	.EQU	FDC0_CH2CTL_PREN1,		1
	.EQU	FDC0_CH2CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC0_CH3CTL,	0x40002B9C
//  0X4000 2B9C  FDC0_CH3CTL   Bits-------------------------------------
	.EQU	FDC0_CH3CTL_ERRIC4,		24
	.EQU	FDC0_CH3CTL_ERRIC3,		23
	.EQU	FDC0_CH3CTL_ERRIC2,		22
	.EQU	FDC0_CH3CTL_ERRIC1,		21
	.EQU	FDC0_CH3CTL_ERRIC0,		20
	.EQU	FDC0_CH3CTL_ERR4,		19
	.EQU	FDC0_CH3CTL_ERR3,		18
	.EQU	FDC0_CH3CTL_ERR2,		17
	.EQU	FDC0_CH3CTL_ERR1,		16
	.EQU	FDC0_CH3CTL_ERR0,		15
	.EQU	FDC0_CH3CTL_CF4,		14
	.EQU	FDC0_CH3CTL_CF3,		13
	.EQU	FDC0_CH3CTL_CF2,		12
	.EQU	FDC0_CH3CTL_CF1,		11
	.EQU	FDC0_CH3CTL_CF0,		10
	.EQU	FDC0_CH3CTL_TOS4,		9
	.EQU	FDC0_CH3CTL_TOS3,		8
	.EQU	FDC0_CH3CTL_TOS2,		7
	.EQU	FDC0_CH3CTL_TOS1,		6
	.EQU	FDC0_CH3CTL_TOS0,		5
	.EQU	FDC0_CH3CTL_PREN4,		4
	.EQU	FDC0_CH3CTL_PREN3,		3
	.EQU	FDC0_CH3CTL_PREN2,		2
	.EQU	FDC0_CH3CTL_PREN1,		1
	.EQU	FDC0_CH3CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC0_CH0DLY0,	0x40002BB0
//  0X4000 2BB0  FDC0_CH0DLY0   Bits-------------------------------------
	.EQU	FDC0_CH0DLY0_DLY1_15,		31
	.EQU	FDC0_CH0DLY0_DLY1_14,		30
	.EQU	FDC0_CH0DLY0_DLY1_13,		29
	.EQU	FDC0_CH0DLY0_DLY1_12,		28
	.EQU	FDC0_CH0DLY0_DLY1_11,		27
	.EQU	FDC0_CH0DLY0_DLY1_10,		26
	.EQU	FDC0_CH0DLY0_DLY1_9,		25
	.EQU	FDC0_CH0DLY0_DLY1_8,		24
	.EQU	FDC0_CH0DLY0_DLY1_7,		23
	.EQU	FDC0_CH0DLY0_DLY1_6,		22
	.EQU	FDC0_CH0DLY0_DLY1_5,		21
	.EQU	FDC0_CH0DLY0_DLY1_4,		20
	.EQU	FDC0_CH0DLY0_DLY1_3,		19
	.EQU	FDC0_CH0DLY0_DLY1_2,		18
	.EQU	FDC0_CH0DLY0_DLY1_1,		17
	.EQU	FDC0_CH0DLY0_DLY1_0,		16
	.EQU	FDC0_CH0DLY0_DLY0_15,		15
	.EQU	FDC0_CH0DLY0_DLY0_14,		14
	.EQU	FDC0_CH0DLY0_DLY0_13,		13
	.EQU	FDC0_CH0DLY0_DLY0_12,		12
	.EQU	FDC0_CH0DLY0_DLY0_11,		11
	.EQU	FDC0_CH0DLY0_DLY0_10,		10
	.EQU	FDC0_CH0DLY0_DLY0_9,		9
	.EQU	FDC0_CH0DLY0_DLY0_8,		8
	.EQU	FDC0_CH0DLY0_DLY0_7,		7
	.EQU	FDC0_CH0DLY0_DLY0_6,		6
	.EQU	FDC0_CH0DLY0_DLY0_5,		5
	.EQU	FDC0_CH0DLY0_DLY0_4,		4
	.EQU	FDC0_CH0DLY0_DLY0_3,		3
	.EQU	FDC0_CH0DLY0_DLY0_2,		2
	.EQU	FDC0_CH0DLY0_DLY0_1,		1
	.EQU	FDC0_CH0DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH0DLY1,	0x40002BB4
//  0X4000 2BB4  FDC0_CH0DLY1   Bits-------------------------------------
	.EQU	FDC0_CH0DLY1_DLY3_15,		31
	.EQU	FDC0_CH0DLY1_DLY3_14,		30
	.EQU	FDC0_CH0DLY1_DLY3_13,		29
	.EQU	FDC0_CH0DLY1_DLY3_12,		28
	.EQU	FDC0_CH0DLY1_DLY3_11,		27
	.EQU	FDC0_CH0DLY1_DLY3_10,		26
	.EQU	FDC0_CH0DLY1_DLY3_9,		25
	.EQU	FDC0_CH0DLY1_DLY3_8,		24
	.EQU	FDC0_CH0DLY1_DLY3_7,		23
	.EQU	FDC0_CH0DLY1_DLY3_6,		22
	.EQU	FDC0_CH0DLY1_DLY3_5,		21
	.EQU	FDC0_CH0DLY1_DLY3_4,		20
	.EQU	FDC0_CH0DLY1_DLY3_3,		19
	.EQU	FDC0_CH0DLY1_DLY3_2,		18
	.EQU	FDC0_CH0DLY1_DLY3_1,		17
	.EQU	FDC0_CH0DLY1_DLY3_0,		16
	.EQU	FDC0_CH0DLY1_DLY2_15,		15
	.EQU	FDC0_CH0DLY1_DLY2_14,		14
	.EQU	FDC0_CH0DLY1_DLY2_13,		13
	.EQU	FDC0_CH0DLY1_DLY2_12,		12
	.EQU	FDC0_CH0DLY1_DLY2_11,		11
	.EQU	FDC0_CH0DLY1_DLY2_10,		10
	.EQU	FDC0_CH0DLY1_DLY2_9,		9
	.EQU	FDC0_CH0DLY1_DLY2_8,		8
	.EQU	FDC0_CH0DLY1_DLY2_7,		7
	.EQU	FDC0_CH0DLY1_DLY2_6,		6
	.EQU	FDC0_CH0DLY1_DLY2_5,		5
	.EQU	FDC0_CH0DLY1_DLY2_4,		4
	.EQU	FDC0_CH0DLY1_DLY2_3,		3
	.EQU	FDC0_CH0DLY1_DLY2_2,		2
	.EQU	FDC0_CH0DLY1_DLY2_1,		1
	.EQU	FDC0_CH0DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH0DLY2,	0x40002BB8
//  0X4000 2BB8  FDC0_CH0DLY2   Bits-------------------------------------
	.EQU	FDC0_CH0DLY2_DLY4_15,		15
	.EQU	FDC0_CH0DLY2_DLY4_14,		14
	.EQU	FDC0_CH0DLY2_DLY4_13,		13
	.EQU	FDC0_CH0DLY2_DLY4_12,		12
	.EQU	FDC0_CH0DLY2_DLY4_11,		11
	.EQU	FDC0_CH0DLY2_DLY4_10,		10
	.EQU	FDC0_CH0DLY2_DLY4_9,		9
	.EQU	FDC0_CH0DLY2_DLY4_8,		8
	.EQU	FDC0_CH0DLY2_DLY4_7,		7
	.EQU	FDC0_CH0DLY2_DLY4_6,		6
	.EQU	FDC0_CH0DLY2_DLY4_5,		5
	.EQU	FDC0_CH0DLY2_DLY4_4,		4
	.EQU	FDC0_CH0DLY2_DLY4_3,		3
	.EQU	FDC0_CH0DLY2_DLY4_2,		2
	.EQU	FDC0_CH0DLY2_DLY4_1,		1
	.EQU	FDC0_CH0DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH1DLY0,	0x40002BC0
//  0X4000 2BC0  FDC0_CH1DLY0   Bits-------------------------------------
	.EQU	FDC0_CH1DLY0_DLY1_15,		31
	.EQU	FDC0_CH1DLY0_DLY1_14,		30
	.EQU	FDC0_CH1DLY0_DLY1_13,		29
	.EQU	FDC0_CH1DLY0_DLY1_12,		28
	.EQU	FDC0_CH1DLY0_DLY1_11,		27
	.EQU	FDC0_CH1DLY0_DLY1_10,		26
	.EQU	FDC0_CH1DLY0_DLY1_9,		25
	.EQU	FDC0_CH1DLY0_DLY1_8,		24
	.EQU	FDC0_CH1DLY0_DLY1_7,		23
	.EQU	FDC0_CH1DLY0_DLY1_6,		22
	.EQU	FDC0_CH1DLY0_DLY1_5,		21
	.EQU	FDC0_CH1DLY0_DLY1_4,		20
	.EQU	FDC0_CH1DLY0_DLY1_3,		19
	.EQU	FDC0_CH1DLY0_DLY1_2,		18
	.EQU	FDC0_CH1DLY0_DLY1_1,		17
	.EQU	FDC0_CH1DLY0_DLY1_0,		16
	.EQU	FDC0_CH1DLY0_DLY0_15,		15
	.EQU	FDC0_CH1DLY0_DLY0_14,		14
	.EQU	FDC0_CH1DLY0_DLY0_13,		13
	.EQU	FDC0_CH1DLY0_DLY0_12,		12
	.EQU	FDC0_CH1DLY0_DLY0_11,		11
	.EQU	FDC0_CH1DLY0_DLY0_10,		10
	.EQU	FDC0_CH1DLY0_DLY0_9,		9
	.EQU	FDC0_CH1DLY0_DLY0_8,		8
	.EQU	FDC0_CH1DLY0_DLY0_7,		7
	.EQU	FDC0_CH1DLY0_DLY0_6,		6
	.EQU	FDC0_CH1DLY0_DLY0_5,		5
	.EQU	FDC0_CH1DLY0_DLY0_4,		4
	.EQU	FDC0_CH1DLY0_DLY0_3,		3
	.EQU	FDC0_CH1DLY0_DLY0_2,		2
	.EQU	FDC0_CH1DLY0_DLY0_1,		1
	.EQU	FDC0_CH1DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH1DLY1,	0x40002BC4
//  0X4000 2BC4  FDC0_CH1DLY1   Bits-------------------------------------
	.EQU	FDC0_CH1DLY1_DLY3_15,		31
	.EQU	FDC0_CH1DLY1_DLY3_14,		30
	.EQU	FDC0_CH1DLY1_DLY3_13,		29
	.EQU	FDC0_CH1DLY1_DLY3_12,		28
	.EQU	FDC0_CH1DLY1_DLY3_11,		27
	.EQU	FDC0_CH1DLY1_DLY3_10,		26
	.EQU	FDC0_CH1DLY1_DLY3_9,		25
	.EQU	FDC0_CH1DLY1_DLY3_8,		24
	.EQU	FDC0_CH1DLY1_DLY3_7,		23
	.EQU	FDC0_CH1DLY1_DLY3_6,		22
	.EQU	FDC0_CH1DLY1_DLY3_5,		21
	.EQU	FDC0_CH1DLY1_DLY3_4,		20
	.EQU	FDC0_CH1DLY1_DLY3_3,		19
	.EQU	FDC0_CH1DLY1_DLY3_2,		18
	.EQU	FDC0_CH1DLY1_DLY3_1,		17
	.EQU	FDC0_CH1DLY1_DLY3_0,		16
	.EQU	FDC0_CH1DLY1_DLY2_15,		15
	.EQU	FDC0_CH1DLY1_DLY2_14,		14
	.EQU	FDC0_CH1DLY1_DLY2_13,		13
	.EQU	FDC0_CH1DLY1_DLY2_12,		12
	.EQU	FDC0_CH1DLY1_DLY2_11,		11
	.EQU	FDC0_CH1DLY1_DLY2_10,		10
	.EQU	FDC0_CH1DLY1_DLY2_9,		9
	.EQU	FDC0_CH1DLY1_DLY2_8,		8
	.EQU	FDC0_CH1DLY1_DLY2_7,		7
	.EQU	FDC0_CH1DLY1_DLY2_6,		6
	.EQU	FDC0_CH1DLY1_DLY2_5,		5
	.EQU	FDC0_CH1DLY1_DLY2_4,		4
	.EQU	FDC0_CH1DLY1_DLY2_3,		3
	.EQU	FDC0_CH1DLY1_DLY2_2,		2
	.EQU	FDC0_CH1DLY1_DLY2_1,		1
	.EQU	FDC0_CH1DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH1DLY2,	0x40002BC8
//  0X4000 2BC8  FDC0_CH1DLY2   Bits-------------------------------------
	.EQU	FDC0_CH1DLY2_DLY4_15,		15
	.EQU	FDC0_CH1DLY2_DLY4_14,		14
	.EQU	FDC0_CH1DLY2_DLY4_13,		13
	.EQU	FDC0_CH1DLY2_DLY4_12,		12
	.EQU	FDC0_CH1DLY2_DLY4_11,		11
	.EQU	FDC0_CH1DLY2_DLY4_10,		10
	.EQU	FDC0_CH1DLY2_DLY4_9,		9
	.EQU	FDC0_CH1DLY2_DLY4_8,		8
	.EQU	FDC0_CH1DLY2_DLY4_7,		7
	.EQU	FDC0_CH1DLY2_DLY4_6,		6
	.EQU	FDC0_CH1DLY2_DLY4_5,		5
	.EQU	FDC0_CH1DLY2_DLY4_4,		4
	.EQU	FDC0_CH1DLY2_DLY4_3,		3
	.EQU	FDC0_CH1DLY2_DLY4_2,		2
	.EQU	FDC0_CH1DLY2_DLY4_1,		1
	.EQU	FDC0_CH1DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH2DLY0,	0x40002BD0
//  0X4000 2BD0  FDC0_CH2DLY0   Bits-------------------------------------
	.EQU	FDC0_CH2DLY0_DLY1_15,		31
	.EQU	FDC0_CH2DLY0_DLY1_14,		30
	.EQU	FDC0_CH2DLY0_DLY1_13,		29
	.EQU	FDC0_CH2DLY0_DLY1_12,		28
	.EQU	FDC0_CH2DLY0_DLY1_11,		27
	.EQU	FDC0_CH2DLY0_DLY1_10,		26
	.EQU	FDC0_CH2DLY0_DLY1_9,		25
	.EQU	FDC0_CH2DLY0_DLY1_8,		24
	.EQU	FDC0_CH2DLY0_DLY1_7,		23
	.EQU	FDC0_CH2DLY0_DLY1_6,		22
	.EQU	FDC0_CH2DLY0_DLY1_5,		21
	.EQU	FDC0_CH2DLY0_DLY1_4,		20
	.EQU	FDC0_CH2DLY0_DLY1_3,		19
	.EQU	FDC0_CH2DLY0_DLY1_2,		18
	.EQU	FDC0_CH2DLY0_DLY1_1,		17
	.EQU	FDC0_CH2DLY0_DLY1_0,		16
	.EQU	FDC0_CH2DLY0_DLY0_15,		15
	.EQU	FDC0_CH2DLY0_DLY0_14,		14
	.EQU	FDC0_CH2DLY0_DLY0_13,		13
	.EQU	FDC0_CH2DLY0_DLY0_12,		12
	.EQU	FDC0_CH2DLY0_DLY0_11,		11
	.EQU	FDC0_CH2DLY0_DLY0_10,		10
	.EQU	FDC0_CH2DLY0_DLY0_9,		9
	.EQU	FDC0_CH2DLY0_DLY0_8,		8
	.EQU	FDC0_CH2DLY0_DLY0_7,		7
	.EQU	FDC0_CH2DLY0_DLY0_6,		6
	.EQU	FDC0_CH2DLY0_DLY0_5,		5
	.EQU	FDC0_CH2DLY0_DLY0_4,		4
	.EQU	FDC0_CH2DLY0_DLY0_3,		3
	.EQU	FDC0_CH2DLY0_DLY0_2,		2
	.EQU	FDC0_CH2DLY0_DLY0_1,		1
	.EQU	FDC0_CH2DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH2DLY1,	0x40002BD4
//  0X4000 2BD4  FDC0_CH2DLY1   Bits-------------------------------------
	.EQU	FDC0_CH2DLY1_DLY3_15,		31
	.EQU	FDC0_CH2DLY1_DLY3_14,		30
	.EQU	FDC0_CH2DLY1_DLY3_13,		29
	.EQU	FDC0_CH2DLY1_DLY3_12,		28
	.EQU	FDC0_CH2DLY1_DLY3_11,		27
	.EQU	FDC0_CH2DLY1_DLY3_10,		26
	.EQU	FDC0_CH2DLY1_DLY3_9,		25
	.EQU	FDC0_CH2DLY1_DLY3_8,		24
	.EQU	FDC0_CH2DLY1_DLY3_7,		23
	.EQU	FDC0_CH2DLY1_DLY3_6,		22
	.EQU	FDC0_CH2DLY1_DLY3_5,		21
	.EQU	FDC0_CH2DLY1_DLY3_4,		20
	.EQU	FDC0_CH2DLY1_DLY3_3,		19
	.EQU	FDC0_CH2DLY1_DLY3_2,		18
	.EQU	FDC0_CH2DLY1_DLY3_1,		17
	.EQU	FDC0_CH2DLY1_DLY3_0,		16
	.EQU	FDC0_CH2DLY1_DLY2_15,		15
	.EQU	FDC0_CH2DLY1_DLY2_14,		14
	.EQU	FDC0_CH2DLY1_DLY2_13,		13
	.EQU	FDC0_CH2DLY1_DLY2_12,		12
	.EQU	FDC0_CH2DLY1_DLY2_11,		11
	.EQU	FDC0_CH2DLY1_DLY2_10,		10
	.EQU	FDC0_CH2DLY1_DLY2_9,		9
	.EQU	FDC0_CH2DLY1_DLY2_8,		8
	.EQU	FDC0_CH2DLY1_DLY2_7,		7
	.EQU	FDC0_CH2DLY1_DLY2_6,		6
	.EQU	FDC0_CH2DLY1_DLY2_5,		5
	.EQU	FDC0_CH2DLY1_DLY2_4,		4
	.EQU	FDC0_CH2DLY1_DLY2_3,		3
	.EQU	FDC0_CH2DLY1_DLY2_2,		2
	.EQU	FDC0_CH2DLY1_DLY2_1,		1
	.EQU	FDC0_CH2DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH2DLY2,	0x40002BD8
//  0X4000 2BD8  FDC0_CH2DLY2   Bits-------------------------------------
	.EQU	FDC0_CH2DLY2_DLY4_15,		15
	.EQU	FDC0_CH2DLY2_DLY4_14,		14
	.EQU	FDC0_CH2DLY2_DLY4_13,		13
	.EQU	FDC0_CH2DLY2_DLY4_12,		12
	.EQU	FDC0_CH2DLY2_DLY4_11,		11
	.EQU	FDC0_CH2DLY2_DLY4_10,		10
	.EQU	FDC0_CH2DLY2_DLY4_9,		9
	.EQU	FDC0_CH2DLY2_DLY4_8,		8
	.EQU	FDC0_CH2DLY2_DLY4_7,		7
	.EQU	FDC0_CH2DLY2_DLY4_6,		6
	.EQU	FDC0_CH2DLY2_DLY4_5,		5
	.EQU	FDC0_CH2DLY2_DLY4_4,		4
	.EQU	FDC0_CH2DLY2_DLY4_3,		3
	.EQU	FDC0_CH2DLY2_DLY4_2,		2
	.EQU	FDC0_CH2DLY2_DLY4_1,		1
	.EQU	FDC0_CH2DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH3DLY0,	0x40002BE0
//  0X4000 2BE0  FDC0_CH3DLY0   Bits-------------------------------------
	.EQU	FDC0_CH3DLY0_DLY1_15,		31
	.EQU	FDC0_CH3DLY0_DLY1_14,		30
	.EQU	FDC0_CH3DLY0_DLY1_13,		29
	.EQU	FDC0_CH3DLY0_DLY1_12,		28
	.EQU	FDC0_CH3DLY0_DLY1_11,		27
	.EQU	FDC0_CH3DLY0_DLY1_10,		26
	.EQU	FDC0_CH3DLY0_DLY1_9,		25
	.EQU	FDC0_CH3DLY0_DLY1_8,		24
	.EQU	FDC0_CH3DLY0_DLY1_7,		23
	.EQU	FDC0_CH3DLY0_DLY1_6,		22
	.EQU	FDC0_CH3DLY0_DLY1_5,		21
	.EQU	FDC0_CH3DLY0_DLY1_4,		20
	.EQU	FDC0_CH3DLY0_DLY1_3,		19
	.EQU	FDC0_CH3DLY0_DLY1_2,		18
	.EQU	FDC0_CH3DLY0_DLY1_1,		17
	.EQU	FDC0_CH3DLY0_DLY1_0,		16
	.EQU	FDC0_CH3DLY0_DLY0_15,		15
	.EQU	FDC0_CH3DLY0_DLY0_14,		14
	.EQU	FDC0_CH3DLY0_DLY0_13,		13
	.EQU	FDC0_CH3DLY0_DLY0_12,		12
	.EQU	FDC0_CH3DLY0_DLY0_11,		11
	.EQU	FDC0_CH3DLY0_DLY0_10,		10
	.EQU	FDC0_CH3DLY0_DLY0_9,		9
	.EQU	FDC0_CH3DLY0_DLY0_8,		8
	.EQU	FDC0_CH3DLY0_DLY0_7,		7
	.EQU	FDC0_CH3DLY0_DLY0_6,		6
	.EQU	FDC0_CH3DLY0_DLY0_5,		5
	.EQU	FDC0_CH3DLY0_DLY0_4,		4
	.EQU	FDC0_CH3DLY0_DLY0_3,		3
	.EQU	FDC0_CH3DLY0_DLY0_2,		2
	.EQU	FDC0_CH3DLY0_DLY0_1,		1
	.EQU	FDC0_CH3DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH3DLY1,	0x40002BE4
//  0X4000 2BE4  FDC0_CH3DLY1   Bits-------------------------------------
	.EQU	FDC0_CH3DLY1_DLY3_15,		31
	.EQU	FDC0_CH3DLY1_DLY3_14,		30
	.EQU	FDC0_CH3DLY1_DLY3_13,		29
	.EQU	FDC0_CH3DLY1_DLY3_12,		28
	.EQU	FDC0_CH3DLY1_DLY3_11,		27
	.EQU	FDC0_CH3DLY1_DLY3_10,		26
	.EQU	FDC0_CH3DLY1_DLY3_9,		25
	.EQU	FDC0_CH3DLY1_DLY3_8,		24
	.EQU	FDC0_CH3DLY1_DLY3_7,		23
	.EQU	FDC0_CH3DLY1_DLY3_6,		22
	.EQU	FDC0_CH3DLY1_DLY3_5,		21
	.EQU	FDC0_CH3DLY1_DLY3_4,		20
	.EQU	FDC0_CH3DLY1_DLY3_3,		19
	.EQU	FDC0_CH3DLY1_DLY3_2,		18
	.EQU	FDC0_CH3DLY1_DLY3_1,		17
	.EQU	FDC0_CH3DLY1_DLY3_0,		16
	.EQU	FDC0_CH3DLY1_DLY2_15,		15
	.EQU	FDC0_CH3DLY1_DLY2_14,		14
	.EQU	FDC0_CH3DLY1_DLY2_13,		13
	.EQU	FDC0_CH3DLY1_DLY2_12,		12
	.EQU	FDC0_CH3DLY1_DLY2_11,		11
	.EQU	FDC0_CH3DLY1_DLY2_10,		10
	.EQU	FDC0_CH3DLY1_DLY2_9,		9
	.EQU	FDC0_CH3DLY1_DLY2_8,		8
	.EQU	FDC0_CH3DLY1_DLY2_7,		7
	.EQU	FDC0_CH3DLY1_DLY2_6,		6
	.EQU	FDC0_CH3DLY1_DLY2_5,		5
	.EQU	FDC0_CH3DLY1_DLY2_4,		4
	.EQU	FDC0_CH3DLY1_DLY2_3,		3
	.EQU	FDC0_CH3DLY1_DLY2_2,		2
	.EQU	FDC0_CH3DLY1_DLY2_1,		1
	.EQU	FDC0_CH3DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC0_CH3DLY2,	0x40002BE8
//  0X4000 2BE8  FDC0_CH3DLY2   Bits-------------------------------------
	.EQU	FDC0_CH3DLY2_DLY4_15,		15
	.EQU	FDC0_CH3DLY2_DLY4_14,		14
	.EQU	FDC0_CH3DLY2_DLY4_13,		13
	.EQU	FDC0_CH3DLY2_DLY4_12,		12
	.EQU	FDC0_CH3DLY2_DLY4_11,		11
	.EQU	FDC0_CH3DLY2_DLY4_10,		10
	.EQU	FDC0_CH3DLY2_DLY4_9,		9
	.EQU	FDC0_CH3DLY2_DLY4_8,		8
	.EQU	FDC0_CH3DLY2_DLY4_7,		7
	.EQU	FDC0_CH3DLY2_DLY4_6,		6
	.EQU	FDC0_CH3DLY2_DLY4_5,		5
	.EQU	FDC0_CH3DLY2_DLY4_4,		4
	.EQU	FDC0_CH3DLY2_DLY4_3,		3
	.EQU	FDC0_CH3DLY2_DLY4_2,		2
	.EQU	FDC0_CH3DLY2_DLY4_1,		1
	.EQU	FDC0_CH3DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC0_PO0DLY,	0x40002BF0
//  0X4000 2BF0  FDC0_PO0DLY   Bits-------------------------------------
	.EQU	FDC0_PO0DLY_DLYH15,		31
	.EQU	FDC0_PO0DLY_DLYH14,		30
	.EQU	FDC0_PO0DLY_DLYH13,		29
	.EQU	FDC0_PO0DLY_DLYH12,		28
	.EQU	FDC0_PO0DLY_DLYH11,		27
	.EQU	FDC0_PO0DLY_DLYH10,		26
	.EQU	FDC0_PO0DLY_DLYH9,		25
	.EQU	FDC0_PO0DLY_DLYH8,		24
	.EQU	FDC0_PO0DLY_DLYH7,		23
	.EQU	FDC0_PO0DLY_DLYH6,		22
	.EQU	FDC0_PO0DLY_DLYH5,		21
	.EQU	FDC0_PO0DLY_DLYH4,		20
	.EQU	FDC0_PO0DLY_DLYH3,		19
	.EQU	FDC0_PO0DLY_DLYH2,		18
	.EQU	FDC0_PO0DLY_DLYH1,		17
	.EQU	FDC0_PO0DLY_DLYH0,		16
	.EQU	FDC0_PO0DLY_DLYL15,		15
	.EQU	FDC0_PO0DLY_DLYL14,		14
	.EQU	FDC0_PO0DLY_DLYL13,		13
	.EQU	FDC0_PO0DLY_DLYL12,		12
	.EQU	FDC0_PO0DLY_DLYL11,		11
	.EQU	FDC0_PO0DLY_DLYL10,		10
	.EQU	FDC0_PO0DLY_DLYL9,		9
	.EQU	FDC0_PO0DLY_DLYL8,		8
	.EQU	FDC0_PO0DLY_DLYL7,		7
	.EQU	FDC0_PO0DLY_DLYL6,		6
	.EQU	FDC0_PO0DLY_DLYL5,		5
	.EQU	FDC0_PO0DLY_DLYL4,		4
	.EQU	FDC0_PO0DLY_DLYL3,		3
	.EQU	FDC0_PO0DLY_DLYL2,		2
	.EQU	FDC0_PO0DLY_DLYL1,		1
	.EQU	FDC0_PO0DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC0_PO1DLY,	0x40002BF4
//  0X4000 2BF4  FDC0_PO1DLY   Bits-------------------------------------
	.EQU	FDC0_PO1DLY_DLYH15,		31
	.EQU	FDC0_PO1DLY_DLYH14,		30
	.EQU	FDC0_PO1DLY_DLYH13,		29
	.EQU	FDC0_PO1DLY_DLYH12,		28
	.EQU	FDC0_PO1DLY_DLYH11,		27
	.EQU	FDC0_PO1DLY_DLYH10,		26
	.EQU	FDC0_PO1DLY_DLYH9,		25
	.EQU	FDC0_PO1DLY_DLYH8,		24
	.EQU	FDC0_PO1DLY_DLYH7,		23
	.EQU	FDC0_PO1DLY_DLYH6,		22
	.EQU	FDC0_PO1DLY_DLYH5,		21
	.EQU	FDC0_PO1DLY_DLYH4,		20
	.EQU	FDC0_PO1DLY_DLYH3,		19
	.EQU	FDC0_PO1DLY_DLYH2,		18
	.EQU	FDC0_PO1DLY_DLYH1,		17
	.EQU	FDC0_PO1DLY_DLYH0,		16
	.EQU	FDC0_PO1DLY_DLYL15,		15
	.EQU	FDC0_PO1DLY_DLYL14,		14
	.EQU	FDC0_PO1DLY_DLYL13,		13
	.EQU	FDC0_PO1DLY_DLYL12,		12
	.EQU	FDC0_PO1DLY_DLYL11,		11
	.EQU	FDC0_PO1DLY_DLYL10,		10
	.EQU	FDC0_PO1DLY_DLYL9,		9
	.EQU	FDC0_PO1DLY_DLYL8,		8
	.EQU	FDC0_PO1DLY_DLYL7,		7
	.EQU	FDC0_PO1DLY_DLYL6,		6
	.EQU	FDC0_PO1DLY_DLYL5,		5
	.EQU	FDC0_PO1DLY_DLYL4,		4
	.EQU	FDC0_PO1DLY_DLYL3,		3
	.EQU	FDC0_PO1DLY_DLYL2,		2
	.EQU	FDC0_PO1DLY_DLYL1,		1
	.EQU	FDC0_PO1DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC0_PO2DLY,	0x40002BF8
//  0X4000 2BF8  FDC0_PO2DLY   Bits-------------------------------------
	.EQU	FDC0_PO2DLY_DLYH15,		31
	.EQU	FDC0_PO2DLY_DLYH14,		30
	.EQU	FDC0_PO2DLY_DLYH13,		29
	.EQU	FDC0_PO2DLY_DLYH12,		28
	.EQU	FDC0_PO2DLY_DLYH11,		27
	.EQU	FDC0_PO2DLY_DLYH10,		26
	.EQU	FDC0_PO2DLY_DLYH9,		25
	.EQU	FDC0_PO2DLY_DLYH8,		24
	.EQU	FDC0_PO2DLY_DLYH7,		23
	.EQU	FDC0_PO2DLY_DLYH6,		22
	.EQU	FDC0_PO2DLY_DLYH5,		21
	.EQU	FDC0_PO2DLY_DLYH4,		20
	.EQU	FDC0_PO2DLY_DLYH3,		19
	.EQU	FDC0_PO2DLY_DLYH2,		18
	.EQU	FDC0_PO2DLY_DLYH1,		17
	.EQU	FDC0_PO2DLY_DLYH0,		16
	.EQU	FDC0_PO2DLY_DLYL15,		15
	.EQU	FDC0_PO2DLY_DLYL14,		14
	.EQU	FDC0_PO2DLY_DLYL13,		13
	.EQU	FDC0_PO2DLY_DLYL12,		12
	.EQU	FDC0_PO2DLY_DLYL11,		11
	.EQU	FDC0_PO2DLY_DLYL10,		10
	.EQU	FDC0_PO2DLY_DLYL9,		9
	.EQU	FDC0_PO2DLY_DLYL8,		8
	.EQU	FDC0_PO2DLY_DLYL7,		7
	.EQU	FDC0_PO2DLY_DLYL6,		6
	.EQU	FDC0_PO2DLY_DLYL5,		5
	.EQU	FDC0_PO2DLY_DLYL4,		4
	.EQU	FDC0_PO2DLY_DLYL3,		3
	.EQU	FDC0_PO2DLY_DLYL2,		2
	.EQU	FDC0_PO2DLY_DLYL1,		1
	.EQU	FDC0_PO2DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC0_PO3DLY,	0x40002BFC
//  0X4000 2BFC  FDC0_PO3DLY   Bits-------------------------------------
	.EQU	FDC0_PO3DLY_DLYH15,		31
	.EQU	FDC0_PO3DLY_DLYH14,		30
	.EQU	FDC0_PO3DLY_DLYH13,		29
	.EQU	FDC0_PO3DLY_DLYH12,		28
	.EQU	FDC0_PO3DLY_DLYH11,		27
	.EQU	FDC0_PO3DLY_DLYH10,		26
	.EQU	FDC0_PO3DLY_DLYH9,		25
	.EQU	FDC0_PO3DLY_DLYH8,		24
	.EQU	FDC0_PO3DLY_DLYH7,		23
	.EQU	FDC0_PO3DLY_DLYH6,		22
	.EQU	FDC0_PO3DLY_DLYH5,		21
	.EQU	FDC0_PO3DLY_DLYH4,		20
	.EQU	FDC0_PO3DLY_DLYH3,		19
	.EQU	FDC0_PO3DLY_DLYH2,		18
	.EQU	FDC0_PO3DLY_DLYH1,		17
	.EQU	FDC0_PO3DLY_DLYH0,		16
	.EQU	FDC0_PO3DLY_DLYL15,		15
	.EQU	FDC0_PO3DLY_DLYL14,		14
	.EQU	FDC0_PO3DLY_DLYL13,		13
	.EQU	FDC0_PO3DLY_DLYL12,		12
	.EQU	FDC0_PO3DLY_DLYL11,		11
	.EQU	FDC0_PO3DLY_DLYL10,		10
	.EQU	FDC0_PO3DLY_DLYL9,		9
	.EQU	FDC0_PO3DLY_DLYL8,		8
	.EQU	FDC0_PO3DLY_DLYL7,		7
	.EQU	FDC0_PO3DLY_DLYL6,		6
	.EQU	FDC0_PO3DLY_DLYL5,		5
	.EQU	FDC0_PO3DLY_DLYL4,		4
	.EQU	FDC0_PO3DLY_DLYL3,		3
	.EQU	FDC0_PO3DLY_DLYL2,		2
	.EQU	FDC0_PO3DLY_DLYL1,		1
	.EQU	FDC0_PO3DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC1_CTL,		0x40002C00
//  0X4000 2C00  FDC1_CTL   Bits-------------------------------------
	.EQU	FDC1_CTL_TCLR,		26
	.EQU	FDC1_CTL_CLKSEL1,		25
	.EQU	FDC1_CTL_CLKSEL0,		24
	.EQU	FDC1_CTL_MDLIC,		23
	.EQU	FDC1_CTL_CMODE,		22
	.EQU	FDC1_CTL_BBMODE,		21
	.EQU	FDC1_CTL_LDMOD1,		20
	.EQU	FDC1_CTL_LDMOD0,		19
	.EQU	FDC1_CTL_FDCEIE,		18
	.EQU	FDC1_CTL_SWTRIG,		17
	.EQU	FDC1_CTL_FDCDE,		16
	.EQU	FDC1_CTL_PRESC2,		15
	.EQU	FDC1_CTL_PRESC1,		14
	.EQU	FDC1_CTL_PRESC0,		13
	.EQU	FDC1_CTL_MULSEL5,		12
	.EQU	FDC1_CTL_MULSEL4,		11
	.EQU	FDC1_CTL_MULSEL3,		10
	.EQU	FDC1_CTL_MULSEL2,		9
	.EQU	FDC1_CTL_MULSEL1,		8
	.EQU	FDC1_CTL_MULSEL0,		7
	.EQU	FDC1_CTL_TRGSEL,		6
	.EQU	FDC1_CTL_MDLIE,		5
	.EQU	FDC1_CTL_MDLIF,		4
	.EQU	FDC1_CTL_CONT,		3
	.EQU	FDC1_CTL_LDOK,		2
	.EQU	FDC1_CTL_POEN,		1
	.EQU	FDC1_CTL_FDCEN,		0
//  register-------------------------------------
	.EQU	FDC1_MOD,		0x40002C04
//  0X4000 2C04  FDC1_MOD   Bits-------------------------------------
	.EQU	FDC1_MOD_MOD15,		15
	.EQU	FDC1_MOD_MOD14,		14
	.EQU	FDC1_MOD_MOD13,		13
	.EQU	FDC1_MOD_MOD12,		12
	.EQU	FDC1_MOD_MOD11,		11
	.EQU	FDC1_MOD_MOD10,		10
	.EQU	FDC1_MOD_MOD9,		9
	.EQU	FDC1_MOD_MOD8,		8
	.EQU	FDC1_MOD_MOD7,		7
	.EQU	FDC1_MOD_MOD6,		6
	.EQU	FDC1_MOD_MOD5,		5
	.EQU	FDC1_MOD_MOD4,		4
	.EQU	FDC1_MOD_MOD3,		3
	.EQU	FDC1_MOD_MOD2,		2
	.EQU	FDC1_MOD_MOD1,		1
	.EQU	FDC1_MOD_MOD0,		0
//  register-------------------------------------
	.EQU	FDC1_CNT,		0x40002C08
//  0X4000 2C08  FDC1_CNT   Bits-------------------------------------
	.EQU	FDC1_CNT_CNT15,		15
	.EQU	FDC1_CNT_CNT14,		14
	.EQU	FDC1_CNT_CNT13,		13
	.EQU	FDC1_CNT_CNT12,		12
	.EQU	FDC1_CNT_CNT11,		11
	.EQU	FDC1_CNT_CNT10,		10
	.EQU	FDC1_CNT_CNT9,		9
	.EQU	FDC1_CNT_CNT8,		8
	.EQU	FDC1_CNT_CNT7,		7
	.EQU	FDC1_CNT_CNT6,		6
	.EQU	FDC1_CNT_CNT5,		5
	.EQU	FDC1_CNT_CNT4,		4
	.EQU	FDC1_CNT_CNT3,		3
	.EQU	FDC1_CNT_CNT2,		2
	.EQU	FDC1_CNT_CNT1,		1
	.EQU	FDC1_CNT_CNT0,		0
//  register-------------------------------------
	.EQU	FDC1_IDLY,		0x40002C0C
//  0X4000 2C0C  FDC1_IDLY   Bits-------------------------------------
	.EQU	FDC1_IDLY_IDLY15,		15
	.EQU	FDC1_IDLY_IDLY14,		14
	.EQU	FDC1_IDLY_IDLY13,		13
	.EQU	FDC1_IDLY_IDLY12,		12
	.EQU	FDC1_IDLY_IDLY11,		11
	.EQU	FDC1_IDLY_IDLY10,		10
	.EQU	FDC1_IDLY_IDLY9,		9
	.EQU	FDC1_IDLY_IDLY8,		8
	.EQU	FDC1_IDLY_IDLY7,		7
	.EQU	FDC1_IDLY_IDLY6,		6
	.EQU	FDC1_IDLY_IDLY5,		5
	.EQU	FDC1_IDLY_IDLY4,		4
	.EQU	FDC1_IDLY_IDLY3,		3
	.EQU	FDC1_IDLY_IDLY2,		2
	.EQU	FDC1_IDLY_IDLY1,		1
	.EQU	FDC1_IDLY_IDLY0,		0
//  register-------------------------------------
	.EQU	FDC1_CH0CTL,	0x40002C10
//  0X4000 2C10  FDC1_CH0CTL   Bits-------------------------------------
	.EQU	FDC1_CH0CTL_ERRIC4,		24
	.EQU	FDC1_CH0CTL_ERRIC3,		23
	.EQU	FDC1_CH0CTL_ERRIC2,		22
	.EQU	FDC1_CH0CTL_ERRIC1,		21
	.EQU	FDC1_CH0CTL_ERRIC0,		20
	.EQU	FDC1_CH0CTL_ERR4,		19
	.EQU	FDC1_CH0CTL_ERR3,		18
	.EQU	FDC1_CH0CTL_ERR2,		17
	.EQU	FDC1_CH0CTL_ERR1,		16
	.EQU	FDC1_CH0CTL_ERR0,		15
	.EQU	FDC1_CH0CTL_CF4,		14
	.EQU	FDC1_CH0CTL_CF3,		13
	.EQU	FDC1_CH0CTL_CF2,		12
	.EQU	FDC1_CH0CTL_CF1,		11
	.EQU	FDC1_CH0CTL_CF0,		10
	.EQU	FDC1_CH0CTL_TOS4,		9
	.EQU	FDC1_CH0CTL_TOS3,		8
	.EQU	FDC1_CH0CTL_TOS2,		7
	.EQU	FDC1_CH0CTL_TOS1,		6
	.EQU	FDC1_CH0CTL_TOS0,		5
	.EQU	FDC1_CH0CTL_PREN4,		4
	.EQU	FDC1_CH0CTL_PREN3,		3
	.EQU	FDC1_CH0CTL_PREN2,		2
	.EQU	FDC1_CH0CTL_PREN1,		1
	.EQU	FDC1_CH0CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC1_CH1CTL,	0x40002C14
//  0X4000 2C14  FDC1_CH1CTL   Bits-------------------------------------
	.EQU	FDC1_CH1CTL_ERRIC4,		24
	.EQU	FDC1_CH1CTL_ERRIC3,		23
	.EQU	FDC1_CH1CTL_ERRIC2,		22
	.EQU	FDC1_CH1CTL_ERRIC1,		21
	.EQU	FDC1_CH1CTL_ERRIC0,		20
	.EQU	FDC1_CH1CTL_ERR4,		19
	.EQU	FDC1_CH1CTL_ERR3,		18
	.EQU	FDC1_CH1CTL_ERR2,		17
	.EQU	FDC1_CH1CTL_ERR1,		16
	.EQU	FDC1_CH1CTL_ERR0,		15
	.EQU	FDC1_CH1CTL_CF4,		14
	.EQU	FDC1_CH1CTL_CF3,		13
	.EQU	FDC1_CH1CTL_CF2,		12
	.EQU	FDC1_CH1CTL_CF1,		11
	.EQU	FDC1_CH1CTL_CF0,		10
	.EQU	FDC1_CH1CTL_TOS4,		9
	.EQU	FDC1_CH1CTL_TOS3,		8
	.EQU	FDC1_CH1CTL_TOS2,		7
	.EQU	FDC1_CH1CTL_TOS1,		6
	.EQU	FDC1_CH1CTL_TOS0,		5
	.EQU	FDC1_CH1CTL_PREN4,		4
	.EQU	FDC1_CH1CTL_PREN3,		3
	.EQU	FDC1_CH1CTL_PREN2,		2
	.EQU	FDC1_CH1CTL_PREN1,		1
	.EQU	FDC1_CH1CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC1_CH2CTL,	0x40002C18
//  0X4000 2C18  FDC1_CH2CTL   Bits-------------------------------------
	.EQU	FDC1_CH2CTL_ERRIC4,		24
	.EQU	FDC1_CH2CTL_ERRIC3,		23
	.EQU	FDC1_CH2CTL_ERRIC2,		22
	.EQU	FDC1_CH2CTL_ERRIC1,		21
	.EQU	FDC1_CH2CTL_ERRIC0,		20
	.EQU	FDC1_CH2CTL_ERR4,		19
	.EQU	FDC1_CH2CTL_ERR3,		18
	.EQU	FDC1_CH2CTL_ERR2,		17
	.EQU	FDC1_CH2CTL_ERR1,		16
	.EQU	FDC1_CH2CTL_ERR0,		15
	.EQU	FDC1_CH2CTL_CF4,		14
	.EQU	FDC1_CH2CTL_CF3,		13
	.EQU	FDC1_CH2CTL_CF2,		12
	.EQU	FDC1_CH2CTL_CF1,		11
	.EQU	FDC1_CH2CTL_CF0,		10
	.EQU	FDC1_CH2CTL_TOS4,		9
	.EQU	FDC1_CH2CTL_TOS3,		8
	.EQU	FDC1_CH2CTL_TOS2,		7
	.EQU	FDC1_CH2CTL_TOS1,		6
	.EQU	FDC1_CH2CTL_TOS0,		5
	.EQU	FDC1_CH2CTL_PREN4,		4
	.EQU	FDC1_CH2CTL_PREN3,		3
	.EQU	FDC1_CH2CTL_PREN2,		2
	.EQU	FDC1_CH2CTL_PREN1,		1
	.EQU	FDC1_CH2CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC1_CH3CTL,	0x40002C1C
//  0X4000 2C1C  FDC1_CH3CTL   Bits-------------------------------------
	.EQU	FDC1_CH3CTL_ERRIC4,		24
	.EQU	FDC1_CH3CTL_ERRIC3,		23
	.EQU	FDC1_CH3CTL_ERRIC2,		22
	.EQU	FDC1_CH3CTL_ERRIC1,		21
	.EQU	FDC1_CH3CTL_ERRIC0,		20
	.EQU	FDC1_CH3CTL_ERR4,		19
	.EQU	FDC1_CH3CTL_ERR3,		18
	.EQU	FDC1_CH3CTL_ERR2,		17
	.EQU	FDC1_CH3CTL_ERR1,		16
	.EQU	FDC1_CH3CTL_ERR0,		15
	.EQU	FDC1_CH3CTL_CF4,		14
	.EQU	FDC1_CH3CTL_CF3,		13
	.EQU	FDC1_CH3CTL_CF2,		12
	.EQU	FDC1_CH3CTL_CF1,		11
	.EQU	FDC1_CH3CTL_CF0,		10
	.EQU	FDC1_CH3CTL_TOS4,		9
	.EQU	FDC1_CH3CTL_TOS3,		8
	.EQU	FDC1_CH3CTL_TOS2,		7
	.EQU	FDC1_CH3CTL_TOS1,		6
	.EQU	FDC1_CH3CTL_TOS0,		5
	.EQU	FDC1_CH3CTL_PREN4,		4
	.EQU	FDC1_CH3CTL_PREN3,		3
	.EQU	FDC1_CH3CTL_PREN2,		2
	.EQU	FDC1_CH3CTL_PREN1,		1
	.EQU	FDC1_CH3CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC1_CH0DLY0,	0x40002C30
//  0X4000 2C30  FDC1_CH0DLY0   Bits-------------------------------------
	.EQU	FDC1_CH0DLY0_DLY1_15,		31
	.EQU	FDC1_CH0DLY0_DLY1_14,		30
	.EQU	FDC1_CH0DLY0_DLY1_13,		29
	.EQU	FDC1_CH0DLY0_DLY1_12,		28
	.EQU	FDC1_CH0DLY0_DLY1_11,		27
	.EQU	FDC1_CH0DLY0_DLY1_10,		26
	.EQU	FDC1_CH0DLY0_DLY1_9,		25
	.EQU	FDC1_CH0DLY0_DLY1_8,		24
	.EQU	FDC1_CH0DLY0_DLY1_7,		23
	.EQU	FDC1_CH0DLY0_DLY1_6,		22
	.EQU	FDC1_CH0DLY0_DLY1_5,		21
	.EQU	FDC1_CH0DLY0_DLY1_4,		20
	.EQU	FDC1_CH0DLY0_DLY1_3,		19
	.EQU	FDC1_CH0DLY0_DLY1_2,		18
	.EQU	FDC1_CH0DLY0_DLY1_1,		17
	.EQU	FDC1_CH0DLY0_DLY1_0,		16
	.EQU	FDC1_CH0DLY0_DLY0_15,		15
	.EQU	FDC1_CH0DLY0_DLY0_14,		14
	.EQU	FDC1_CH0DLY0_DLY0_13,		13
	.EQU	FDC1_CH0DLY0_DLY0_12,		12
	.EQU	FDC1_CH0DLY0_DLY0_11,		11
	.EQU	FDC1_CH0DLY0_DLY0_10,		10
	.EQU	FDC1_CH0DLY0_DLY0_9,		9
	.EQU	FDC1_CH0DLY0_DLY0_8,		8
	.EQU	FDC1_CH0DLY0_DLY0_7,		7
	.EQU	FDC1_CH0DLY0_DLY0_6,		6
	.EQU	FDC1_CH0DLY0_DLY0_5,		5
	.EQU	FDC1_CH0DLY0_DLY0_4,		4
	.EQU	FDC1_CH0DLY0_DLY0_3,		3
	.EQU	FDC1_CH0DLY0_DLY0_2,		2
	.EQU	FDC1_CH0DLY0_DLY0_1,		1
	.EQU	FDC1_CH0DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH0DLY1,	0x40002C34
//  0X4000 2C34  FDC1_CH0DLY1   Bits-------------------------------------
	.EQU	FDC1_CH0DLY1_DLY3_15,		31
	.EQU	FDC1_CH0DLY1_DLY3_14,		30
	.EQU	FDC1_CH0DLY1_DLY3_13,		29
	.EQU	FDC1_CH0DLY1_DLY3_12,		28
	.EQU	FDC1_CH0DLY1_DLY3_11,		27
	.EQU	FDC1_CH0DLY1_DLY3_10,		26
	.EQU	FDC1_CH0DLY1_DLY3_9,		25
	.EQU	FDC1_CH0DLY1_DLY3_8,		24
	.EQU	FDC1_CH0DLY1_DLY3_7,		23
	.EQU	FDC1_CH0DLY1_DLY3_6,		22
	.EQU	FDC1_CH0DLY1_DLY3_5,		21
	.EQU	FDC1_CH0DLY1_DLY3_4,		20
	.EQU	FDC1_CH0DLY1_DLY3_3,		19
	.EQU	FDC1_CH0DLY1_DLY3_2,		18
	.EQU	FDC1_CH0DLY1_DLY3_1,		17
	.EQU	FDC1_CH0DLY1_DLY3_0,		16
	.EQU	FDC1_CH0DLY1_DLY2_15,		15
	.EQU	FDC1_CH0DLY1_DLY2_14,		14
	.EQU	FDC1_CH0DLY1_DLY2_13,		13
	.EQU	FDC1_CH0DLY1_DLY2_12,		12
	.EQU	FDC1_CH0DLY1_DLY2_11,		11
	.EQU	FDC1_CH0DLY1_DLY2_10,		10
	.EQU	FDC1_CH0DLY1_DLY2_9,		9
	.EQU	FDC1_CH0DLY1_DLY2_8,		8
	.EQU	FDC1_CH0DLY1_DLY2_7,		7
	.EQU	FDC1_CH0DLY1_DLY2_6,		6
	.EQU	FDC1_CH0DLY1_DLY2_5,		5
	.EQU	FDC1_CH0DLY1_DLY2_4,		4
	.EQU	FDC1_CH0DLY1_DLY2_3,		3
	.EQU	FDC1_CH0DLY1_DLY2_2,		2
	.EQU	FDC1_CH0DLY1_DLY2_1,		1
	.EQU	FDC1_CH0DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH0DLY2,	0x40002C38
//  0X4000 2C38  FDC1_CH0DLY2   Bits-------------------------------------
	.EQU	FDC1_CH0DLY2_DLY4_15,		15
	.EQU	FDC1_CH0DLY2_DLY4_14,		14
	.EQU	FDC1_CH0DLY2_DLY4_13,		13
	.EQU	FDC1_CH0DLY2_DLY4_12,		12
	.EQU	FDC1_CH0DLY2_DLY4_11,		11
	.EQU	FDC1_CH0DLY2_DLY4_10,		10
	.EQU	FDC1_CH0DLY2_DLY4_9,		9
	.EQU	FDC1_CH0DLY2_DLY4_8,		8
	.EQU	FDC1_CH0DLY2_DLY4_7,		7
	.EQU	FDC1_CH0DLY2_DLY4_6,		6
	.EQU	FDC1_CH0DLY2_DLY4_5,		5
	.EQU	FDC1_CH0DLY2_DLY4_4,		4
	.EQU	FDC1_CH0DLY2_DLY4_3,		3
	.EQU	FDC1_CH0DLY2_DLY4_2,		2
	.EQU	FDC1_CH0DLY2_DLY4_1,		1
	.EQU	FDC1_CH0DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH1DLY0,	0x40002C40
//  0X4000 2C40  FDC1_CH1DLY0   Bits-------------------------------------
	.EQU	FDC1_CH1DLY0_DLY1_15,		31
	.EQU	FDC1_CH1DLY0_DLY1_14,		30
	.EQU	FDC1_CH1DLY0_DLY1_13,		29
	.EQU	FDC1_CH1DLY0_DLY1_12,		28
	.EQU	FDC1_CH1DLY0_DLY1_11,		27
	.EQU	FDC1_CH1DLY0_DLY1_10,		26
	.EQU	FDC1_CH1DLY0_DLY1_9,		25
	.EQU	FDC1_CH1DLY0_DLY1_8,		24
	.EQU	FDC1_CH1DLY0_DLY1_7,		23
	.EQU	FDC1_CH1DLY0_DLY1_6,		22
	.EQU	FDC1_CH1DLY0_DLY1_5,		21
	.EQU	FDC1_CH1DLY0_DLY1_4,		20
	.EQU	FDC1_CH1DLY0_DLY1_3,		19
	.EQU	FDC1_CH1DLY0_DLY1_2,		18
	.EQU	FDC1_CH1DLY0_DLY1_1,		17
	.EQU	FDC1_CH1DLY0_DLY1_0,		16
	.EQU	FDC1_CH1DLY0_DLY0_15,		15
	.EQU	FDC1_CH1DLY0_DLY0_14,		14
	.EQU	FDC1_CH1DLY0_DLY0_13,		13
	.EQU	FDC1_CH1DLY0_DLY0_12,		12
	.EQU	FDC1_CH1DLY0_DLY0_11,		11
	.EQU	FDC1_CH1DLY0_DLY0_10,		10
	.EQU	FDC1_CH1DLY0_DLY0_9,		9
	.EQU	FDC1_CH1DLY0_DLY0_8,		8
	.EQU	FDC1_CH1DLY0_DLY0_7,		7
	.EQU	FDC1_CH1DLY0_DLY0_6,		6
	.EQU	FDC1_CH1DLY0_DLY0_5,		5
	.EQU	FDC1_CH1DLY0_DLY0_4,		4
	.EQU	FDC1_CH1DLY0_DLY0_3,		3
	.EQU	FDC1_CH1DLY0_DLY0_2,		2
	.EQU	FDC1_CH1DLY0_DLY0_1,		1
	.EQU	FDC1_CH1DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH1DLY1,	0x40002C44
//  0X4000 2C44  FDC1_CH1DLY1   Bits-------------------------------------
	.EQU	FDC1_CH1DLY1_DLY3_15,		31
	.EQU	FDC1_CH1DLY1_DLY3_14,		30
	.EQU	FDC1_CH1DLY1_DLY3_13,		29
	.EQU	FDC1_CH1DLY1_DLY3_12,		28
	.EQU	FDC1_CH1DLY1_DLY3_11,		27
	.EQU	FDC1_CH1DLY1_DLY3_10,		26
	.EQU	FDC1_CH1DLY1_DLY3_9,		25
	.EQU	FDC1_CH1DLY1_DLY3_8,		24
	.EQU	FDC1_CH1DLY1_DLY3_7,		23
	.EQU	FDC1_CH1DLY1_DLY3_6,		22
	.EQU	FDC1_CH1DLY1_DLY3_5,		21
	.EQU	FDC1_CH1DLY1_DLY3_4,		20
	.EQU	FDC1_CH1DLY1_DLY3_3,		19
	.EQU	FDC1_CH1DLY1_DLY3_2,		18
	.EQU	FDC1_CH1DLY1_DLY3_1,		17
	.EQU	FDC1_CH1DLY1_DLY3_0,		16
	.EQU	FDC1_CH1DLY1_DLY2_15,		15
	.EQU	FDC1_CH1DLY1_DLY2_14,		14
	.EQU	FDC1_CH1DLY1_DLY2_13,		13
	.EQU	FDC1_CH1DLY1_DLY2_12,		12
	.EQU	FDC1_CH1DLY1_DLY2_11,		11
	.EQU	FDC1_CH1DLY1_DLY2_10,		10
	.EQU	FDC1_CH1DLY1_DLY2_9,		9
	.EQU	FDC1_CH1DLY1_DLY2_8,		8
	.EQU	FDC1_CH1DLY1_DLY2_7,		7
	.EQU	FDC1_CH1DLY1_DLY2_6,		6
	.EQU	FDC1_CH1DLY1_DLY2_5,		5
	.EQU	FDC1_CH1DLY1_DLY2_4,		4
	.EQU	FDC1_CH1DLY1_DLY2_3,		3
	.EQU	FDC1_CH1DLY1_DLY2_2,		2
	.EQU	FDC1_CH1DLY1_DLY2_1,		1
	.EQU	FDC1_CH1DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH1DLY2,	0x40002C48
//  0X4000 2C48  FDC1_CH1DLY2   Bits-------------------------------------
	.EQU	FDC1_CH1DLY2_DLY4_15,		15
	.EQU	FDC1_CH1DLY2_DLY4_14,		14
	.EQU	FDC1_CH1DLY2_DLY4_13,		13
	.EQU	FDC1_CH1DLY2_DLY4_12,		12
	.EQU	FDC1_CH1DLY2_DLY4_11,		11
	.EQU	FDC1_CH1DLY2_DLY4_10,		10
	.EQU	FDC1_CH1DLY2_DLY4_9,		9
	.EQU	FDC1_CH1DLY2_DLY4_8,		8
	.EQU	FDC1_CH1DLY2_DLY4_7,		7
	.EQU	FDC1_CH1DLY2_DLY4_6,		6
	.EQU	FDC1_CH1DLY2_DLY4_5,		5
	.EQU	FDC1_CH1DLY2_DLY4_4,		4
	.EQU	FDC1_CH1DLY2_DLY4_3,		3
	.EQU	FDC1_CH1DLY2_DLY4_2,		2
	.EQU	FDC1_CH1DLY2_DLY4_1,		1
	.EQU	FDC1_CH1DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH2DLY0,	0x40002C50
//  0X4000 2C50  FDC1_CH2DLY0   Bits-------------------------------------
	.EQU	FDC1_CH2DLY0_DLY1_15,		31
	.EQU	FDC1_CH2DLY0_DLY1_14,		30
	.EQU	FDC1_CH2DLY0_DLY1_13,		29
	.EQU	FDC1_CH2DLY0_DLY1_12,		28
	.EQU	FDC1_CH2DLY0_DLY1_11,		27
	.EQU	FDC1_CH2DLY0_DLY1_10,		26
	.EQU	FDC1_CH2DLY0_DLY1_9,		25
	.EQU	FDC1_CH2DLY0_DLY1_8,		24
	.EQU	FDC1_CH2DLY0_DLY1_7,		23
	.EQU	FDC1_CH2DLY0_DLY1_6,		22
	.EQU	FDC1_CH2DLY0_DLY1_5,		21
	.EQU	FDC1_CH2DLY0_DLY1_4,		20
	.EQU	FDC1_CH2DLY0_DLY1_3,		19
	.EQU	FDC1_CH2DLY0_DLY1_2,		18
	.EQU	FDC1_CH2DLY0_DLY1_1,		17
	.EQU	FDC1_CH2DLY0_DLY1_0,		16
	.EQU	FDC1_CH2DLY0_DLY0_15,		15
	.EQU	FDC1_CH2DLY0_DLY0_14,		14
	.EQU	FDC1_CH2DLY0_DLY0_13,		13
	.EQU	FDC1_CH2DLY0_DLY0_12,		12
	.EQU	FDC1_CH2DLY0_DLY0_11,		11
	.EQU	FDC1_CH2DLY0_DLY0_10,		10
	.EQU	FDC1_CH2DLY0_DLY0_9,		9
	.EQU	FDC1_CH2DLY0_DLY0_8,		8
	.EQU	FDC1_CH2DLY0_DLY0_7,		7
	.EQU	FDC1_CH2DLY0_DLY0_6,		6
	.EQU	FDC1_CH2DLY0_DLY0_5,		5
	.EQU	FDC1_CH2DLY0_DLY0_4,		4
	.EQU	FDC1_CH2DLY0_DLY0_3,		3
	.EQU	FDC1_CH2DLY0_DLY0_2,		2
	.EQU	FDC1_CH2DLY0_DLY0_1,		1
	.EQU	FDC1_CH2DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH2DLY1,	0x40002C54
//  0X4000 2C54  FDC1_CH2DLY1   Bits-------------------------------------
	.EQU	FDC1_CH2DLY1_DLY3_15,		31
	.EQU	FDC1_CH2DLY1_DLY3_14,		30
	.EQU	FDC1_CH2DLY1_DLY3_13,		29
	.EQU	FDC1_CH2DLY1_DLY3_12,		28
	.EQU	FDC1_CH2DLY1_DLY3_11,		27
	.EQU	FDC1_CH2DLY1_DLY3_10,		26
	.EQU	FDC1_CH2DLY1_DLY3_9,		25
	.EQU	FDC1_CH2DLY1_DLY3_8,		24
	.EQU	FDC1_CH2DLY1_DLY3_7,		23
	.EQU	FDC1_CH2DLY1_DLY3_6,		22
	.EQU	FDC1_CH2DLY1_DLY3_5,		21
	.EQU	FDC1_CH2DLY1_DLY3_4,		20
	.EQU	FDC1_CH2DLY1_DLY3_3,		19
	.EQU	FDC1_CH2DLY1_DLY3_2,		18
	.EQU	FDC1_CH2DLY1_DLY3_1,		17
	.EQU	FDC1_CH2DLY1_DLY3_0,		16
	.EQU	FDC1_CH2DLY1_DLY2_15,		15
	.EQU	FDC1_CH2DLY1_DLY2_14,		14
	.EQU	FDC1_CH2DLY1_DLY2_13,		13
	.EQU	FDC1_CH2DLY1_DLY2_12,		12
	.EQU	FDC1_CH2DLY1_DLY2_11,		11
	.EQU	FDC1_CH2DLY1_DLY2_10,		10
	.EQU	FDC1_CH2DLY1_DLY2_9,		9
	.EQU	FDC1_CH2DLY1_DLY2_8,		8
	.EQU	FDC1_CH2DLY1_DLY2_7,		7
	.EQU	FDC1_CH2DLY1_DLY2_6,		6
	.EQU	FDC1_CH2DLY1_DLY2_5,		5
	.EQU	FDC1_CH2DLY1_DLY2_4,		4
	.EQU	FDC1_CH2DLY1_DLY2_3,		3
	.EQU	FDC1_CH2DLY1_DLY2_2,		2
	.EQU	FDC1_CH2DLY1_DLY2_1,		1
	.EQU	FDC1_CH2DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH2DLY2,	0x40002C58
//  0X4000 2C58  FDC1_CH2DLY2   Bits-------------------------------------
	.EQU	FDC1_CH2DLY2_DLY4_15,		15
	.EQU	FDC1_CH2DLY2_DLY4_14,		14
	.EQU	FDC1_CH2DLY2_DLY4_13,		13
	.EQU	FDC1_CH2DLY2_DLY4_12,		12
	.EQU	FDC1_CH2DLY2_DLY4_11,		11
	.EQU	FDC1_CH2DLY2_DLY4_10,		10
	.EQU	FDC1_CH2DLY2_DLY4_9,		9
	.EQU	FDC1_CH2DLY2_DLY4_8,		8
	.EQU	FDC1_CH2DLY2_DLY4_7,		7
	.EQU	FDC1_CH2DLY2_DLY4_6,		6
	.EQU	FDC1_CH2DLY2_DLY4_5,		5
	.EQU	FDC1_CH2DLY2_DLY4_4,		4
	.EQU	FDC1_CH2DLY2_DLY4_3,		3
	.EQU	FDC1_CH2DLY2_DLY4_2,		2
	.EQU	FDC1_CH2DLY2_DLY4_1,		1
	.EQU	FDC1_CH2DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH3DLY0,	0x40002C60
//  0X4000 2C60  FDC1_CH3DLY0   Bits-------------------------------------
	.EQU	FDC1_CH3DLY0_DLY1_15,		31
	.EQU	FDC1_CH3DLY0_DLY1_14,		30
	.EQU	FDC1_CH3DLY0_DLY1_13,		29
	.EQU	FDC1_CH3DLY0_DLY1_12,		28
	.EQU	FDC1_CH3DLY0_DLY1_11,		27
	.EQU	FDC1_CH3DLY0_DLY1_10,		26
	.EQU	FDC1_CH3DLY0_DLY1_9,		25
	.EQU	FDC1_CH3DLY0_DLY1_8,		24
	.EQU	FDC1_CH3DLY0_DLY1_7,		23
	.EQU	FDC1_CH3DLY0_DLY1_6,		22
	.EQU	FDC1_CH3DLY0_DLY1_5,		21
	.EQU	FDC1_CH3DLY0_DLY1_4,		20
	.EQU	FDC1_CH3DLY0_DLY1_3,		19
	.EQU	FDC1_CH3DLY0_DLY1_2,		18
	.EQU	FDC1_CH3DLY0_DLY1_1,		17
	.EQU	FDC1_CH3DLY0_DLY1_0,		16
	.EQU	FDC1_CH3DLY0_DLY0_15,		15
	.EQU	FDC1_CH3DLY0_DLY0_14,		14
	.EQU	FDC1_CH3DLY0_DLY0_13,		13
	.EQU	FDC1_CH3DLY0_DLY0_12,		12
	.EQU	FDC1_CH3DLY0_DLY0_11,		11
	.EQU	FDC1_CH3DLY0_DLY0_10,		10
	.EQU	FDC1_CH3DLY0_DLY0_9,		9
	.EQU	FDC1_CH3DLY0_DLY0_8,		8
	.EQU	FDC1_CH3DLY0_DLY0_7,		7
	.EQU	FDC1_CH3DLY0_DLY0_6,		6
	.EQU	FDC1_CH3DLY0_DLY0_5,		5
	.EQU	FDC1_CH3DLY0_DLY0_4,		4
	.EQU	FDC1_CH3DLY0_DLY0_3,		3
	.EQU	FDC1_CH3DLY0_DLY0_2,		2
	.EQU	FDC1_CH3DLY0_DLY0_1,		1
	.EQU	FDC1_CH3DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH3DLY1,	0x40002C64
//  0X4000 2C64  FDC1_CH3DLY1   Bits-------------------------------------
	.EQU	FDC1_CH3DLY1_DLY3_15,		31
	.EQU	FDC1_CH3DLY1_DLY3_14,		30
	.EQU	FDC1_CH3DLY1_DLY3_13,		29
	.EQU	FDC1_CH3DLY1_DLY3_12,		28
	.EQU	FDC1_CH3DLY1_DLY3_11,		27
	.EQU	FDC1_CH3DLY1_DLY3_10,		26
	.EQU	FDC1_CH3DLY1_DLY3_9,		25
	.EQU	FDC1_CH3DLY1_DLY3_8,		24
	.EQU	FDC1_CH3DLY1_DLY3_7,		23
	.EQU	FDC1_CH3DLY1_DLY3_6,		22
	.EQU	FDC1_CH3DLY1_DLY3_5,		21
	.EQU	FDC1_CH3DLY1_DLY3_4,		20
	.EQU	FDC1_CH3DLY1_DLY3_3,		19
	.EQU	FDC1_CH3DLY1_DLY3_2,		18
	.EQU	FDC1_CH3DLY1_DLY3_1,		17
	.EQU	FDC1_CH3DLY1_DLY3_0,		16
	.EQU	FDC1_CH3DLY1_DLY2_15,		15
	.EQU	FDC1_CH3DLY1_DLY2_14,		14
	.EQU	FDC1_CH3DLY1_DLY2_13,		13
	.EQU	FDC1_CH3DLY1_DLY2_12,		12
	.EQU	FDC1_CH3DLY1_DLY2_11,		11
	.EQU	FDC1_CH3DLY1_DLY2_10,		10
	.EQU	FDC1_CH3DLY1_DLY2_9,		9
	.EQU	FDC1_CH3DLY1_DLY2_8,		8
	.EQU	FDC1_CH3DLY1_DLY2_7,		7
	.EQU	FDC1_CH3DLY1_DLY2_6,		6
	.EQU	FDC1_CH3DLY1_DLY2_5,		5
	.EQU	FDC1_CH3DLY1_DLY2_4,		4
	.EQU	FDC1_CH3DLY1_DLY2_3,		3
	.EQU	FDC1_CH3DLY1_DLY2_2,		2
	.EQU	FDC1_CH3DLY1_DLY2_1,		1
	.EQU	FDC1_CH3DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC1_CH3DLY2,	0x40002C68
//  0X4000 2C68  FDC1_CH3DLY2   Bits-------------------------------------
	.EQU	FDC1_CH3DLY2_DLY4_15,		15
	.EQU	FDC1_CH3DLY2_DLY4_14,		14
	.EQU	FDC1_CH3DLY2_DLY4_13,		13
	.EQU	FDC1_CH3DLY2_DLY4_12,		12
	.EQU	FDC1_CH3DLY2_DLY4_11,		11
	.EQU	FDC1_CH3DLY2_DLY4_10,		10
	.EQU	FDC1_CH3DLY2_DLY4_9,		9
	.EQU	FDC1_CH3DLY2_DLY4_8,		8
	.EQU	FDC1_CH3DLY2_DLY4_7,		7
	.EQU	FDC1_CH3DLY2_DLY4_6,		6
	.EQU	FDC1_CH3DLY2_DLY4_5,		5
	.EQU	FDC1_CH3DLY2_DLY4_4,		4
	.EQU	FDC1_CH3DLY2_DLY4_3,		3
	.EQU	FDC1_CH3DLY2_DLY4_2,		2
	.EQU	FDC1_CH3DLY2_DLY4_1,		1
	.EQU	FDC1_CH3DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC1_PO0DLY,	0x40002C70
//  0X4000 2C70  FDC1_PO0DLY   Bits-------------------------------------
	.EQU	FDC1_PO0DLY_DLYH15,		31
	.EQU	FDC1_PO0DLY_DLYH14,		30
	.EQU	FDC1_PO0DLY_DLYH13,		29
	.EQU	FDC1_PO0DLY_DLYH12,		28
	.EQU	FDC1_PO0DLY_DLYH11,		27
	.EQU	FDC1_PO0DLY_DLYH10,		26
	.EQU	FDC1_PO0DLY_DLYH9,		25
	.EQU	FDC1_PO0DLY_DLYH8,		24
	.EQU	FDC1_PO0DLY_DLYH7,		23
	.EQU	FDC1_PO0DLY_DLYH6,		22
	.EQU	FDC1_PO0DLY_DLYH5,		21
	.EQU	FDC1_PO0DLY_DLYH4,		20
	.EQU	FDC1_PO0DLY_DLYH3,		19
	.EQU	FDC1_PO0DLY_DLYH2,		18
	.EQU	FDC1_PO0DLY_DLYH1,		17
	.EQU	FDC1_PO0DLY_DLYH0,		16
	.EQU	FDC1_PO0DLY_DLYL15,		15
	.EQU	FDC1_PO0DLY_DLYL14,		14
	.EQU	FDC1_PO0DLY_DLYL13,		13
	.EQU	FDC1_PO0DLY_DLYL12,		12
	.EQU	FDC1_PO0DLY_DLYL11,		11
	.EQU	FDC1_PO0DLY_DLYL10,		10
	.EQU	FDC1_PO0DLY_DLYL9,		9
	.EQU	FDC1_PO0DLY_DLYL8,		8
	.EQU	FDC1_PO0DLY_DLYL7,		7
	.EQU	FDC1_PO0DLY_DLYL6,		6
	.EQU	FDC1_PO0DLY_DLYL5,		5
	.EQU	FDC1_PO0DLY_DLYL4,		4
	.EQU	FDC1_PO0DLY_DLYL3,		3
	.EQU	FDC1_PO0DLY_DLYL2,		2
	.EQU	FDC1_PO0DLY_DLYL1,		1
	.EQU	FDC1_PO0DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC1_PO1DLY,	0x40002C74
//  0X4000 2C74  FDC1_PO1DLY   Bits-------------------------------------
	.EQU	FDC1_PO1DLY_DLYH15,		31
	.EQU	FDC1_PO1DLY_DLYH14,		30
	.EQU	FDC1_PO1DLY_DLYH13,		29
	.EQU	FDC1_PO1DLY_DLYH12,		28
	.EQU	FDC1_PO1DLY_DLYH11,		27
	.EQU	FDC1_PO1DLY_DLYH10,		26
	.EQU	FDC1_PO1DLY_DLYH9,		25
	.EQU	FDC1_PO1DLY_DLYH8,		24
	.EQU	FDC1_PO1DLY_DLYH7,		23
	.EQU	FDC1_PO1DLY_DLYH6,		22
	.EQU	FDC1_PO1DLY_DLYH5,		21
	.EQU	FDC1_PO1DLY_DLYH4,		20
	.EQU	FDC1_PO1DLY_DLYH3,		19
	.EQU	FDC1_PO1DLY_DLYH2,		18
	.EQU	FDC1_PO1DLY_DLYH1,		17
	.EQU	FDC1_PO1DLY_DLYH0,		16
	.EQU	FDC1_PO1DLY_DLYL15,		15
	.EQU	FDC1_PO1DLY_DLYL14,		14
	.EQU	FDC1_PO1DLY_DLYL13,		13
	.EQU	FDC1_PO1DLY_DLYL12,		12
	.EQU	FDC1_PO1DLY_DLYL11,		11
	.EQU	FDC1_PO1DLY_DLYL10,		10
	.EQU	FDC1_PO1DLY_DLYL9,		9
	.EQU	FDC1_PO1DLY_DLYL8,		8
	.EQU	FDC1_PO1DLY_DLYL7,		7
	.EQU	FDC1_PO1DLY_DLYL6,		6
	.EQU	FDC1_PO1DLY_DLYL5,		5
	.EQU	FDC1_PO1DLY_DLYL4,		4
	.EQU	FDC1_PO1DLY_DLYL3,		3
	.EQU	FDC1_PO1DLY_DLYL2,		2
	.EQU	FDC1_PO1DLY_DLYL1,		1
	.EQU	FDC1_PO1DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC1_PO2DLY,	0x40002C78
//  0X4000 2C78  FDC1_PO2DLY   Bits-------------------------------------
	.EQU	FDC1_PO2DLY_DLYH15,		31
	.EQU	FDC1_PO2DLY_DLYH14,		30
	.EQU	FDC1_PO2DLY_DLYH13,		29
	.EQU	FDC1_PO2DLY_DLYH12,		28
	.EQU	FDC1_PO2DLY_DLYH11,		27
	.EQU	FDC1_PO2DLY_DLYH10,		26
	.EQU	FDC1_PO2DLY_DLYH9,		25
	.EQU	FDC1_PO2DLY_DLYH8,		24
	.EQU	FDC1_PO2DLY_DLYH7,		23
	.EQU	FDC1_PO2DLY_DLYH6,		22
	.EQU	FDC1_PO2DLY_DLYH5,		21
	.EQU	FDC1_PO2DLY_DLYH4,		20
	.EQU	FDC1_PO2DLY_DLYH3,		19
	.EQU	FDC1_PO2DLY_DLYH2,		18
	.EQU	FDC1_PO2DLY_DLYH1,		17
	.EQU	FDC1_PO2DLY_DLYH0,		16
	.EQU	FDC1_PO2DLY_DLYL15,		15
	.EQU	FDC1_PO2DLY_DLYL14,		14
	.EQU	FDC1_PO2DLY_DLYL13,		13
	.EQU	FDC1_PO2DLY_DLYL12,		12
	.EQU	FDC1_PO2DLY_DLYL11,		11
	.EQU	FDC1_PO2DLY_DLYL10,		10
	.EQU	FDC1_PO2DLY_DLYL9,		9
	.EQU	FDC1_PO2DLY_DLYL8,		8
	.EQU	FDC1_PO2DLY_DLYL7,		7
	.EQU	FDC1_PO2DLY_DLYL6,		6
	.EQU	FDC1_PO2DLY_DLYL5,		5
	.EQU	FDC1_PO2DLY_DLYL4,		4
	.EQU	FDC1_PO2DLY_DLYL3,		3
	.EQU	FDC1_PO2DLY_DLYL2,		2
	.EQU	FDC1_PO2DLY_DLYL1,		1
	.EQU	FDC1_PO2DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC1_PO3DLY,	0x40002C7C
//  0X4000 2C7C  FDC1_PO3DLY   Bits-------------------------------------
	.EQU	FDC1_PO3DLY_DLYH15,		31
	.EQU	FDC1_PO3DLY_DLYH14,		30
	.EQU	FDC1_PO3DLY_DLYH13,		29
	.EQU	FDC1_PO3DLY_DLYH12,		28
	.EQU	FDC1_PO3DLY_DLYH11,		27
	.EQU	FDC1_PO3DLY_DLYH10,		26
	.EQU	FDC1_PO3DLY_DLYH9,		25
	.EQU	FDC1_PO3DLY_DLYH8,		24
	.EQU	FDC1_PO3DLY_DLYH7,		23
	.EQU	FDC1_PO3DLY_DLYH6,		22
	.EQU	FDC1_PO3DLY_DLYH5,		21
	.EQU	FDC1_PO3DLY_DLYH4,		20
	.EQU	FDC1_PO3DLY_DLYH3,		19
	.EQU	FDC1_PO3DLY_DLYH2,		18
	.EQU	FDC1_PO3DLY_DLYH1,		17
	.EQU	FDC1_PO3DLY_DLYH0,		16
	.EQU	FDC1_PO3DLY_DLYL15,		15
	.EQU	FDC1_PO3DLY_DLYL14,		14
	.EQU	FDC1_PO3DLY_DLYL13,		13
	.EQU	FDC1_PO3DLY_DLYL12,		12
	.EQU	FDC1_PO3DLY_DLYL11,		11
	.EQU	FDC1_PO3DLY_DLYL10,		10
	.EQU	FDC1_PO3DLY_DLYL9,		9
	.EQU	FDC1_PO3DLY_DLYL8,		8
	.EQU	FDC1_PO3DLY_DLYL7,		7
	.EQU	FDC1_PO3DLY_DLYL6,		6
	.EQU	FDC1_PO3DLY_DLYL5,		5
	.EQU	FDC1_PO3DLY_DLYL4,		4
	.EQU	FDC1_PO3DLY_DLYL3,		3
	.EQU	FDC1_PO3DLY_DLYL2,		2
	.EQU	FDC1_PO3DLY_DLYL1,		1
	.EQU	FDC1_PO3DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC2_CTL,		0x40002C80
//  0X4000 2C80  FDC2_CTL   Bits-------------------------------------
	.EQU	FDC2_CTL_TCLR,		26
	.EQU	FDC2_CTL_CLKSEL1,		25
	.EQU	FDC2_CTL_CLKSEL0,		24
	.EQU	FDC2_CTL_MDLIC,		23
	.EQU	FDC2_CTL_CMODE,		22
	.EQU	FDC2_CTL_BBMODE,		21
	.EQU	FDC2_CTL_LDMOD1,		20
	.EQU	FDC2_CTL_LDMOD0,		19
	.EQU	FDC2_CTL_FDCEIE,		18
	.EQU	FDC2_CTL_SWTRIG,		17
	.EQU	FDC2_CTL_FDCDE,		16
	.EQU	FDC2_CTL_PRESC2,		15
	.EQU	FDC2_CTL_PRESC1,		14
	.EQU	FDC2_CTL_PRESC0,		13
	.EQU	FDC2_CTL_MULSEL5,		12
	.EQU	FDC2_CTL_MULSEL4,		11
	.EQU	FDC2_CTL_MULSEL3,		10
	.EQU	FDC2_CTL_MULSEL2,		9
	.EQU	FDC2_CTL_MULSEL1,		8
	.EQU	FDC2_CTL_MULSEL0,		7
	.EQU	FDC2_CTL_TRGSEL,		6
	.EQU	FDC2_CTL_MDLIE,		5
	.EQU	FDC2_CTL_MDLIF,		4
	.EQU	FDC2_CTL_CONT,		3
	.EQU	FDC2_CTL_LDOK,		2
	.EQU	FDC2_CTL_POEN,		1
	.EQU	FDC2_CTL_FDCEN,		0
//  register-------------------------------------
	.EQU	FDC2_MOD,		0x40002C84
//  0X4000 2C84  FDC2_MOD   Bits-------------------------------------
	.EQU	FDC2_MOD_MOD15,		15
	.EQU	FDC2_MOD_MOD14,		14
	.EQU	FDC2_MOD_MOD13,		13
	.EQU	FDC2_MOD_MOD12,		12
	.EQU	FDC2_MOD_MOD11,		11
	.EQU	FDC2_MOD_MOD10,		10
	.EQU	FDC2_MOD_MOD9,		9
	.EQU	FDC2_MOD_MOD8,		8
	.EQU	FDC2_MOD_MOD7,		7
	.EQU	FDC2_MOD_MOD6,		6
	.EQU	FDC2_MOD_MOD5,		5
	.EQU	FDC2_MOD_MOD4,		4
	.EQU	FDC2_MOD_MOD3,		3
	.EQU	FDC2_MOD_MOD2,		2
	.EQU	FDC2_MOD_MOD1,		1
	.EQU	FDC2_MOD_MOD0,		0
//  register-------------------------------------
	.EQU	FDC2_CNT,		0x40002C88
//  0X4000 2C88  FDC2_CNT   Bits-------------------------------------
	.EQU	FDC2_CNT_CNT15,		15
	.EQU	FDC2_CNT_CNT14,		14
	.EQU	FDC2_CNT_CNT13,		13
	.EQU	FDC2_CNT_CNT12,		12
	.EQU	FDC2_CNT_CNT11,		11
	.EQU	FDC2_CNT_CNT10,		10
	.EQU	FDC2_CNT_CNT9,		9
	.EQU	FDC2_CNT_CNT8,		8
	.EQU	FDC2_CNT_CNT7,		7
	.EQU	FDC2_CNT_CNT6,		6
	.EQU	FDC2_CNT_CNT5,		5
	.EQU	FDC2_CNT_CNT4,		4
	.EQU	FDC2_CNT_CNT3,		3
	.EQU	FDC2_CNT_CNT2,		2
	.EQU	FDC2_CNT_CNT1,		1
	.EQU	FDC2_CNT_CNT0,		0
//  register-------------------------------------
	.EQU	FDC2_IDLY,		0x40002C8C
//  0X4000 2C8C  FDC2_IDLY   Bits-------------------------------------
	.EQU	FDC2_IDLY_IDLY15,		15
	.EQU	FDC2_IDLY_IDLY14,		14
	.EQU	FDC2_IDLY_IDLY13,		13
	.EQU	FDC2_IDLY_IDLY12,		12
	.EQU	FDC2_IDLY_IDLY11,		11
	.EQU	FDC2_IDLY_IDLY10,		10
	.EQU	FDC2_IDLY_IDLY9,		9
	.EQU	FDC2_IDLY_IDLY8,		8
	.EQU	FDC2_IDLY_IDLY7,		7
	.EQU	FDC2_IDLY_IDLY6,		6
	.EQU	FDC2_IDLY_IDLY5,		5
	.EQU	FDC2_IDLY_IDLY4,		4
	.EQU	FDC2_IDLY_IDLY3,		3
	.EQU	FDC2_IDLY_IDLY2,		2
	.EQU	FDC2_IDLY_IDLY1,		1
	.EQU	FDC2_IDLY_IDLY0,		0
//  register-------------------------------------
	.EQU	FDC2_CH0CTL,	0x40002C90
//  0X4000 2C90  FDC2_CH0CTL   Bits-------------------------------------
	.EQU	FDC2_CH0CTL_ERRIC4,		24
	.EQU	FDC2_CH0CTL_ERRIC3,		23
	.EQU	FDC2_CH0CTL_ERRIC2,		22
	.EQU	FDC2_CH0CTL_ERRIC1,		21
	.EQU	FDC2_CH0CTL_ERRIC0,		20
	.EQU	FDC2_CH0CTL_ERR4,		19
	.EQU	FDC2_CH0CTL_ERR3,		18
	.EQU	FDC2_CH0CTL_ERR2,		17
	.EQU	FDC2_CH0CTL_ERR1,		16
	.EQU	FDC2_CH0CTL_ERR0,		15
	.EQU	FDC2_CH0CTL_CF4,		14
	.EQU	FDC2_CH0CTL_CF3,		13
	.EQU	FDC2_CH0CTL_CF2,		12
	.EQU	FDC2_CH0CTL_CF1,		11
	.EQU	FDC2_CH0CTL_CF0,		10
	.EQU	FDC2_CH0CTL_TOS4,		9
	.EQU	FDC2_CH0CTL_TOS3,		8
	.EQU	FDC2_CH0CTL_TOS2,		7
	.EQU	FDC2_CH0CTL_TOS1,		6
	.EQU	FDC2_CH0CTL_TOS0,		5
	.EQU	FDC2_CH0CTL_PREN4,		4
	.EQU	FDC2_CH0CTL_PREN3,		3
	.EQU	FDC2_CH0CTL_PREN2,		2
	.EQU	FDC2_CH0CTL_PREN1,		1
	.EQU	FDC2_CH0CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC2_CH1CTL,	0x40002C94
//  0X4000 2C94  FDC2_CH1CTL   Bits-------------------------------------
	.EQU	FDC2_CH1CTL_ERRIC4,		24
	.EQU	FDC2_CH1CTL_ERRIC3,		23
	.EQU	FDC2_CH1CTL_ERRIC2,		22
	.EQU	FDC2_CH1CTL_ERRIC1,		21
	.EQU	FDC2_CH1CTL_ERRIC0,		20
	.EQU	FDC2_CH1CTL_ERR4,		19
	.EQU	FDC2_CH1CTL_ERR3,		18
	.EQU	FDC2_CH1CTL_ERR2,		17
	.EQU	FDC2_CH1CTL_ERR1,		16
	.EQU	FDC2_CH1CTL_ERR0,		15
	.EQU	FDC2_CH1CTL_CF4,		14
	.EQU	FDC2_CH1CTL_CF3,		13
	.EQU	FDC2_CH1CTL_CF2,		12
	.EQU	FDC2_CH1CTL_CF1,		11
	.EQU	FDC2_CH1CTL_CF0,		10
	.EQU	FDC2_CH1CTL_TOS4,		9
	.EQU	FDC2_CH1CTL_TOS3,		8
	.EQU	FDC2_CH1CTL_TOS2,		7
	.EQU	FDC2_CH1CTL_TOS1,		6
	.EQU	FDC2_CH1CTL_TOS0,		5
	.EQU	FDC2_CH1CTL_PREN4,		4
	.EQU	FDC2_CH1CTL_PREN3,		3
	.EQU	FDC2_CH1CTL_PREN2,		2
	.EQU	FDC2_CH1CTL_PREN1,		1
	.EQU	FDC2_CH1CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC2_CH2CTL,	0x40002C98
//  0X4000 2C98  FDC2_CH2CTL   Bits-------------------------------------
	.EQU	FDC2_CH2CTL_ERRIC4,		24
	.EQU	FDC2_CH2CTL_ERRIC3,		23
	.EQU	FDC2_CH2CTL_ERRIC2,		22
	.EQU	FDC2_CH2CTL_ERRIC1,		21
	.EQU	FDC2_CH2CTL_ERRIC0,		20
	.EQU	FDC2_CH2CTL_ERR4,		19
	.EQU	FDC2_CH2CTL_ERR3,		18
	.EQU	FDC2_CH2CTL_ERR2,		17
	.EQU	FDC2_CH2CTL_ERR1,		16
	.EQU	FDC2_CH2CTL_ERR0,		15
	.EQU	FDC2_CH2CTL_CF4,		14
	.EQU	FDC2_CH2CTL_CF3,		13
	.EQU	FDC2_CH2CTL_CF2,		12
	.EQU	FDC2_CH2CTL_CF1,		11
	.EQU	FDC2_CH2CTL_CF0,		10
	.EQU	FDC2_CH2CTL_TOS4,		9
	.EQU	FDC2_CH2CTL_TOS3,		8
	.EQU	FDC2_CH2CTL_TOS2,		7
	.EQU	FDC2_CH2CTL_TOS1,		6
	.EQU	FDC2_CH2CTL_TOS0,		5
	.EQU	FDC2_CH2CTL_PREN4,		4
	.EQU	FDC2_CH2CTL_PREN3,		3
	.EQU	FDC2_CH2CTL_PREN2,		2
	.EQU	FDC2_CH2CTL_PREN1,		1
	.EQU	FDC2_CH2CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC2_CH3CTL,	0x40002C9C
//  0X4000 2C9C  FDC2_CH3CTL   Bits-------------------------------------
	.EQU	FDC2_CH3CTL_ERRIC4,		24
	.EQU	FDC2_CH3CTL_ERRIC3,		23
	.EQU	FDC2_CH3CTL_ERRIC2,		22
	.EQU	FDC2_CH3CTL_ERRIC1,		21
	.EQU	FDC2_CH3CTL_ERRIC0,		20
	.EQU	FDC2_CH3CTL_ERR4,		19
	.EQU	FDC2_CH3CTL_ERR3,		18
	.EQU	FDC2_CH3CTL_ERR2,		17
	.EQU	FDC2_CH3CTL_ERR1,		16
	.EQU	FDC2_CH3CTL_ERR0,		15
	.EQU	FDC2_CH3CTL_CF4,		14
	.EQU	FDC2_CH3CTL_CF3,		13
	.EQU	FDC2_CH3CTL_CF2,		12
	.EQU	FDC2_CH3CTL_CF1,		11
	.EQU	FDC2_CH3CTL_CF0,		10
	.EQU	FDC2_CH3CTL_TOS4,		9
	.EQU	FDC2_CH3CTL_TOS3,		8
	.EQU	FDC2_CH3CTL_TOS2,		7
	.EQU	FDC2_CH3CTL_TOS1,		6
	.EQU	FDC2_CH3CTL_TOS0,		5
	.EQU	FDC2_CH3CTL_PREN4,		4
	.EQU	FDC2_CH3CTL_PREN3,		3
	.EQU	FDC2_CH3CTL_PREN2,		2
	.EQU	FDC2_CH3CTL_PREN1,		1
	.EQU	FDC2_CH3CTL_PREN0,		0
//  register-------------------------------------
	.EQU	FDC2_CH0DLY0,	0x40002CB0
//  0X4000 2CB0  FDC2_CH0DLY0   Bits-------------------------------------
	.EQU	FDC2_CH0DLY0_DLY1_15,		31
	.EQU	FDC2_CH0DLY0_DLY1_14,		30
	.EQU	FDC2_CH0DLY0_DLY1_13,		29
	.EQU	FDC2_CH0DLY0_DLY1_12,		28
	.EQU	FDC2_CH0DLY0_DLY1_11,		27
	.EQU	FDC2_CH0DLY0_DLY1_10,		26
	.EQU	FDC2_CH0DLY0_DLY1_9,		25
	.EQU	FDC2_CH0DLY0_DLY1_8,		24
	.EQU	FDC2_CH0DLY0_DLY1_7,		23
	.EQU	FDC2_CH0DLY0_DLY1_6,		22
	.EQU	FDC2_CH0DLY0_DLY1_5,		21
	.EQU	FDC2_CH0DLY0_DLY1_4,		20
	.EQU	FDC2_CH0DLY0_DLY1_3,		19
	.EQU	FDC2_CH0DLY0_DLY1_2,		18
	.EQU	FDC2_CH0DLY0_DLY1_1,		17
	.EQU	FDC2_CH0DLY0_DLY1_0,		16
	.EQU	FDC2_CH0DLY0_DLY0_15,		15
	.EQU	FDC2_CH0DLY0_DLY0_14,		14
	.EQU	FDC2_CH0DLY0_DLY0_13,		13
	.EQU	FDC2_CH0DLY0_DLY0_12,		12
	.EQU	FDC2_CH0DLY0_DLY0_11,		11
	.EQU	FDC2_CH0DLY0_DLY0_10,		10
	.EQU	FDC2_CH0DLY0_DLY0_9,		9
	.EQU	FDC2_CH0DLY0_DLY0_8,		8
	.EQU	FDC2_CH0DLY0_DLY0_7,		7
	.EQU	FDC2_CH0DLY0_DLY0_6,		6
	.EQU	FDC2_CH0DLY0_DLY0_5,		5
	.EQU	FDC2_CH0DLY0_DLY0_4,		4
	.EQU	FDC2_CH0DLY0_DLY0_3,		3
	.EQU	FDC2_CH0DLY0_DLY0_2,		2
	.EQU	FDC2_CH0DLY0_DLY0_1,		1
	.EQU	FDC2_CH0DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH0DLY1,	0x40002CB4
//  0X4000 2CB4  FDC2_CH0DLY1   Bits-------------------------------------
	.EQU	FDC2_CH0DLY1_DLY3_15,		31
	.EQU	FDC2_CH0DLY1_DLY3_14,		30
	.EQU	FDC2_CH0DLY1_DLY3_13,		29
	.EQU	FDC2_CH0DLY1_DLY3_12,		28
	.EQU	FDC2_CH0DLY1_DLY3_11,		27
	.EQU	FDC2_CH0DLY1_DLY3_10,		26
	.EQU	FDC2_CH0DLY1_DLY3_9,		25
	.EQU	FDC2_CH0DLY1_DLY3_8,		24
	.EQU	FDC2_CH0DLY1_DLY3_7,		23
	.EQU	FDC2_CH0DLY1_DLY3_6,		22
	.EQU	FDC2_CH0DLY1_DLY3_5,		21
	.EQU	FDC2_CH0DLY1_DLY3_4,		20
	.EQU	FDC2_CH0DLY1_DLY3_3,		19
	.EQU	FDC2_CH0DLY1_DLY3_2,		18
	.EQU	FDC2_CH0DLY1_DLY3_1,		17
	.EQU	FDC2_CH0DLY1_DLY3_0,		16
	.EQU	FDC2_CH0DLY1_DLY2_15,		15
	.EQU	FDC2_CH0DLY1_DLY2_14,		14
	.EQU	FDC2_CH0DLY1_DLY2_13,		13
	.EQU	FDC2_CH0DLY1_DLY2_12,		12
	.EQU	FDC2_CH0DLY1_DLY2_11,		11
	.EQU	FDC2_CH0DLY1_DLY2_10,		10
	.EQU	FDC2_CH0DLY1_DLY2_9,		9
	.EQU	FDC2_CH0DLY1_DLY2_8,		8
	.EQU	FDC2_CH0DLY1_DLY2_7,		7
	.EQU	FDC2_CH0DLY1_DLY2_6,		6
	.EQU	FDC2_CH0DLY1_DLY2_5,		5
	.EQU	FDC2_CH0DLY1_DLY2_4,		4
	.EQU	FDC2_CH0DLY1_DLY2_3,		3
	.EQU	FDC2_CH0DLY1_DLY2_2,		2
	.EQU	FDC2_CH0DLY1_DLY2_1,		1
	.EQU	FDC2_CH0DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH0DLY2,	0x40002CB8
//  0X4000 2CB8  FDC2_CH0DLY2   Bits-------------------------------------
	.EQU	FDC2_CH0DLY2_DLY4_15,		15
	.EQU	FDC2_CH0DLY2_DLY4_14,		14
	.EQU	FDC2_CH0DLY2_DLY4_13,		13
	.EQU	FDC2_CH0DLY2_DLY4_12,		12
	.EQU	FDC2_CH0DLY2_DLY4_11,		11
	.EQU	FDC2_CH0DLY2_DLY4_10,		10
	.EQU	FDC2_CH0DLY2_DLY4_9,		9
	.EQU	FDC2_CH0DLY2_DLY4_8,		8
	.EQU	FDC2_CH0DLY2_DLY4_7,		7
	.EQU	FDC2_CH0DLY2_DLY4_6,		6
	.EQU	FDC2_CH0DLY2_DLY4_5,		5
	.EQU	FDC2_CH0DLY2_DLY4_4,		4
	.EQU	FDC2_CH0DLY2_DLY4_3,		3
	.EQU	FDC2_CH0DLY2_DLY4_2,		2
	.EQU	FDC2_CH0DLY2_DLY4_1,		1
	.EQU	FDC2_CH0DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH1DLY0,	0x40002CC0
//  0X4000 2CC0  FDC2_CH1DLY0   Bits-------------------------------------
	.EQU	FDC2_CH1DLY0_DLY1_15,		31
	.EQU	FDC2_CH1DLY0_DLY1_14,		30
	.EQU	FDC2_CH1DLY0_DLY1_13,		29
	.EQU	FDC2_CH1DLY0_DLY1_12,		28
	.EQU	FDC2_CH1DLY0_DLY1_11,		27
	.EQU	FDC2_CH1DLY0_DLY1_10,		26
	.EQU	FDC2_CH1DLY0_DLY1_9,		25
	.EQU	FDC2_CH1DLY0_DLY1_8,		24
	.EQU	FDC2_CH1DLY0_DLY1_7,		23
	.EQU	FDC2_CH1DLY0_DLY1_6,		22
	.EQU	FDC2_CH1DLY0_DLY1_5,		21
	.EQU	FDC2_CH1DLY0_DLY1_4,		20
	.EQU	FDC2_CH1DLY0_DLY1_3,		19
	.EQU	FDC2_CH1DLY0_DLY1_2,		18
	.EQU	FDC2_CH1DLY0_DLY1_1,		17
	.EQU	FDC2_CH1DLY0_DLY1_0,		16
	.EQU	FDC2_CH1DLY0_DLY0_15,		15
	.EQU	FDC2_CH1DLY0_DLY0_14,		14
	.EQU	FDC2_CH1DLY0_DLY0_13,		13
	.EQU	FDC2_CH1DLY0_DLY0_12,		12
	.EQU	FDC2_CH1DLY0_DLY0_11,		11
	.EQU	FDC2_CH1DLY0_DLY0_10,		10
	.EQU	FDC2_CH1DLY0_DLY0_9,		9
	.EQU	FDC2_CH1DLY0_DLY0_8,		8
	.EQU	FDC2_CH1DLY0_DLY0_7,		7
	.EQU	FDC2_CH1DLY0_DLY0_6,		6
	.EQU	FDC2_CH1DLY0_DLY0_5,		5
	.EQU	FDC2_CH1DLY0_DLY0_4,		4
	.EQU	FDC2_CH1DLY0_DLY0_3,		3
	.EQU	FDC2_CH1DLY0_DLY0_2,		2
	.EQU	FDC2_CH1DLY0_DLY0_1,		1
	.EQU	FDC2_CH1DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH1DLY1,	0x40002CC4
//  0X4000 2CC4  FDC2_CH1DLY1   Bits-------------------------------------
	.EQU	FDC2_CH1DLY1_DLY3_15,		31
	.EQU	FDC2_CH1DLY1_DLY3_14,		30
	.EQU	FDC2_CH1DLY1_DLY3_13,		29
	.EQU	FDC2_CH1DLY1_DLY3_12,		28
	.EQU	FDC2_CH1DLY1_DLY3_11,		27
	.EQU	FDC2_CH1DLY1_DLY3_10,		26
	.EQU	FDC2_CH1DLY1_DLY3_9,		25
	.EQU	FDC2_CH1DLY1_DLY3_8,		24
	.EQU	FDC2_CH1DLY1_DLY3_7,		23
	.EQU	FDC2_CH1DLY1_DLY3_6,		22
	.EQU	FDC2_CH1DLY1_DLY3_5,		21
	.EQU	FDC2_CH1DLY1_DLY3_4,		20
	.EQU	FDC2_CH1DLY1_DLY3_3,		19
	.EQU	FDC2_CH1DLY1_DLY3_2,		18
	.EQU	FDC2_CH1DLY1_DLY3_1,		17
	.EQU	FDC2_CH1DLY1_DLY3_0,		16
	.EQU	FDC2_CH1DLY1_DLY2_15,		15
	.EQU	FDC2_CH1DLY1_DLY2_14,		14
	.EQU	FDC2_CH1DLY1_DLY2_13,		13
	.EQU	FDC2_CH1DLY1_DLY2_12,		12
	.EQU	FDC2_CH1DLY1_DLY2_11,		11
	.EQU	FDC2_CH1DLY1_DLY2_10,		10
	.EQU	FDC2_CH1DLY1_DLY2_9,		9
	.EQU	FDC2_CH1DLY1_DLY2_8,		8
	.EQU	FDC2_CH1DLY1_DLY2_7,		7
	.EQU	FDC2_CH1DLY1_DLY2_6,		6
	.EQU	FDC2_CH1DLY1_DLY2_5,		5
	.EQU	FDC2_CH1DLY1_DLY2_4,		4
	.EQU	FDC2_CH1DLY1_DLY2_3,		3
	.EQU	FDC2_CH1DLY1_DLY2_2,		2
	.EQU	FDC2_CH1DLY1_DLY2_1,		1
	.EQU	FDC2_CH1DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH1DLY2,	0x40002CC8
//  0X4000 2CC8  FDC2_CH1DLY2   Bits-------------------------------------
	.EQU	FDC2_CH1DLY2_DLY4_15,		15
	.EQU	FDC2_CH1DLY2_DLY4_14,		14
	.EQU	FDC2_CH1DLY2_DLY4_13,		13
	.EQU	FDC2_CH1DLY2_DLY4_12,		12
	.EQU	FDC2_CH1DLY2_DLY4_11,		11
	.EQU	FDC2_CH1DLY2_DLY4_10,		10
	.EQU	FDC2_CH1DLY2_DLY4_9,		9
	.EQU	FDC2_CH1DLY2_DLY4_8,		8
	.EQU	FDC2_CH1DLY2_DLY4_7,		7
	.EQU	FDC2_CH1DLY2_DLY4_6,		6
	.EQU	FDC2_CH1DLY2_DLY4_5,		5
	.EQU	FDC2_CH1DLY2_DLY4_4,		4
	.EQU	FDC2_CH1DLY2_DLY4_3,		3
	.EQU	FDC2_CH1DLY2_DLY4_2,		2
	.EQU	FDC2_CH1DLY2_DLY4_1,		1
	.EQU	FDC2_CH1DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH2DLY0,	0x40002CD0
//  0X4000 2CD0  FDC2_CH2DLY0   Bits-------------------------------------
	.EQU	FDC2_CH2DLY0_DLY1_15,		31
	.EQU	FDC2_CH2DLY0_DLY1_14,		30
	.EQU	FDC2_CH2DLY0_DLY1_13,		29
	.EQU	FDC2_CH2DLY0_DLY1_12,		28
	.EQU	FDC2_CH2DLY0_DLY1_11,		27
	.EQU	FDC2_CH2DLY0_DLY1_10,		26
	.EQU	FDC2_CH2DLY0_DLY1_9,		25
	.EQU	FDC2_CH2DLY0_DLY1_8,		24
	.EQU	FDC2_CH2DLY0_DLY1_7,		23
	.EQU	FDC2_CH2DLY0_DLY1_6,		22
	.EQU	FDC2_CH2DLY0_DLY1_5,		21
	.EQU	FDC2_CH2DLY0_DLY1_4,		20
	.EQU	FDC2_CH2DLY0_DLY1_3,		19
	.EQU	FDC2_CH2DLY0_DLY1_2,		18
	.EQU	FDC2_CH2DLY0_DLY1_1,		17
	.EQU	FDC2_CH2DLY0_DLY1_0,		16
	.EQU	FDC2_CH2DLY0_DLY0_15,		15
	.EQU	FDC2_CH2DLY0_DLY0_14,		14
	.EQU	FDC2_CH2DLY0_DLY0_13,		13
	.EQU	FDC2_CH2DLY0_DLY0_12,		12
	.EQU	FDC2_CH2DLY0_DLY0_11,		11
	.EQU	FDC2_CH2DLY0_DLY0_10,		10
	.EQU	FDC2_CH2DLY0_DLY0_9,		9
	.EQU	FDC2_CH2DLY0_DLY0_8,		8
	.EQU	FDC2_CH2DLY0_DLY0_7,		7
	.EQU	FDC2_CH2DLY0_DLY0_6,		6
	.EQU	FDC2_CH2DLY0_DLY0_5,		5
	.EQU	FDC2_CH2DLY0_DLY0_4,		4
	.EQU	FDC2_CH2DLY0_DLY0_3,		3
	.EQU	FDC2_CH2DLY0_DLY0_2,		2
	.EQU	FDC2_CH2DLY0_DLY0_1,		1
	.EQU	FDC2_CH2DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH2DLY1,	0x40002CD4
//  0X4000 2CD4  FDC2_CH2DLY1   Bits-------------------------------------
	.EQU	FDC2_CH2DLY1_DLY3_15,		31
	.EQU	FDC2_CH2DLY1_DLY3_14,		30
	.EQU	FDC2_CH2DLY1_DLY3_13,		29
	.EQU	FDC2_CH2DLY1_DLY3_12,		28
	.EQU	FDC2_CH2DLY1_DLY3_11,		27
	.EQU	FDC2_CH2DLY1_DLY3_10,		26
	.EQU	FDC2_CH2DLY1_DLY3_9,		25
	.EQU	FDC2_CH2DLY1_DLY3_8,		24
	.EQU	FDC2_CH2DLY1_DLY3_7,		23
	.EQU	FDC2_CH2DLY1_DLY3_6,		22
	.EQU	FDC2_CH2DLY1_DLY3_5,		21
	.EQU	FDC2_CH2DLY1_DLY3_4,		20
	.EQU	FDC2_CH2DLY1_DLY3_3,		19
	.EQU	FDC2_CH2DLY1_DLY3_2,		18
	.EQU	FDC2_CH2DLY1_DLY3_1,		17
	.EQU	FDC2_CH2DLY1_DLY3_0,		16
	.EQU	FDC2_CH2DLY1_DLY2_15,		15
	.EQU	FDC2_CH2DLY1_DLY2_14,		14
	.EQU	FDC2_CH2DLY1_DLY2_13,		13
	.EQU	FDC2_CH2DLY1_DLY2_12,		12
	.EQU	FDC2_CH2DLY1_DLY2_11,		11
	.EQU	FDC2_CH2DLY1_DLY2_10,		10
	.EQU	FDC2_CH2DLY1_DLY2_9,		9
	.EQU	FDC2_CH2DLY1_DLY2_8,		8
	.EQU	FDC2_CH2DLY1_DLY2_7,		7
	.EQU	FDC2_CH2DLY1_DLY2_6,		6
	.EQU	FDC2_CH2DLY1_DLY2_5,		5
	.EQU	FDC2_CH2DLY1_DLY2_4,		4
	.EQU	FDC2_CH2DLY1_DLY2_3,		3
	.EQU	FDC2_CH2DLY1_DLY2_2,		2
	.EQU	FDC2_CH2DLY1_DLY2_1,		1
	.EQU	FDC2_CH2DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH2DLY2,	0x40002CD8
//  0X4000 2CD8  FDC2_CH2DLY2   Bits-------------------------------------
	.EQU	FDC2_CH2DLY2_DLY4_15,		15
	.EQU	FDC2_CH2DLY2_DLY4_14,		14
	.EQU	FDC2_CH2DLY2_DLY4_13,		13
	.EQU	FDC2_CH2DLY2_DLY4_12,		12
	.EQU	FDC2_CH2DLY2_DLY4_11,		11
	.EQU	FDC2_CH2DLY2_DLY4_10,		10
	.EQU	FDC2_CH2DLY2_DLY4_9,		9
	.EQU	FDC2_CH2DLY2_DLY4_8,		8
	.EQU	FDC2_CH2DLY2_DLY4_7,		7
	.EQU	FDC2_CH2DLY2_DLY4_6,		6
	.EQU	FDC2_CH2DLY2_DLY4_5,		5
	.EQU	FDC2_CH2DLY2_DLY4_4,		4
	.EQU	FDC2_CH2DLY2_DLY4_3,		3
	.EQU	FDC2_CH2DLY2_DLY4_2,		2
	.EQU	FDC2_CH2DLY2_DLY4_1,		1
	.EQU	FDC2_CH2DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH3DLY0,	0x40002CE0
//  0X4000 2CE0  FDC2_CH3DLY0   Bits-------------------------------------
	.EQU	FDC2_CH3DLY0_DLY1_15,		31
	.EQU	FDC2_CH3DLY0_DLY1_14,		30
	.EQU	FDC2_CH3DLY0_DLY1_13,		29
	.EQU	FDC2_CH3DLY0_DLY1_12,		28
	.EQU	FDC2_CH3DLY0_DLY1_11,		27
	.EQU	FDC2_CH3DLY0_DLY1_10,		26
	.EQU	FDC2_CH3DLY0_DLY1_9,		25
	.EQU	FDC2_CH3DLY0_DLY1_8,		24
	.EQU	FDC2_CH3DLY0_DLY1_7,		23
	.EQU	FDC2_CH3DLY0_DLY1_6,		22
	.EQU	FDC2_CH3DLY0_DLY1_5,		21
	.EQU	FDC2_CH3DLY0_DLY1_4,		20
	.EQU	FDC2_CH3DLY0_DLY1_3,		19
	.EQU	FDC2_CH3DLY0_DLY1_2,		18
	.EQU	FDC2_CH3DLY0_DLY1_1,		17
	.EQU	FDC2_CH3DLY0_DLY1_0,		16
	.EQU	FDC2_CH3DLY0_DLY0_15,		15
	.EQU	FDC2_CH3DLY0_DLY0_14,		14
	.EQU	FDC2_CH3DLY0_DLY0_13,		13
	.EQU	FDC2_CH3DLY0_DLY0_12,		12
	.EQU	FDC2_CH3DLY0_DLY0_11,		11
	.EQU	FDC2_CH3DLY0_DLY0_10,		10
	.EQU	FDC2_CH3DLY0_DLY0_9,		9
	.EQU	FDC2_CH3DLY0_DLY0_8,		8
	.EQU	FDC2_CH3DLY0_DLY0_7,		7
	.EQU	FDC2_CH3DLY0_DLY0_6,		6
	.EQU	FDC2_CH3DLY0_DLY0_5,		5
	.EQU	FDC2_CH3DLY0_DLY0_4,		4
	.EQU	FDC2_CH3DLY0_DLY0_3,		3
	.EQU	FDC2_CH3DLY0_DLY0_2,		2
	.EQU	FDC2_CH3DLY0_DLY0_1,		1
	.EQU	FDC2_CH3DLY0_DLY0_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH3DLY1,	0x40002CE4
//  0X4000 2CE4  FDC2_CH3DLY1   Bits-------------------------------------
	.EQU	FDC2_CH3DLY1_DLY3_15,		31
	.EQU	FDC2_CH3DLY1_DLY3_14,		30
	.EQU	FDC2_CH3DLY1_DLY3_13,		29
	.EQU	FDC2_CH3DLY1_DLY3_12,		28
	.EQU	FDC2_CH3DLY1_DLY3_11,		27
	.EQU	FDC2_CH3DLY1_DLY3_10,		26
	.EQU	FDC2_CH3DLY1_DLY3_9,		25
	.EQU	FDC2_CH3DLY1_DLY3_8,		24
	.EQU	FDC2_CH3DLY1_DLY3_7,		23
	.EQU	FDC2_CH3DLY1_DLY3_6,		22
	.EQU	FDC2_CH3DLY1_DLY3_5,		21
	.EQU	FDC2_CH3DLY1_DLY3_4,		20
	.EQU	FDC2_CH3DLY1_DLY3_3,		19
	.EQU	FDC2_CH3DLY1_DLY3_2,		18
	.EQU	FDC2_CH3DLY1_DLY3_1,		17
	.EQU	FDC2_CH3DLY1_DLY3_0,		16
	.EQU	FDC2_CH3DLY1_DLY2_15,		15
	.EQU	FDC2_CH3DLY1_DLY2_14,		14
	.EQU	FDC2_CH3DLY1_DLY2_13,		13
	.EQU	FDC2_CH3DLY1_DLY2_12,		12
	.EQU	FDC2_CH3DLY1_DLY2_11,		11
	.EQU	FDC2_CH3DLY1_DLY2_10,		10
	.EQU	FDC2_CH3DLY1_DLY2_9,		9
	.EQU	FDC2_CH3DLY1_DLY2_8,		8
	.EQU	FDC2_CH3DLY1_DLY2_7,		7
	.EQU	FDC2_CH3DLY1_DLY2_6,		6
	.EQU	FDC2_CH3DLY1_DLY2_5,		5
	.EQU	FDC2_CH3DLY1_DLY2_4,		4
	.EQU	FDC2_CH3DLY1_DLY2_3,		3
	.EQU	FDC2_CH3DLY1_DLY2_2,		2
	.EQU	FDC2_CH3DLY1_DLY2_1,		1
	.EQU	FDC2_CH3DLY1_DLY2_0,		0
//  register-------------------------------------
	.EQU	FDC2_CH3DLY2,	0x40002CE8
//  0X4000 2CE8  FDC2_CH3DLY2   Bits-------------------------------------
	.EQU	FDC2_CH3DLY2_DLY4_15,		15
	.EQU	FDC2_CH3DLY2_DLY4_14,		14
	.EQU	FDC2_CH3DLY2_DLY4_13,		13
	.EQU	FDC2_CH3DLY2_DLY4_12,		12
	.EQU	FDC2_CH3DLY2_DLY4_11,		11
	.EQU	FDC2_CH3DLY2_DLY4_10,		10
	.EQU	FDC2_CH3DLY2_DLY4_9,		9
	.EQU	FDC2_CH3DLY2_DLY4_8,		8
	.EQU	FDC2_CH3DLY2_DLY4_7,		7
	.EQU	FDC2_CH3DLY2_DLY4_6,		6
	.EQU	FDC2_CH3DLY2_DLY4_5,		5
	.EQU	FDC2_CH3DLY2_DLY4_4,		4
	.EQU	FDC2_CH3DLY2_DLY4_3,		3
	.EQU	FDC2_CH3DLY2_DLY4_2,		2
	.EQU	FDC2_CH3DLY2_DLY4_1,		1
	.EQU	FDC2_CH3DLY2_DLY4_0,		0
//  register-------------------------------------
	.EQU	FDC2_PO0DLY,	0x40002CF0
//  0X4000 2CF0  FDC2_PO0DLY   Bits-------------------------------------
	.EQU	FDC2_PO0DLY_DLYH15,		31
	.EQU	FDC2_PO0DLY_DLYH14,		30
	.EQU	FDC2_PO0DLY_DLYH13,		29
	.EQU	FDC2_PO0DLY_DLYH12,		28
	.EQU	FDC2_PO0DLY_DLYH11,		27
	.EQU	FDC2_PO0DLY_DLYH10,		26
	.EQU	FDC2_PO0DLY_DLYH9,		25
	.EQU	FDC2_PO0DLY_DLYH8,		24
	.EQU	FDC2_PO0DLY_DLYH7,		23
	.EQU	FDC2_PO0DLY_DLYH6,		22
	.EQU	FDC2_PO0DLY_DLYH5,		21
	.EQU	FDC2_PO0DLY_DLYH4,		20
	.EQU	FDC2_PO0DLY_DLYH3,		19
	.EQU	FDC2_PO0DLY_DLYH2,		18
	.EQU	FDC2_PO0DLY_DLYH1,		17
	.EQU	FDC2_PO0DLY_DLYH0,		16
	.EQU	FDC2_PO0DLY_DLYL15,		15
	.EQU	FDC2_PO0DLY_DLYL14,		14
	.EQU	FDC2_PO0DLY_DLYL13,		13
	.EQU	FDC2_PO0DLY_DLYL12,		12
	.EQU	FDC2_PO0DLY_DLYL11,		11
	.EQU	FDC2_PO0DLY_DLYL10,		10
	.EQU	FDC2_PO0DLY_DLYL9,		9
	.EQU	FDC2_PO0DLY_DLYL8,		8
	.EQU	FDC2_PO0DLY_DLYL7,		7
	.EQU	FDC2_PO0DLY_DLYL6,		6
	.EQU	FDC2_PO0DLY_DLYL5,		5
	.EQU	FDC2_PO0DLY_DLYL4,		4
	.EQU	FDC2_PO0DLY_DLYL3,		3
	.EQU	FDC2_PO0DLY_DLYL2,		2
	.EQU	FDC2_PO0DLY_DLYL1,		1
	.EQU	FDC2_PO0DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC2_PO1DLY,	0x40002CF4
//  0X4000 2CF4  FDC2_PO1DLY   Bits-------------------------------------
	.EQU	FDC2_PO1DLY_DLYH15,		31
	.EQU	FDC2_PO1DLY_DLYH14,		30
	.EQU	FDC2_PO1DLY_DLYH13,		29
	.EQU	FDC2_PO1DLY_DLYH12,		28
	.EQU	FDC2_PO1DLY_DLYH11,		27
	.EQU	FDC2_PO1DLY_DLYH10,		26
	.EQU	FDC2_PO1DLY_DLYH9,		25
	.EQU	FDC2_PO1DLY_DLYH8,		24
	.EQU	FDC2_PO1DLY_DLYH7,		23
	.EQU	FDC2_PO1DLY_DLYH6,		22
	.EQU	FDC2_PO1DLY_DLYH5,		21
	.EQU	FDC2_PO1DLY_DLYH4,		20
	.EQU	FDC2_PO1DLY_DLYH3,		19
	.EQU	FDC2_PO1DLY_DLYH2,		18
	.EQU	FDC2_PO1DLY_DLYH1,		17
	.EQU	FDC2_PO1DLY_DLYH0,		16
	.EQU	FDC2_PO1DLY_DLYL15,		15
	.EQU	FDC2_PO1DLY_DLYL14,		14
	.EQU	FDC2_PO1DLY_DLYL13,		13
	.EQU	FDC2_PO1DLY_DLYL12,		12
	.EQU	FDC2_PO1DLY_DLYL11,		11
	.EQU	FDC2_PO1DLY_DLYL10,		10
	.EQU	FDC2_PO1DLY_DLYL9,		9
	.EQU	FDC2_PO1DLY_DLYL8,		8
	.EQU	FDC2_PO1DLY_DLYL7,		7
	.EQU	FDC2_PO1DLY_DLYL6,		6
	.EQU	FDC2_PO1DLY_DLYL5,		5
	.EQU	FDC2_PO1DLY_DLYL4,		4
	.EQU	FDC2_PO1DLY_DLYL3,		3
	.EQU	FDC2_PO1DLY_DLYL2,		2
	.EQU	FDC2_PO1DLY_DLYL1,		1
	.EQU	FDC2_PO1DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC2_PO2DLY,	0x40002CF8
//  0X4000 2CF8  FDC2_PO2DLY   Bits-------------------------------------
	.EQU	FDC2_PO2DLY_DLYH15,		31
	.EQU	FDC2_PO2DLY_DLYH14,		30
	.EQU	FDC2_PO2DLY_DLYH13,		29
	.EQU	FDC2_PO2DLY_DLYH12,		28
	.EQU	FDC2_PO2DLY_DLYH11,		27
	.EQU	FDC2_PO2DLY_DLYH10,		26
	.EQU	FDC2_PO2DLY_DLYH9,		25
	.EQU	FDC2_PO2DLY_DLYH8,		24
	.EQU	FDC2_PO2DLY_DLYH7,		23
	.EQU	FDC2_PO2DLY_DLYH6,		22
	.EQU	FDC2_PO2DLY_DLYH5,		21
	.EQU	FDC2_PO2DLY_DLYH4,		20
	.EQU	FDC2_PO2DLY_DLYH3,		19
	.EQU	FDC2_PO2DLY_DLYH2,		18
	.EQU	FDC2_PO2DLY_DLYH1,		17
	.EQU	FDC2_PO2DLY_DLYH0,		16
	.EQU	FDC2_PO2DLY_DLYL15,		15
	.EQU	FDC2_PO2DLY_DLYL14,		14
	.EQU	FDC2_PO2DLY_DLYL13,		13
	.EQU	FDC2_PO2DLY_DLYL12,		12
	.EQU	FDC2_PO2DLY_DLYL11,		11
	.EQU	FDC2_PO2DLY_DLYL10,		10
	.EQU	FDC2_PO2DLY_DLYL9,		9
	.EQU	FDC2_PO2DLY_DLYL8,		8
	.EQU	FDC2_PO2DLY_DLYL7,		7
	.EQU	FDC2_PO2DLY_DLYL6,		6
	.EQU	FDC2_PO2DLY_DLYL5,		5
	.EQU	FDC2_PO2DLY_DLYL4,		4
	.EQU	FDC2_PO2DLY_DLYL3,		3
	.EQU	FDC2_PO2DLY_DLYL2,		2
	.EQU	FDC2_PO2DLY_DLYL1,		1
	.EQU	FDC2_PO2DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FDC2_PO3DLY,	0x40002CFC
//  0X4000 2CFC  FDC2_PO3DLY   Bits-------------------------------------
	.EQU	FDC2_PO3DLY_DLYH15,		31
	.EQU	FDC2_PO3DLY_DLYH14,		30
	.EQU	FDC2_PO3DLY_DLYH13,		29
	.EQU	FDC2_PO3DLY_DLYH12,		28
	.EQU	FDC2_PO3DLY_DLYH11,		27
	.EQU	FDC2_PO3DLY_DLYH10,		26
	.EQU	FDC2_PO3DLY_DLYH9,		25
	.EQU	FDC2_PO3DLY_DLYH8,		24
	.EQU	FDC2_PO3DLY_DLYH7,		23
	.EQU	FDC2_PO3DLY_DLYH6,		22
	.EQU	FDC2_PO3DLY_DLYH5,		21
	.EQU	FDC2_PO3DLY_DLYH4,		20
	.EQU	FDC2_PO3DLY_DLYH3,		19
	.EQU	FDC2_PO3DLY_DLYH2,		18
	.EQU	FDC2_PO3DLY_DLYH1,		17
	.EQU	FDC2_PO3DLY_DLYH0,		16
	.EQU	FDC2_PO3DLY_DLYL15,		15
	.EQU	FDC2_PO3DLY_DLYL14,		14
	.EQU	FDC2_PO3DLY_DLYL13,		13
	.EQU	FDC2_PO3DLY_DLYL12,		12
	.EQU	FDC2_PO3DLY_DLYL11,		11
	.EQU	FDC2_PO3DLY_DLYL10,		10
	.EQU	FDC2_PO3DLY_DLYL9,		9
	.EQU	FDC2_PO3DLY_DLYL8,		8
	.EQU	FDC2_PO3DLY_DLYL7,		7
	.EQU	FDC2_PO3DLY_DLYL6,		6
	.EQU	FDC2_PO3DLY_DLYL5,		5
	.EQU	FDC2_PO3DLY_DLYL4,		4
	.EQU	FDC2_PO3DLY_DLYL3,		3
	.EQU	FDC2_PO3DLY_DLYL2,		2
	.EQU	FDC2_PO3DLY_DLYL1,		1
	.EQU	FDC2_PO3DLY_DLYL0,		0
//  register-------------------------------------
	.EQU	FlexMUX_SOU,	0x40002D00
//  0X4000 2D00  FlexMUX_SOU   Bits-------------------------------------
	.EQU	FlexMUX_SOU_CH4EN,		31
	.EQU	FlexMUX_SOU_SEL4_6,		30
	.EQU	FlexMUX_SOU_SEL4_5,		29
	.EQU	FlexMUX_SOU_SEL4_4,		28
	.EQU	FlexMUX_SOU_SEL4_3,		27
	.EQU	FlexMUX_SOU_SEL4_2,		26
	.EQU	FlexMUX_SOU_SEL4_1,		25
	.EQU	FlexMUX_SOU_SEL4_0,		24
	.EQU	FlexMUX_SOU_CH3EN,		23
	.EQU	FlexMUX_SOU_SEL3_6,		22
	.EQU	FlexMUX_SOU_SEL3_5,		21
	.EQU	FlexMUX_SOU_SEL3_4,		20
	.EQU	FlexMUX_SOU_SEL3_3,		19
	.EQU	FlexMUX_SOU_SEL3_2,		18
	.EQU	FlexMUX_SOU_SEL3_1,		17
	.EQU	FlexMUX_SOU_SEL3_0,		16
	.EQU	FlexMUX_SOU_CH2EN,		15
	.EQU	FlexMUX_SOU_SEL2_6,		14
	.EQU	FlexMUX_SOU_SEL2_5,		13
	.EQU	FlexMUX_SOU_SEL2_4,		12
	.EQU	FlexMUX_SOU_SEL2_3,		11
	.EQU	FlexMUX_SOU_SEL2_2,		10
	.EQU	FlexMUX_SOU_SEL2_1,		9
	.EQU	FlexMUX_SOU_SEL2_0,		8
	.EQU	FlexMUX_SOU_CH1EN,		7
	.EQU	FlexMUX_SOU_SEL1_6,		6
	.EQU	FlexMUX_SOU_SEL1_5,		5
	.EQU	FlexMUX_SOU_SEL1_4,		4
	.EQU	FlexMUX_SOU_SEL1_3,		3
	.EQU	FlexMUX_SOU_SEL1_2,		2
	.EQU	FlexMUX_SOU_SEL1_1,		1
	.EQU	FlexMUX_SOU_SEL1_0,		0
//  register-------------------------------------
	.EQU	FlexMUX_TAR,	0x40002D04
//  0X4000 2D04  FlexMUX_TAR   Bits-------------------------------------
	.EQU	FlexMUX_TAR_TCKS1,		22
	.EQU	FlexMUX_TAR_TCKS0,		21
	.EQU	FlexMUX_TAR_CH4SEL1,		20
	.EQU	FlexMUX_TAR_CH4SEL0,		19
	.EQU	FlexMUX_TAR_CH3SEL1,		18
	.EQU	FlexMUX_TAR_CH3SEL0,		17
	.EQU	FlexMUX_TAR_CH2SEL1,		16
	.EQU	FlexMUX_TAR_CH2SEL0,		15
	.EQU	FlexMUX_TAR_CH1SEL1,		14
	.EQU	FlexMUX_TAR_CH1SEL0,		13
	.EQU	FlexMUX_TAR_CH4DIV1,		12
	.EQU	FlexMUX_TAR_CH4DIV0,		11
	.EQU	FlexMUX_TAR_CH3DIV1,		10
	.EQU	FlexMUX_TAR_CH3DIV0,		9
	.EQU	FlexMUX_TAR_CH2DIV1,		8
	.EQU	FlexMUX_TAR_CH2DIV0,		7
	.EQU	FlexMUX_TAR_CH1DIV1,		6
	.EQU	FlexMUX_TAR_CH1DIV0,		5
	.EQU	FlexMUX_TAR_CH4DE,		4
	.EQU	FlexMUX_TAR_CH3DE,		3
	.EQU	FlexMUX_TAR_CH2DE,		2
	.EQU	FlexMUX_TAR_CH1DE,		1
	.EQU	FlexMUX_TAR_FMUXEN,		0
//  register-------------------------------------
	.EQU	FlexRM_CTL,	0x40002D80
//  0X4000 2D80  FlexRM_CTL   Bits-------------------------------------
	.EQU	FlexRM_CTL_CH11TRSEL,		23
	.EQU	FlexRM_CTL_CH10TRSEL,		22
	.EQU	FlexRM_CTL_CH9TRSEL,		21
	.EQU	FlexRM_CTL_CH8TRSEL,		20
	.EQU	FlexRM_CTL_CH7TRSEL,		19
	.EQU	FlexRM_CTL_CH6TRSEL,		18
	.EQU	FlexRM_CTL_CH5TRSEL,		17
	.EQU	FlexRM_CTL_CH4TRSEL,		16
	.EQU	FlexRM_CTL_CH3TRSEL,		15
	.EQU	FlexRM_CTL_CH2TRSEL,		14
	.EQU	FlexRM_CTL_CH1TRSEL,		13
	.EQU	FlexRM_CTL_CH0TRSEL,		12
	.EQU	FlexRM_CTL_G11EN,		11
	.EQU	FlexRM_CTL_G10EN,		10
	.EQU	FlexRM_CTL_G9EN,		9
	.EQU	FlexRM_CTL_G8EN,		8
	.EQU	FlexRM_CTL_G7EN,		7
	.EQU	FlexRM_CTL_G6EN,		6
	.EQU	FlexRM_CTL_G5EN,		5
	.EQU	FlexRM_CTL_G4EN,		4
	.EQU	FlexRM_CTL_G3EN,		3
	.EQU	FlexRM_CTL_G2EN,		2
	.EQU	FlexRM_CTL_G1EN,		1
	.EQU	FlexRM_CTL_G0EN,		0
//  register-------------------------------------
	.EQU	FlexRM_GPSR0,	0x40002D84
//  0X4000 2D84  FlexRM_GPSR0   Bits-------------------------------------
	.EQU	FlexRM_GPSR0_G7PS3,		31
	.EQU	FlexRM_GPSR0_G7PS2,		30
	.EQU	FlexRM_GPSR0_G7PS1,		29
	.EQU	FlexRM_GPSR0_G7PS0,		28
	.EQU	FlexRM_GPSR0_G6PS3,		27
	.EQU	FlexRM_GPSR0_G6PS2,		26
	.EQU	FlexRM_GPSR0_G6PS1,		25
	.EQU	FlexRM_GPSR0_G6PS0,		24
	.EQU	FlexRM_GPSR0_G5PS3,		23
	.EQU	FlexRM_GPSR0_G5PS2,		22
	.EQU	FlexRM_GPSR0_G5PS1,		21
	.EQU	FlexRM_GPSR0_G5PS0,		20
	.EQU	FlexRM_GPSR0_G4PS3,		19
	.EQU	FlexRM_GPSR0_G4PS2,		18
	.EQU	FlexRM_GPSR0_G4PS1,		17
	.EQU	FlexRM_GPSR0_G4PS0,		16
	.EQU	FlexRM_GPSR0_G3PS3,		15
	.EQU	FlexRM_GPSR0_G3PS2,		14
	.EQU	FlexRM_GPSR0_G3PS1,		13
	.EQU	FlexRM_GPSR0_G3PS0,		12
	.EQU	FlexRM_GPSR0_G2PS3,		11
	.EQU	FlexRM_GPSR0_G2PS2,		10
	.EQU	FlexRM_GPSR0_G2PS1,		9
	.EQU	FlexRM_GPSR0_G2PS0,		8
	.EQU	FlexRM_GPSR0_G1PS3,		7
	.EQU	FlexRM_GPSR0_G1PS2,		6
	.EQU	FlexRM_GPSR0_G1PS1,		5
	.EQU	FlexRM_GPSR0_G1PS0,		4
	.EQU	FlexRM_GPSR0_G0PS3,		3
	.EQU	FlexRM_GPSR0_G0PS2,		2
	.EQU	FlexRM_GPSR0_G0PS1,		1
	.EQU	FlexRM_GPSR0_G0PS0,		0
//  register-------------------------------------
	.EQU	FlexRM_GPSR1,	0x40002D88
//  0X4000 2D88  FlexRM_GPSR1   Bits-------------------------------------
	.EQU	FlexRM_GPSR1_G11PS3,		15
	.EQU	FlexRM_GPSR1_G11PS2,		14
	.EQU	FlexRM_GPSR1_G11PS1,		13
	.EQU	FlexRM_GPSR1_G11PS0,		12
	.EQU	FlexRM_GPSR1_G10PS3,		11
	.EQU	FlexRM_GPSR1_G10PS2,		10
	.EQU	FlexRM_GPSR1_G10PS1,		9
	.EQU	FlexRM_GPSR1_G10PS0,		8
	.EQU	FlexRM_GPSR1_G9PS3,		7
	.EQU	FlexRM_GPSR1_G9PS2,		6
	.EQU	FlexRM_GPSR1_G9PS1,		5
	.EQU	FlexRM_GPSR1_G9PS0,		4
	.EQU	FlexRM_GPSR1_G8PS3,		3
	.EQU	FlexRM_GPSR1_G8PS2,		2
	.EQU	FlexRM_GPSR1_G8PS1,		1
	.EQU	FlexRM_GPSR1_G8PS0,		0
//  register-------------------------------------
	.EQU	FlexRM_GCSR0,	0x40002D8C
//  0X4000 2D8C  FlexRM_GCSR0   Bits-------------------------------------
	.EQU	FlexRM_GCSR0_G3CIS3,		31
	.EQU	FlexRM_GCSR0_G3CIS2,		30
	.EQU	FlexRM_GCSR0_G3CIS1,		29
	.EQU	FlexRM_GCSR0_G3CIS0,		28
	.EQU	FlexRM_GCSR0_CH3OS3,		27
	.EQU	FlexRM_GCSR0_CH3OS2,		26
	.EQU	FlexRM_GCSR0_CH3OS1,		25
	.EQU	FlexRM_GCSR0_CH3OS0,		24
	.EQU	FlexRM_GCSR0_G2CIS3,		23
	.EQU	FlexRM_GCSR0_G2CIS2,		22
	.EQU	FlexRM_GCSR0_G2CIS1,		21
	.EQU	FlexRM_GCSR0_G2CIS0,		20
	.EQU	FlexRM_GCSR0_CH2OS3,		19
	.EQU	FlexRM_GCSR0_CH2OS2,		18
	.EQU	FlexRM_GCSR0_CH2OS1,		17
	.EQU	FlexRM_GCSR0_CH2OS0,		16
	.EQU	FlexRM_GCSR0_G1CIS3,		15
	.EQU	FlexRM_GCSR0_G1CIS2,		14
	.EQU	FlexRM_GCSR0_G1CIS1,		13
	.EQU	FlexRM_GCSR0_G1CIS0,		12
	.EQU	FlexRM_GCSR0_CH1OS3,		11
	.EQU	FlexRM_GCSR0_CH1OS2,		10
	.EQU	FlexRM_GCSR0_CH1OS1,		9
	.EQU	FlexRM_GCSR0_CH1OS0,		8
	.EQU	FlexRM_GCSR0_G0CIS3,		7
	.EQU	FlexRM_GCSR0_G0CIS2,		6
	.EQU	FlexRM_GCSR0_G0CIS1,		5
	.EQU	FlexRM_GCSR0_G0CIS0,		4
	.EQU	FlexRM_GCSR0_CH0OS3,		3
	.EQU	FlexRM_GCSR0_CH0OS2,		2
	.EQU	FlexRM_GCSR0_CH0OS1,		1
	.EQU	FlexRM_GCSR0_CH0OS0,		0
//  register-------------------------------------
	.EQU	FlexRM_GCSR1,	0x40002D90
//  0X4000 2D90  FlexRM_GCSR1   Bits-------------------------------------
	.EQU	FlexRM_GCSR1_CH7OS3,		31
	.EQU	FlexRM_GCSR1_CH7OS2,		30
	.EQU	FlexRM_GCSR1_CH7OS1,		29
	.EQU	FlexRM_GCSR1_CH7OS0,		28
	.EQU	FlexRM_GCSR1_G7COS3,		27
	.EQU	FlexRM_GCSR1_G7COS2,		26
	.EQU	FlexRM_GCSR1_G7COS1,		25
	.EQU	FlexRM_GCSR1_G7COS0,		24
	.EQU	FlexRM_GCSR1_CH6OS3,		23
	.EQU	FlexRM_GCSR1_CH6OS2,		22
	.EQU	FlexRM_GCSR1_CH6OS1,		21
	.EQU	FlexRM_GCSR1_CH6OS0,		20
	.EQU	FlexRM_GCSR1_G6COS3,		19
	.EQU	FlexRM_GCSR1_G6COS2,		18
	.EQU	FlexRM_GCSR1_G6COS1,		17
	.EQU	FlexRM_GCSR1_G6COS0,		16
	.EQU	FlexRM_GCSR1_CH5OS3,		15
	.EQU	FlexRM_GCSR1_CH5OS2,		14
	.EQU	FlexRM_GCSR1_CH5OS1,		13
	.EQU	FlexRM_GCSR1_CH5OS0,		12
	.EQU	FlexRM_GCSR1_G5COS3,		11
	.EQU	FlexRM_GCSR1_G5COS2,		10
	.EQU	FlexRM_GCSR1_G5COS1,		9
	.EQU	FlexRM_GCSR1_G5COS0,		8
	.EQU	FlexRM_GCSR1_CH4OS3,		7
	.EQU	FlexRM_GCSR1_CH4OS2,		6
	.EQU	FlexRM_GCSR1_CH4OS1,		5
	.EQU	FlexRM_GCSR1_CH4OS0,		4
	.EQU	FlexRM_GCSR1_G4COS3,		3
	.EQU	FlexRM_GCSR1_G4COS2,		2
	.EQU	FlexRM_GCSR1_G4COS1,		1
	.EQU	FlexRM_GCSR1_G4COS0,		0
//  register-------------------------------------
	.EQU	FlexRM_GCSR2,	0x40002D94
//  0X4000 2D94  FlexRM_GCSR2   Bits-------------------------------------
	.EQU	FlexRM_GCSR2_CH11OS3,		31
	.EQU	FlexRM_GCSR2_CH11OS2,		30
	.EQU	FlexRM_GCSR2_CH11OS1,		29
	.EQU	FlexRM_GCSR2_CH11OS0,		28
	.EQU	FlexRM_GCSR2_G11COS3,		27
	.EQU	FlexRM_GCSR2_G11COS2,		26
	.EQU	FlexRM_GCSR2_G11COS1,		25
	.EQU	FlexRM_GCSR2_G11COS0,		24
	.EQU	FlexRM_GCSR2_CH10OS3,		23
	.EQU	FlexRM_GCSR2_CH10OS2,		22
	.EQU	FlexRM_GCSR2_CH10OS1,		21
	.EQU	FlexRM_GCSR2_CH10OS0,		20
	.EQU	FlexRM_GCSR2_G10COS3,		19
	.EQU	FlexRM_GCSR2_G10COS2,		18
	.EQU	FlexRM_GCSR2_G10COS1,		17
	.EQU	FlexRM_GCSR2_G10COS0,		16
	.EQU	FlexRM_GCSR2_CH9OS3,		15
	.EQU	FlexRM_GCSR2_CH9OS2,		14
	.EQU	FlexRM_GCSR2_CH9OS1,		13
	.EQU	FlexRM_GCSR2_CH9OS0,		12
	.EQU	FlexRM_GCSR2_G9COS3,		11
	.EQU	FlexRM_GCSR2_G9COS2,		10
	.EQU	FlexRM_GCSR2_G9COS1,		9
	.EQU	FlexRM_GCSR2_G9COS0,		8
	.EQU	FlexRM_GCSR2_CH8OS3,		7
	.EQU	FlexRM_GCSR2_CH8OS2,		6
	.EQU	FlexRM_GCSR2_CH8OS1,		5
	.EQU	FlexRM_GCSR2_CH8OS0,		4
	.EQU	FlexRM_GCSR2_G8COS3,		3
	.EQU	FlexRM_GCSR2_G8COS2,		2
	.EQU	FlexRM_GCSR2_G8COS1,		1
	.EQU	FlexRM_GCSR2_G8COS0,		0
//  register-------------------------------------
	.EQU	ECFGL0_CTL,	0x40002A80
//  0X4000 2A80  ECFGL0_CTL   Bits-------------------------------------
	.EQU	ECFGL0_CTL_EN,		12
	.EQU	ECFGL0_CTL_FUNSEL3,		11
	.EQU	ECFGL0_CTL_FUNSEL2,		10
	.EQU	ECFGL0_CTL_FUNSEL1,		9
	.EQU	ECFGL0_CTL_FUNSEL0,		8
	.EQU	ECFGL0_CTL_MUX4SEL,		6
	.EQU	ECFGL0_CTL_MUX3SEL,		5
	.EQU	ECFGL0_CTL_MUX2SEL,		4
	.EQU	ECFGL0_CTL_MUX1SEL1,		3
	.EQU	ECFGL0_CTL_MUX1SEL0,		2
	.EQU	ECFGL0_CTL_MUX0SEL1,		1
	.EQU	ECFGL0_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL1_CTL,	0x40002A84
//  0X4000 2A84  ECFGL1_CTL   Bits-------------------------------------
	.EQU	ECFGL1_CTL_EN,		12
	.EQU	ECFGL1_CTL_FUNSEL3,		11
	.EQU	ECFGL1_CTL_FUNSEL2,		10
	.EQU	ECFGL1_CTL_FUNSEL1,		9
	.EQU	ECFGL1_CTL_FUNSEL0,		8
	.EQU	ECFGL1_CTL_MUX4SEL,		6
	.EQU	ECFGL1_CTL_MUX3SEL,		5
	.EQU	ECFGL1_CTL_MUX2SEL,		4
	.EQU	ECFGL1_CTL_MUX1SEL1,		3
	.EQU	ECFGL1_CTL_MUX1SEL0,		2
	.EQU	ECFGL1_CTL_MUX0SEL1,		1
	.EQU	ECFGL1_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL2_CTL,	0x40002A88
//  0X4000 2A88  ECFGL2_CTL   Bits-------------------------------------
	.EQU	ECFGL2_CTL_EN,		12
	.EQU	ECFGL2_CTL_FUNSEL3,		11
	.EQU	ECFGL2_CTL_FUNSEL2,		10
	.EQU	ECFGL2_CTL_FUNSEL1,		9
	.EQU	ECFGL2_CTL_FUNSEL0,		8
	.EQU	ECFGL2_CTL_MUX4SEL,		6
	.EQU	ECFGL2_CTL_MUX3SEL,		5
	.EQU	ECFGL2_CTL_MUX2SEL,		4
	.EQU	ECFGL2_CTL_MUX1SEL1,		3
	.EQU	ECFGL2_CTL_MUX1SEL0,		2
	.EQU	ECFGL2_CTL_MUX0SEL1,		1
	.EQU	ECFGL2_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL3_CTL,	0x40002A8C
//  0X4000 2A8C  ECFGL3_CTL   Bits-------------------------------------
	.EQU	ECFGL3_CTL_EN,		12
	.EQU	ECFGL3_CTL_FUNSEL3,		11
	.EQU	ECFGL3_CTL_FUNSEL2,		10
	.EQU	ECFGL3_CTL_FUNSEL1,		9
	.EQU	ECFGL3_CTL_FUNSEL0,		8
	.EQU	ECFGL3_CTL_MUX4SEL,		6
	.EQU	ECFGL3_CTL_MUX3SEL,		5
	.EQU	ECFGL3_CTL_MUX2SEL,		4
	.EQU	ECFGL3_CTL_MUX1SEL1,		3
	.EQU	ECFGL3_CTL_MUX1SEL0,		2
	.EQU	ECFGL3_CTL_MUX0SEL1,		1
	.EQU	ECFGL3_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL4_CTL,	0x40002A90
//  0X4000 2A90  ECFGL4_CTL   Bits-------------------------------------
	.EQU	ECFGL4_CTL_EN,		12
	.EQU	ECFGL4_CTL_FUNSEL3,		11
	.EQU	ECFGL4_CTL_FUNSEL2,		10
	.EQU	ECFGL4_CTL_FUNSEL1,		9
	.EQU	ECFGL4_CTL_FUNSEL0,		8
	.EQU	ECFGL4_CTL_MUX4SEL,		6
	.EQU	ECFGL4_CTL_MUX3SEL,		5
	.EQU	ECFGL4_CTL_MUX2SEL,		4
	.EQU	ECFGL4_CTL_MUX1SEL1,		3
	.EQU	ECFGL4_CTL_MUX1SEL0,		2
	.EQU	ECFGL4_CTL_MUX0SEL1,		1
	.EQU	ECFGL4_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL5_CTL,	0x40002A94
//  0X4000 2A94  ECFGL5_CTL   Bits-------------------------------------
	.EQU	ECFGL5_CTL_EN,		12
	.EQU	ECFGL5_CTL_FUNSEL3,		11
	.EQU	ECFGL5_CTL_FUNSEL2,		10
	.EQU	ECFGL5_CTL_FUNSEL1,		9
	.EQU	ECFGL5_CTL_FUNSEL0,		8
	.EQU	ECFGL5_CTL_MUX4SEL,		6
	.EQU	ECFGL5_CTL_MUX3SEL,		5
	.EQU	ECFGL5_CTL_MUX2SEL,		4
	.EQU	ECFGL5_CTL_MUX1SEL1,		3
	.EQU	ECFGL5_CTL_MUX1SEL0,		2
	.EQU	ECFGL5_CTL_MUX0SEL1,		1
	.EQU	ECFGL5_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL6_CTL,	0x40002A98
//  0X4000 2A98  ECFGL6_CTL   Bits-------------------------------------
	.EQU	ECFGL6_CTL_EN,		12
	.EQU	ECFGL6_CTL_FUNSEL3,		11
	.EQU	ECFGL6_CTL_FUNSEL2,		10
	.EQU	ECFGL6_CTL_FUNSEL1,		9
	.EQU	ECFGL6_CTL_FUNSEL0,		8
	.EQU	ECFGL6_CTL_MUX4SEL,		6
	.EQU	ECFGL6_CTL_MUX3SEL,		5
	.EQU	ECFGL6_CTL_MUX2SEL,		4
	.EQU	ECFGL6_CTL_MUX1SEL1,		3
	.EQU	ECFGL6_CTL_MUX1SEL0,		2
	.EQU	ECFGL6_CTL_MUX0SEL1,		1
	.EQU	ECFGL6_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL7_CTL,	0x40002A9C
//  0X4000 2A9C  ECFGL7_CTL   Bits-------------------------------------
	.EQU	ECFGL7_CTL_EN,		12
	.EQU	ECFGL7_CTL_FUNSEL3,		11
	.EQU	ECFGL7_CTL_FUNSEL2,		10
	.EQU	ECFGL7_CTL_FUNSEL1,		9
	.EQU	ECFGL7_CTL_FUNSEL0,		8
	.EQU	ECFGL7_CTL_MUX4SEL,		6
	.EQU	ECFGL7_CTL_MUX3SEL,		5
	.EQU	ECFGL7_CTL_MUX2SEL,		4
	.EQU	ECFGL7_CTL_MUX1SEL1,		3
	.EQU	ECFGL7_CTL_MUX1SEL0,		2
	.EQU	ECFGL7_CTL_MUX0SEL1,		1
	.EQU	ECFGL7_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL8_CTL,	0x40002AA0
//  0X4000 2AA0  ECFGL8_CTL   Bits-------------------------------------
	.EQU	ECFGL8_CTL_EN,		12
	.EQU	ECFGL8_CTL_FUNSEL3,		11
	.EQU	ECFGL8_CTL_FUNSEL2,		10
	.EQU	ECFGL8_CTL_FUNSEL1,		9
	.EQU	ECFGL8_CTL_FUNSEL0,		8
	.EQU	ECFGL8_CTL_MUX4SEL,		6
	.EQU	ECFGL8_CTL_MUX3SEL,		5
	.EQU	ECFGL8_CTL_MUX2SEL,		4
	.EQU	ECFGL8_CTL_MUX1SEL1,		3
	.EQU	ECFGL8_CTL_MUX1SEL0,		2
	.EQU	ECFGL8_CTL_MUX0SEL1,		1
	.EQU	ECFGL8_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL9_CTL,	0x40002AA4
//  0X4000 2AA4  ECFGL9_CTL   Bits-------------------------------------
	.EQU	ECFGL9_CTL_EN,		12
	.EQU	ECFGL9_CTL_FUNSEL3,		11
	.EQU	ECFGL9_CTL_FUNSEL2,		10
	.EQU	ECFGL9_CTL_FUNSEL1,		9
	.EQU	ECFGL9_CTL_FUNSEL0,		8
	.EQU	ECFGL9_CTL_MUX4SEL,		6
	.EQU	ECFGL9_CTL_MUX3SEL,		5
	.EQU	ECFGL9_CTL_MUX2SEL,		4
	.EQU	ECFGL9_CTL_MUX1SEL1,		3
	.EQU	ECFGL9_CTL_MUX1SEL0,		2
	.EQU	ECFGL9_CTL_MUX0SEL1,		1
	.EQU	ECFGL9_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL10_CTL,	0x40002AA8
//  0X4000 2AA8  ECFGL10_CTL   Bits-------------------------------------
	.EQU	ECFGL10_CTL_EN,		12
	.EQU	ECFGL10_CTL_FUNSEL3,		11
	.EQU	ECFGL10_CTL_FUNSEL2,		10
	.EQU	ECFGL10_CTL_FUNSEL1,		9
	.EQU	ECFGL10_CTL_FUNSEL0,		8
	.EQU	ECFGL10_CTL_MUX4SEL,		6
	.EQU	ECFGL10_CTL_MUX3SEL,		5
	.EQU	ECFGL10_CTL_MUX2SEL,		4
	.EQU	ECFGL10_CTL_MUX1SEL1,		3
	.EQU	ECFGL10_CTL_MUX1SEL0,		2
	.EQU	ECFGL10_CTL_MUX0SEL1,		1
	.EQU	ECFGL10_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL11_CTL,	0x40002AAC
//  0X4000 2AAC  ECFGL11_CTL   Bits-------------------------------------
	.EQU	ECFGL11_CTL_EN,		12
	.EQU	ECFGL11_CTL_FUNSEL3,		11
	.EQU	ECFGL11_CTL_FUNSEL2,		10
	.EQU	ECFGL11_CTL_FUNSEL1,		9
	.EQU	ECFGL11_CTL_FUNSEL0,		8
	.EQU	ECFGL11_CTL_MUX4SEL,		6
	.EQU	ECFGL11_CTL_MUX3SEL,		5
	.EQU	ECFGL11_CTL_MUX2SEL,		4
	.EQU	ECFGL11_CTL_MUX1SEL1,		3
	.EQU	ECFGL11_CTL_MUX1SEL0,		2
	.EQU	ECFGL11_CTL_MUX0SEL1,		1
	.EQU	ECFGL11_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL12_CTL,	0x40002AB0
//  0X4000 2AB0  ECFGL12_CTL   Bits-------------------------------------
	.EQU	ECFGL12_CTL_EN,		12
	.EQU	ECFGL12_CTL_FUNSEL3,		11
	.EQU	ECFGL12_CTL_FUNSEL2,		10
	.EQU	ECFGL12_CTL_FUNSEL1,		9
	.EQU	ECFGL12_CTL_FUNSEL0,		8
	.EQU	ECFGL12_CTL_MUX4SEL,		6
	.EQU	ECFGL12_CTL_MUX3SEL,		5
	.EQU	ECFGL12_CTL_MUX2SEL,		4
	.EQU	ECFGL12_CTL_MUX1SEL1,		3
	.EQU	ECFGL12_CTL_MUX1SEL0,		2
	.EQU	ECFGL12_CTL_MUX0SEL1,		1
	.EQU	ECFGL12_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL13_CTL,	0x40002AB4
//  0X4000 2AB4  ECFGL13_CTL   Bits-------------------------------------
	.EQU	ECFGL13_CTL_EN,		12
	.EQU	ECFGL13_CTL_FUNSEL3,		11
	.EQU	ECFGL13_CTL_FUNSEL2,		10
	.EQU	ECFGL13_CTL_FUNSEL1,		9
	.EQU	ECFGL13_CTL_FUNSEL0,		8
	.EQU	ECFGL13_CTL_MUX4SEL,		6
	.EQU	ECFGL13_CTL_MUX3SEL,		5
	.EQU	ECFGL13_CTL_MUX2SEL,		4
	.EQU	ECFGL13_CTL_MUX1SEL1,		3
	.EQU	ECFGL13_CTL_MUX1SEL0,		2
	.EQU	ECFGL13_CTL_MUX0SEL1,		1
	.EQU	ECFGL13_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL14_CTL,	0x40002AB8
//  0X4000 2AB8  ECFGL14_CTL   Bits-------------------------------------
	.EQU	ECFGL14_CTL_EN,		12
	.EQU	ECFGL14_CTL_FUNSEL3,		11
	.EQU	ECFGL14_CTL_FUNSEL2,		10
	.EQU	ECFGL14_CTL_FUNSEL1,		9
	.EQU	ECFGL14_CTL_FUNSEL0,		8
	.EQU	ECFGL14_CTL_MUX4SEL,		6
	.EQU	ECFGL14_CTL_MUX3SEL,		5
	.EQU	ECFGL14_CTL_MUX2SEL,		4
	.EQU	ECFGL14_CTL_MUX1SEL1,		3
	.EQU	ECFGL14_CTL_MUX1SEL0,		2
	.EQU	ECFGL14_CTL_MUX0SEL1,		1
	.EQU	ECFGL14_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL15_CTL,	0x40002ABC
//  0X4000 2ABC  ECFGL15_CTL   Bits-------------------------------------
	.EQU	ECFGL15_CTL_EN,		12
	.EQU	ECFGL15_CTL_FUNSEL3,		11
	.EQU	ECFGL15_CTL_FUNSEL2,		10
	.EQU	ECFGL15_CTL_FUNSEL1,		9
	.EQU	ECFGL15_CTL_FUNSEL0,		8
	.EQU	ECFGL15_CTL_MUX4SEL,		6
	.EQU	ECFGL15_CTL_MUX3SEL,		5
	.EQU	ECFGL15_CTL_MUX2SEL,		4
	.EQU	ECFGL15_CTL_MUX1SEL1,		3
	.EQU	ECFGL15_CTL_MUX1SEL0,		2
	.EQU	ECFGL15_CTL_MUX0SEL1,		1
	.EQU	ECFGL15_CTL_MUX0SEL0,		0
//  register-------------------------------------
	.EQU	ECFGL_SOFTSEL,	0x40002AC0
//  0X4000 2AC0  ECFGL_SOFTSEL   Bits-------------------------------------
	.EQU	ECFGL_SOFTSEL_ECFGL15MUX2SOFTSEL,		15
	.EQU	ECFGL_SOFTSEL_ECFGL14MUX2SOFTSEL,		14
	.EQU	ECFGL_SOFTSEL_ECFGL13MUX2SOFTSEL,		13
	.EQU	ECFGL_SOFTSEL_ECFGL12MUX2SOFTSEL,		12
	.EQU	ECFGL_SOFTSEL_ECFGL11MUX2SOFTSEL,		11
	.EQU	ECFGL_SOFTSEL_ECFGL10MUX2SOFTSEL,		10
	.EQU	ECFGL_SOFTSEL_ECFGL9MUX2SOFTSEL,		9
	.EQU	ECFGL_SOFTSEL_ECFGL8MUX2SOFTSEL,		8
	.EQU	ECFGL_SOFTSEL_ECFGL7MUX2SOFTSEL,		7
	.EQU	ECFGL_SOFTSEL_ECFGL6MUX2SOFTSEL,		6
	.EQU	ECFGL_SOFTSEL_ECFGL5MUX2SOFTSEL,		5
	.EQU	ECFGL_SOFTSEL_ECFGL4MUX2SOFTSEL,		4
	.EQU	ECFGL_SOFTSEL_ECFGL3MUX2SOFTSEL,		3
	.EQU	ECFGL_SOFTSEL_ECFGL2MUX2SOFTSEL,		2
	.EQU	ECFGL_SOFTSEL_ECFGL1MUX2SOFTSEL,		1
	.EQU	ECFGL_SOFTSEL_ECFGL0MUX2SOFTSEL,		0
//  register-------------------------------------
	.EQU	ECFGL_FCLK,	0x40002AC4
//  0X4000 2AC4  ECFGL_FCLK   Bits-------------------------------------
	.EQU	ECFGL_FCLK_FCLKDIV2,		6
	.EQU	ECFGL_FCLK_FCLKDIV1,		5
	.EQU	ECFGL_FCLK_FCLKDIV0,		4
	.EQU	ECFGL_FCLK_FCLKSEL2,		2
	.EQU	ECFGL_FCLK_FCLKSEL1,		1
	.EQU	ECFGL_FCLK_FCLKSEL0,		0
//  register-------------------------------------
	.EQU	ECFGL_IC,		0x40002AC8
//  0X4000 2AC8  ECFGL_IC   Bits-------------------------------------
	.EQU	ECFGL_IC_ECFGLIC15,		15
	.EQU	ECFGL_IC_ECFGLIC14,		14
	.EQU	ECFGL_IC_ECFGLIC13,		13
	.EQU	ECFGL_IC_ECFGLIC12,		12
	.EQU	ECFGL_IC_ECFGLIC11,		11
	.EQU	ECFGL_IC_ECFGLIC10,		10
	.EQU	ECFGL_IC_ECFGLIC9,		9
	.EQU	ECFGL_IC_ECFGLIC8,		8
	.EQU	ECFGL_IC_ECFGLIC7,		7
	.EQU	ECFGL_IC_ECFGLIC6,		6
	.EQU	ECFGL_IC_ECFGLIC5,		5
	.EQU	ECFGL_IC_ECFGLIC4,		4
	.EQU	ECFGL_IC_ECFGLIC3,		3
	.EQU	ECFGL_IC_ECFGLIC2,		2
	.EQU	ECFGL_IC_ECFGLIC1,		1
	.EQU	ECFGL_IC_ECFGLIC0,		0
//  register-------------------------------------
	.EQU	ECFGL_IF,		0x40002ACC
//  0X4000 2ACC  ECFGL_IF   Bits-------------------------------------
	.EQU	ECFGL_IF_ECFGLIF15,		15
	.EQU	ECFGL_IF_ECFGLIF14,		14
	.EQU	ECFGL_IF_ECFGLIF13,		13
	.EQU	ECFGL_IF_ECFGLIF12,		12
	.EQU	ECFGL_IF_ECFGLIF11,		11
	.EQU	ECFGL_IF_ECFGLIF10,		10
	.EQU	ECFGL_IF_ECFGLIF9,		9
	.EQU	ECFGL_IF_ECFGLIF8,		8
	.EQU	ECFGL_IF_ECFGLIF7,		7
	.EQU	ECFGL_IF_ECFGLIF6,		6
	.EQU	ECFGL_IF_ECFGLIF5,		5
	.EQU	ECFGL_IF_ECFGLIF4,		4
	.EQU	ECFGL_IF_ECFGLIF3,		3
	.EQU	ECFGL_IF_ECFGLIF2,		2
	.EQU	ECFGL_IF_ECFGLIF1,		1
	.EQU	ECFGL_IF_ECFGLIF0,		0
//  register-------------------------------------
	.EQU	ECFGL_RFCTL,	0x40002AD0
//  0X4000 2AD0  ECFGL_RFCTL   Bits-------------------------------------
	.EQU	ECFGL_RFCTL_ECFGLR15,		15
	.EQU	ECFGL_RFCTL_ECFGLR14,		14
	.EQU	ECFGL_RFCTL_ECFGLR13,		13
	.EQU	ECFGL_RFCTL_ECFGLR12,		12
	.EQU	ECFGL_RFCTL_ECFGLR11,		11
	.EQU	ECFGL_RFCTL_ECFGLR10,		10
	.EQU	ECFGL_RFCTL_ECFGLR9,		9
	.EQU	ECFGL_RFCTL_ECFGLR8,		8
	.EQU	ECFGL_RFCTL_ECFGLR7,		7
	.EQU	ECFGL_RFCTL_ECFGLR6,		6
	.EQU	ECFGL_RFCTL_ECFGLR5,		5
	.EQU	ECFGL_RFCTL_ECFGLR4,		4
	.EQU	ECFGL_RFCTL_ECFGLR3,		3
	.EQU	ECFGL_RFCTL_ECFGLR2,		2
	.EQU	ECFGL_RFCTL_ECFGLR1,		1
	.EQU	ECFGL_RFCTL_ECFGLR0,		0
//  register-------------------------------------
	.EQU	ECFGL_FFCTL,	0x40002AD4
//  0X4000 2AD4  ECFGL_FFCTL   Bits-------------------------------------
	.EQU	ECFGL_FFCTL_ECFGLF15,		15
	.EQU	ECFGL_FFCTL_ECFGLF14,		14
	.EQU	ECFGL_FFCTL_ECFGLF13,		13
	.EQU	ECFGL_FFCTL_ECFGLF12,		12
	.EQU	ECFGL_FFCTL_ECFGLF11,		11
	.EQU	ECFGL_FFCTL_ECFGLF10,		10
	.EQU	ECFGL_FFCTL_ECFGLF9,		9
	.EQU	ECFGL_FFCTL_ECFGLF8,		8
	.EQU	ECFGL_FFCTL_ECFGLF7,		7
	.EQU	ECFGL_FFCTL_ECFGLF6,		6
	.EQU	ECFGL_FFCTL_ECFGLF5,		5
	.EQU	ECFGL_FFCTL_ECFGLF4,		4
	.EQU	ECFGL_FFCTL_ECFGLF3,		3
	.EQU	ECFGL_FFCTL_ECFGLF2,		2
	.EQU	ECFGL_FFCTL_ECFGLF1,		1
	.EQU	ECFGL_FFCTL_ECFGLF0,		0
//  register-------------------------------------
	.EQU	ECFGL_ADC,		0x40002AD8
//  0X4000 2AD8  ECFGL_ADC   Bits-------------------------------------
	.EQU	ECFGL_ADC_ADCTRIEN,		4
	.EQU	ECFGL_ADC_ADCTRISEL3,		3
	.EQU	ECFGL_ADC_ADCTRISEL2,		2
	.EQU	ECFGL_ADC_ADCTRISEL1,		1
	.EQU	ECFGL_ADC_ADCTRISEL0,		0
//  register-------------------------------------
	.EQU	ECFGL_OUT,		0x40002ADC
//  0X4000 2ADC  ECFGL_OUT   Bits-------------------------------------
	.EQU	ECFGL_OUT_ECFGL15OUT,		15
	.EQU	ECFGL_OUT_ECFGL14OUT,		14
	.EQU	ECFGL_OUT_ECFGL13OUT,		13
	.EQU	ECFGL_OUT_ECFGL12OUT,		12
	.EQU	ECFGL_OUT_ECFGL11OUT,		11
	.EQU	ECFGL_OUT_ECFGL10OUT,		10
	.EQU	ECFGL_OUT_ECFGL9OUT,		9
	.EQU	ECFGL_OUT_ECFGL8OUT,		8
	.EQU	ECFGL_OUT_ECFGL7OUT,		7
	.EQU	ECFGL_OUT_ECFGL6OUT,		6
	.EQU	ECFGL_OUT_ECFGL5OUT,		5
	.EQU	ECFGL_OUT_ECFGL4OUT,		4
	.EQU	ECFGL_OUT_ECFGL3OUT,		3
	.EQU	ECFGL_OUT_ECFGL2OUT,		2
	.EQU	ECFGL_OUT_ECFGL1OUT,		1
	.EQU	ECFGL_OUT_ECFGL0OUT,		0
//  register-------------------------------------
	.EQU	INT_CTL0,		0x40200000
//  0x4020 0000  INT_CTL0   Bits-------------------------------------
	.EQU	INT_CTL0_INTACT6,		30
	.EQU	INT_CTL0_INTACT5,		29
	.EQU	INT_CTL0_INTACT4,		28
	.EQU	INT_CTL0_INTACT3,		27
	.EQU	INT_CTL0_INTACT2,		26
	.EQU	INT_CTL0_INTACT1,		25
	.EQU	INT_CTL0_INTACT0,		24
	.EQU	INT_CTL0_INTPEND6,		22
	.EQU	INT_CTL0_INTPEND5,		21
	.EQU	INT_CTL0_INTPEND4,		20
	.EQU	INT_CTL0_INTPEND3,		19
	.EQU	INT_CTL0_INTPEND2,		18
	.EQU	INT_CTL0_INTPEND1,		17
	.EQU	INT_CTL0_INTPEND0,		16
	.EQU	INT_CTL0_PRIBASE3,		15
	.EQU	INT_CTL0_PRIBASE2,		14
	.EQU	INT_CTL0_PRIBASE1,		13
	.EQU	INT_CTL0_PRIBASE0,		12
	.EQU	INT_CTL0_DSALIGN,		7
	.EQU	INT_CTL0_FAULTMASK,		6
	.EQU	INT_CTL0_INTPREEMPT,		5
	.EQU	INT_CTL0_INTPENDING,		4
	.EQU	INT_CTL0_PRIGROUP1,		2
	.EQU	INT_CTL0_PRIGROUP0,		1
	.EQU	INT_CTL0_AIE,		0
//  register-------------------------------------
	.EQU	INT_EIE0,		0x40200004
//  0x4020 0004  INT_EIE0   Bits-------------------------------------
	.EQU	INT_EIE0_SYSTICKIE,		15
	.EQU	INT_EIE0_SOFTSVIE,		14
	.EQU	INT_EIE0_SVCIE,		11
	.EQU	INT_EIE0_ARIFAULTIE,		6
	.EQU	INT_EIE0_STACKIE,		5
	.EQU	INT_EIE0_ECCIE,		4
	.EQU	INT_EIE0_HADRFAULTIE,		3
//  register-------------------------------------
	.EQU	INT_EIE1,		0x4020000C
//  0x4020 000C  INT_EIE1   Bits-------------------------------------
	.EQU	INT_EIE1_SPI1IE,		31
	.EQU	INT_EIE1_SPI0IE,		30
	.EQU	INT_EIE1_USART1IE,		29
	.EQU	INT_EIE1_USART0IE,		28
	.EQU	INT_EIE1_CMPIE,		27
	.EQU	INT_EIE1_DMA0IE,		26
	.EQU	INT_EIE1_T0IE,		25
	.EQU	INT_EIE1_T11IE,		24
	.EQU	INT_EIE1_CFGLIE,		23
	.EQU	INT_EIE1_ADC1IE,		22
	.EQU	INT_EIE1_ADC0IE,		21
	.EQU	INT_EIE1_EXICIE,		20
	.EQU	INT_EIE1_FDC2IE,		19
	.EQU	INT_EIE1_RNGIE,		18
	.EQU	INT_EIE1_T14IE,		17
	.EQU	INT_EIE1_CAN4IE,		16
	.EQU	INT_EIE1_ECFGLIE,		15
	.EQU	INT_EIE1_QEI1IE,		14
	.EQU	INT_EIE1_QEI0IE,		13
	.EQU	INT_EIE1_T6IE,		12
	.EQU	INT_EIE1_T5IE,		11
	.EQU	INT_EIE1_T3IE,		10
	.EQU	INT_EIE1_T1IE,		9
	.EQU	INT_EIE1_EINT15TO10IE,		8
	.EQU	INT_EIE1_EINT9TO5IE,		7
	.EQU	INT_EIE1_EINT4IE,		6
	.EQU	INT_EIE1_EINT3IE,		5
	.EQU	INT_EIE1_EINT2IE,		4
	.EQU	INT_EIE1_EINT1IE,		3
	.EQU	INT_EIE1_EINT0IE,		2
	.EQU	INT_EIE1_EINT16IE,		1
	.EQU	INT_EIE1_WWDTIE,		0
//  register-------------------------------------
	.EQU	INT_EIE2,		0x40200014
//  0x4020 0014  INT_EIE2   Bits-------------------------------------
	.EQU	INT_EIE2_USART7IE,		31
	.EQU	INT_EIE2_HRCAP2IE,		30
	.EQU	INT_EIE2_USART5IE,		29
	.EQU	INT_EIE2_I2C3IE,		28
	.EQU	INT_EIE2_T21IE,		27
	.EQU	INT_EIE2_HRCAP1IE,		26
	.EQU	INT_EIE2_WKPIE,		25
	.EQU	INT_EIE2_HRCAP0IE,		24
	.EQU	INT_EIE2_T19IE,		23
	.EQU	INT_EIE2_T18IE,		22
	.EQU	INT_EIE2_ADC2IE,		21
	.EQU	INT_EIE2_SPI3IE,		20
	.EQU	INT_EIE2_SPI2IE,		19
	.EQU	INT_EIE2_USART4IE,		18
	.EQU	INT_EIE2_T16IE,		17
	.EQU	INT_EIE2_USART2IE,		16
	.EQU	INT_EIE2_T13IE,		15
	.EQU	INT_EIE2_T4IE,		14
	.EQU	INT_EIE2_T2IE,		13
	.EQU	INT_EIE2_T12IE,		12
	.EQU	INT_EIE2_I2C2IE,		11
	.EQU	INT_EIE2_I2C1IE,		10
	.EQU	INT_EIE2_I2C0IE,		9
	.EQU	INT_EIE2_OSCIE,		8
	.EQU	INT_EIE2_ECCIE,		7
	.EQU	INT_EIE2_EINT31TO20IE,		6
	.EQU	INT_EIE2_FDC1IE,		5
	.EQU	INT_EIE2_FDC0IE,		4
	.EQU	INT_EIE2_CANFD7IE,		3
	.EQU	INT_EIE2_CANFD6IE,		2
	.EQU	INT_EIE2_EINT19TO17IE,		1
	.EQU	INT_EIE2_DMA1IE,		0
//  register-------------------------------------
	.EQU	INT_EIF0,		0x4020001C
//  0x4020 001C  INT_EIF0   Bits-------------------------------------
	.EQU	INT_EIF0_SYSTICKIF,		15
	.EQU	INT_EIF0_SOFTSVIF,		14
	.EQU	INT_EIF0_SVCIF,		11
	.EQU	INT_EIF0_ARIFAULTIF,		6
	.EQU	INT_EIF0_STACKIF,		5
	.EQU	INT_EIF0_ECCIF,		4
	.EQU	INT_EIF0_HARDFAULTIF,		3
	.EQU	INT_EIF0_NMIIF,		2
//  register-------------------------------------
	.EQU	INT_EIF1,		0x40200024
//  0x4020 0024  INT_EIF1   Bits-------------------------------------
	.EQU	INT_EIF1_SPI1IF,		31
	.EQU	INT_EIF1_SPI0IF,		30
	.EQU	INT_EIF1_USART1IF,		29
	.EQU	INT_EIF1_USART0IF,		28
	.EQU	INT_EIF1_CMPIF,		27
	.EQU	INT_EIF1_DMA0IF,		26
	.EQU	INT_EIF1_T0IF,		25
	.EQU	INT_EIF1_T11IF,		24
	.EQU	INT_EIF1_CFGLIF,		23
	.EQU	INT_EIF1_ADC1IF,		22
	.EQU	INT_EIF1_ADC0IF,		21
	.EQU	INT_EIF1_EXICIF,		20
	.EQU	INT_EIF1_FDC2IF,		19
	.EQU	INT_EIF1_RNGIF,		18
	.EQU	INT_EIF1_T14IF,		17
	.EQU	INT_EIF1_CAN4IF,		16
	.EQU	INT_EIF1_ECFGLIF,		15
	.EQU	INT_EIF1_QEI1IF,		14
	.EQU	INT_EIF1_QEI0IF,		13
	.EQU	INT_EIF1_T6IF,		12
	.EQU	INT_EIF1_T5IF,		11
	.EQU	INT_EIF1_T3IF,		10
	.EQU	INT_EIF1_T1IF,		9
	.EQU	INT_EIF1_EINT15TO10IF,		8
	.EQU	INT_EIF1_EINT9TO5IF,		7
	.EQU	INT_EIF1_EINT4IF,		6
	.EQU	INT_EIF1_EINT3IF,		5
	.EQU	INT_EIF1_EINT2IF,		4
	.EQU	INT_EIF1_EINT1IF,		3
	.EQU	INT_EIF1_EINT0IF,		2
	.EQU	INT_EIF1_EINT16IF,		1
	.EQU	INT_EIF1_WWDTIF,		0
//  register-------------------------------------
	.EQU	INT_EIF2,		0x4020002C
//  0x4020 002C  INT_EIF2   Bits-------------------------------------
	.EQU	INT_EIF2_USART7IF,		31
	.EQU	INT_EIF2_HRCAP2IF,		30
	.EQU	INT_EIF2_USART5IF,		29
	.EQU	INT_EIF2_I2C3IF,		28
	.EQU	INT_EIF2_T21IF,		27
	.EQU	INT_EIF2_HRCAP1IF,		26
	.EQU	INT_EIF2_WKPIF,		25
	.EQU	INT_EIF2_HRCAP0IF,		24
	.EQU	INT_EIF2_T19IF,		23
	.EQU	INT_EIF2_T18IF,		22
	.EQU	INT_EIF2_ADC2IF,		21
	.EQU	INT_EIF2_SPI3IF,		20
	.EQU	INT_EIF2_SPI2IF,		19
	.EQU	INT_EIF2_USART4IF,		18
	.EQU	INT_EIF2_T16IF,		17
	.EQU	INT_EIF2_USART2IF,		16
	.EQU	INT_EIF2_T13IF,		15
	.EQU	INT_EIF2_T4IF,		14
	.EQU	INT_EIF2_T2IF,		13
	.EQU	INT_EIF2_T12IF,		12
	.EQU	INT_EIF2_I2C2IF,		11
	.EQU	INT_EIF2_I2C1IF,		10
	.EQU	INT_EIF2_I2C0IF,		9
	.EQU	INT_EIF2_OSCIF,		8
	.EQU	INT_EIF2_ECCIF,		7
	.EQU	INT_EIF2_EINT31TO20IF,		6
	.EQU	INT_EIF2_FDC1IF,		5
	.EQU	INT_EIF2_FDC0IF,		4
	.EQU	INT_EIF2_CANFD7IF,		3
	.EQU	INT_EIF2_CANFD6IF,		2
	.EQU	INT_EIF2_EINT19TO17IF,		1
	.EQU	INT_EIF2_DMA1IF,		0
//  register-------------------------------------
	.EQU	INT_IP0,		0x40200034
//  0x4020 0034  INT_IP0   Bits-------------------------------------
	.EQU	INT_IP0_PRI7_7,		31
	.EQU	INT_IP0_PRI7_6,		30
	.EQU	INT_IP0_PRI7_5,		29
	.EQU	INT_IP0_PRI7_4,		28
	.EQU	INT_IP0_PRI7_3,		27
	.EQU	INT_IP0_PRI7_2,		26
	.EQU	INT_IP0_PRI7_1,		25
	.EQU	INT_IP0_PRI7_0,		24
	.EQU	INT_IP0_PRI6_7,		23
	.EQU	INT_IP0_PRI6_6,		22
	.EQU	INT_IP0_PRI6_5,		21
	.EQU	INT_IP0_PRI6_4,		20
	.EQU	INT_IP0_PRI6_3,		19
	.EQU	INT_IP0_PRI6_2,		18
	.EQU	INT_IP0_PRI6_1,		17
	.EQU	INT_IP0_PRI6_0,		16
	.EQU	INT_IP0_PRI5_7,		15
	.EQU	INT_IP0_PRI5_6,		14
	.EQU	INT_IP0_PRI5_5,		13
	.EQU	INT_IP0_PRI5_4,		12
	.EQU	INT_IP0_PRI5_3,		11
	.EQU	INT_IP0_PRI5_2,		10
	.EQU	INT_IP0_PRI5_1,		9
	.EQU	INT_IP0_PRI5_0,		8
	.EQU	INT_IP0_PRI4_7,		7
	.EQU	INT_IP0_PRI4_6,		6
	.EQU	INT_IP0_PRI4_5,		5
	.EQU	INT_IP0_PRI4_4,		4
	.EQU	INT_IP0_PRI4_3,		3
	.EQU	INT_IP0_PRI4_2,		2
	.EQU	INT_IP0_PRI4_1,		1
	.EQU	INT_IP0_PRI4_0,		0
//  register-------------------------------------
	.EQU	INT_IP1,		0x40200038
//  0x4020 0038  INT_IP1   Bits-------------------------------------
	.EQU	INT_IP1_PRI11_7,		31
	.EQU	INT_IP1_PRI11_6,		30
	.EQU	INT_IP1_PRI11_5,		29
	.EQU	INT_IP1_PRI11_4,		28
	.EQU	INT_IP1_PRI11_3,		27
	.EQU	INT_IP1_PRI11_2,		26
	.EQU	INT_IP1_PRI11_1,		25
	.EQU	INT_IP1_PRI11_0,		24
	.EQU	INT_IP1_PRI10_7,		23
	.EQU	INT_IP1_PRI10_6,		22
	.EQU	INT_IP1_PRI10_5,		21
	.EQU	INT_IP1_PRI10_4,		20
	.EQU	INT_IP1_PRI10_3,		19
	.EQU	INT_IP1_PRI10_2,		18
	.EQU	INT_IP1_PRI10_1,		17
	.EQU	INT_IP1_PRI10_0,		16
	.EQU	INT_IP1_PRI9_7,		15
	.EQU	INT_IP1_PRI9_6,		14
	.EQU	INT_IP1_PRI9_5,		13
	.EQU	INT_IP1_PRI9_4,		12
	.EQU	INT_IP1_PRI9_3,		11
	.EQU	INT_IP1_PRI9_2,		10
	.EQU	INT_IP1_PRI9_1,		9
	.EQU	INT_IP1_PRI9_0,		8
	.EQU	INT_IP1_PRI8_7,		7
	.EQU	INT_IP1_PRI8_6,		6
	.EQU	INT_IP1_PRI8_5,		5
	.EQU	INT_IP1_PRI8_4,		4
	.EQU	INT_IP1_PRI8_3,		3
	.EQU	INT_IP1_PRI8_2,		2
	.EQU	INT_IP1_PRI8_1,		1
	.EQU	INT_IP1_PRI8_0,		0
//  register-------------------------------------
	.EQU	INT_IP2,		0x4020003C
//  0x4020 003C  INT_IP2   Bits-------------------------------------
	.EQU	INT_IP2_PRI15_7,		31
	.EQU	INT_IP2_PRI15_6,		30
	.EQU	INT_IP2_PRI15_5,		29
	.EQU	INT_IP2_PRI15_4,		28
	.EQU	INT_IP2_PRI15_3,		27
	.EQU	INT_IP2_PRI15_2,		26
	.EQU	INT_IP2_PRI15_1,		25
	.EQU	INT_IP2_PRI15_0,		24
	.EQU	INT_IP2_PRI14_7,		23
	.EQU	INT_IP2_PRI14_6,		22
	.EQU	INT_IP2_PRI14_5,		21
	.EQU	INT_IP2_PRI14_4,		20
	.EQU	INT_IP2_PRI14_3,		19
	.EQU	INT_IP2_PRI14_2,		18
	.EQU	INT_IP2_PRI14_1,		17
	.EQU	INT_IP2_PRI14_0,		16
	.EQU	INT_IP2_PRI13_7,		15
	.EQU	INT_IP2_PRI13_6,		14
	.EQU	INT_IP2_PRI13_5,		13
	.EQU	INT_IP2_PRI13_4,		12
	.EQU	INT_IP2_PRI13_3,		11
	.EQU	INT_IP2_PRI13_2,		10
	.EQU	INT_IP2_PRI13_1,		9
	.EQU	INT_IP2_PRI13_0,		8
	.EQU	INT_IP2_PRI12_7,		7
	.EQU	INT_IP2_PRI12_6,		6
	.EQU	INT_IP2_PRI12_5,		5
	.EQU	INT_IP2_PRI12_4,		4
	.EQU	INT_IP2_PRI12_3,		3
	.EQU	INT_IP2_PRI12_2,		2
	.EQU	INT_IP2_PRI12_1,		1
	.EQU	INT_IP2_PRI12_0,		0
//  register-------------------------------------
	.EQU	INT_IP3,		0x40200040
//  0x4020 0040  INT_IP3   Bits-------------------------------------
	.EQU	INT_IP3_PRI19_7,		31
	.EQU	INT_IP3_PRI19_6,		30
	.EQU	INT_IP3_PRI19_5,		29
	.EQU	INT_IP3_PRI19_4,		28
	.EQU	INT_IP3_PRI19_3,		27
	.EQU	INT_IP3_PRI19_2,		26
	.EQU	INT_IP3_PRI19_1,		25
	.EQU	INT_IP3_PRI19_0,		24
	.EQU	INT_IP3_PRI18_7,		23
	.EQU	INT_IP3_PRI18_6,		22
	.EQU	INT_IP3_PRI18_5,		21
	.EQU	INT_IP3_PRI18_4,		20
	.EQU	INT_IP3_PRI18_3,		19
	.EQU	INT_IP3_PRI18_2,		18
	.EQU	INT_IP3_PRI18_1,		17
	.EQU	INT_IP3_PRI18_0,		16
	.EQU	INT_IP3_PRI17_7,		15
	.EQU	INT_IP3_PRI17_6,		14
	.EQU	INT_IP3_PRI17_5,		13
	.EQU	INT_IP3_PRI17_4,		12
	.EQU	INT_IP3_PRI17_3,		11
	.EQU	INT_IP3_PRI17_2,		10
	.EQU	INT_IP3_PRI17_1,		9
	.EQU	INT_IP3_PRI17_0,		8
	.EQU	INT_IP3_PR16_7,		7
	.EQU	INT_IP3_PR16_6,		6
	.EQU	INT_IP3_PR16_5,		5
	.EQU	INT_IP3_PR16_4,		4
	.EQU	INT_IP3_PR16_3,		3
	.EQU	INT_IP3_PR16_2,		2
	.EQU	INT_IP3_PR16_1,		1
	.EQU	INT_IP3_PR16_0,		0
//  register-------------------------------------
	.EQU	INT_IP4,		0x40200044
//  0x4020 0044  INT_IP4   Bits-------------------------------------
	.EQU	INT_IP4_PRI23_7,		31
	.EQU	INT_IP4_PRI23_6,		30
	.EQU	INT_IP4_PRI23_5,		29
	.EQU	INT_IP4_PRI23_4,		28
	.EQU	INT_IP4_PRI23_3,		27
	.EQU	INT_IP4_PRI23_2,		26
	.EQU	INT_IP4_PRI23_1,		25
	.EQU	INT_IP4_PRI23_0,		24
	.EQU	INT_IP4_PRI22_7,		23
	.EQU	INT_IP4_PRI22_6,		22
	.EQU	INT_IP4_PRI22_5,		21
	.EQU	INT_IP4_PRI22_4,		20
	.EQU	INT_IP4_PRI22_3,		19
	.EQU	INT_IP4_PRI22_2,		18
	.EQU	INT_IP4_PRI22_1,		17
	.EQU	INT_IP4_PRI22_0,		16
	.EQU	INT_IP4_PRI21_7,		15
	.EQU	INT_IP4_PRI21_6,		14
	.EQU	INT_IP4_PRI21_5,		13
	.EQU	INT_IP4_PRI21_4,		12
	.EQU	INT_IP4_PRI21_3,		11
	.EQU	INT_IP4_PRI21_2,		10
	.EQU	INT_IP4_PRI21_1,		9
	.EQU	INT_IP4_PRI21_0,		8
	.EQU	INT_IP4_PRI20_7,		7
	.EQU	INT_IP4_PRI20_6,		6
	.EQU	INT_IP4_PRI20_5,		5
	.EQU	INT_IP4_PRI20_4,		4
	.EQU	INT_IP4_PRI20_3,		3
	.EQU	INT_IP4_PRI20_2,		2
	.EQU	INT_IP4_PRI20_1,		1
	.EQU	INT_IP4_PRI20_0,		0
//  register-------------------------------------
	.EQU	INT_IP5,		0x40200048
//  0x4020 0048  INT_IP5   Bits-------------------------------------
	.EQU	INT_IP5_PRI27_7,		31
	.EQU	INT_IP5_PRI27_6,		30
	.EQU	INT_IP5_PRI27_5,		29
	.EQU	INT_IP5_PRI27_4,		28
	.EQU	INT_IP5_PRI27_3,		27
	.EQU	INT_IP5_PRI27_2,		26
	.EQU	INT_IP5_PRI27_1,		25
	.EQU	INT_IP5_PRI27_0,		24
	.EQU	INT_IP5_PRI26_7,		23
	.EQU	INT_IP5_PRI26_6,		22
	.EQU	INT_IP5_PRI26_5,		21
	.EQU	INT_IP5_PRI26_4,		20
	.EQU	INT_IP5_PRI26_3,		19
	.EQU	INT_IP5_PRI26_2,		18
	.EQU	INT_IP5_PRI26_1,		17
	.EQU	INT_IP5_PRI26_0,		16
	.EQU	INT_IP5_PRI25_7,		15
	.EQU	INT_IP5_PRI25_6,		14
	.EQU	INT_IP5_PRI25_5,		13
	.EQU	INT_IP5_PRI25_4,		12
	.EQU	INT_IP5_PRI25_3,		11
	.EQU	INT_IP5_PRI25_2,		10
	.EQU	INT_IP5_PRI25_1,		9
	.EQU	INT_IP5_PRI25_0,		8
	.EQU	INT_IP5_PRI24_7,		7
	.EQU	INT_IP5_PRI24_6,		6
	.EQU	INT_IP5_PRI24_5,		5
	.EQU	INT_IP5_PRI24_4,		4
	.EQU	INT_IP5_PRI24_3,		3
	.EQU	INT_IP5_PRI24_2,		2
	.EQU	INT_IP5_PRI24_1,		1
	.EQU	INT_IP5_PRI24_0,		0
//  register-------------------------------------
	.EQU	INT_IP6,		0x4020004C
//  0x4020 004C  INT_IP6   Bits-------------------------------------
	.EQU	INT_IP6_PRI31_7,		31
	.EQU	INT_IP6_PRI31_6,		30
	.EQU	INT_IP6_PRI31_5,		29
	.EQU	INT_IP6_PRI31_4,		28
	.EQU	INT_IP6_PRI31_3,		27
	.EQU	INT_IP6_PRI31_2,		26
	.EQU	INT_IP6_PRI31_1,		25
	.EQU	INT_IP6_PRI31_0,		24
	.EQU	INT_IP6_PRI30_7,		23
	.EQU	INT_IP6_PRI30_6,		22
	.EQU	INT_IP6_PRI30_5,		21
	.EQU	INT_IP6_PRI30_4,		20
	.EQU	INT_IP6_PRI30_3,		19
	.EQU	INT_IP6_PRI30_2,		18
	.EQU	INT_IP6_PRI30_1,		17
	.EQU	INT_IP6_PRI30_0,		16
	.EQU	INT_IP6_PRI29_7,		15
	.EQU	INT_IP6_PRI29_6,		14
	.EQU	INT_IP6_PRI29_5,		13
	.EQU	INT_IP6_PRI29_4,		12
	.EQU	INT_IP6_PRI29_3,		11
	.EQU	INT_IP6_PRI29_2,		10
	.EQU	INT_IP6_PRI29_1,		9
	.EQU	INT_IP6_PRI29_0,		8
	.EQU	INT_IP6_PRI28_7,		7
	.EQU	INT_IP6_PRI28_6,		6
	.EQU	INT_IP6_PRI28_5,		5
	.EQU	INT_IP6_PRI28_4,		4
	.EQU	INT_IP6_PRI28_3,		3
	.EQU	INT_IP6_PRI28_2,		2
	.EQU	INT_IP6_PRI28_1,		1
	.EQU	INT_IP6_PRI28_0,		0
//  register-------------------------------------
	.EQU	INT_IP7,		0x40200050
//  0x4020 0050  INT_IP7   Bits-------------------------------------
	.EQU	INT_IP7_PRI35_7,		31
	.EQU	INT_IP7_PRI35_6,		30
	.EQU	INT_IP7_PRI35_5,		29
	.EQU	INT_IP7_PRI35_4,		28
	.EQU	INT_IP7_PRI35_3,		27
	.EQU	INT_IP7_PRI35_2,		26
	.EQU	INT_IP7_PRI35_1,		25
	.EQU	INT_IP7_PRI35_0,		24
	.EQU	INT_IP7_PRI34_7,		23
	.EQU	INT_IP7_PRI34_6,		22
	.EQU	INT_IP7_PRI34_5,		21
	.EQU	INT_IP7_PRI34_4,		20
	.EQU	INT_IP7_PRI34_3,		19
	.EQU	INT_IP7_PRI34_2,		18
	.EQU	INT_IP7_PRI34_1,		17
	.EQU	INT_IP7_PRI34_0,		16
	.EQU	INT_IP7_PRI33_7,		15
	.EQU	INT_IP7_PRI33_6,		14
	.EQU	INT_IP7_PRI33_5,		13
	.EQU	INT_IP7_PRI33_4,		12
	.EQU	INT_IP7_PRI33_3,		11
	.EQU	INT_IP7_PRI33_2,		10
	.EQU	INT_IP7_PRI33_1,		9
	.EQU	INT_IP7_PRI33_0,		8
	.EQU	INT_IP7_PRI32_7,		7
	.EQU	INT_IP7_PRI32_6,		6
	.EQU	INT_IP7_PRI32_5,		5
	.EQU	INT_IP7_PRI32_4,		4
	.EQU	INT_IP7_PRI32_3,		3
	.EQU	INT_IP7_PRI32_2,		2
	.EQU	INT_IP7_PRI32_1,		1
	.EQU	INT_IP7_PRI32_0,		0
//  register-------------------------------------
	.EQU	INT_IP8,		0x40200054
//  0x4020 0054  INT_IP8   Bits-------------------------------------
	.EQU	INT_IP8_PRI39_7,		31
	.EQU	INT_IP8_PRI39_6,		30
	.EQU	INT_IP8_PRI39_5,		29
	.EQU	INT_IP8_PRI39_4,		28
	.EQU	INT_IP8_PRI39_3,		27
	.EQU	INT_IP8_PRI39_2,		26
	.EQU	INT_IP8_PRI39_1,		25
	.EQU	INT_IP8_PRI39_0,		24
	.EQU	INT_IP8_PRI38_7,		23
	.EQU	INT_IP8_PRI38_6,		22
	.EQU	INT_IP8_PRI38_5,		21
	.EQU	INT_IP8_PRI38_4,		20
	.EQU	INT_IP8_PRI38_3,		19
	.EQU	INT_IP8_PRI38_2,		18
	.EQU	INT_IP8_PRI38_1,		17
	.EQU	INT_IP8_PRI38_0,		16
	.EQU	INT_IP8_PRI37_7,		15
	.EQU	INT_IP8_PRI37_6,		14
	.EQU	INT_IP8_PRI37_5,		13
	.EQU	INT_IP8_PRI37_4,		12
	.EQU	INT_IP8_PRI37_3,		11
	.EQU	INT_IP8_PRI37_2,		10
	.EQU	INT_IP8_PRI37_1,		9
	.EQU	INT_IP8_PRI37_0,		8
	.EQU	INT_IP8_PRI36_7,		7
	.EQU	INT_IP8_PRI36_6,		6
	.EQU	INT_IP8_PRI36_5,		5
	.EQU	INT_IP8_PRI36_4,		4
	.EQU	INT_IP8_PRI36_3,		3
	.EQU	INT_IP8_PRI36_2,		2
	.EQU	INT_IP8_PRI36_1,		1
	.EQU	INT_IP8_PRI36_0,		0
//  register-------------------------------------
	.EQU	INT_IP9,		0x40200058
//  0x4020 0058  INT_IP9   Bits-------------------------------------
	.EQU	INT_IP9_PRI43_7,		31
	.EQU	INT_IP9_PRI43_6,		30
	.EQU	INT_IP9_PRI43_5,		29
	.EQU	INT_IP9_PRI43_4,		28
	.EQU	INT_IP9_PRI43_3,		27
	.EQU	INT_IP9_PRI43_2,		26
	.EQU	INT_IP9_PRI43_1,		25
	.EQU	INT_IP9_PRI43_0,		24
	.EQU	INT_IP9_PRI42_7,		23
	.EQU	INT_IP9_PRI42_6,		22
	.EQU	INT_IP9_PRI42_5,		21
	.EQU	INT_IP9_PRI42_4,		20
	.EQU	INT_IP9_PRI42_3,		19
	.EQU	INT_IP9_PRI42_2,		18
	.EQU	INT_IP9_PRI42_1,		17
	.EQU	INT_IP9_PRI42_0,		16
	.EQU	INT_IP9_PRI41_7,		15
	.EQU	INT_IP9_PRI41_6,		14
	.EQU	INT_IP9_PRI41_5,		13
	.EQU	INT_IP9_PRI41_4,		12
	.EQU	INT_IP9_PRI41_3,		11
	.EQU	INT_IP9_PRI41_2,		10
	.EQU	INT_IP9_PRI41_1,		9
	.EQU	INT_IP9_PRI41_0,		8
	.EQU	INT_IP9_PRI40_7,		7
	.EQU	INT_IP9_PRI40_6,		6
	.EQU	INT_IP9_PRI40_5,		5
	.EQU	INT_IP9_PRI40_4,		4
	.EQU	INT_IP9_PRI40_3,		3
	.EQU	INT_IP9_PRI40_2,		2
	.EQU	INT_IP9_PRI40_1,		1
	.EQU	INT_IP9_PRI40_0,		0
//  register-------------------------------------
	.EQU	INT_IP10,		0x4020005C
//  0x4020 005C  INT_IP10   Bits-------------------------------------
	.EQU	INT_IP10_PRI47_7,		31
	.EQU	INT_IP10_PRI47_6,		30
	.EQU	INT_IP10_PRI47_5,		29
	.EQU	INT_IP10_PRI47_4,		28
	.EQU	INT_IP10_PRI47_3,		27
	.EQU	INT_IP10_PRI47_2,		26
	.EQU	INT_IP10_PRI47_1,		25
	.EQU	INT_IP10_PRI47_0,		24
	.EQU	INT_IP10_PRI46_7,		23
	.EQU	INT_IP10_PRI46_6,		22
	.EQU	INT_IP10_PRI46_5,		21
	.EQU	INT_IP10_PRI46_4,		20
	.EQU	INT_IP10_PRI46_3,		19
	.EQU	INT_IP10_PRI46_2,		18
	.EQU	INT_IP10_PRI46_1,		17
	.EQU	INT_IP10_PRI46_0,		16
	.EQU	INT_IP10_PRI45_7,		15
	.EQU	INT_IP10_PRI45_6,		14
	.EQU	INT_IP10_PRI45_5,		13
	.EQU	INT_IP10_PRI45_4,		12
	.EQU	INT_IP10_PRI45_3,		11
	.EQU	INT_IP10_PRI45_2,		10
	.EQU	INT_IP10_PRI45_1,		9
	.EQU	INT_IP10_PRI45_0,		8
	.EQU	INT_IP10_PRI44_7,		7
	.EQU	INT_IP10_PRI44_6,		6
	.EQU	INT_IP10_PRI44_5,		5
	.EQU	INT_IP10_PRI44_4,		4
	.EQU	INT_IP10_PRI44_3,		3
	.EQU	INT_IP10_PRI44_2,		2
	.EQU	INT_IP10_PRI44_1,		1
	.EQU	INT_IP10_PRI44_0,		0
//  register-------------------------------------
	.EQU	INT_IP11,		0x40200060
//  0x4020 0060  INT_IP11   Bits-------------------------------------
	.EQU	INT_IP11_PRI51_7,		31
	.EQU	INT_IP11_PRI51_6,		30
	.EQU	INT_IP11_PRI51_5,		29
	.EQU	INT_IP11_PRI51_4,		28
	.EQU	INT_IP11_PRI51_3,		27
	.EQU	INT_IP11_PRI51_2,		26
	.EQU	INT_IP11_PRI51_1,		25
	.EQU	INT_IP11_PRI51_0,		24
	.EQU	INT_IP11_PRI50_7,		23
	.EQU	INT_IP11_PRI50_6,		22
	.EQU	INT_IP11_PRI50_5,		21
	.EQU	INT_IP11_PRI50_4,		20
	.EQU	INT_IP11_PRI50_3,		19
	.EQU	INT_IP11_PRI50_2,		18
	.EQU	INT_IP11_PRI50_1,		17
	.EQU	INT_IP11_PRI50_0,		16
	.EQU	INT_IP11_PRI49_7,		15
	.EQU	INT_IP11_PRI49_6,		14
	.EQU	INT_IP11_PRI49_5,		13
	.EQU	INT_IP11_PRI49_4,		12
	.EQU	INT_IP11_PRI49_3,		11
	.EQU	INT_IP11_PRI49_2,		10
	.EQU	INT_IP11_PRI49_1,		9
	.EQU	INT_IP11_PRI49_0,		8
	.EQU	INT_IP11_PRI48_7,		7
	.EQU	INT_IP11_PRI48_6,		6
	.EQU	INT_IP11_PRI48_5,		5
	.EQU	INT_IP11_PRI48_4,		4
	.EQU	INT_IP11_PRI48_3,		3
	.EQU	INT_IP11_PRI48_2,		2
	.EQU	INT_IP11_PRI48_1,		1
	.EQU	INT_IP11_PRI48_0,		0
//  register-------------------------------------
	.EQU	INT_IP12,		0x40200064
//  0x4020 0064  INT_IP12   Bits-------------------------------------
	.EQU	INT_IP12_PRI55_7,		31
	.EQU	INT_IP12_PRI55_6,		30
	.EQU	INT_IP12_PRI55_5,		29
	.EQU	INT_IP12_PRI55_4,		28
	.EQU	INT_IP12_PRI55_3,		27
	.EQU	INT_IP12_PRI55_2,		26
	.EQU	INT_IP12_PRI55_1,		25
	.EQU	INT_IP12_PRI55_0,		24
	.EQU	INT_IP12_PRI54_7,		23
	.EQU	INT_IP12_PRI54_6,		22
	.EQU	INT_IP12_PRI54_5,		21
	.EQU	INT_IP12_PRI54_4,		20
	.EQU	INT_IP12_PRI54_3,		19
	.EQU	INT_IP12_PRI54_2,		18
	.EQU	INT_IP12_PRI54_1,		17
	.EQU	INT_IP12_PRI54_0,		16
	.EQU	INT_IP12_PRI53_7,		15
	.EQU	INT_IP12_PRI53_6,		14
	.EQU	INT_IP12_PRI53_5,		13
	.EQU	INT_IP12_PRI53_4,		12
	.EQU	INT_IP12_PRI53_3,		11
	.EQU	INT_IP12_PRI53_2,		10
	.EQU	INT_IP12_PRI53_1,		9
	.EQU	INT_IP12_PRI53_0,		8
	.EQU	INT_IP12_PRI52_7,		7
	.EQU	INT_IP12_PRI52_6,		6
	.EQU	INT_IP12_PRI52_5,		5
	.EQU	INT_IP12_PRI52_4,		4
	.EQU	INT_IP12_PRI52_3,		3
	.EQU	INT_IP12_PRI52_2,		2
	.EQU	INT_IP12_PRI52_1,		1
	.EQU	INT_IP12_PRI52_0,		0
//  register-------------------------------------
	.EQU	INT_IP13,		0x40200068
//  0x4020 0068  INT_IP13   Bits-------------------------------------
	.EQU	INT_IP13_PRI59_7,		31
	.EQU	INT_IP13_PRI59_6,		30
	.EQU	INT_IP13_PRI59_5,		29
	.EQU	INT_IP13_PRI59_4,		28
	.EQU	INT_IP13_PRI59_3,		27
	.EQU	INT_IP13_PRI59_2,		26
	.EQU	INT_IP13_PRI59_1,		25
	.EQU	INT_IP13_PRI59_0,		24
	.EQU	INT_IP13_PRI58_7,		23
	.EQU	INT_IP13_PRI58_6,		22
	.EQU	INT_IP13_PRI58_5,		21
	.EQU	INT_IP13_PRI58_4,		20
	.EQU	INT_IP13_PRI58_3,		19
	.EQU	INT_IP13_PRI58_2,		18
	.EQU	INT_IP13_PRI58_1,		17
	.EQU	INT_IP13_PRI58_0,		16
	.EQU	INT_IP13_PRI57_7,		15
	.EQU	INT_IP13_PRI57_6,		14
	.EQU	INT_IP13_PRI57_5,		13
	.EQU	INT_IP13_PRI57_4,		12
	.EQU	INT_IP13_PRI57_3,		11
	.EQU	INT_IP13_PRI57_2,		10
	.EQU	INT_IP13_PRI57_1,		9
	.EQU	INT_IP13_PRI57_0,		8
	.EQU	INT_IP13_PRI56_7,		7
	.EQU	INT_IP13_PRI56_6,		6
	.EQU	INT_IP13_PRI56_5,		5
	.EQU	INT_IP13_PRI56_4,		4
	.EQU	INT_IP13_PRI56_3,		3
	.EQU	INT_IP13_PRI56_2,		2
	.EQU	INT_IP13_PRI56_1,		1
	.EQU	INT_IP13_PRI56_0,		0
//  register-------------------------------------
	.EQU	INT_IP14,		0x4020006C
//  0x4020 006C  INT_IP14   Bits-------------------------------------
	.EQU	INT_IP14_PRI63_7,		31
	.EQU	INT_IP14_PRI63_6,		30
	.EQU	INT_IP14_PRI63_5,		29
	.EQU	INT_IP14_PRI63_4,		28
	.EQU	INT_IP14_PRI63_3,		27
	.EQU	INT_IP14_PRI63_2,		26
	.EQU	INT_IP14_PRI63_1,		25
	.EQU	INT_IP14_PRI63_0,		24
	.EQU	INT_IP14_PRI62_7,		23
	.EQU	INT_IP14_PRI62_6,		22
	.EQU	INT_IP14_PRI62_5,		21
	.EQU	INT_IP14_PRI62_4,		20
	.EQU	INT_IP14_PRI62_3,		19
	.EQU	INT_IP14_PRI62_2,		18
	.EQU	INT_IP14_PRI62_1,		17
	.EQU	INT_IP14_PRI62_0,		16
	.EQU	INT_IP14_PRI61_7,		15
	.EQU	INT_IP14_PRI61_6,		14
	.EQU	INT_IP14_PRI61_5,		13
	.EQU	INT_IP14_PRI61_4,		12
	.EQU	INT_IP14_PRI61_3,		11
	.EQU	INT_IP14_PRI61_2,		10
	.EQU	INT_IP14_PRI61_1,		9
	.EQU	INT_IP14_PRI61_0,		8
	.EQU	INT_IP14_PRI60_7,		7
	.EQU	INT_IP14_PRI60_6,		6
	.EQU	INT_IP14_PRI60_5,		5
	.EQU	INT_IP14_PRI60_4,		4
	.EQU	INT_IP14_PRI60_3,		3
	.EQU	INT_IP14_PRI60_2,		2
	.EQU	INT_IP14_PRI60_1,		1
	.EQU	INT_IP14_PRI60_0,		0
//  register-------------------------------------
	.EQU	INT_IP15,		0x40200070
//  0x4020 0070  INT_IP15   Bits-------------------------------------
	.EQU	INT_IP15_PRI67_7,		31
	.EQU	INT_IP15_PRI67_6,		30
	.EQU	INT_IP15_PRI67_5,		29
	.EQU	INT_IP15_PRI67_4,		28
	.EQU	INT_IP15_PRI67_3,		27
	.EQU	INT_IP15_PRI67_2,		26
	.EQU	INT_IP15_PRI67_1,		25
	.EQU	INT_IP15_PRI67_0,		24
	.EQU	INT_IP15_PRI66_7,		23
	.EQU	INT_IP15_PRI66_6,		22
	.EQU	INT_IP15_PRI66_5,		21
	.EQU	INT_IP15_PRI66_4,		20
	.EQU	INT_IP15_PRI66_3,		19
	.EQU	INT_IP15_PRI66_2,		18
	.EQU	INT_IP15_PRI66_1,		17
	.EQU	INT_IP15_PRI66_0,		16
	.EQU	INT_IP15_PRI65_7,		15
	.EQU	INT_IP15_PRI65_6,		14
	.EQU	INT_IP15_PRI65_5,		13
	.EQU	INT_IP15_PRI65_4,		12
	.EQU	INT_IP15_PRI65_3,		11
	.EQU	INT_IP15_PRI65_2,		10
	.EQU	INT_IP15_PRI65_1,		9
	.EQU	INT_IP15_PRI65_0,		8
	.EQU	INT_IP15_PRI64_7,		7
	.EQU	INT_IP15_PRI64_6,		6
	.EQU	INT_IP15_PRI64_5,		5
	.EQU	INT_IP15_PRI64_4,		4
	.EQU	INT_IP15_PRI64_3,		3
	.EQU	INT_IP15_PRI64_2,		2
	.EQU	INT_IP15_PRI64_1,		1
	.EQU	INT_IP15_PRI64_0,		0
//  register-------------------------------------
	.EQU	INT_IP16,		0x40200074
//  0x4020 0074  INT_IP16   Bits-------------------------------------
	.EQU	INT_IP16_PRI71_7,		31
	.EQU	INT_IP16_PRI71_6,		30
	.EQU	INT_IP16_PRI71_5,		29
	.EQU	INT_IP16_PRI71_4,		28
	.EQU	INT_IP16_PRI71_3,		27
	.EQU	INT_IP16_PRI71_2,		26
	.EQU	INT_IP16_PRI71_1,		25
	.EQU	INT_IP16_PRI71_0,		24
	.EQU	INT_IP16_PRI70_7,		23
	.EQU	INT_IP16_PRI70_6,		22
	.EQU	INT_IP16_PRI70_5,		21
	.EQU	INT_IP16_PRI70_4,		20
	.EQU	INT_IP16_PRI70_3,		19
	.EQU	INT_IP16_PRI70_2,		18
	.EQU	INT_IP16_PRI70_1,		17
	.EQU	INT_IP16_PRI70_0,		16
	.EQU	INT_IP16_PRI69_7,		15
	.EQU	INT_IP16_PRI69_6,		14
	.EQU	INT_IP16_PRI69_5,		13
	.EQU	INT_IP16_PRI69_4,		12
	.EQU	INT_IP16_PRI69_3,		11
	.EQU	INT_IP16_PRI69_2,		10
	.EQU	INT_IP16_PRI69_1,		9
	.EQU	INT_IP16_PRI69_0,		8
	.EQU	INT_IP16_PRI68_7,		7
	.EQU	INT_IP16_PRI68_6,		6
	.EQU	INT_IP16_PRI68_5,		5
	.EQU	INT_IP16_PRI68_4,		4
	.EQU	INT_IP16_PRI68_3,		3
	.EQU	INT_IP16_PRI68_2,		2
	.EQU	INT_IP16_PRI68_1,		1
	.EQU	INT_IP16_PRI68_0,		0
//  register-------------------------------------
	.EQU	INT_IP17,		0x40200078
//  0x4020 0078  INT_IP17   Bits-------------------------------------
	.EQU	INT_IP17_PRI75_7,		31
	.EQU	INT_IP17_PRI75_6,		30
	.EQU	INT_IP17_PRI75_5,		29
	.EQU	INT_IP17_PRI75_4,		28
	.EQU	INT_IP17_PRI75_3,		27
	.EQU	INT_IP17_PRI75_2,		26
	.EQU	INT_IP17_PRI75_1,		25
	.EQU	INT_IP17_PRI75_0,		24
	.EQU	INT_IP17_PRI74_7,		23
	.EQU	INT_IP17_PRI74_6,		22
	.EQU	INT_IP17_PRI74_5,		21
	.EQU	INT_IP17_PRI74_4,		20
	.EQU	INT_IP17_PRI74_3,		19
	.EQU	INT_IP17_PRI74_2,		18
	.EQU	INT_IP17_PRI74_1,		17
	.EQU	INT_IP17_PRI74_0,		16
	.EQU	INT_IP17_PRI73_7,		15
	.EQU	INT_IP17_PRI73_6,		14
	.EQU	INT_IP17_PRI73_5,		13
	.EQU	INT_IP17_PRI73_4,		12
	.EQU	INT_IP17_PRI73_3,		11
	.EQU	INT_IP17_PRI73_2,		10
	.EQU	INT_IP17_PRI73_1,		9
	.EQU	INT_IP17_PRI73_0,		8
	.EQU	INT_IP17_PRI72_7,		7
	.EQU	INT_IP17_PRI72_6,		6
	.EQU	INT_IP17_PRI72_5,		5
	.EQU	INT_IP17_PRI72_4,		4
	.EQU	INT_IP17_PRI72_3,		3
	.EQU	INT_IP17_PRI72_2,		2
	.EQU	INT_IP17_PRI72_1,		1
	.EQU	INT_IP17_PRI72_0,		0
//  register-------------------------------------
	.EQU	INT_IP18,		0x4020007C
//  0x4020 007C  INT_IP18   Bits-------------------------------------
	.EQU	INT_IP18_PRI79_7,		31
	.EQU	INT_IP18_PRI79_6,		30
	.EQU	INT_IP18_PRI79_5,		29
	.EQU	INT_IP18_PRI79_4,		28
	.EQU	INT_IP18_PRI79_3,		27
	.EQU	INT_IP18_PRI79_2,		26
	.EQU	INT_IP18_PRI79_1,		25
	.EQU	INT_IP18_PRI79_0,		24
	.EQU	INT_IP18_PRI78_7,		23
	.EQU	INT_IP18_PRI78_6,		22
	.EQU	INT_IP18_PRI78_5,		21
	.EQU	INT_IP18_PRI78_4,		20
	.EQU	INT_IP18_PRI78_3,		19
	.EQU	INT_IP18_PRI78_2,		18
	.EQU	INT_IP18_PRI78_1,		17
	.EQU	INT_IP18_PRI78_0,		16
	.EQU	INT_IP18_PRI77_7,		15
	.EQU	INT_IP18_PRI77_6,		14
	.EQU	INT_IP18_PRI77_5,		13
	.EQU	INT_IP18_PRI77_4,		12
	.EQU	INT_IP18_PRI77_3,		11
	.EQU	INT_IP18_PRI77_2,		10
	.EQU	INT_IP18_PRI77_1,		9
	.EQU	INT_IP18_PRI77_0,		8
	.EQU	INT_IP18_PRI76_7,		7
	.EQU	INT_IP18_PRI76_6,		6
	.EQU	INT_IP18_PRI76_5,		5
	.EQU	INT_IP18_PRI76_4,		4
	.EQU	INT_IP18_PRI76_3,		3
	.EQU	INT_IP18_PRI76_2,		2
	.EQU	INT_IP18_PRI76_1,		1
	.EQU	INT_IP18_PRI76_0,		0
//  register-------------------------------------
	.EQU	INT_EINTMASK,	0x40200080
//  0x4020 0080  INT_EINTMASK   Bits-------------------------------------
	.EQU	INT_EINTMASK_EINTM21,		21
	.EQU	INT_EINTMASK_EINTM20,		20
	.EQU	INT_EINTMASK_EINTM19,		19
	.EQU	INT_EINTMASK_EINTM18,		18
	.EQU	INT_EINTMASK_EINTM17,		17
	.EQU	INT_EINTMASK_EINTM16,		16
	.EQU	INT_EINTMASK_EINTM15,		15
	.EQU	INT_EINTMASK_EINTM14,		14
	.EQU	INT_EINTMASK_EINTM13,		13
	.EQU	INT_EINTMASK_EINTM12,		12
	.EQU	INT_EINTMASK_EINTM11,		11
	.EQU	INT_EINTMASK_EINTM10,		10
	.EQU	INT_EINTMASK_EINTM9,		9
	.EQU	INT_EINTMASK_EINTM8,		8
	.EQU	INT_EINTMASK_EINTM7,		7
	.EQU	INT_EINTMASK_EINTM6,		6
	.EQU	INT_EINTMASK_EINTM5,		5
	.EQU	INT_EINTMASK_EINTM4,		4
	.EQU	INT_EINTMASK_EINTM3,		3
	.EQU	INT_EINTMASK_EINTM2,		2
	.EQU	INT_EINTMASK_EINTM1,		1
	.EQU	INT_EINTMASK_EINTM0,		0
//  register-------------------------------------
	.EQU	INT_EINTRISE,	0x40200084
//  0x4020 0084  INT_EINTRISE   Bits-------------------------------------
	.EQU	INT_EINTRISE_EINTRI21,		21
	.EQU	INT_EINTRISE_EINTRI20,		20
	.EQU	INT_EINTRISE_EINTRI19,		19
	.EQU	INT_EINTRISE_EINTRI18,		18
	.EQU	INT_EINTRISE_EINTRI17,		17
	.EQU	INT_EINTRISE_EINTRI16,		16
	.EQU	INT_EINTRISE_EINTRI15,		15
	.EQU	INT_EINTRISE_EINTRI14,		14
	.EQU	INT_EINTRISE_EINTRI13,		13
	.EQU	INT_EINTRISE_EINTRI12,		12
	.EQU	INT_EINTRISE_EINTRI11,		11
	.EQU	INT_EINTRISE_EINTRI10,		10
	.EQU	INT_EINTRISE_EINTRI9,		9
	.EQU	INT_EINTRISE_EINTRI8,		8
	.EQU	INT_EINTRISE_EINTRI7,		7
	.EQU	INT_EINTRISE_EINTRI6,		6
	.EQU	INT_EINTRISE_EINTRI5,		5
	.EQU	INT_EINTRISE_EINTRI4,		4
	.EQU	INT_EINTRISE_EINTRI3,		3
	.EQU	INT_EINTRISE_EINTRI2,		2
	.EQU	INT_EINTRISE_EINTRI1,		1
	.EQU	INT_EINTRISE_EINTRI0,		0
//  register-------------------------------------
	.EQU	INT_EINTFALL,	0x40200088
//  0x4020 0088  INT_EINTFALL   Bits-------------------------------------
	.EQU	INT_EINTFALL_EINTFA21,		21
	.EQU	INT_EINTFALL_EINTFA20,		20
	.EQU	INT_EINTFALL_EINTFA19,		19
	.EQU	INT_EINTFALL_EINTFA18,		18
	.EQU	INT_EINTFALL_EINTFA17,		17
	.EQU	INT_EINTFALL_EINTFA16,		16
	.EQU	INT_EINTFALL_EINTFA15,		15
	.EQU	INT_EINTFALL_EINTFA14,		14
	.EQU	INT_EINTFALL_EINTFA13,		13
	.EQU	INT_EINTFALL_EINTFA12,		12
	.EQU	INT_EINTFALL_EINTFA11,		11
	.EQU	INT_EINTFALL_EINTFA10,		10
	.EQU	INT_EINTFALL_EINTFA9,		9
	.EQU	INT_EINTFALL_EINTFA8,		8
	.EQU	INT_EINTFALL_EINTFA7,		7
	.EQU	INT_EINTFALL_EINTFA6,		6
	.EQU	INT_EINTFALL_EINTFA5,		5
	.EQU	INT_EINTFALL_EINTFA4,		4
	.EQU	INT_EINTFALL_EINTFA3,		3
	.EQU	INT_EINTFALL_EINTFA2,		2
	.EQU	INT_EINTFALL_EINTFA1,		1
	.EQU	INT_EINTFALL_EINTFA0,		0
//  register-------------------------------------
	.EQU	INT_EINTF,		0x4020008C
//  0x4020 008C  INT_EINTF   Bits-------------------------------------
	.EQU	INT_EINTF_EINTIF31,		31
	.EQU	INT_EINTF_EINTIF30,		30
	.EQU	INT_EINTF_EINTIF29,		29
	.EQU	INT_EINTF_EINTIF28,		28
	.EQU	INT_EINTF_EINTIF27,		27
	.EQU	INT_EINTF_EINTIF26,		26
	.EQU	INT_EINTF_EINTIF25,		25
	.EQU	INT_EINTF_EINTIF24,		24
	.EQU	INT_EINTF_EINTIF23,		23
	.EQU	INT_EINTF_EINTIF22,		22
	.EQU	INT_EINTF_EINTIF21,		21
	.EQU	INT_EINTF_EINTIF20,		20
	.EQU	INT_EINTF_EINTIF19,		19
	.EQU	INT_EINTF_EINTIF18,		18
	.EQU	INT_EINTF_EINTIF17,		17
	.EQU	INT_EINTF_EINTIF16,		16
	.EQU	INT_EINTF_EINTIF15,		15
	.EQU	INT_EINTF_EINTIF14,		14
	.EQU	INT_EINTF_EINTIF13,		13
	.EQU	INT_EINTF_EINTIF12,		12
	.EQU	INT_EINTF_EINTIF11,		11
	.EQU	INT_EINTF_EINTIF10,		10
	.EQU	INT_EINTF_EINTIF9,		9
	.EQU	INT_EINTF_EINTIF8,		8
	.EQU	INT_EINTF_EINTIF7,		7
	.EQU	INT_EINTF_EINTIF6,		6
	.EQU	INT_EINTF_EINTIF5,		5
	.EQU	INT_EINTF_EINTIF4,		4
	.EQU	INT_EINTF_EINTIF3,		3
	.EQU	INT_EINTF_EINTIF2,		2
	.EQU	INT_EINTF_EINTIF1,		1
	.EQU	INT_EINTF_EINTIF0,		0
//  register-------------------------------------
	.EQU	INT_EINTEL,	0x40200090
//  0x4020 0090  INT_EINTEL   Bits-------------------------------------
	.EQU	INT_EINTEL_EINTEL21,		21
	.EQU	INT_EINTEL_EINTEL20,		20
	.EQU	INT_EINTEL_EINTEL19,		19
	.EQU	INT_EINTEL_EINTEL18,		18
	.EQU	INT_EINTEL_EINTEL17,		17
	.EQU	INT_EINTEL_EINTEL16,		16
	.EQU	INT_EINTEL_EINTEL15,		15
	.EQU	INT_EINTEL_EINTEL14,		14
	.EQU	INT_EINTEL_EINTEL13,		13
	.EQU	INT_EINTEL_EINTEL12,		12
	.EQU	INT_EINTEL_EINTEL11,		11
	.EQU	INT_EINTEL_EINTEL10,		10
	.EQU	INT_EINTEL_EINTEL9,		9
	.EQU	INT_EINTEL_EINTEL8,		8
	.EQU	INT_EINTEL_EINTEL7,		7
	.EQU	INT_EINTEL_EINTEL6,		6
	.EQU	INT_EINTEL_EINTEL5,		5
	.EQU	INT_EINTEL_EINTEL4,		4
	.EQU	INT_EINTEL_EINTEL3,		3
	.EQU	INT_EINTEL_EINTEL2,		2
	.EQU	INT_EINTEL_EINTEL1,		1
	.EQU	INT_EINTEL_EINTEL0,		0
//  register-------------------------------------
	.EQU	INT_EINTSS0,	0x40200094
//  0x4020 0094  INT_EINTSS0   Bits-------------------------------------
	.EQU	INT_EINTSS0_EINTSOU7_3,		31
	.EQU	INT_EINTSS0_EINTSOU7_2,		30
	.EQU	INT_EINTSS0_EINTSOU7_1,		29
	.EQU	INT_EINTSS0_EINTSOU7_0,		28
	.EQU	INT_EINTSS0_EINTSOU6_3,		27
	.EQU	INT_EINTSS0_EINTSOU6_2,		26
	.EQU	INT_EINTSS0_EINTSOU6_1,		25
	.EQU	INT_EINTSS0_EINTSOU6_0,		24
	.EQU	INT_EINTSS0_EINTSOU5_3,		23
	.EQU	INT_EINTSS0_EINTSOU5_2,		22
	.EQU	INT_EINTSS0_EINTSOU5_1,		21
	.EQU	INT_EINTSS0_EINTSOU5_0,		20
	.EQU	INT_EINTSS0_EINTSOU4_3,		19
	.EQU	INT_EINTSS0_EINTSOU4_2,		18
	.EQU	INT_EINTSS0_EINTSOU4_1,		17
	.EQU	INT_EINTSS0_EINTSOU4_0,		16
	.EQU	INT_EINTSS0_EINTSOU3_3,		15
	.EQU	INT_EINTSS0_EINTSOU3_2,		14
	.EQU	INT_EINTSS0_EINTSOU3_1,		13
	.EQU	INT_EINTSS0_EINTSOU3_0,		12
	.EQU	INT_EINTSS0_EINTSOU2_3,		11
	.EQU	INT_EINTSS0_EINTSOU2_2,		10
	.EQU	INT_EINTSS0_EINTSOU2_1,		9
	.EQU	INT_EINTSS0_EINTSOU2_0,		8
	.EQU	INT_EINTSS0_EINTSOU1_3,		7
	.EQU	INT_EINTSS0_EINTSOU1_2,		6
	.EQU	INT_EINTSS0_EINTSOU1_1,		5
	.EQU	INT_EINTSS0_EINTSOU1_0,		4
	.EQU	INT_EINTSS0_EINTSOU0_3,		3
	.EQU	INT_EINTSS0_EINTSOU0_2,		2
	.EQU	INT_EINTSS0_EINTSOU0_1,		1
	.EQU	INT_EINTSS0_EINTSOU0_0,		0
//  register-------------------------------------
	.EQU	INT_EINTSS1,	0x40200098
//  0x4020 0098  INT_EINTSS1   Bits-------------------------------------
	.EQU	INT_EINTSS1_EINTSOU15_3,		31
	.EQU	INT_EINTSS1_EINTSOU15_2,		30
	.EQU	INT_EINTSS1_EINTSOU15_1,		29
	.EQU	INT_EINTSS1_EINTSOU15_0,		28
	.EQU	INT_EINTSS1_EINTSOU14_3,		27
	.EQU	INT_EINTSS1_EINTSOU14_2,		26
	.EQU	INT_EINTSS1_EINTSOU14_1,		25
	.EQU	INT_EINTSS1_EINTSOU14_0,		24
	.EQU	INT_EINTSS1_EINTSOU13_3,		23
	.EQU	INT_EINTSS1_EINTSOU13_2,		22
	.EQU	INT_EINTSS1_EINTSOU13_1,		21
	.EQU	INT_EINTSS1_EINTSOU13_0,		20
	.EQU	INT_EINTSS1_EINTSOU12_3,		19
	.EQU	INT_EINTSS1_EINTSOU12_2,		18
	.EQU	INT_EINTSS1_EINTSOU12_1,		17
	.EQU	INT_EINTSS1_EINTSOU12_0,		16
	.EQU	INT_EINTSS1_EINTSOU11_3,		15
	.EQU	INT_EINTSS1_EINTSOU11_2,		14
	.EQU	INT_EINTSS1_EINTSOU11_1,		13
	.EQU	INT_EINTSS1_EINTSOU11_0,		12
	.EQU	INT_EINTSS1_EINTSOU10_3,		11
	.EQU	INT_EINTSS1_EINTSOU10_2,		10
	.EQU	INT_EINTSS1_EINTSOU10_1,		9
	.EQU	INT_EINTSS1_EINTSOU10_0,		8
	.EQU	INT_EINTSS1_EINTSOU9_3,		7
	.EQU	INT_EINTSS1_EINTSOU9_2,		6
	.EQU	INT_EINTSS1_EINTSOU9_1,		5
	.EQU	INT_EINTSS1_EINTSOU9_0,		4
	.EQU	INT_EINTSS1_EINTSOU8_3,		3
	.EQU	INT_EINTSS1_EINTSOU8_2,		2
	.EQU	INT_EINTSS1_EINTSOU8_1,		1
	.EQU	INT_EINTSS1_EINTSOU8_0,		0
//  register-------------------------------------
	.EQU	INT_CTL1,		0x4020009C
//  0x4020 009C  INT_CTL1   Bits-------------------------------------
	.EQU	INT_CTL1_INTDELY7,		7
	.EQU	INT_CTL1_INTDELY6,		6
	.EQU	INT_CTL1_INTDELY5,		5
	.EQU	INT_CTL1_INTDELY4,		4
	.EQU	INT_CTL1_INTDELY3,		3
	.EQU	INT_CTL1_INTDELY2,		2
	.EQU	INT_CTL1_INTDELY1,		1
	.EQU	INT_CTL1_INTDELY0,		0
//  register-------------------------------------
	.EQU	ST_CTL,			0x402000A0
//  0x4020 00A0  ST_CTL   Bits-------------------------------------
	.EQU	ST_CTL_COUNTZERO,		16
	.EQU	ST_CTL_STCLKS,		2
	.EQU	ST_CTL_TICKINTEN,		1
	.EQU	ST_CTL_STEN,		0
//  register-------------------------------------
	.EQU	ST_RELOAD,		0x402000A4
//  0x4020 00A4  ST_RELOAD   Bits-------------------------------------
	.EQU	ST_RELOAD_STRELOAD23,		23
	.EQU	ST_RELOAD_STRELOAD22,		22
	.EQU	ST_RELOAD_STRELOAD21,		21
	.EQU	ST_RELOAD_STRELOAD20,		20
	.EQU	ST_RELOAD_STRELOAD19,		19
	.EQU	ST_RELOAD_STRELOAD18,		18
	.EQU	ST_RELOAD_STRELOAD17,		17
	.EQU	ST_RELOAD_STRELOAD16,		16
	.EQU	ST_RELOAD_STRELOAD15,		15
	.EQU	ST_RELOAD_STRELOAD14,		14
	.EQU	ST_RELOAD_STRELOAD13,		13
	.EQU	ST_RELOAD_STRELOAD12,		12
	.EQU	ST_RELOAD_STRELOAD11,		11
	.EQU	ST_RELOAD_STRELOAD10,		10
	.EQU	ST_RELOAD_STRELOAD9,		9
	.EQU	ST_RELOAD_STRELOAD8,		8
	.EQU	ST_RELOAD_STRELOAD7,		7
	.EQU	ST_RELOAD_STRELOAD6,		6
	.EQU	ST_RELOAD_STRELOAD5,		5
	.EQU	ST_RELOAD_STRELOAD4,		4
	.EQU	ST_RELOAD_STRELOAD3,		3
	.EQU	ST_RELOAD_STRELOAD2,		2
	.EQU	ST_RELOAD_STRELOAD1,		1
	.EQU	ST_RELOAD_STRELOAD0,		0
//  register-------------------------------------
	.EQU	ST_CV,			0x402000A8
//  0x4020 00A8  ST_CV   Bits-------------------------------------
	.EQU	ST_CV_STCV23,		23
	.EQU	ST_CV_STCV22,		22
	.EQU	ST_CV_STCV21,		21
	.EQU	ST_CV_STCV20,		20
	.EQU	ST_CV_STCV19,		19
	.EQU	ST_CV_STCV18,		18
	.EQU	ST_CV_STCV17,		17
	.EQU	ST_CV_STCV16,		16
	.EQU	ST_CV_STCV15,		15
	.EQU	ST_CV_STCV14,		14
	.EQU	ST_CV_STCV13,		13
	.EQU	ST_CV_STCV12,		12
	.EQU	ST_CV_STCV11,		11
	.EQU	ST_CV_STCV10,		10
	.EQU	ST_CV_STCV9,		9
	.EQU	ST_CV_STCV8,		8
	.EQU	ST_CV_STCV7,		7
	.EQU	ST_CV_STCV6,		6
	.EQU	ST_CV_STCV5,		5
	.EQU	ST_CV_STCV4,		4
	.EQU	ST_CV_STCV3,		3
	.EQU	ST_CV_STCV2,		2
	.EQU	ST_CV_STCV1,		1
	.EQU	ST_CV_STCV0,		0
//  register-------------------------------------
	.EQU	ST_CALI,		0x402000AC
//  0x4020 00AC  ST_CALI   Bits-------------------------------------
	.EQU	ST_CALI_STCLKREF,		31
	.EQU	ST_CALI_SKEW,		30
	.EQU	ST_CALI_STCALIB23,		23
	.EQU	ST_CALI_STCALIB22,		22
	.EQU	ST_CALI_STCALIB21,		21
	.EQU	ST_CALI_STCALIB20,		20
	.EQU	ST_CALI_STCALIB19,		19
	.EQU	ST_CALI_STCALIB18,		18
	.EQU	ST_CALI_STCALIB17,		17
	.EQU	ST_CALI_STCALIB16,		16
	.EQU	ST_CALI_STCALIB15,		15
	.EQU	ST_CALI_STCALIB14,		14
	.EQU	ST_CALI_STCALIB13,		13
	.EQU	ST_CALI_STCALIB12,		12
	.EQU	ST_CALI_STCALIB11,		11
	.EQU	ST_CALI_STCALIB10,		10
	.EQU	ST_CALI_STCALIB9,		9
	.EQU	ST_CALI_STCALIB8,		8
	.EQU	ST_CALI_STCALIB7,		7
	.EQU	ST_CALI_STCALIB6,		6
	.EQU	ST_CALI_STCALIB5,		5
	.EQU	ST_CALI_STCALIB4,		4
	.EQU	ST_CALI_STCALIB3,		3
	.EQU	ST_CALI_STCALIB2,		2
	.EQU	ST_CALI_STCALIB1,		1
	.EQU	ST_CALI_STCALIB0,		0
//  register-------------------------------------
	.EQU	SYS_PSW,		0x402000B0
//  0x4020 00B0  SYS_PSW   Bits-------------------------------------
	.EQU	SYS_PSW_N,			31
	.EQU	SYS_PSW_Z,			30
	.EQU	SYS_PSW_C,			29
	.EQU	SYS_PSW_V,			28
//  register-------------------------------------
	.EQU	SYS_MCTL,		0x402000B4
//  0x4020 00B4  SYS_MCTL   Bits-------------------------------------
	.EQU	SYS_MCTL_SPSEL,		16
	.EQU	SYS_MCTL_SUSTA,		15
	.EQU	SYS_MCTL_STACKALIGN,		9
	.EQU	SYS_MCTL_SLPONMOD,		4
	.EQU	SYS_MCTL_SLEEPDEEP,		2
	.EQU	SYS_MCTL_SLEEPONEXIT,		1
//  register-------------------------------------
	.EQU	SYS_ARCTL,		0x402000B8
//  0x4020 00B8  SYS_ARCTL   Bits-------------------------------------
	.EQU	SYS_ARCTL_ARKEY31,		31
	.EQU	SYS_ARCTL_ARKEY30,		30
	.EQU	SYS_ARCTL_ARKEY29,		29
	.EQU	SYS_ARCTL_ARKEY28,		28
	.EQU	SYS_ARCTL_ARKEY27,		27
	.EQU	SYS_ARCTL_ARKEY26,		26
	.EQU	SYS_ARCTL_ARKEY25,		25
	.EQU	SYS_ARCTL_ARKEY24,		24
	.EQU	SYS_ARCTL_ARKEY23,		23
	.EQU	SYS_ARCTL_ARKEY22,		22
	.EQU	SYS_ARCTL_ARKEY21,		21
	.EQU	SYS_ARCTL_ARKEY20,		20
	.EQU	SYS_ARCTL_ARKEY19,		19
	.EQU	SYS_ARCTL_ARKEY18,		18
	.EQU	SYS_ARCTL_ARKEY17,		17
	.EQU	SYS_ARCTL_ARKEY16,		16
	.EQU	SYS_ARCTL_CDMALDC1,		10
	.EQU	SYS_ARCTL_CDMALDC0,		9
	.EQU	SYS_ARCTL_CDBUGBS,		8
	.EQU	SYS_ARCTL_CDMADC,		7
	.EQU	SYS_ARCTL_CRWDC,		6
	.EQU	SYS_ARCTL_CDMAAM,		5
	.EQU	SYS_ARCTL_CDMAR,		4
	.EQU	SYS_ARCTL_SYSTEMRST,		2
//  register-------------------------------------
	.EQU	SYS_VECTOFF,	0x402000BC
//  0x4020 00BC  SYS_VECTOFF   Bits-------------------------------------
	.EQU	SYS_VECTOFF_TBLOFF31,		31
	.EQU	SYS_VECTOFF_TBLOFF30,		30
	.EQU	SYS_VECTOFF_TBLOFF29,		29
	.EQU	SYS_VECTOFF_TBLOFF28,		28
	.EQU	SYS_VECTOFF_TBLOFF27,		27
	.EQU	SYS_VECTOFF_TBLOFF26,		26
	.EQU	SYS_VECTOFF_TBLOFF25,		25
	.EQU	SYS_VECTOFF_TBLOFF24,		24
	.EQU	SYS_VECTOFF_TBLOFF23,		23
	.EQU	SYS_VECTOFF_TBLOFF22,		22
	.EQU	SYS_VECTOFF_TBLOFF21,		21
	.EQU	SYS_VECTOFF_TBLOFF20,		20
	.EQU	SYS_VECTOFF_TBLOFF19,		19
	.EQU	SYS_VECTOFF_TBLOFF18,		18
	.EQU	SYS_VECTOFF_TBLOFF17,		17
	.EQU	SYS_VECTOFF_TBLOFF16,		16
	.EQU	SYS_VECTOFF_TBLOFF15,		15
	.EQU	SYS_VECTOFF_TBLOFF14,		14
	.EQU	SYS_VECTOFF_TBLOFF13,		13
	.EQU	SYS_VECTOFF_TBLOFF12,		12
	.EQU	SYS_VECTOFF_TBLOFF11,		11
	.EQU	SYS_VECTOFF_TBLOFF10,		10
	.EQU	SYS_VECTOFF_TBLOFF9,		9
	.EQU	SYS_VECTOFF_TBLOFF8,		8
	.EQU	SYS_VECTOFF_TBLOFF7,		7
	.EQU	SYS_VECTOFF_TBLOFF6,		6
	.EQU	SYS_VECTOFF_TBLOFF5,		5
	.EQU	SYS_VECTOFF_TBLOFF4,		4
	.EQU	SYS_VECTOFF_TBLOFF3,		3
	.EQU	SYS_VECTOFF_TBLOFF2,		2
	.EQU	SYS_VECTOFF_TBLOFF1,		1
	.EQU	SYS_VECTOFF_TBLOFF0,		0
//  register-------------------------------------
	.EQU	CACHE_CTLR,	0x402000C0
//  0x4020 00C0  CACHE_CTLR   Bits-------------------------------------
	.EQU	CACHE_CTLR_CECCERRFLAG,		9
	.EQU	CACHE_CTLR_FECCERRFLAG,		8
	.EQU	CACHE_CTLR_RECCERRIE,		7
	.EQU	CACHE_CTLR_CECCERRIE,		6
	.EQU	CACHE_CTLR_FECCERRIE,		5
	.EQU	CACHE_CTLR_CECCEN,		4
	.EQU	CACHE_CTLR_ICRD2LEN,		3
	.EQU	CACHE_CTLR_ICWR2LEN,		2
	.EQU	CACHE_CTLR_CACHERST,		1
	.EQU	CACHE_CTLR_CACHEEN,		0
//  register-------------------------------------
	.EQU	SYS_RAMSPA,	0x402000C4
//  0x4020 00C4  SYS_RAMSPA   Bits-------------------------------------
	.EQU	SYS_RAMSPA_RAMSPA25,		25
	.EQU	SYS_RAMSPA_RAMSPA24,		24
	.EQU	SYS_RAMSPA_RAMSPA23,		23
	.EQU	SYS_RAMSPA_RAMSPA22,		22
	.EQU	SYS_RAMSPA_RAMSPA21,		21
	.EQU	SYS_RAMSPA_RAMSPA20,		20
	.EQU	SYS_RAMSPA_RAMSPA19,		19
	.EQU	SYS_RAMSPA_RAMSPA18,		18
	.EQU	SYS_RAMSPA_RAMSPA17,		17
	.EQU	SYS_RAMSPA_RAMSPA16,		16
	.EQU	SYS_RAMSPA_RAMSPA15,		15
	.EQU	SYS_RAMSPA_RAMSPA14,		14
	.EQU	SYS_RAMSPA_RAMSPA13,		13
	.EQU	SYS_RAMSPA_RAMSPA12,		12
	.EQU	SYS_RAMSPA_RAMSPA11,		11
	.EQU	SYS_RAMSPA_RAMSPA10,		10
	.EQU	SYS_RAMSPA_RAMSPA9,		9
	.EQU	SYS_RAMSPA_RAMSPA8,		8
	.EQU	SYS_RAMSPA_RAMSPA7,		7
	.EQU	SYS_RAMSPA_RAMSPA6,		6
	.EQU	SYS_RAMSPA_RAMSPA5,		5
	.EQU	SYS_RAMSPA_RAMSPA4,		4
	.EQU	SYS_RAMSPA_RAMSPA3,		3
	.EQU	SYS_RAMSPA_RAMSPA2,		2
	.EQU	SYS_RAMSPA_RAMSPA1,		1
	.EQU	SYS_RAMSPA_RAMSPA0,		0
//  register-------------------------------------
	.EQU	SYS_MEMCTL,	0x402000C8
//  0x4020 00C8  SYS_MEMCTL   Bits-------------------------------------
	.EQU	SYS_MEMCTL_MEMM1,		1
	.EQU	SYS_MEMCTL_MEMM0,		0
//  register-------------------------------------
	.EQU	SYS_MSPSPA,	0x402000CC
//  0x4020 00CC  SYS_MSPSPA   Bits-------------------------------------
	.EQU	SYS_MSPSPA_MSPSPAH15,		31
	.EQU	SYS_MSPSPA_MSPSPAH14,		30
	.EQU	SYS_MSPSPA_MSPSPAH13,		29
	.EQU	SYS_MSPSPA_MSPSPAH12,		28
	.EQU	SYS_MSPSPA_MSPSPAH11,		27
	.EQU	SYS_MSPSPA_MSPSPAH10,		26
	.EQU	SYS_MSPSPA_MSPSPAH9,		25
	.EQU	SYS_MSPSPA_MSPSPAH8,		24
	.EQU	SYS_MSPSPA_MSPSPAH7,		23
	.EQU	SYS_MSPSPA_MSPSPAH6,		22
	.EQU	SYS_MSPSPA_MSPSPAH5,		21
	.EQU	SYS_MSPSPA_MSPSPAH4,		20
	.EQU	SYS_MSPSPA_MSPSPAH3,		19
	.EQU	SYS_MSPSPA_MSPSPAH2,		18
	.EQU	SYS_MSPSPA_MSPSPAH1,		17
	.EQU	SYS_MSPSPA_MSPSPAH0,		16
	.EQU	SYS_MSPSPA_MSPSPAL15,		15
	.EQU	SYS_MSPSPA_MSPSPAL14,		14
	.EQU	SYS_MSPSPA_MSPSPAL13,		13
	.EQU	SYS_MSPSPA_MSPSPAL12,		12
	.EQU	SYS_MSPSPA_MSPSPAL11,		11
	.EQU	SYS_MSPSPA_MSPSPAL10,		10
	.EQU	SYS_MSPSPA_MSPSPAL9,		9
	.EQU	SYS_MSPSPA_MSPSPAL8,		8
	.EQU	SYS_MSPSPA_MSPSPAL7,		7
	.EQU	SYS_MSPSPA_MSPSPAL6,		6
	.EQU	SYS_MSPSPA_MSPSPAL5,		5
	.EQU	SYS_MSPSPA_MSPSPAL4,		4
	.EQU	SYS_MSPSPA_MSPSPAL3,		3
	.EQU	SYS_MSPSPA_MSPSPAL2,		2
	.EQU	SYS_MSPSPA_MSPSPAL1,		1
	.EQU	SYS_MSPSPA_MSPSPAL0,		0
//  register-------------------------------------
	.EQU	SYS_PSPSPA,	0x402000D0
//  0x4020 00D0  SYS_PSPSPA   Bits-------------------------------------
	.EQU	SYS_PSPSPA_PSPSPAH15,		31
	.EQU	SYS_PSPSPA_PSPSPAH14,		30
	.EQU	SYS_PSPSPA_PSPSPAH13,		29
	.EQU	SYS_PSPSPA_PSPSPAH12,		28
	.EQU	SYS_PSPSPA_PSPSPAH11,		27
	.EQU	SYS_PSPSPA_PSPSPAH10,		26
	.EQU	SYS_PSPSPA_PSPSPAH9,		25
	.EQU	SYS_PSPSPA_PSPSPAH8,		24
	.EQU	SYS_PSPSPA_PSPSPAH7,		23
	.EQU	SYS_PSPSPA_PSPSPAH6,		22
	.EQU	SYS_PSPSPA_PSPSPAH5,		21
	.EQU	SYS_PSPSPA_PSPSPAH4,		20
	.EQU	SYS_PSPSPA_PSPSPAH3,		19
	.EQU	SYS_PSPSPA_PSPSPAH2,		18
	.EQU	SYS_PSPSPA_PSPSPAH1,		17
	.EQU	SYS_PSPSPA_PSPSPAH0,		16
	.EQU	SYS_PSPSPA_PSPSPAL15,		15
	.EQU	SYS_PSPSPA_PSPSPAL14,		14
	.EQU	SYS_PSPSPA_PSPSPAL13,		13
	.EQU	SYS_PSPSPA_PSPSPAL12,		12
	.EQU	SYS_PSPSPA_PSPSPAL11,		11
	.EQU	SYS_PSPSPA_PSPSPAL10,		10
	.EQU	SYS_PSPSPA_PSPSPAL9,		9
	.EQU	SYS_PSPSPA_PSPSPAL8,		8
	.EQU	SYS_PSPSPA_PSPSPAL7,		7
	.EQU	SYS_PSPSPA_PSPSPAL6,		6
	.EQU	SYS_PSPSPA_PSPSPAL5,		5
	.EQU	SYS_PSPSPA_PSPSPAL4,		4
	.EQU	SYS_PSPSPA_PSPSPAL3,		3
	.EQU	SYS_PSPSPA_PSPSPAL2,		2
	.EQU	SYS_PSPSPA_PSPSPAL1,		1
	.EQU	SYS_PSPSPA_PSPSPAL0,		0
//  register-------------------------------------
	.EQU	INT_ELVLNET,	0x402000D4
//  0x4020 00D4  INT_ELVLNET   Bits-------------------------------------
	.EQU	INT_ELVLNET_ELVLNEG21,		21
	.EQU	INT_ELVLNET_ELVLNEG20,		20
	.EQU	INT_ELVLNET_ELVLNEG19,		19
	.EQU	INT_ELVLNET_ELVLNEG18,		18
	.EQU	INT_ELVLNET_ELVLNEG17,		17
	.EQU	INT_ELVLNET_ELVLNEG16,		16
	.EQU	INT_ELVLNET_ELVLNEG15,		15
	.EQU	INT_ELVLNET_ELVLNEG14,		14
	.EQU	INT_ELVLNET_ELVLNEG13,		13
	.EQU	INT_ELVLNET_ELVLNEG12,		12
	.EQU	INT_ELVLNET_ELVLNEG11,		11
	.EQU	INT_ELVLNET_ELVLNEG10,		10
	.EQU	INT_ELVLNET_ELVLNEG9,		9
	.EQU	INT_ELVLNET_ELVLNEG8,		8
	.EQU	INT_ELVLNET_ELVLNEG7,		7
	.EQU	INT_ELVLNET_ELVLNEG6,		6
	.EQU	INT_ELVLNET_ELVLNEG5,		5
	.EQU	INT_ELVLNET_ELVLNEG4,		4
	.EQU	INT_ELVLNET_ELVLNEG3,		3
	.EQU	INT_ELVLNET_ELVLNEG2,		2
	.EQU	INT_ELVLNET_ELVLNEG1,		1
	.EQU	INT_ELVLNET_ELVLNEG0,		0
//  register-------------------------------------
	.EQU	FLASH_CFG,		0x40200114
//  0X4020 0114  FLASH_CFG   Bits-------------------------------------
	.EQU	FLASH_CFG_ECCREADEN,		7
	.EQU	FLASH_CFG_PREFETCHEN,		6
	.EQU	FLASH_CFG_TCFG3,		3
	.EQU	FLASH_CFG_TCFG2,		2
	.EQU	FLASH_CFG_TCFG1,		1
	.EQU	FLASH_CFG_TCFG0,		0
//  register-------------------------------------
	.EQU	FLASH_STATE,	0x40200120
//  0X4020 0120  FLASH_STATE   Bits-------------------------------------
	.EQU	FLASH_STATE_SIGDONE,		1
//  register-------------------------------------
	.EQU	FLASH_CSSTART,	0x40200138
//  0X4020 0138  FLASH_CSSTART   Bits-------------------------------------
	.EQU	FLASH_CSSTART_CKSTADDR19,		19
	.EQU	FLASH_CSSTART_CKSTADDR18,		18
	.EQU	FLASH_CSSTART_CKSTADDR17,		17
	.EQU	FLASH_CSSTART_CKSTADDR16,		16
	.EQU	FLASH_CSSTART_CKSTADDR15,		15
	.EQU	FLASH_CSSTART_CKSTADDR14,		14
	.EQU	FLASH_CSSTART_CKSTADDR13,		13
	.EQU	FLASH_CSSTART_CKSTADDR12,		12
	.EQU	FLASH_CSSTART_CKSTADDR11,		11
	.EQU	FLASH_CSSTART_CKSTADDR10,		10
	.EQU	FLASH_CSSTART_CKSTADDR9,		9
	.EQU	FLASH_CSSTART_CKSTADDR8,		8
	.EQU	FLASH_CSSTART_CKSTADDR7,		7
	.EQU	FLASH_CSSTART_CKSTADDR6,		6
	.EQU	FLASH_CSSTART_CKSTADDR5,		5
	.EQU	FLASH_CSSTART_CKSTADDR4,		4
//  register-------------------------------------
	.EQU	FLASH_CSSTOP,	0x4020013C
//  0X4020 013C  FLASH_CSSTOP   Bits-------------------------------------
	.EQU	FLASH_CSSTOP_SIGG0,		20
	.EQU	FLASH_CSSTOP_CKSPADDR19,		19
	.EQU	FLASH_CSSTOP_CKSPADDR18,		18
	.EQU	FLASH_CSSTOP_CKSPADDR17,		17
	.EQU	FLASH_CSSTOP_CKSPADDR16,		16
	.EQU	FLASH_CSSTOP_CKSPADDR15,		15
	.EQU	FLASH_CSSTOP_CKSPADDR14,		14
	.EQU	FLASH_CSSTOP_CKSPADDR13,		13
	.EQU	FLASH_CSSTOP_CKSPADDR12,		12
	.EQU	FLASH_CSSTOP_CKSPADDR11,		11
	.EQU	FLASH_CSSTOP_CKSPADDR10,		10
	.EQU	FLASH_CSSTOP_CKSPADDR9,		9
	.EQU	FLASH_CSSTOP_CKSPADDR8,		8
	.EQU	FLASH_CSSTOP_CKSPADDR7,		7
	.EQU	FLASH_CSSTOP_CKSPADDR6,		6
	.EQU	FLASH_CSSTOP_CKSPADDR5,		5
	.EQU	FLASH_CSSTOP_CKSPADDR4,		4
//  register-------------------------------------
	.EQU	FLASH_CSRES0,	0x40200140
//  0X4020 0140  FLASH_CSRES0   Bits-------------------------------------
	.EQU	FLASH_CSRES0_CKSPRES0_31,		31
	.EQU	FLASH_CSRES0_CKSPRES0_30,		30
	.EQU	FLASH_CSRES0_CKSPRES0_29,		29
	.EQU	FLASH_CSRES0_CKSPRES0_28,		28
	.EQU	FLASH_CSRES0_CKSPRES0_27,		27
	.EQU	FLASH_CSRES0_CKSPRES0_26,		26
	.EQU	FLASH_CSRES0_CKSPRES0_25,		25
	.EQU	FLASH_CSRES0_CKSPRES0_24,		24
	.EQU	FLASH_CSRES0_CKSPRES0_23,		23
	.EQU	FLASH_CSRES0_CKSPRES0_22,		22
	.EQU	FLASH_CSRES0_CKSPRES0_21,		21
	.EQU	FLASH_CSRES0_CKSPRES0_20,		20
	.EQU	FLASH_CSRES0_CKSPRES0_19,		19
	.EQU	FLASH_CSRES0_CKSPRES0_18,		18
	.EQU	FLASH_CSRES0_CKSPRES0_17,		17
	.EQU	FLASH_CSRES0_CKSPRES0_16,		16
	.EQU	FLASH_CSRES0_CKSPRES0_15,		15
	.EQU	FLASH_CSRES0_CKSPRES0_14,		14
	.EQU	FLASH_CSRES0_CKSPRES0_13,		13
	.EQU	FLASH_CSRES0_CKSPRES0_12,		12
	.EQU	FLASH_CSRES0_CKSPRES0_11,		11
	.EQU	FLASH_CSRES0_CKSPRES0_10,		10
	.EQU	FLASH_CSRES0_CKSPRES0_9,		9
	.EQU	FLASH_CSRES0_CKSPRES0_8,		8
	.EQU	FLASH_CSRES0_CKSPRES0_7,		7
	.EQU	FLASH_CSRES0_CKSPRES0_6,		6
	.EQU	FLASH_CSRES0_CKSPRES0_5,		5
	.EQU	FLASH_CSRES0_CKSPRES0_4,		4
	.EQU	FLASH_CSRES0_CKSPRES0_3,		3
	.EQU	FLASH_CSRES0_CKSPRES0_2,		2
	.EQU	FLASH_CSRES0_CKSPRES0_1,		1
	.EQU	FLASH_CSRES0_CKSPRES0_0,		0
//  register-------------------------------------
	.EQU	FLASH_CSRES1,	0x40200144
//  0X4020 0144  FLASH_CSRES1   Bits-------------------------------------
	.EQU	FLASH_CSRES1_CKSPRES1_31,		31
	.EQU	FLASH_CSRES1_CKSPRES1_30,		30
	.EQU	FLASH_CSRES1_CKSPRES1_29,		29
	.EQU	FLASH_CSRES1_CKSPRES1_28,		28
	.EQU	FLASH_CSRES1_CKSPRES1_27,		27
	.EQU	FLASH_CSRES1_CKSPRES1_26,		26
	.EQU	FLASH_CSRES1_CKSPRES1_25,		25
	.EQU	FLASH_CSRES1_CKSPRES1_24,		24
	.EQU	FLASH_CSRES1_CKSPRES1_23,		23
	.EQU	FLASH_CSRES1_CKSPRES1_22,		22
	.EQU	FLASH_CSRES1_CKSPRES1_21,		21
	.EQU	FLASH_CSRES1_CKSPRES1_20,		20
	.EQU	FLASH_CSRES1_CKSPRES1_19,		19
	.EQU	FLASH_CSRES1_CKSPRES1_18,		18
	.EQU	FLASH_CSRES1_CKSPRES1_17,		17
	.EQU	FLASH_CSRES1_CKSPRES1_16,		16
	.EQU	FLASH_CSRES1_CKSPRES1_15,		15
	.EQU	FLASH_CSRES1_CKSPRES1_14,		14
	.EQU	FLASH_CSRES1_CKSPRES1_13,		13
	.EQU	FLASH_CSRES1_CKSPRES1_12,		12
	.EQU	FLASH_CSRES1_CKSPRES1_11,		11
	.EQU	FLASH_CSRES1_CKSPRES1_10,		10
	.EQU	FLASH_CSRES1_CKSPRES1_9,		9
	.EQU	FLASH_CSRES1_CKSPRES1_8,		8
	.EQU	FLASH_CSRES1_CKSPRES1_7,		7
	.EQU	FLASH_CSRES1_CKSPRES1_6,		6
	.EQU	FLASH_CSRES1_CKSPRES1_5,		5
	.EQU	FLASH_CSRES1_CKSPRES1_4,		4
	.EQU	FLASH_CSRES1_CKSPRES1_3,		3
	.EQU	FLASH_CSRES1_CKSPRES1_2,		2
	.EQU	FLASH_CSRES1_CKSPRES1_1,		1
	.EQU	FLASH_CSRES1_CKSPRES1_0,		0
//  register-------------------------------------
	.EQU	FLASH_CSRES2,	0x40200148
//  0X4020 0148  FLASH_CSRES2   Bits-------------------------------------
	.EQU	FLASH_CSRES2_CKSPRES2_31,		31
	.EQU	FLASH_CSRES2_CKSPRES2_30,		30
	.EQU	FLASH_CSRES2_CKSPRES2_29,		29
	.EQU	FLASH_CSRES2_CKSPRES2_28,		28
	.EQU	FLASH_CSRES2_CKSPRES2_27,		27
	.EQU	FLASH_CSRES2_CKSPRES2_26,		26
	.EQU	FLASH_CSRES2_CKSPRES2_25,		25
	.EQU	FLASH_CSRES2_CKSPRES2_24,		24
	.EQU	FLASH_CSRES2_CKSPRES2_23,		23
	.EQU	FLASH_CSRES2_CKSPRES2_22,		22
	.EQU	FLASH_CSRES2_CKSPRES2_21,		21
	.EQU	FLASH_CSRES2_CKSPRES2_20,		20
	.EQU	FLASH_CSRES2_CKSPRES2_19,		19
	.EQU	FLASH_CSRES2_CKSPRES2_18,		18
	.EQU	FLASH_CSRES2_CKSPRES2_17,		17
	.EQU	FLASH_CSRES2_CKSPRES2_16,		16
	.EQU	FLASH_CSRES2_CKSPRES2_15,		15
	.EQU	FLASH_CSRES2_CKSPRES2_14,		14
	.EQU	FLASH_CSRES2_CKSPRES2_13,		13
	.EQU	FLASH_CSRES2_CKSPRES2_12,		12
	.EQU	FLASH_CSRES2_CKSPRES2_11,		11
	.EQU	FLASH_CSRES2_CKSPRES2_10,		10
	.EQU	FLASH_CSRES2_CKSPRES2_9,		9
	.EQU	FLASH_CSRES2_CKSPRES2_8,		8
	.EQU	FLASH_CSRES2_CKSPRES2_7,		7
	.EQU	FLASH_CSRES2_CKSPRES2_6,		6
	.EQU	FLASH_CSRES2_CKSPRES2_5,		5
	.EQU	FLASH_CSRES2_CKSPRES2_4,		4
	.EQU	FLASH_CSRES2_CKSPRES2_3,		3
	.EQU	FLASH_CSRES2_CKSPRES2_2,		2
	.EQU	FLASH_CSRES2_CKSPRES2_1,		1
	.EQU	FLASH_CSRES2_CKSPRES2_0,		0
//  register-------------------------------------
	.EQU	FLASH_CSRES3,	0x4020014C
//  0X4020 014C  FLASH_CSRES3   Bits-------------------------------------
	.EQU	FLASH_CSRES3_CKSPRES3_31,		31
	.EQU	FLASH_CSRES3_CKSPRES3_30,		30
	.EQU	FLASH_CSRES3_CKSPRES3_29,		29
	.EQU	FLASH_CSRES3_CKSPRES3_28,		28
	.EQU	FLASH_CSRES3_CKSPRES3_27,		27
	.EQU	FLASH_CSRES3_CKSPRES3_26,		26
	.EQU	FLASH_CSRES3_CKSPRES3_25,		25
	.EQU	FLASH_CSRES3_CKSPRES3_24,		24
	.EQU	FLASH_CSRES3_CKSPRES3_23,		23
	.EQU	FLASH_CSRES3_CKSPRES3_22,		22
	.EQU	FLASH_CSRES3_CKSPRES3_21,		21
	.EQU	FLASH_CSRES3_CKSPRES3_20,		20
	.EQU	FLASH_CSRES3_CKSPRES3_19,		19
	.EQU	FLASH_CSRES3_CKSPRES3_18,		18
	.EQU	FLASH_CSRES3_CKSPRES3_17,		17
	.EQU	FLASH_CSRES3_CKSPRES3_16,		16
	.EQU	FLASH_CSRES3_CKSPRES3_15,		15
	.EQU	FLASH_CSRES3_CKSPRES3_14,		14
	.EQU	FLASH_CSRES3_CKSPRES3_13,		13
	.EQU	FLASH_CSRES3_CKSPRES3_12,		12
	.EQU	FLASH_CSRES3_CKSPRES3_11,		11
	.EQU	FLASH_CSRES3_CKSPRES3_10,		10
	.EQU	FLASH_CSRES3_CKSPRES3_9,		9
	.EQU	FLASH_CSRES3_CKSPRES3_8,		8
	.EQU	FLASH_CSRES3_CKSPRES3_7,		7
	.EQU	FLASH_CSRES3_CKSPRES3_6,		6
	.EQU	FLASH_CSRES3_CKSPRES3_5,		5
	.EQU	FLASH_CSRES3_CKSPRES3_4,		4
	.EQU	FLASH_CSRES3_CKSPRES3_3,		3
	.EQU	FLASH_CSRES3_CKSPRES3_2,		2
	.EQU	FLASH_CSRES3_CKSPRES3_1,		1
	.EQU	FLASH_CSRES3_CKSPRES3_0,		0
//  register-------------------------------------
	.EQU	GPIOA_PIR,		0x50000000
//  0x5000 0000  GPIOA_PIR   Bits-------------------------------------
	.EQU	GPIOA_PIR_PXPIR15,		15
	.EQU	GPIOA_PIR_PXPIR14,		14
	.EQU	GPIOA_PIR_PXPIR13,		13
	.EQU	GPIOA_PIR_PXPIR12,		12
	.EQU	GPIOA_PIR_PXPIR11,		11
	.EQU	GPIOA_PIR_PXPIR10,		10
	.EQU	GPIOA_PIR_PXPIR9,		9
	.EQU	GPIOA_PIR_PXPIR8,		8
	.EQU	GPIOA_PIR_PXPIR7,		7
	.EQU	GPIOA_PIR_PXPIR6,		6
	.EQU	GPIOA_PIR_PXPIR5,		5
	.EQU	GPIOA_PIR_PXPIR4,		4
	.EQU	GPIOA_PIR_PXPIR3,		3
	.EQU	GPIOA_PIR_PXPIR2,		2
	.EQU	GPIOA_PIR_PXPIR1,		1
	.EQU	GPIOA_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOA_POR,		0x50000004
//  0x5000 0004  GPIOA_POR   Bits-------------------------------------
	.EQU	GPIOA_POR_PXPOR15,		15
	.EQU	GPIOA_POR_PXPOR14,		14
	.EQU	GPIOA_POR_PXPOR13,		13
	.EQU	GPIOA_POR_PXPOR12,		12
	.EQU	GPIOA_POR_PXPOR11,		11
	.EQU	GPIOA_POR_PXPOR10,		10
	.EQU	GPIOA_POR_PXPOR9,		9
	.EQU	GPIOA_POR_PXPOR8,		8
	.EQU	GPIOA_POR_PXPOR7,		7
	.EQU	GPIOA_POR_PXPOR6,		6
	.EQU	GPIOA_POR_PXPOR5,		5
	.EQU	GPIOA_POR_PXPOR4,		4
	.EQU	GPIOA_POR_PXPOR3,		3
	.EQU	GPIOA_POR_PXPOR2,		2
	.EQU	GPIOA_POR_PXPOR1,		1
	.EQU	GPIOA_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOA_PUR,		0x50000008
//  0x5000 0008  GPIOA_PUR   Bits-------------------------------------
	.EQU	GPIOA_PUR_PXPUR15,		15
	.EQU	GPIOA_PUR_PXPUR14,		14
	.EQU	GPIOA_PUR_PXPUR13,		13
	.EQU	GPIOA_PUR_PXPUR12,		12
	.EQU	GPIOA_PUR_PXPUR11,		11
	.EQU	GPIOA_PUR_PXPUR10,		10
	.EQU	GPIOA_PUR_PXPUR9,		9
	.EQU	GPIOA_PUR_PXPUR8,		8
	.EQU	GPIOA_PUR_PXPUR7,		7
	.EQU	GPIOA_PUR_PXPUR6,		6
	.EQU	GPIOA_PUR_PXPUR5,		5
	.EQU	GPIOA_PUR_PXPUR4,		4
	.EQU	GPIOA_PUR_PXPUR3,		3
	.EQU	GPIOA_PUR_PXPUR2,		2
	.EQU	GPIOA_PUR_PXPUR1,		1
	.EQU	GPIOA_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOA_PDR,		0x5000000C
//  0x5000 000C  GPIOA_PDR   Bits-------------------------------------
	.EQU	GPIOA_PDR_PXPDR15,		15
	.EQU	GPIOA_PDR_PXPDR14,		14
	.EQU	GPIOA_PDR_PXPDR13,		13
	.EQU	GPIOA_PDR_PXPDR12,		12
	.EQU	GPIOA_PDR_PXPDR11,		11
	.EQU	GPIOA_PDR_PXPDR10,		10
	.EQU	GPIOA_PDR_PXPDR9,		9
	.EQU	GPIOA_PDR_PXPDR8,		8
	.EQU	GPIOA_PDR_PXPDR7,		7
	.EQU	GPIOA_PDR_PXPDR6,		6
	.EQU	GPIOA_PDR_PXPDR5,		5
	.EQU	GPIOA_PDR_PXPDR4,		4
	.EQU	GPIOA_PDR_PXPDR3,		3
	.EQU	GPIOA_PDR_PXPDR2,		2
	.EQU	GPIOA_PDR_PXPDR1,		1
	.EQU	GPIOA_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOA_PODR,	0x50000010
//  0x5000 0010  GPIOA_PODR   Bits-------------------------------------
	.EQU	GPIOA_PODR_PXPODR15,		15
	.EQU	GPIOA_PODR_PXPODR14,		14
	.EQU	GPIOA_PODR_PXPODR13,		13
	.EQU	GPIOA_PODR_PXPODR12,		12
	.EQU	GPIOA_PODR_PXPODR11,		11
	.EQU	GPIOA_PODR_PXPODR10,		10
	.EQU	GPIOA_PODR_PXPODR9,		9
	.EQU	GPIOA_PODR_PXPODR8,		8
	.EQU	GPIOA_PODR_PXPODR7,		7
	.EQU	GPIOA_PODR_PXPODR6,		6
	.EQU	GPIOA_PODR_PXPODR5,		5
	.EQU	GPIOA_PODR_PXPODR4,		4
	.EQU	GPIOA_PODR_PXPODR3,		3
	.EQU	GPIOA_PODR_PXPODR2,		2
	.EQU	GPIOA_PODR_PXPODR1,		1
	.EQU	GPIOA_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOA_PMOD,	0x50000014
//  0x5000 0014  GPIOA_PMOD   Bits-------------------------------------
	.EQU	GPIOA_PMOD_PXPMD15_1,		31
	.EQU	GPIOA_PMOD_PXPMD15_0,		30
	.EQU	GPIOA_PMOD_PXPMD14_1,		29
	.EQU	GPIOA_PMOD_PXPMD14_0,		28
	.EQU	GPIOA_PMOD_PXPMD13_1,		27
	.EQU	GPIOA_PMOD_PXPMD13_0,		26
	.EQU	GPIOA_PMOD_PXPMD12_1,		25
	.EQU	GPIOA_PMOD_PXPMD12_0,		24
	.EQU	GPIOA_PMOD_PXPMD11_1,		23
	.EQU	GPIOA_PMOD_PXPMD11_0,		22
	.EQU	GPIOA_PMOD_PXPMD10_1,		21
	.EQU	GPIOA_PMOD_PXPMD10_0,		20
	.EQU	GPIOA_PMOD_PXPMD9_1,		19
	.EQU	GPIOA_PMOD_PXPMD9_0,		18
	.EQU	GPIOA_PMOD_PXPMD8_1,		17
	.EQU	GPIOA_PMOD_PXPMD8_0,		16
	.EQU	GPIOA_PMOD_PXPMD7_1,		15
	.EQU	GPIOA_PMOD_PXPMD7_0,		14
	.EQU	GPIOA_PMOD_PXPMD6_1,		13
	.EQU	GPIOA_PMOD_PXPMD6_0,		12
	.EQU	GPIOA_PMOD_PXPMD5_1,		11
	.EQU	GPIOA_PMOD_PXPMD5_0,		10
	.EQU	GPIOA_PMOD_PXPMD4_1,		9
	.EQU	GPIOA_PMOD_PXPMD4_0,		8
	.EQU	GPIOA_PMOD_PXPMD3_1,		7
	.EQU	GPIOA_PMOD_PXPMD3_0,		6
	.EQU	GPIOA_PMOD_PXPMD2_1,		5
	.EQU	GPIOA_PMOD_PXPMD2_0,		4
	.EQU	GPIOA_PMOD_PXPMD1_1,		3
	.EQU	GPIOA_PMOD_PXPMD1_0,		2
	.EQU	GPIOA_PMOD_PXPMD0_1,		1
	.EQU	GPIOA_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOA_OMOD,	0x50000018
//  0x5000 0018  GPIOA_OMOD   Bits-------------------------------------
	.EQU	GPIOA_OMOD_PXOMD15,		30
	.EQU	GPIOA_OMOD_PXOMD14,		28
	.EQU	GPIOA_OMOD_PXOMD13,		26
	.EQU	GPIOA_OMOD_PXOMD12,		24
	.EQU	GPIOA_OMOD_PXOMD11,		22
	.EQU	GPIOA_OMOD_PXOMD10,		20
	.EQU	GPIOA_OMOD_PXOMD9,		18
	.EQU	GPIOA_OMOD_PXOMD8,		16
	.EQU	GPIOA_OMOD_PXOMD7,		14
	.EQU	GPIOA_OMOD_PXOMD6,		12
	.EQU	GPIOA_OMOD_PXOMD5,		10
	.EQU	GPIOA_OMOD_PXOMD4,		8
	.EQU	GPIOA_OMOD_PXOMD3,		6
	.EQU	GPIOA_OMOD_PXOMD2,		4
	.EQU	GPIOA_OMOD_PXOMD1,		2
	.EQU	GPIOA_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOA_LOCK,	0x5000001C
//  0x5000 001C  GPIOA_LOCK   Bits-------------------------------------
	.EQU	GPIOA_LOCK_PXLCKKEY15,		31
	.EQU	GPIOA_LOCK_PXLCKKEY14,		30
	.EQU	GPIOA_LOCK_PXLCKKEY13,		29
	.EQU	GPIOA_LOCK_PXLCKKEY12,		28
	.EQU	GPIOA_LOCK_PXLCKKEY11,		27
	.EQU	GPIOA_LOCK_PXLCKKEY10,		26
	.EQU	GPIOA_LOCK_PXLCKKEY9,		25
	.EQU	GPIOA_LOCK_PXLCKKEY8,		24
	.EQU	GPIOA_LOCK_PXLCKKEY7,		23
	.EQU	GPIOA_LOCK_PXLCKKEY6,		22
	.EQU	GPIOA_LOCK_PXLCKKEY5,		21
	.EQU	GPIOA_LOCK_PXLCKKEY4,		20
	.EQU	GPIOA_LOCK_PXLCKKEY3,		19
	.EQU	GPIOA_LOCK_PXLCKKEY2,		18
	.EQU	GPIOA_LOCK_PXLCKKEY1,		17
	.EQU	GPIOA_LOCK_PXLCKKEY0,		16
	.EQU	GPIOA_LOCK_PXLCK15,		15
	.EQU	GPIOA_LOCK_PXLCK14,		14
	.EQU	GPIOA_LOCK_PXLCK13,		13
	.EQU	GPIOA_LOCK_PXLCK12,		12
	.EQU	GPIOA_LOCK_PXLCK11,		11
	.EQU	GPIOA_LOCK_PXLCK10,		10
	.EQU	GPIOA_LOCK_PXLCK9,		9
	.EQU	GPIOA_LOCK_PXLCK8,		8
	.EQU	GPIOA_LOCK_PXLCK7,		7
	.EQU	GPIOA_LOCK_PXLCK6,		6
	.EQU	GPIOA_LOCK_PXLCK5,		5
	.EQU	GPIOA_LOCK_PXLCK4,		4
	.EQU	GPIOA_LOCK_PXLCK3,		3
	.EQU	GPIOA_LOCK_PXLCK2,		2
	.EQU	GPIOA_LOCK_PXLCK1,		1
	.EQU	GPIOA_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOA_RMPL,	0x50000020
//  0x5000 0020  GPIOA_RMPL   Bits-------------------------------------
	.EQU	GPIOA_RMPL_PXRMP7_3,		31
	.EQU	GPIOA_RMPL_PXRMP7_2,		30
	.EQU	GPIOA_RMPL_PXRMP7_1,		29
	.EQU	GPIOA_RMPL_PXRMP7_0,		28
	.EQU	GPIOA_RMPL_PXRMP6_3,		27
	.EQU	GPIOA_RMPL_PXRMP6_2,		26
	.EQU	GPIOA_RMPL_PXRMP6_1,		25
	.EQU	GPIOA_RMPL_PXRMP6_0,		24
	.EQU	GPIOA_RMPL_PXRMP5_3,		23
	.EQU	GPIOA_RMPL_PXRMP5_2,		22
	.EQU	GPIOA_RMPL_PXRMP5_1,		21
	.EQU	GPIOA_RMPL_PXRMP5_0,		20
	.EQU	GPIOA_RMPL_PXRMP4_3,		19
	.EQU	GPIOA_RMPL_PXRMP4_2,		18
	.EQU	GPIOA_RMPL_PXRMP4_1,		17
	.EQU	GPIOA_RMPL_PXRMP4_0,		16
	.EQU	GPIOA_RMPL_PXRMP3_3,		15
	.EQU	GPIOA_RMPL_PXRMP3_2,		14
	.EQU	GPIOA_RMPL_PXRMP3_1,		13
	.EQU	GPIOA_RMPL_PXRMP3_0,		12
	.EQU	GPIOA_RMPL_PXRMP2_3,		11
	.EQU	GPIOA_RMPL_PXRMP2_2,		10
	.EQU	GPIOA_RMPL_PXRMP2_1,		9
	.EQU	GPIOA_RMPL_PXRMP2_0,		8
	.EQU	GPIOA_RMPL_PXRMP1_3,		7
	.EQU	GPIOA_RMPL_PXRMP1_2,		6
	.EQU	GPIOA_RMPL_PXRMP1_1,		5
	.EQU	GPIOA_RMPL_PXRMP1_0,		4
	.EQU	GPIOA_RMPL_PXRMP0_3,		3
	.EQU	GPIOA_RMPL_PXRMP0_2,		2
	.EQU	GPIOA_RMPL_PXRMP0_1,		1
	.EQU	GPIOA_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOA_RMPH,	0x50000024
//  0x5000 0024  GPIOA_RMPH   Bits-------------------------------------
	.EQU	GPIOA_RMPH_PXRMP15_3,		31
	.EQU	GPIOA_RMPH_PXRMP15_2,		30
	.EQU	GPIOA_RMPH_PXRMP15_1,		29
	.EQU	GPIOA_RMPH_PXRMP15_0,		28
	.EQU	GPIOA_RMPH_PXRMP14_3,		27
	.EQU	GPIOA_RMPH_PXRMP14_2,		26
	.EQU	GPIOA_RMPH_PXRMP14_1,		25
	.EQU	GPIOA_RMPH_PXRMP14_0,		24
	.EQU	GPIOA_RMPH_PXRMP13_3,		23
	.EQU	GPIOA_RMPH_PXRMP13_2,		22
	.EQU	GPIOA_RMPH_PXRMP13_1,		21
	.EQU	GPIOA_RMPH_PXRMP13_0,		20
	.EQU	GPIOA_RMPH_PXRMP12_3,		19
	.EQU	GPIOA_RMPH_PXRMP12_2,		18
	.EQU	GPIOA_RMPH_PXRMP12_1,		17
	.EQU	GPIOA_RMPH_PXRMP12_0,		16
	.EQU	GPIOA_RMPH_PXRMP11_3,		15
	.EQU	GPIOA_RMPH_PXRMP11_2,		14
	.EQU	GPIOA_RMPH_PXRMP11_1,		13
	.EQU	GPIOA_RMPH_PXRMP11_0,		12
	.EQU	GPIOA_RMPH_PXRMP10_3,		11
	.EQU	GPIOA_RMPH_PXRMP10_2,		10
	.EQU	GPIOA_RMPH_PXRMP10_1,		9
	.EQU	GPIOA_RMPH_PXRMP10_0,		8
	.EQU	GPIOA_RMPH_PXRMP9_3,		7
	.EQU	GPIOA_RMPH_PXRMP9_2,		6
	.EQU	GPIOA_RMPH_PXRMP9_1,		5
	.EQU	GPIOA_RMPH_PXRMP9_0,		4
	.EQU	GPIOA_RMPH_PXRMP8_3,		3
	.EQU	GPIOA_RMPH_PXRMP8_2,		2
	.EQU	GPIOA_RMPH_PXRMP8_1,		1
	.EQU	GPIOA_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOA_RMP_MSB,	0x50000034
//  0x5000 0034  GPIOA_RMP_MSB   Bits-------------------------------------
	.EQU	GPIOA_RMP_MSB_RMP_MSB31,		31
	.EQU	GPIOA_RMP_MSB_RMP_MSB30,		30
	.EQU	GPIOA_RMP_MSB_RMP_MSB29,		29
	.EQU	GPIOA_RMP_MSB_RMP_MSB28,		28
	.EQU	GPIOA_RMP_MSB_RMP_MSB27,		27
	.EQU	GPIOA_RMP_MSB_RMP_MSB26,		26
	.EQU	GPIOA_RMP_MSB_RMP_MSB25,		25
	.EQU	GPIOA_RMP_MSB_RMP_MSB24,		24
	.EQU	GPIOA_RMP_MSB_RMP_MSB23,		23
	.EQU	GPIOA_RMP_MSB_RMP_MSB22,		22
	.EQU	GPIOA_RMP_MSB_RMP_MSB21,		21
	.EQU	GPIOA_RMP_MSB_RMP_MSB20,		20
	.EQU	GPIOA_RMP_MSB_RMP_MSB19,		19
	.EQU	GPIOA_RMP_MSB_RMP_MSB18,		18
	.EQU	GPIOA_RMP_MSB_RMP_MSB17,		17
	.EQU	GPIOA_RMP_MSB_RMP_MSB16,		16
	.EQU	GPIOA_RMP_MSB_RMP_MSB15,		15
	.EQU	GPIOA_RMP_MSB_RMP_MSB14,		14
	.EQU	GPIOA_RMP_MSB_RMP_MSB13,		13
	.EQU	GPIOA_RMP_MSB_RMP_MSB12,		12
	.EQU	GPIOA_RMP_MSB_RMP_MSB11,		11
	.EQU	GPIOA_RMP_MSB_RMP_MSB10,		10
	.EQU	GPIOA_RMP_MSB_RMP_MSB9,		9
	.EQU	GPIOA_RMP_MSB_RMP_MSB8,		8
	.EQU	GPIOA_RMP_MSB_RMP_MSB7,		7
	.EQU	GPIOA_RMP_MSB_RMP_MSB6,		6
	.EQU	GPIOA_RMP_MSB_RMP_MSB5,		5
	.EQU	GPIOA_RMP_MSB_RMP_MSB4,		4
	.EQU	GPIOA_RMP_MSB_RMP_MSB3,		3
	.EQU	GPIOA_RMP_MSB_RMP_MSB2,		2
	.EQU	GPIOA_RMP_MSB_RMP_MSB1,		1
	.EQU	GPIOA_RMP_MSB_RMP_MSB0,		0
//  register-------------------------------------
	.EQU	GPIOB_PIR,		0x50000040
//  0x5000 0040  GPIOB_PIR   Bits-------------------------------------
	.EQU	GPIOB_PIR_PXPIR15,		15
	.EQU	GPIOB_PIR_PXPIR14,		14
	.EQU	GPIOB_PIR_PXPIR13,		13
	.EQU	GPIOB_PIR_PXPIR12,		12
	.EQU	GPIOB_PIR_PXPIR11,		11
	.EQU	GPIOB_PIR_PXPIR10,		10
	.EQU	GPIOB_PIR_PXPIR9,		9
	.EQU	GPIOB_PIR_PXPIR8,		8
	.EQU	GPIOB_PIR_PXPIR7,		7
	.EQU	GPIOB_PIR_PXPIR6,		6
	.EQU	GPIOB_PIR_PXPIR5,		5
	.EQU	GPIOB_PIR_PXPIR4,		4
	.EQU	GPIOB_PIR_PXPIR3,		3
	.EQU	GPIOB_PIR_PXPIR2,		2
	.EQU	GPIOB_PIR_PXPIR1,		1
	.EQU	GPIOB_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOB_POR,		0x50000044
//  0x5000 0044  GPIOB_POR   Bits-------------------------------------
	.EQU	GPIOB_POR_PXPOR15,		15
	.EQU	GPIOB_POR_PXPOR14,		14
	.EQU	GPIOB_POR_PXPOR13,		13
	.EQU	GPIOB_POR_PXPOR12,		12
	.EQU	GPIOB_POR_PXPOR11,		11
	.EQU	GPIOB_POR_PXPOR10,		10
	.EQU	GPIOB_POR_PXPOR9,		9
	.EQU	GPIOB_POR_PXPOR8,		8
	.EQU	GPIOB_POR_PXPOR7,		7
	.EQU	GPIOB_POR_PXPOR6,		6
	.EQU	GPIOB_POR_PXPOR5,		5
	.EQU	GPIOB_POR_PXPOR4,		4
	.EQU	GPIOB_POR_PXPOR3,		3
	.EQU	GPIOB_POR_PXPOR2,		2
	.EQU	GPIOB_POR_PXPOR1,		1
	.EQU	GPIOB_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOB_PUR,		0x50000048
//  0x5000 0048  GPIOB_PUR   Bits-------------------------------------
	.EQU	GPIOB_PUR_PXPUR15,		15
	.EQU	GPIOB_PUR_PXPUR14,		14
	.EQU	GPIOB_PUR_PXPUR13,		13
	.EQU	GPIOB_PUR_PXPUR12,		12
	.EQU	GPIOB_PUR_PXPUR11,		11
	.EQU	GPIOB_PUR_PXPUR10,		10
	.EQU	GPIOB_PUR_PXPUR9,		9
	.EQU	GPIOB_PUR_PXPUR8,		8
	.EQU	GPIOB_PUR_PXPUR7,		7
	.EQU	GPIOB_PUR_PXPUR6,		6
	.EQU	GPIOB_PUR_PXPUR5,		5
	.EQU	GPIOB_PUR_PXPUR4,		4
	.EQU	GPIOB_PUR_PXPUR3,		3
	.EQU	GPIOB_PUR_PXPUR2,		2
	.EQU	GPIOB_PUR_PXPUR1,		1
	.EQU	GPIOB_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOB_PDR,		0x5000004C
//  0x5000 004C  GPIOB_PDR   Bits-------------------------------------
	.EQU	GPIOB_PDR_PXPDR15,		15
	.EQU	GPIOB_PDR_PXPDR14,		14
	.EQU	GPIOB_PDR_PXPDR13,		13
	.EQU	GPIOB_PDR_PXPDR12,		12
	.EQU	GPIOB_PDR_PXPDR11,		11
	.EQU	GPIOB_PDR_PXPDR10,		10
	.EQU	GPIOB_PDR_PXPDR9,		9
	.EQU	GPIOB_PDR_PXPDR8,		8
	.EQU	GPIOB_PDR_PXPDR7,		7
	.EQU	GPIOB_PDR_PXPDR6,		6
	.EQU	GPIOB_PDR_PXPDR5,		5
	.EQU	GPIOB_PDR_PXPDR4,		4
	.EQU	GPIOB_PDR_PXPDR3,		3
	.EQU	GPIOB_PDR_PXPDR2,		2
	.EQU	GPIOB_PDR_PXPDR1,		1
	.EQU	GPIOB_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOB_PODR,	0x50000050
//  0x5000 0050  GPIOB_PODR   Bits-------------------------------------
	.EQU	GPIOB_PODR_PXPODR15,		15
	.EQU	GPIOB_PODR_PXPODR14,		14
	.EQU	GPIOB_PODR_PXPODR13,		13
	.EQU	GPIOB_PODR_PXPODR12,		12
	.EQU	GPIOB_PODR_PXPODR11,		11
	.EQU	GPIOB_PODR_PXPODR10,		10
	.EQU	GPIOB_PODR_PXPODR9,		9
	.EQU	GPIOB_PODR_PXPODR8,		8
	.EQU	GPIOB_PODR_PXPODR7,		7
	.EQU	GPIOB_PODR_PXPODR6,		6
	.EQU	GPIOB_PODR_PXPODR5,		5
	.EQU	GPIOB_PODR_PXPODR4,		4
	.EQU	GPIOB_PODR_PXPODR3,		3
	.EQU	GPIOB_PODR_PXPODR2,		2
	.EQU	GPIOB_PODR_PXPODR1,		1
	.EQU	GPIOB_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOB_PMOD,	0x50000054
//  0x5000 0054  GPIOB_PMOD   Bits-------------------------------------
	.EQU	GPIOB_PMOD_PXPMD15_1,		31
	.EQU	GPIOB_PMOD_PXPMD15_0,		30
	.EQU	GPIOB_PMOD_PXPMD14_1,		29
	.EQU	GPIOB_PMOD_PXPMD14_0,		28
	.EQU	GPIOB_PMOD_PXPMD13_1,		27
	.EQU	GPIOB_PMOD_PXPMD13_0,		26
	.EQU	GPIOB_PMOD_PXPMD12_1,		25
	.EQU	GPIOB_PMOD_PXPMD12_0,		24
	.EQU	GPIOB_PMOD_PXPMD11_1,		23
	.EQU	GPIOB_PMOD_PXPMD11_0,		22
	.EQU	GPIOB_PMOD_PXPMD10_1,		21
	.EQU	GPIOB_PMOD_PXPMD10_0,		20
	.EQU	GPIOB_PMOD_PXPMD9_1,		19
	.EQU	GPIOB_PMOD_PXPMD9_0,		18
	.EQU	GPIOB_PMOD_PXPMD8_1,		17
	.EQU	GPIOB_PMOD_PXPMD8_0,		16
	.EQU	GPIOB_PMOD_PXPMD7_1,		15
	.EQU	GPIOB_PMOD_PXPMD7_0,		14
	.EQU	GPIOB_PMOD_PXPMD6_1,		13
	.EQU	GPIOB_PMOD_PXPMD6_0,		12
	.EQU	GPIOB_PMOD_PXPMD5_1,		11
	.EQU	GPIOB_PMOD_PXPMD5_0,		10
	.EQU	GPIOB_PMOD_PXPMD4_1,		9
	.EQU	GPIOB_PMOD_PXPMD4_0,		8
	.EQU	GPIOB_PMOD_PXPMD3_1,		7
	.EQU	GPIOB_PMOD_PXPMD3_0,		6
	.EQU	GPIOB_PMOD_PXPMD2_1,		5
	.EQU	GPIOB_PMOD_PXPMD2_0,		4
	.EQU	GPIOB_PMOD_PXPMD1_1,		3
	.EQU	GPIOB_PMOD_PXPMD1_0,		2
	.EQU	GPIOB_PMOD_PXPMD0_1,		1
	.EQU	GPIOB_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOB_OMOD,	0x50000058
//  0x5000 0058  GPIOB_OMOD   Bits-------------------------------------
	.EQU	GPIOB_OMOD_PXOMD15,		30
	.EQU	GPIOB_OMOD_PXOMD14,		28
	.EQU	GPIOB_OMOD_PXOMD13,		26
	.EQU	GPIOB_OMOD_PXOMD12,		24
	.EQU	GPIOB_OMOD_PXOMD11,		22
	.EQU	GPIOB_OMOD_PXOMD10,		20
	.EQU	GPIOB_OMOD_PXOMD9,		18
	.EQU	GPIOB_OMOD_PXOMD8,		16
	.EQU	GPIOB_OMOD_PXOMD7,		14
	.EQU	GPIOB_OMOD_PXOMD6,		12
	.EQU	GPIOB_OMOD_PXOMD5,		10
	.EQU	GPIOB_OMOD_PXOMD4,		8
	.EQU	GPIOB_OMOD_PXOMD3,		6
	.EQU	GPIOB_OMOD_PXOMD2,		4
	.EQU	GPIOB_OMOD_PXOMD1,		2
	.EQU	GPIOB_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOB_LOCK,	0x5000005C
//  0x5000 005C  GPIOB_LOCK   Bits-------------------------------------
	.EQU	GPIOB_LOCK_PXLCKKEY15,		31
	.EQU	GPIOB_LOCK_PXLCKKEY14,		30
	.EQU	GPIOB_LOCK_PXLCKKEY13,		29
	.EQU	GPIOB_LOCK_PXLCKKEY12,		28
	.EQU	GPIOB_LOCK_PXLCKKEY11,		27
	.EQU	GPIOB_LOCK_PXLCKKEY10,		26
	.EQU	GPIOB_LOCK_PXLCKKEY9,		25
	.EQU	GPIOB_LOCK_PXLCKKEY8,		24
	.EQU	GPIOB_LOCK_PXLCKKEY7,		23
	.EQU	GPIOB_LOCK_PXLCKKEY6,		22
	.EQU	GPIOB_LOCK_PXLCKKEY5,		21
	.EQU	GPIOB_LOCK_PXLCKKEY4,		20
	.EQU	GPIOB_LOCK_PXLCKKEY3,		19
	.EQU	GPIOB_LOCK_PXLCKKEY2,		18
	.EQU	GPIOB_LOCK_PXLCKKEY1,		17
	.EQU	GPIOB_LOCK_PXLCKKEY0,		16
	.EQU	GPIOB_LOCK_PXLCK15,		15
	.EQU	GPIOB_LOCK_PXLCK14,		14
	.EQU	GPIOB_LOCK_PXLCK13,		13
	.EQU	GPIOB_LOCK_PXLCK12,		12
	.EQU	GPIOB_LOCK_PXLCK11,		11
	.EQU	GPIOB_LOCK_PXLCK10,		10
	.EQU	GPIOB_LOCK_PXLCK9,		9
	.EQU	GPIOB_LOCK_PXLCK8,		8
	.EQU	GPIOB_LOCK_PXLCK7,		7
	.EQU	GPIOB_LOCK_PXLCK6,		6
	.EQU	GPIOB_LOCK_PXLCK5,		5
	.EQU	GPIOB_LOCK_PXLCK4,		4
	.EQU	GPIOB_LOCK_PXLCK3,		3
	.EQU	GPIOB_LOCK_PXLCK2,		2
	.EQU	GPIOB_LOCK_PXLCK1,		1
	.EQU	GPIOB_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOB_RMPL,	0x50000060
//  0x5000 0060  GPIOB_RMPL   Bits-------------------------------------
	.EQU	GPIOB_RMPL_PXRMP7_3,		31
	.EQU	GPIOB_RMPL_PXRMP7_2,		30
	.EQU	GPIOB_RMPL_PXRMP7_1,		29
	.EQU	GPIOB_RMPL_PXRMP7_0,		28
	.EQU	GPIOB_RMPL_PXRMP6_3,		27
	.EQU	GPIOB_RMPL_PXRMP6_2,		26
	.EQU	GPIOB_RMPL_PXRMP6_1,		25
	.EQU	GPIOB_RMPL_PXRMP6_0,		24
	.EQU	GPIOB_RMPL_PXRMP5_3,		23
	.EQU	GPIOB_RMPL_PXRMP5_2,		22
	.EQU	GPIOB_RMPL_PXRMP5_1,		21
	.EQU	GPIOB_RMPL_PXRMP5_0,		20
	.EQU	GPIOB_RMPL_PXRMP4_3,		19
	.EQU	GPIOB_RMPL_PXRMP4_2,		18
	.EQU	GPIOB_RMPL_PXRMP4_1,		17
	.EQU	GPIOB_RMPL_PXRMP4_0,		16
	.EQU	GPIOB_RMPL_PXRMP3_3,		15
	.EQU	GPIOB_RMPL_PXRMP3_2,		14
	.EQU	GPIOB_RMPL_PXRMP3_1,		13
	.EQU	GPIOB_RMPL_PXRMP3_0,		12
	.EQU	GPIOB_RMPL_PXRMP2_3,		11
	.EQU	GPIOB_RMPL_PXRMP2_2,		10
	.EQU	GPIOB_RMPL_PXRMP2_1,		9
	.EQU	GPIOB_RMPL_PXRMP2_0,		8
	.EQU	GPIOB_RMPL_PXRMP1_3,		7
	.EQU	GPIOB_RMPL_PXRMP1_2,		6
	.EQU	GPIOB_RMPL_PXRMP1_1,		5
	.EQU	GPIOB_RMPL_PXRMP1_0,		4
	.EQU	GPIOB_RMPL_PXRMP0_3,		3
	.EQU	GPIOB_RMPL_PXRMP0_2,		2
	.EQU	GPIOB_RMPL_PXRMP0_1,		1
	.EQU	GPIOB_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOB_RMPH,	0x50000064
//  0x5000 0064  GPIOB_RMPH   Bits-------------------------------------
	.EQU	GPIOB_RMPH_PXRMP15_3,		31
	.EQU	GPIOB_RMPH_PXRMP15_2,		30
	.EQU	GPIOB_RMPH_PXRMP15_1,		29
	.EQU	GPIOB_RMPH_PXRMP15_0,		28
	.EQU	GPIOB_RMPH_PXRMP14_3,		27
	.EQU	GPIOB_RMPH_PXRMP14_2,		26
	.EQU	GPIOB_RMPH_PXRMP14_1,		25
	.EQU	GPIOB_RMPH_PXRMP14_0,		24
	.EQU	GPIOB_RMPH_PXRMP13_3,		23
	.EQU	GPIOB_RMPH_PXRMP13_2,		22
	.EQU	GPIOB_RMPH_PXRMP13_1,		21
	.EQU	GPIOB_RMPH_PXRMP13_0,		20
	.EQU	GPIOB_RMPH_PXRMP12_3,		19
	.EQU	GPIOB_RMPH_PXRMP12_2,		18
	.EQU	GPIOB_RMPH_PXRMP12_1,		17
	.EQU	GPIOB_RMPH_PXRMP12_0,		16
	.EQU	GPIOB_RMPH_PXRMP11_3,		15
	.EQU	GPIOB_RMPH_PXRMP11_2,		14
	.EQU	GPIOB_RMPH_PXRMP11_1,		13
	.EQU	GPIOB_RMPH_PXRMP11_0,		12
	.EQU	GPIOB_RMPH_PXRMP10_3,		11
	.EQU	GPIOB_RMPH_PXRMP10_2,		10
	.EQU	GPIOB_RMPH_PXRMP10_1,		9
	.EQU	GPIOB_RMPH_PXRMP10_0,		8
	.EQU	GPIOB_RMPH_PXRMP9_3,		7
	.EQU	GPIOB_RMPH_PXRMP9_2,		6
	.EQU	GPIOB_RMPH_PXRMP9_1,		5
	.EQU	GPIOB_RMPH_PXRMP9_0,		4
	.EQU	GPIOB_RMPH_PXRMP8_3,		3
	.EQU	GPIOB_RMPH_PXRMP8_2,		2
	.EQU	GPIOB_RMPH_PXRMP8_1,		1
	.EQU	GPIOB_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOB_UHS,		0x50000068
//  0x5000 0068  GPIOB_UHS   Bits-------------------------------------
	.EQU	GPIOB_UHS_UHSEN3,		3
	.EQU	GPIOB_UHS_UHSEN2,		2
	.EQU	GPIOB_UHS_UHSEN1,		1
	.EQU	GPIOB_UHS_UHSEN0,		0
//  register-------------------------------------
	.EQU	GPIOB_RMP_MSB,	0x50000074
//  0x5000 0074  GPIOB_RMP_MSB   Bits-------------------------------------
	.EQU	GPIOB_RMP_MSB_RMP_MSB31,		31
	.EQU	GPIOB_RMP_MSB_RMP_MSB30,		30
	.EQU	GPIOB_RMP_MSB_RMP_MSB29,		29
	.EQU	GPIOB_RMP_MSB_RMP_MSB28,		28
	.EQU	GPIOB_RMP_MSB_RMP_MSB27,		27
	.EQU	GPIOB_RMP_MSB_RMP_MSB26,		26
	.EQU	GPIOB_RMP_MSB_RMP_MSB25,		25
	.EQU	GPIOB_RMP_MSB_RMP_MSB24,		24
	.EQU	GPIOB_RMP_MSB_RMP_MSB23,		23
	.EQU	GPIOB_RMP_MSB_RMP_MSB22,		22
	.EQU	GPIOB_RMP_MSB_RMP_MSB21,		21
	.EQU	GPIOB_RMP_MSB_RMP_MSB20,		20
	.EQU	GPIOB_RMP_MSB_RMP_MSB19,		19
	.EQU	GPIOB_RMP_MSB_RMP_MSB18,		18
	.EQU	GPIOB_RMP_MSB_RMP_MSB17,		17
	.EQU	GPIOB_RMP_MSB_RMP_MSB16,		16
	.EQU	GPIOB_RMP_MSB_RMP_MSB15,		15
	.EQU	GPIOB_RMP_MSB_RMP_MSB14,		14
	.EQU	GPIOB_RMP_MSB_RMP_MSB13,		13
	.EQU	GPIOB_RMP_MSB_RMP_MSB12,		12
	.EQU	GPIOB_RMP_MSB_RMP_MSB11,		11
	.EQU	GPIOB_RMP_MSB_RMP_MSB10,		10
	.EQU	GPIOB_RMP_MSB_RMP_MSB9,		9
	.EQU	GPIOB_RMP_MSB_RMP_MSB8,		8
	.EQU	GPIOB_RMP_MSB_RMP_MSB7,		7
	.EQU	GPIOB_RMP_MSB_RMP_MSB6,		6
	.EQU	GPIOB_RMP_MSB_RMP_MSB5,		5
	.EQU	GPIOB_RMP_MSB_RMP_MSB4,		4
	.EQU	GPIOB_RMP_MSB_RMP_MSB3,		3
	.EQU	GPIOB_RMP_MSB_RMP_MSB2,		2
	.EQU	GPIOB_RMP_MSB_RMP_MSB1,		1
	.EQU	GPIOB_RMP_MSB_RMP_MSB0,		0
//  register-------------------------------------
	.EQU	GPIOC_PIR,		0x50000080
//  0x5000 0080  GPIOC_PIR   Bits-------------------------------------
	.EQU	GPIOC_PIR_PXPIR15,		15
	.EQU	GPIOC_PIR_PXPIR14,		14
	.EQU	GPIOC_PIR_PXPIR13,		13
	.EQU	GPIOC_PIR_PXPIR12,		12
	.EQU	GPIOC_PIR_PXPIR11,		11
	.EQU	GPIOC_PIR_PXPIR10,		10
	.EQU	GPIOC_PIR_PXPIR9,		9
	.EQU	GPIOC_PIR_PXPIR8,		8
	.EQU	GPIOC_PIR_PXPIR7,		7
	.EQU	GPIOC_PIR_PXPIR6,		6
	.EQU	GPIOC_PIR_PXPIR5,		5
	.EQU	GPIOC_PIR_PXPIR4,		4
	.EQU	GPIOC_PIR_PXPIR3,		3
	.EQU	GPIOC_PIR_PXPIR2,		2
	.EQU	GPIOC_PIR_PXPIR1,		1
	.EQU	GPIOC_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOC_POR,		0x50000084
//  0x5000 0084  GPIOC_POR   Bits-------------------------------------
	.EQU	GPIOC_POR_PXPOR15,		15
	.EQU	GPIOC_POR_PXPOR14,		14
	.EQU	GPIOC_POR_PXPOR13,		13
	.EQU	GPIOC_POR_PXPOR12,		12
	.EQU	GPIOC_POR_PXPOR11,		11
	.EQU	GPIOC_POR_PXPOR10,		10
	.EQU	GPIOC_POR_PXPOR9,		9
	.EQU	GPIOC_POR_PXPOR8,		8
	.EQU	GPIOC_POR_PXPOR7,		7
	.EQU	GPIOC_POR_PXPOR6,		6
	.EQU	GPIOC_POR_PXPOR5,		5
	.EQU	GPIOC_POR_PXPOR4,		4
	.EQU	GPIOC_POR_PXPOR3,		3
	.EQU	GPIOC_POR_PXPOR2,		2
	.EQU	GPIOC_POR_PXPOR1,		1
	.EQU	GPIOC_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOC_PUR,		0x50000088
//  0x5000 0088  GPIOC_PUR   Bits-------------------------------------
	.EQU	GPIOC_PUR_PXPUR15,		15
	.EQU	GPIOC_PUR_PXPUR14,		14
	.EQU	GPIOC_PUR_PXPUR13,		13
	.EQU	GPIOC_PUR_PXPUR12,		12
	.EQU	GPIOC_PUR_PXPUR11,		11
	.EQU	GPIOC_PUR_PXPUR10,		10
	.EQU	GPIOC_PUR_PXPUR9,		9
	.EQU	GPIOC_PUR_PXPUR8,		8
	.EQU	GPIOC_PUR_PXPUR7,		7
	.EQU	GPIOC_PUR_PXPUR6,		6
	.EQU	GPIOC_PUR_PXPUR5,		5
	.EQU	GPIOC_PUR_PXPUR4,		4
	.EQU	GPIOC_PUR_PXPUR3,		3
	.EQU	GPIOC_PUR_PXPUR2,		2
	.EQU	GPIOC_PUR_PXPUR1,		1
	.EQU	GPIOC_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOC_PDR,		0x5000008C
//  0x5000 008C  GPIOC_PDR   Bits-------------------------------------
	.EQU	GPIOC_PDR_PXPDR15,		15
	.EQU	GPIOC_PDR_PXPDR14,		14
	.EQU	GPIOC_PDR_PXPDR13,		13
	.EQU	GPIOC_PDR_PXPDR12,		12
	.EQU	GPIOC_PDR_PXPDR11,		11
	.EQU	GPIOC_PDR_PXPDR10,		10
	.EQU	GPIOC_PDR_PXPDR9,		9
	.EQU	GPIOC_PDR_PXPDR8,		8
	.EQU	GPIOC_PDR_PXPDR7,		7
	.EQU	GPIOC_PDR_PXPDR6,		6
	.EQU	GPIOC_PDR_PXPDR5,		5
	.EQU	GPIOC_PDR_PXPDR4,		4
	.EQU	GPIOC_PDR_PXPDR3,		3
	.EQU	GPIOC_PDR_PXPDR2,		2
	.EQU	GPIOC_PDR_PXPDR1,		1
	.EQU	GPIOC_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOC_PODR,	0x50000090
//  0x5000 0090  GPIOC_PODR   Bits-------------------------------------
	.EQU	GPIOC_PODR_PXPODR15,		15
	.EQU	GPIOC_PODR_PXPODR14,		14
	.EQU	GPIOC_PODR_PXPODR13,		13
	.EQU	GPIOC_PODR_PXPODR12,		12
	.EQU	GPIOC_PODR_PXPODR11,		11
	.EQU	GPIOC_PODR_PXPODR10,		10
	.EQU	GPIOC_PODR_PXPODR9,		9
	.EQU	GPIOC_PODR_PXPODR8,		8
	.EQU	GPIOC_PODR_PXPODR7,		7
	.EQU	GPIOC_PODR_PXPODR6,		6
	.EQU	GPIOC_PODR_PXPODR5,		5
	.EQU	GPIOC_PODR_PXPODR4,		4
	.EQU	GPIOC_PODR_PXPODR3,		3
	.EQU	GPIOC_PODR_PXPODR2,		2
	.EQU	GPIOC_PODR_PXPODR1,		1
	.EQU	GPIOC_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOC_PMOD,	0x50000094
//  0x5000 0094  GPIOC_PMOD   Bits-------------------------------------
	.EQU	GPIOC_PMOD_PXPMD15_1,		31
	.EQU	GPIOC_PMOD_PXPMD15_0,		30
	.EQU	GPIOC_PMOD_PXPMD14_1,		29
	.EQU	GPIOC_PMOD_PXPMD14_0,		28
	.EQU	GPIOC_PMOD_PXPMD13_1,		27
	.EQU	GPIOC_PMOD_PXPMD13_0,		26
	.EQU	GPIOC_PMOD_PXPMD12_1,		25
	.EQU	GPIOC_PMOD_PXPMD12_0,		24
	.EQU	GPIOC_PMOD_PXPMD11_1,		23
	.EQU	GPIOC_PMOD_PXPMD11_0,		22
	.EQU	GPIOC_PMOD_PXPMD10_1,		21
	.EQU	GPIOC_PMOD_PXPMD10_0,		20
	.EQU	GPIOC_PMOD_PXPMD9_1,		19
	.EQU	GPIOC_PMOD_PXPMD9_0,		18
	.EQU	GPIOC_PMOD_PXPMD8_1,		17
	.EQU	GPIOC_PMOD_PXPMD8_0,		16
	.EQU	GPIOC_PMOD_PXPMD7_1,		15
	.EQU	GPIOC_PMOD_PXPMD7_0,		14
	.EQU	GPIOC_PMOD_PXPMD6_1,		13
	.EQU	GPIOC_PMOD_PXPMD6_0,		12
	.EQU	GPIOC_PMOD_PXPMD5_1,		11
	.EQU	GPIOC_PMOD_PXPMD5_0,		10
	.EQU	GPIOC_PMOD_PXPMD4_1,		9
	.EQU	GPIOC_PMOD_PXPMD4_0,		8
	.EQU	GPIOC_PMOD_PXPMD3_1,		7
	.EQU	GPIOC_PMOD_PXPMD3_0,		6
	.EQU	GPIOC_PMOD_PXPMD2_1,		5
	.EQU	GPIOC_PMOD_PXPMD2_0,		4
	.EQU	GPIOC_PMOD_PXPMD1_1,		3
	.EQU	GPIOC_PMOD_PXPMD1_0,		2
	.EQU	GPIOC_PMOD_PXPMD0_1,		1
	.EQU	GPIOC_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOC_OMOD,	0x50000098
//  0x5000 0098  GPIOC_OMOD   Bits-------------------------------------
	.EQU	GPIOC_OMOD_PXOMD15,		30
	.EQU	GPIOC_OMOD_PXOMD14,		28
	.EQU	GPIOC_OMOD_PXOMD13,		26
	.EQU	GPIOC_OMOD_PXOMD12,		24
	.EQU	GPIOC_OMOD_PXOMD11,		22
	.EQU	GPIOC_OMOD_PXOMD10,		20
	.EQU	GPIOC_OMOD_PXOMD9,		18
	.EQU	GPIOC_OMOD_PXOMD8,		16
	.EQU	GPIOC_OMOD_PXOMD7,		14
	.EQU	GPIOC_OMOD_PXOMD6,		12
	.EQU	GPIOC_OMOD_PXOMD5,		10
	.EQU	GPIOC_OMOD_PXOMD4,		8
	.EQU	GPIOC_OMOD_PXOMD3,		6
	.EQU	GPIOC_OMOD_PXOMD2,		4
	.EQU	GPIOC_OMOD_PXOMD1,		2
	.EQU	GPIOC_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOC_LOCK,	0x5000009C
//  0x5000 009C  GPIOC_LOCK   Bits-------------------------------------
	.EQU	GPIOC_LOCK_PXLCKKEY15,		31
	.EQU	GPIOC_LOCK_PXLCKKEY14,		30
	.EQU	GPIOC_LOCK_PXLCKKEY13,		29
	.EQU	GPIOC_LOCK_PXLCKKEY12,		28
	.EQU	GPIOC_LOCK_PXLCKKEY11,		27
	.EQU	GPIOC_LOCK_PXLCKKEY10,		26
	.EQU	GPIOC_LOCK_PXLCKKEY9,		25
	.EQU	GPIOC_LOCK_PXLCKKEY8,		24
	.EQU	GPIOC_LOCK_PXLCKKEY7,		23
	.EQU	GPIOC_LOCK_PXLCKKEY6,		22
	.EQU	GPIOC_LOCK_PXLCKKEY5,		21
	.EQU	GPIOC_LOCK_PXLCKKEY4,		20
	.EQU	GPIOC_LOCK_PXLCKKEY3,		19
	.EQU	GPIOC_LOCK_PXLCKKEY2,		18
	.EQU	GPIOC_LOCK_PXLCKKEY1,		17
	.EQU	GPIOC_LOCK_PXLCKKEY0,		16
	.EQU	GPIOC_LOCK_PXLCK15,		15
	.EQU	GPIOC_LOCK_PXLCK14,		14
	.EQU	GPIOC_LOCK_PXLCK13,		13
	.EQU	GPIOC_LOCK_PXLCK12,		12
	.EQU	GPIOC_LOCK_PXLCK11,		11
	.EQU	GPIOC_LOCK_PXLCK10,		10
	.EQU	GPIOC_LOCK_PXLCK9,		9
	.EQU	GPIOC_LOCK_PXLCK8,		8
	.EQU	GPIOC_LOCK_PXLCK7,		7
	.EQU	GPIOC_LOCK_PXLCK6,		6
	.EQU	GPIOC_LOCK_PXLCK5,		5
	.EQU	GPIOC_LOCK_PXLCK4,		4
	.EQU	GPIOC_LOCK_PXLCK3,		3
	.EQU	GPIOC_LOCK_PXLCK2,		2
	.EQU	GPIOC_LOCK_PXLCK1,		1
	.EQU	GPIOC_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOC_RMPL,	0x500000A0
//  0x5000 00A0  GPIOC_RMPL   Bits-------------------------------------
	.EQU	GPIOC_RMPL_PXRMP7_3,		31
	.EQU	GPIOC_RMPL_PXRMP7_2,		30
	.EQU	GPIOC_RMPL_PXRMP7_1,		29
	.EQU	GPIOC_RMPL_PXRMP7_0,		28
	.EQU	GPIOC_RMPL_PXRMP6_3,		27
	.EQU	GPIOC_RMPL_PXRMP6_2,		26
	.EQU	GPIOC_RMPL_PXRMP6_1,		25
	.EQU	GPIOC_RMPL_PXRMP6_0,		24
	.EQU	GPIOC_RMPL_PXRMP5_3,		23
	.EQU	GPIOC_RMPL_PXRMP5_2,		22
	.EQU	GPIOC_RMPL_PXRMP5_1,		21
	.EQU	GPIOC_RMPL_PXRMP5_0,		20
	.EQU	GPIOC_RMPL_PXRMP4_3,		19
	.EQU	GPIOC_RMPL_PXRMP4_2,		18
	.EQU	GPIOC_RMPL_PXRMP4_1,		17
	.EQU	GPIOC_RMPL_PXRMP4_0,		16
	.EQU	GPIOC_RMPL_PXRMP3_3,		15
	.EQU	GPIOC_RMPL_PXRMP3_2,		14
	.EQU	GPIOC_RMPL_PXRMP3_1,		13
	.EQU	GPIOC_RMPL_PXRMP3_0,		12
	.EQU	GPIOC_RMPL_PXRMP2_3,		11
	.EQU	GPIOC_RMPL_PXRMP2_2,		10
	.EQU	GPIOC_RMPL_PXRMP2_1,		9
	.EQU	GPIOC_RMPL_PXRMP2_0,		8
	.EQU	GPIOC_RMPL_PXRMP1_3,		7
	.EQU	GPIOC_RMPL_PXRMP1_2,		6
	.EQU	GPIOC_RMPL_PXRMP1_1,		5
	.EQU	GPIOC_RMPL_PXRMP1_0,		4
	.EQU	GPIOC_RMPL_PXRMP0_3,		3
	.EQU	GPIOC_RMPL_PXRMP0_2,		2
	.EQU	GPIOC_RMPL_PXRMP0_1,		1
	.EQU	GPIOC_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOC_RMPH,	0x500000A4
//  0x5000 00A4  GPIOC_RMPH   Bits-------------------------------------
	.EQU	GPIOC_RMPH_PXRMP15_3,		31
	.EQU	GPIOC_RMPH_PXRMP15_2,		30
	.EQU	GPIOC_RMPH_PXRMP15_1,		29
	.EQU	GPIOC_RMPH_PXRMP15_0,		28
	.EQU	GPIOC_RMPH_PXRMP14_3,		27
	.EQU	GPIOC_RMPH_PXRMP14_2,		26
	.EQU	GPIOC_RMPH_PXRMP14_1,		25
	.EQU	GPIOC_RMPH_PXRMP14_0,		24
	.EQU	GPIOC_RMPH_PXRMP13_3,		23
	.EQU	GPIOC_RMPH_PXRMP13_2,		22
	.EQU	GPIOC_RMPH_PXRMP13_1,		21
	.EQU	GPIOC_RMPH_PXRMP13_0,		20
	.EQU	GPIOC_RMPH_PXRMP12_3,		19
	.EQU	GPIOC_RMPH_PXRMP12_2,		18
	.EQU	GPIOC_RMPH_PXRMP12_1,		17
	.EQU	GPIOC_RMPH_PXRMP12_0,		16
	.EQU	GPIOC_RMPH_PXRMP11_3,		15
	.EQU	GPIOC_RMPH_PXRMP11_2,		14
	.EQU	GPIOC_RMPH_PXRMP11_1,		13
	.EQU	GPIOC_RMPH_PXRMP11_0,		12
	.EQU	GPIOC_RMPH_PXRMP10_3,		11
	.EQU	GPIOC_RMPH_PXRMP10_2,		10
	.EQU	GPIOC_RMPH_PXRMP10_1,		9
	.EQU	GPIOC_RMPH_PXRMP10_0,		8
	.EQU	GPIOC_RMPH_PXRMP9_3,		7
	.EQU	GPIOC_RMPH_PXRMP9_2,		6
	.EQU	GPIOC_RMPH_PXRMP9_1,		5
	.EQU	GPIOC_RMPH_PXRMP9_0,		4
	.EQU	GPIOC_RMPH_PXRMP8_3,		3
	.EQU	GPIOC_RMPH_PXRMP8_2,		2
	.EQU	GPIOC_RMPH_PXRMP8_1,		1
	.EQU	GPIOC_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOC_RMP_MSB,	0x500000B4
//  0x5000 00B4  GPIOC_RMP_MSB   Bits-------------------------------------
	.EQU	GPIOC_RMP_MSB_RMP_MSB31,		31
	.EQU	GPIOC_RMP_MSB_RMP_MSB30,		30
	.EQU	GPIOC_RMP_MSB_RMP_MSB29,		29
	.EQU	GPIOC_RMP_MSB_RMP_MSB28,		28
	.EQU	GPIOC_RMP_MSB_RMP_MSB27,		27
	.EQU	GPIOC_RMP_MSB_RMP_MSB26,		26
	.EQU	GPIOC_RMP_MSB_RMP_MSB25,		25
	.EQU	GPIOC_RMP_MSB_RMP_MSB24,		24
	.EQU	GPIOC_RMP_MSB_RMP_MSB23,		23
	.EQU	GPIOC_RMP_MSB_RMP_MSB22,		22
	.EQU	GPIOC_RMP_MSB_RMP_MSB21,		21
	.EQU	GPIOC_RMP_MSB_RMP_MSB20,		20
	.EQU	GPIOC_RMP_MSB_RMP_MSB19,		19
	.EQU	GPIOC_RMP_MSB_RMP_MSB18,		18
	.EQU	GPIOC_RMP_MSB_RMP_MSB17,		17
	.EQU	GPIOC_RMP_MSB_RMP_MSB16,		16
	.EQU	GPIOC_RMP_MSB_RMP_MSB15,		15
	.EQU	GPIOC_RMP_MSB_RMP_MSB14,		14
	.EQU	GPIOC_RMP_MSB_RMP_MSB13,		13
	.EQU	GPIOC_RMP_MSB_RMP_MSB12,		12
	.EQU	GPIOC_RMP_MSB_RMP_MSB11,		11
	.EQU	GPIOC_RMP_MSB_RMP_MSB10,		10
	.EQU	GPIOC_RMP_MSB_RMP_MSB9,		9
	.EQU	GPIOC_RMP_MSB_RMP_MSB8,		8
	.EQU	GPIOC_RMP_MSB_RMP_MSB7,		7
	.EQU	GPIOC_RMP_MSB_RMP_MSB6,		6
	.EQU	GPIOC_RMP_MSB_RMP_MSB5,		5
	.EQU	GPIOC_RMP_MSB_RMP_MSB4,		4
	.EQU	GPIOC_RMP_MSB_RMP_MSB3,		3
	.EQU	GPIOC_RMP_MSB_RMP_MSB2,		2
	.EQU	GPIOC_RMP_MSB_RMP_MSB1,		1
	.EQU	GPIOC_RMP_MSB_RMP_MSB0,		0
//  register-------------------------------------
	.EQU	GPIOD_PIR,		0x500000C0
//  0x5000 00C0  GPIOD_PIR   Bits-------------------------------------
	.EQU	GPIOD_PIR_PXPIR15,		15
	.EQU	GPIOD_PIR_PXPIR14,		14
	.EQU	GPIOD_PIR_PXPIR13,		13
	.EQU	GPIOD_PIR_PXPIR12,		12
	.EQU	GPIOD_PIR_PXPIR11,		11
	.EQU	GPIOD_PIR_PXPIR10,		10
	.EQU	GPIOD_PIR_PXPIR9,		9
	.EQU	GPIOD_PIR_PXPIR8,		8
	.EQU	GPIOD_PIR_PXPIR7,		7
	.EQU	GPIOD_PIR_PXPIR6,		6
	.EQU	GPIOD_PIR_PXPIR5,		5
	.EQU	GPIOD_PIR_PXPIR4,		4
	.EQU	GPIOD_PIR_PXPIR3,		3
	.EQU	GPIOD_PIR_PXPIR2,		2
	.EQU	GPIOD_PIR_PXPIR1,		1
	.EQU	GPIOD_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOD_POR,		0x500000C4
//  0x5000 00C4  GPIOD_POR   Bits-------------------------------------
	.EQU	GPIOD_POR_PXPOR15,		15
	.EQU	GPIOD_POR_PXPOR14,		14
	.EQU	GPIOD_POR_PXPOR13,		13
	.EQU	GPIOD_POR_PXPOR12,		12
	.EQU	GPIOD_POR_PXPOR11,		11
	.EQU	GPIOD_POR_PXPOR10,		10
	.EQU	GPIOD_POR_PXPOR9,		9
	.EQU	GPIOD_POR_PXPOR8,		8
	.EQU	GPIOD_POR_PXPOR7,		7
	.EQU	GPIOD_POR_PXPOR6,		6
	.EQU	GPIOD_POR_PXPOR5,		5
	.EQU	GPIOD_POR_PXPOR4,		4
	.EQU	GPIOD_POR_PXPOR3,		3
	.EQU	GPIOD_POR_PXPOR2,		2
	.EQU	GPIOD_POR_PXPOR1,		1
	.EQU	GPIOD_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOD_PUR,		0x500000C8
//  0x5000 00C8  GPIOD_PUR   Bits-------------------------------------
	.EQU	GPIOD_PUR_PXPUR15,		15
	.EQU	GPIOD_PUR_PXPUR14,		14
	.EQU	GPIOD_PUR_PXPUR13,		13
	.EQU	GPIOD_PUR_PXPUR12,		12
	.EQU	GPIOD_PUR_PXPUR11,		11
	.EQU	GPIOD_PUR_PXPUR10,		10
	.EQU	GPIOD_PUR_PXPUR9,		9
	.EQU	GPIOD_PUR_PXPUR8,		8
	.EQU	GPIOD_PUR_PXPUR7,		7
	.EQU	GPIOD_PUR_PXPUR6,		6
	.EQU	GPIOD_PUR_PXPUR5,		5
	.EQU	GPIOD_PUR_PXPUR4,		4
	.EQU	GPIOD_PUR_PXPUR3,		3
	.EQU	GPIOD_PUR_PXPUR2,		2
	.EQU	GPIOD_PUR_PXPUR1,		1
	.EQU	GPIOD_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOD_PDR,		0x500000CC
//  0x5000 00CC  GPIOD_PDR   Bits-------------------------------------
	.EQU	GPIOD_PDR_PXPDR15,		15
	.EQU	GPIOD_PDR_PXPDR14,		14
	.EQU	GPIOD_PDR_PXPDR13,		13
	.EQU	GPIOD_PDR_PXPDR12,		12
	.EQU	GPIOD_PDR_PXPDR11,		11
	.EQU	GPIOD_PDR_PXPDR10,		10
	.EQU	GPIOD_PDR_PXPDR9,		9
	.EQU	GPIOD_PDR_PXPDR8,		8
	.EQU	GPIOD_PDR_PXPDR7,		7
	.EQU	GPIOD_PDR_PXPDR6,		6
	.EQU	GPIOD_PDR_PXPDR5,		5
	.EQU	GPIOD_PDR_PXPDR4,		4
	.EQU	GPIOD_PDR_PXPDR3,		3
	.EQU	GPIOD_PDR_PXPDR2,		2
	.EQU	GPIOD_PDR_PXPDR1,		1
	.EQU	GPIOD_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOD_PODR,	0x500000D0
//  0x5000 00D0  GPIOD_PODR   Bits-------------------------------------
	.EQU	GPIOD_PODR_PXPODR15,		15
	.EQU	GPIOD_PODR_PXPODR14,		14
	.EQU	GPIOD_PODR_PXPODR13,		13
	.EQU	GPIOD_PODR_PXPODR12,		12
	.EQU	GPIOD_PODR_PXPODR11,		11
	.EQU	GPIOD_PODR_PXPODR10,		10
	.EQU	GPIOD_PODR_PXPODR9,		9
	.EQU	GPIOD_PODR_PXPODR8,		8
	.EQU	GPIOD_PODR_PXPODR7,		7
	.EQU	GPIOD_PODR_PXPODR6,		6
	.EQU	GPIOD_PODR_PXPODR5,		5
	.EQU	GPIOD_PODR_PXPODR4,		4
	.EQU	GPIOD_PODR_PXPODR3,		3
	.EQU	GPIOD_PODR_PXPODR2,		2
	.EQU	GPIOD_PODR_PXPODR1,		1
	.EQU	GPIOD_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOD_PMOD,	0x500000D4
//  0x5000 00D4  GPIOD_PMOD   Bits-------------------------------------
	.EQU	GPIOD_PMOD_PXPMD15_1,		31
	.EQU	GPIOD_PMOD_PXPMD15_0,		30
	.EQU	GPIOD_PMOD_PXPMD14_1,		29
	.EQU	GPIOD_PMOD_PXPMD14_0,		28
	.EQU	GPIOD_PMOD_PXPMD13_1,		27
	.EQU	GPIOD_PMOD_PXPMD13_0,		26
	.EQU	GPIOD_PMOD_PXPMD12_1,		25
	.EQU	GPIOD_PMOD_PXPMD12_0,		24
	.EQU	GPIOD_PMOD_PXPMD11_1,		23
	.EQU	GPIOD_PMOD_PXPMD11_0,		22
	.EQU	GPIOD_PMOD_PXPMD10_1,		21
	.EQU	GPIOD_PMOD_PXPMD10_0,		20
	.EQU	GPIOD_PMOD_PXPMD9_1,		19
	.EQU	GPIOD_PMOD_PXPMD9_0,		18
	.EQU	GPIOD_PMOD_PXPMD8_1,		17
	.EQU	GPIOD_PMOD_PXPMD8_0,		16
	.EQU	GPIOD_PMOD_PXPMD7_1,		15
	.EQU	GPIOD_PMOD_PXPMD7_0,		14
	.EQU	GPIOD_PMOD_PXPMD6_1,		13
	.EQU	GPIOD_PMOD_PXPMD6_0,		12
	.EQU	GPIOD_PMOD_PXPMD5_1,		11
	.EQU	GPIOD_PMOD_PXPMD5_0,		10
	.EQU	GPIOD_PMOD_PXPMD4_1,		9
	.EQU	GPIOD_PMOD_PXPMD4_0,		8
	.EQU	GPIOD_PMOD_PXPMD3_1,		7
	.EQU	GPIOD_PMOD_PXPMD3_0,		6
	.EQU	GPIOD_PMOD_PXPMD2_1,		5
	.EQU	GPIOD_PMOD_PXPMD2_0,		4
	.EQU	GPIOD_PMOD_PXPMD1_1,		3
	.EQU	GPIOD_PMOD_PXPMD1_0,		2
	.EQU	GPIOD_PMOD_PXPMD0_1,		1
	.EQU	GPIOD_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOD_OMOD,	0x500000D8
//  0x5000 00D8  GPIOD_OMOD   Bits-------------------------------------
	.EQU	GPIOD_OMOD_PXOMD15,		30
	.EQU	GPIOD_OMOD_PXOMD14,		28
	.EQU	GPIOD_OMOD_PXOMD13,		26
	.EQU	GPIOD_OMOD_PXOMD12,		24
	.EQU	GPIOD_OMOD_PXOMD11,		22
	.EQU	GPIOD_OMOD_PXOMD10,		20
	.EQU	GPIOD_OMOD_PXOMD9,		18
	.EQU	GPIOD_OMOD_PXOMD8,		16
	.EQU	GPIOD_OMOD_PXOMD7,		14
	.EQU	GPIOD_OMOD_PXOMD6,		12
	.EQU	GPIOD_OMOD_PXOMD5,		10
	.EQU	GPIOD_OMOD_PXOMD4,		8
	.EQU	GPIOD_OMOD_PXOMD3,		6
	.EQU	GPIOD_OMOD_PXOMD2,		4
	.EQU	GPIOD_OMOD_PXOMD1,		2
	.EQU	GPIOD_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOD_LOCK,	0x500000DC
//  0x5000 00DC  GPIOD_LOCK   Bits-------------------------------------
	.EQU	GPIOD_LOCK_PXLCKKEY15,		31
	.EQU	GPIOD_LOCK_PXLCKKEY14,		30
	.EQU	GPIOD_LOCK_PXLCKKEY13,		29
	.EQU	GPIOD_LOCK_PXLCKKEY12,		28
	.EQU	GPIOD_LOCK_PXLCKKEY11,		27
	.EQU	GPIOD_LOCK_PXLCKKEY10,		26
	.EQU	GPIOD_LOCK_PXLCKKEY9,		25
	.EQU	GPIOD_LOCK_PXLCKKEY8,		24
	.EQU	GPIOD_LOCK_PXLCKKEY7,		23
	.EQU	GPIOD_LOCK_PXLCKKEY6,		22
	.EQU	GPIOD_LOCK_PXLCKKEY5,		21
	.EQU	GPIOD_LOCK_PXLCKKEY4,		20
	.EQU	GPIOD_LOCK_PXLCKKEY3,		19
	.EQU	GPIOD_LOCK_PXLCKKEY2,		18
	.EQU	GPIOD_LOCK_PXLCKKEY1,		17
	.EQU	GPIOD_LOCK_PXLCKKEY0,		16
	.EQU	GPIOD_LOCK_PXLCK15,		15
	.EQU	GPIOD_LOCK_PXLCK14,		14
	.EQU	GPIOD_LOCK_PXLCK13,		13
	.EQU	GPIOD_LOCK_PXLCK12,		12
	.EQU	GPIOD_LOCK_PXLCK11,		11
	.EQU	GPIOD_LOCK_PXLCK10,		10
	.EQU	GPIOD_LOCK_PXLCK9,		9
	.EQU	GPIOD_LOCK_PXLCK8,		8
	.EQU	GPIOD_LOCK_PXLCK7,		7
	.EQU	GPIOD_LOCK_PXLCK6,		6
	.EQU	GPIOD_LOCK_PXLCK5,		5
	.EQU	GPIOD_LOCK_PXLCK4,		4
	.EQU	GPIOD_LOCK_PXLCK3,		3
	.EQU	GPIOD_LOCK_PXLCK2,		2
	.EQU	GPIOD_LOCK_PXLCK1,		1
	.EQU	GPIOD_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOD_RMPL,	0x500000E0
//  0x5000 00E0  GPIOD_RMPL   Bits-------------------------------------
	.EQU	GPIOD_RMPL_PXRMP7_3,		31
	.EQU	GPIOD_RMPL_PXRMP7_2,		30
	.EQU	GPIOD_RMPL_PXRMP7_1,		29
	.EQU	GPIOD_RMPL_PXRMP7_0,		28
	.EQU	GPIOD_RMPL_PXRMP6_3,		27
	.EQU	GPIOD_RMPL_PXRMP6_2,		26
	.EQU	GPIOD_RMPL_PXRMP6_1,		25
	.EQU	GPIOD_RMPL_PXRMP6_0,		24
	.EQU	GPIOD_RMPL_PXRMP5_3,		23
	.EQU	GPIOD_RMPL_PXRMP5_2,		22
	.EQU	GPIOD_RMPL_PXRMP5_1,		21
	.EQU	GPIOD_RMPL_PXRMP5_0,		20
	.EQU	GPIOD_RMPL_PXRMP4_3,		19
	.EQU	GPIOD_RMPL_PXRMP4_2,		18
	.EQU	GPIOD_RMPL_PXRMP4_1,		17
	.EQU	GPIOD_RMPL_PXRMP4_0,		16
	.EQU	GPIOD_RMPL_PXRMP3_3,		15
	.EQU	GPIOD_RMPL_PXRMP3_2,		14
	.EQU	GPIOD_RMPL_PXRMP3_1,		13
	.EQU	GPIOD_RMPL_PXRMP3_0,		12
	.EQU	GPIOD_RMPL_PXRMP2_3,		11
	.EQU	GPIOD_RMPL_PXRMP2_2,		10
	.EQU	GPIOD_RMPL_PXRMP2_1,		9
	.EQU	GPIOD_RMPL_PXRMP2_0,		8
	.EQU	GPIOD_RMPL_PXRMP1_3,		7
	.EQU	GPIOD_RMPL_PXRMP1_2,		6
	.EQU	GPIOD_RMPL_PXRMP1_1,		5
	.EQU	GPIOD_RMPL_PXRMP1_0,		4
	.EQU	GPIOD_RMPL_PXRMP0_3,		3
	.EQU	GPIOD_RMPL_PXRMP0_2,		2
	.EQU	GPIOD_RMPL_PXRMP0_1,		1
	.EQU	GPIOD_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOD_RMPH,	0x500000E4
//  0x5000 00E4  GPIOD_RMPH   Bits-------------------------------------
	.EQU	GPIOD_RMPH_PXRMP15_3,		31
	.EQU	GPIOD_RMPH_PXRMP15_2,		30
	.EQU	GPIOD_RMPH_PXRMP15_1,		29
	.EQU	GPIOD_RMPH_PXRMP15_0,		28
	.EQU	GPIOD_RMPH_PXRMP14_3,		27
	.EQU	GPIOD_RMPH_PXRMP14_2,		26
	.EQU	GPIOD_RMPH_PXRMP14_1,		25
	.EQU	GPIOD_RMPH_PXRMP14_0,		24
	.EQU	GPIOD_RMPH_PXRMP13_3,		23
	.EQU	GPIOD_RMPH_PXRMP13_2,		22
	.EQU	GPIOD_RMPH_PXRMP13_1,		21
	.EQU	GPIOD_RMPH_PXRMP13_0,		20
	.EQU	GPIOD_RMPH_PXRMP12_3,		19
	.EQU	GPIOD_RMPH_PXRMP12_2,		18
	.EQU	GPIOD_RMPH_PXRMP12_1,		17
	.EQU	GPIOD_RMPH_PXRMP12_0,		16
	.EQU	GPIOD_RMPH_PXRMP11_3,		15
	.EQU	GPIOD_RMPH_PXRMP11_2,		14
	.EQU	GPIOD_RMPH_PXRMP11_1,		13
	.EQU	GPIOD_RMPH_PXRMP11_0,		12
	.EQU	GPIOD_RMPH_PXRMP10_3,		11
	.EQU	GPIOD_RMPH_PXRMP10_2,		10
	.EQU	GPIOD_RMPH_PXRMP10_1,		9
	.EQU	GPIOD_RMPH_PXRMP10_0,		8
	.EQU	GPIOD_RMPH_PXRMP9_3,		7
	.EQU	GPIOD_RMPH_PXRMP9_2,		6
	.EQU	GPIOD_RMPH_PXRMP9_1,		5
	.EQU	GPIOD_RMPH_PXRMP9_0,		4
	.EQU	GPIOD_RMPH_PXRMP8_3,		3
	.EQU	GPIOD_RMPH_PXRMP8_2,		2
	.EQU	GPIOD_RMPH_PXRMP8_1,		1
	.EQU	GPIOD_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOD_RMP_MSB,	0x500000F4
//  0x5000 00F4  GPIOD_RMP_MSB   Bits-------------------------------------
	.EQU	GPIOD_RMP_MSB_RMP_MSB31,		31
	.EQU	GPIOD_RMP_MSB_RMP_MSB30,		30
	.EQU	GPIOD_RMP_MSB_RMP_MSB29,		29
	.EQU	GPIOD_RMP_MSB_RMP_MSB28,		28
	.EQU	GPIOD_RMP_MSB_RMP_MSB27,		27
	.EQU	GPIOD_RMP_MSB_RMP_MSB26,		26
	.EQU	GPIOD_RMP_MSB_RMP_MSB25,		25
	.EQU	GPIOD_RMP_MSB_RMP_MSB24,		24
	.EQU	GPIOD_RMP_MSB_RMP_MSB23,		23
	.EQU	GPIOD_RMP_MSB_RMP_MSB22,		22
	.EQU	GPIOD_RMP_MSB_RMP_MSB21,		21
	.EQU	GPIOD_RMP_MSB_RMP_MSB20,		20
	.EQU	GPIOD_RMP_MSB_RMP_MSB19,		19
	.EQU	GPIOD_RMP_MSB_RMP_MSB18,		18
	.EQU	GPIOD_RMP_MSB_RMP_MSB17,		17
	.EQU	GPIOD_RMP_MSB_RMP_MSB16,		16
	.EQU	GPIOD_RMP_MSB_RMP_MSB15,		15
	.EQU	GPIOD_RMP_MSB_RMP_MSB14,		14
	.EQU	GPIOD_RMP_MSB_RMP_MSB13,		13
	.EQU	GPIOD_RMP_MSB_RMP_MSB12,		12
	.EQU	GPIOD_RMP_MSB_RMP_MSB11,		11
	.EQU	GPIOD_RMP_MSB_RMP_MSB10,		10
	.EQU	GPIOD_RMP_MSB_RMP_MSB9,		9
	.EQU	GPIOD_RMP_MSB_RMP_MSB8,		8
	.EQU	GPIOD_RMP_MSB_RMP_MSB7,		7
	.EQU	GPIOD_RMP_MSB_RMP_MSB6,		6
	.EQU	GPIOD_RMP_MSB_RMP_MSB5,		5
	.EQU	GPIOD_RMP_MSB_RMP_MSB4,		4
	.EQU	GPIOD_RMP_MSB_RMP_MSB3,		3
	.EQU	GPIOD_RMP_MSB_RMP_MSB2,		2
	.EQU	GPIOD_RMP_MSB_RMP_MSB1,		1
	.EQU	GPIOD_RMP_MSB_RMP_MSB0,		0
//  register-------------------------------------
	.EQU	GPIOE_PIR,		0x50000100
//  0x5000 0100  GPIOE_PIR   Bits-------------------------------------
	.EQU	GPIOE_PIR_PXPIR15,		15
	.EQU	GPIOE_PIR_PXPIR14,		14
	.EQU	GPIOE_PIR_PXPIR13,		13
	.EQU	GPIOE_PIR_PXPIR12,		12
	.EQU	GPIOE_PIR_PXPIR11,		11
	.EQU	GPIOE_PIR_PXPIR10,		10
	.EQU	GPIOE_PIR_PXPIR9,		9
	.EQU	GPIOE_PIR_PXPIR8,		8
	.EQU	GPIOE_PIR_PXPIR7,		7
	.EQU	GPIOE_PIR_PXPIR6,		6
	.EQU	GPIOE_PIR_PXPIR5,		5
	.EQU	GPIOE_PIR_PXPIR4,		4
	.EQU	GPIOE_PIR_PXPIR3,		3
	.EQU	GPIOE_PIR_PXPIR2,		2
	.EQU	GPIOE_PIR_PXPIR1,		1
	.EQU	GPIOE_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOE_POR,		0x50000104
//  0x5000 0104  GPIOE_POR   Bits-------------------------------------
	.EQU	GPIOE_POR_PXPOR15,		15
	.EQU	GPIOE_POR_PXPOR14,		14
	.EQU	GPIOE_POR_PXPOR13,		13
	.EQU	GPIOE_POR_PXPOR12,		12
	.EQU	GPIOE_POR_PXPOR11,		11
	.EQU	GPIOE_POR_PXPOR10,		10
	.EQU	GPIOE_POR_PXPOR9,		9
	.EQU	GPIOE_POR_PXPOR8,		8
	.EQU	GPIOE_POR_PXPOR7,		7
	.EQU	GPIOE_POR_PXPOR6,		6
	.EQU	GPIOE_POR_PXPOR5,		5
	.EQU	GPIOE_POR_PXPOR4,		4
	.EQU	GPIOE_POR_PXPOR3,		3
	.EQU	GPIOE_POR_PXPOR2,		2
	.EQU	GPIOE_POR_PXPOR1,		1
	.EQU	GPIOE_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOE_PUR,		0x50000108
//  0x5000 0108  GPIOE_PUR   Bits-------------------------------------
	.EQU	GPIOE_PUR_PXPUR15,		15
	.EQU	GPIOE_PUR_PXPUR14,		14
	.EQU	GPIOE_PUR_PXPUR13,		13
	.EQU	GPIOE_PUR_PXPUR12,		12
	.EQU	GPIOE_PUR_PXPUR11,		11
	.EQU	GPIOE_PUR_PXPUR10,		10
	.EQU	GPIOE_PUR_PXPUR9,		9
	.EQU	GPIOE_PUR_PXPUR8,		8
	.EQU	GPIOE_PUR_PXPUR7,		7
	.EQU	GPIOE_PUR_PXPUR6,		6
	.EQU	GPIOE_PUR_PXPUR5,		5
	.EQU	GPIOE_PUR_PXPUR4,		4
	.EQU	GPIOE_PUR_PXPUR3,		3
	.EQU	GPIOE_PUR_PXPUR2,		2
	.EQU	GPIOE_PUR_PXPUR1,		1
	.EQU	GPIOE_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOE_PDR,		0x5000010C
//  0x5000 010C  GPIOE_PDR   Bits-------------------------------------
	.EQU	GPIOE_PDR_PXPDR15,		15
	.EQU	GPIOE_PDR_PXPDR14,		14
	.EQU	GPIOE_PDR_PXPDR13,		13
	.EQU	GPIOE_PDR_PXPDR12,		12
	.EQU	GPIOE_PDR_PXPDR11,		11
	.EQU	GPIOE_PDR_PXPDR10,		10
	.EQU	GPIOE_PDR_PXPDR9,		9
	.EQU	GPIOE_PDR_PXPDR8,		8
	.EQU	GPIOE_PDR_PXPDR7,		7
	.EQU	GPIOE_PDR_PXPDR6,		6
	.EQU	GPIOE_PDR_PXPDR5,		5
	.EQU	GPIOE_PDR_PXPDR4,		4
	.EQU	GPIOE_PDR_PXPDR3,		3
	.EQU	GPIOE_PDR_PXPDR2,		2
	.EQU	GPIOE_PDR_PXPDR1,		1
	.EQU	GPIOE_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOE_PODR,	0x50000110
//  0x5000 0110  GPIOE_PODR   Bits-------------------------------------
	.EQU	GPIOE_PODR_PXPODR15,		15
	.EQU	GPIOE_PODR_PXPODR14,		14
	.EQU	GPIOE_PODR_PXPODR13,		13
	.EQU	GPIOE_PODR_PXPODR12,		12
	.EQU	GPIOE_PODR_PXPODR11,		11
	.EQU	GPIOE_PODR_PXPODR10,		10
	.EQU	GPIOE_PODR_PXPODR9,		9
	.EQU	GPIOE_PODR_PXPODR8,		8
	.EQU	GPIOE_PODR_PXPODR7,		7
	.EQU	GPIOE_PODR_PXPODR6,		6
	.EQU	GPIOE_PODR_PXPODR5,		5
	.EQU	GPIOE_PODR_PXPODR4,		4
	.EQU	GPIOE_PODR_PXPODR3,		3
	.EQU	GPIOE_PODR_PXPODR2,		2
	.EQU	GPIOE_PODR_PXPODR1,		1
	.EQU	GPIOE_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOE_PMOD,	0x50000114
//  0x5000 0114  GPIOE_PMOD   Bits-------------------------------------
	.EQU	GPIOE_PMOD_PXPMD15_1,		31
	.EQU	GPIOE_PMOD_PXPMD15_0,		30
	.EQU	GPIOE_PMOD_PXPMD14_1,		29
	.EQU	GPIOE_PMOD_PXPMD14_0,		28
	.EQU	GPIOE_PMOD_PXPMD13_1,		27
	.EQU	GPIOE_PMOD_PXPMD13_0,		26
	.EQU	GPIOE_PMOD_PXPMD12_1,		25
	.EQU	GPIOE_PMOD_PXPMD12_0,		24
	.EQU	GPIOE_PMOD_PXPMD11_1,		23
	.EQU	GPIOE_PMOD_PXPMD11_0,		22
	.EQU	GPIOE_PMOD_PXPMD10_1,		21
	.EQU	GPIOE_PMOD_PXPMD10_0,		20
	.EQU	GPIOE_PMOD_PXPMD9_1,		19
	.EQU	GPIOE_PMOD_PXPMD9_0,		18
	.EQU	GPIOE_PMOD_PXPMD8_1,		17
	.EQU	GPIOE_PMOD_PXPMD8_0,		16
	.EQU	GPIOE_PMOD_PXPMD7_1,		15
	.EQU	GPIOE_PMOD_PXPMD7_0,		14
	.EQU	GPIOE_PMOD_PXPMD6_1,		13
	.EQU	GPIOE_PMOD_PXPMD6_0,		12
	.EQU	GPIOE_PMOD_PXPMD5_1,		11
	.EQU	GPIOE_PMOD_PXPMD5_0,		10
	.EQU	GPIOE_PMOD_PXPMD4_1,		9
	.EQU	GPIOE_PMOD_PXPMD4_0,		8
	.EQU	GPIOE_PMOD_PXPMD3_1,		7
	.EQU	GPIOE_PMOD_PXPMD3_0,		6
	.EQU	GPIOE_PMOD_PXPMD2_1,		5
	.EQU	GPIOE_PMOD_PXPMD2_0,		4
	.EQU	GPIOE_PMOD_PXPMD1_1,		3
	.EQU	GPIOE_PMOD_PXPMD1_0,		2
	.EQU	GPIOE_PMOD_PXPMD0_1,		1
	.EQU	GPIOE_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOE_OMOD,	0x50000118
//  0x5000 0118  GPIOE_OMOD   Bits-------------------------------------
	.EQU	GPIOE_OMOD_PXOMD15,		30
	.EQU	GPIOE_OMOD_PXOMD14,		28
	.EQU	GPIOE_OMOD_PXOMD13,		26
	.EQU	GPIOE_OMOD_PXOMD12,		24
	.EQU	GPIOE_OMOD_PXOMD11,		22
	.EQU	GPIOE_OMOD_PXOMD10,		20
	.EQU	GPIOE_OMOD_PXOMD9,		18
	.EQU	GPIOE_OMOD_PXOMD8,		16
	.EQU	GPIOE_OMOD_PXOMD7,		14
	.EQU	GPIOE_OMOD_PXOMD6,		12
	.EQU	GPIOE_OMOD_PXOMD5,		10
	.EQU	GPIOE_OMOD_PXOMD4,		8
	.EQU	GPIOE_OMOD_PXOMD3,		6
	.EQU	GPIOE_OMOD_PXOMD2,		4
	.EQU	GPIOE_OMOD_PXOMD1,		2
	.EQU	GPIOE_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOE_LOCK,	0x5000011C
//  0x5000 011C  GPIOE_LOCK   Bits-------------------------------------
	.EQU	GPIOE_LOCK_PXLCKKEY15,		31
	.EQU	GPIOE_LOCK_PXLCKKEY14,		30
	.EQU	GPIOE_LOCK_PXLCKKEY13,		29
	.EQU	GPIOE_LOCK_PXLCKKEY12,		28
	.EQU	GPIOE_LOCK_PXLCKKEY11,		27
	.EQU	GPIOE_LOCK_PXLCKKEY10,		26
	.EQU	GPIOE_LOCK_PXLCKKEY9,		25
	.EQU	GPIOE_LOCK_PXLCKKEY8,		24
	.EQU	GPIOE_LOCK_PXLCKKEY7,		23
	.EQU	GPIOE_LOCK_PXLCKKEY6,		22
	.EQU	GPIOE_LOCK_PXLCKKEY5,		21
	.EQU	GPIOE_LOCK_PXLCKKEY4,		20
	.EQU	GPIOE_LOCK_PXLCKKEY3,		19
	.EQU	GPIOE_LOCK_PXLCKKEY2,		18
	.EQU	GPIOE_LOCK_PXLCKKEY1,		17
	.EQU	GPIOE_LOCK_PXLCKKEY0,		16
	.EQU	GPIOE_LOCK_PXLCK15,		15
	.EQU	GPIOE_LOCK_PXLCK14,		14
	.EQU	GPIOE_LOCK_PXLCK13,		13
	.EQU	GPIOE_LOCK_PXLCK12,		12
	.EQU	GPIOE_LOCK_PXLCK11,		11
	.EQU	GPIOE_LOCK_PXLCK10,		10
	.EQU	GPIOE_LOCK_PXLCK9,		9
	.EQU	GPIOE_LOCK_PXLCK8,		8
	.EQU	GPIOE_LOCK_PXLCK7,		7
	.EQU	GPIOE_LOCK_PXLCK6,		6
	.EQU	GPIOE_LOCK_PXLCK5,		5
	.EQU	GPIOE_LOCK_PXLCK4,		4
	.EQU	GPIOE_LOCK_PXLCK3,		3
	.EQU	GPIOE_LOCK_PXLCK2,		2
	.EQU	GPIOE_LOCK_PXLCK1,		1
	.EQU	GPIOE_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOE_RMPL,	0x50000120
//  0x5000 0120  GPIOE_RMPL   Bits-------------------------------------
	.EQU	GPIOE_RMPL_PXRMP7_3,		31
	.EQU	GPIOE_RMPL_PXRMP7_2,		30
	.EQU	GPIOE_RMPL_PXRMP7_1,		29
	.EQU	GPIOE_RMPL_PXRMP7_0,		28
	.EQU	GPIOE_RMPL_PXRMP6_3,		27
	.EQU	GPIOE_RMPL_PXRMP6_2,		26
	.EQU	GPIOE_RMPL_PXRMP6_1,		25
	.EQU	GPIOE_RMPL_PXRMP6_0,		24
	.EQU	GPIOE_RMPL_PXRMP5_3,		23
	.EQU	GPIOE_RMPL_PXRMP5_2,		22
	.EQU	GPIOE_RMPL_PXRMP5_1,		21
	.EQU	GPIOE_RMPL_PXRMP5_0,		20
	.EQU	GPIOE_RMPL_PXRMP4_3,		19
	.EQU	GPIOE_RMPL_PXRMP4_2,		18
	.EQU	GPIOE_RMPL_PXRMP4_1,		17
	.EQU	GPIOE_RMPL_PXRMP4_0,		16
	.EQU	GPIOE_RMPL_PXRMP3_3,		15
	.EQU	GPIOE_RMPL_PXRMP3_2,		14
	.EQU	GPIOE_RMPL_PXRMP3_1,		13
	.EQU	GPIOE_RMPL_PXRMP3_0,		12
	.EQU	GPIOE_RMPL_PXRMP2_3,		11
	.EQU	GPIOE_RMPL_PXRMP2_2,		10
	.EQU	GPIOE_RMPL_PXRMP2_1,		9
	.EQU	GPIOE_RMPL_PXRMP2_0,		8
	.EQU	GPIOE_RMPL_PXRMP1_3,		7
	.EQU	GPIOE_RMPL_PXRMP1_2,		6
	.EQU	GPIOE_RMPL_PXRMP1_1,		5
	.EQU	GPIOE_RMPL_PXRMP1_0,		4
	.EQU	GPIOE_RMPL_PXRMP0_3,		3
	.EQU	GPIOE_RMPL_PXRMP0_2,		2
	.EQU	GPIOE_RMPL_PXRMP0_1,		1
	.EQU	GPIOE_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOE_RMPH,	0x50000124
//  0x5000 0124  GPIOE_RMPH   Bits-------------------------------------
	.EQU	GPIOE_RMPH_PXRMP15_3,		31
	.EQU	GPIOE_RMPH_PXRMP15_2,		30
	.EQU	GPIOE_RMPH_PXRMP15_1,		29
	.EQU	GPIOE_RMPH_PXRMP15_0,		28
	.EQU	GPIOE_RMPH_PXRMP14_3,		27
	.EQU	GPIOE_RMPH_PXRMP14_2,		26
	.EQU	GPIOE_RMPH_PXRMP14_1,		25
	.EQU	GPIOE_RMPH_PXRMP14_0,		24
	.EQU	GPIOE_RMPH_PXRMP13_3,		23
	.EQU	GPIOE_RMPH_PXRMP13_2,		22
	.EQU	GPIOE_RMPH_PXRMP13_1,		21
	.EQU	GPIOE_RMPH_PXRMP13_0,		20
	.EQU	GPIOE_RMPH_PXRMP12_3,		19
	.EQU	GPIOE_RMPH_PXRMP12_2,		18
	.EQU	GPIOE_RMPH_PXRMP12_1,		17
	.EQU	GPIOE_RMPH_PXRMP12_0,		16
	.EQU	GPIOE_RMPH_PXRMP11_3,		15
	.EQU	GPIOE_RMPH_PXRMP11_2,		14
	.EQU	GPIOE_RMPH_PXRMP11_1,		13
	.EQU	GPIOE_RMPH_PXRMP11_0,		12
	.EQU	GPIOE_RMPH_PXRMP10_3,		11
	.EQU	GPIOE_RMPH_PXRMP10_2,		10
	.EQU	GPIOE_RMPH_PXRMP10_1,		9
	.EQU	GPIOE_RMPH_PXRMP10_0,		8
	.EQU	GPIOE_RMPH_PXRMP9_3,		7
	.EQU	GPIOE_RMPH_PXRMP9_2,		6
	.EQU	GPIOE_RMPH_PXRMP9_1,		5
	.EQU	GPIOE_RMPH_PXRMP9_0,		4
	.EQU	GPIOE_RMPH_PXRMP8_3,		3
	.EQU	GPIOE_RMPH_PXRMP8_2,		2
	.EQU	GPIOE_RMPH_PXRMP8_1,		1
	.EQU	GPIOE_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOE_RMP_MSB,	0x50000134
//  0x5000 0134  GPIOE_RMP_MSB   Bits-------------------------------------
	.EQU	GPIOE_RMP_MSB_RMP_MSB31,		31
	.EQU	GPIOE_RMP_MSB_RMP_MSB30,		30
	.EQU	GPIOE_RMP_MSB_RMP_MSB29,		29
	.EQU	GPIOE_RMP_MSB_RMP_MSB28,		28
	.EQU	GPIOE_RMP_MSB_RMP_MSB27,		27
	.EQU	GPIOE_RMP_MSB_RMP_MSB26,		26
	.EQU	GPIOE_RMP_MSB_RMP_MSB25,		25
	.EQU	GPIOE_RMP_MSB_RMP_MSB24,		24
	.EQU	GPIOE_RMP_MSB_RMP_MSB23,		23
	.EQU	GPIOE_RMP_MSB_RMP_MSB22,		22
	.EQU	GPIOE_RMP_MSB_RMP_MSB21,		21
	.EQU	GPIOE_RMP_MSB_RMP_MSB20,		20
	.EQU	GPIOE_RMP_MSB_RMP_MSB19,		19
	.EQU	GPIOE_RMP_MSB_RMP_MSB18,		18
	.EQU	GPIOE_RMP_MSB_RMP_MSB17,		17
	.EQU	GPIOE_RMP_MSB_RMP_MSB16,		16
	.EQU	GPIOE_RMP_MSB_RMP_MSB15,		15
	.EQU	GPIOE_RMP_MSB_RMP_MSB14,		14
	.EQU	GPIOE_RMP_MSB_RMP_MSB13,		13
	.EQU	GPIOE_RMP_MSB_RMP_MSB12,		12
	.EQU	GPIOE_RMP_MSB_RMP_MSB11,		11
	.EQU	GPIOE_RMP_MSB_RMP_MSB10,		10
	.EQU	GPIOE_RMP_MSB_RMP_MSB9,		9
	.EQU	GPIOE_RMP_MSB_RMP_MSB8,		8
	.EQU	GPIOE_RMP_MSB_RMP_MSB7,		7
	.EQU	GPIOE_RMP_MSB_RMP_MSB6,		6
	.EQU	GPIOE_RMP_MSB_RMP_MSB5,		5
	.EQU	GPIOE_RMP_MSB_RMP_MSB4,		4
	.EQU	GPIOE_RMP_MSB_RMP_MSB3,		3
	.EQU	GPIOE_RMP_MSB_RMP_MSB2,		2
	.EQU	GPIOE_RMP_MSB_RMP_MSB1,		1
	.EQU	GPIOE_RMP_MSB_RMP_MSB0,		0
//  register-------------------------------------
	.EQU	GPIOF_PIR,		0x50000140
//  0x5000 0140  GPIOF_PIR   Bits-------------------------------------
	.EQU	GPIOF_PIR_PXPIR15,		15
	.EQU	GPIOF_PIR_PXPIR14,		14
	.EQU	GPIOF_PIR_PXPIR13,		13
	.EQU	GPIOF_PIR_PXPIR12,		12
	.EQU	GPIOF_PIR_PXPIR11,		11
	.EQU	GPIOF_PIR_PXPIR10,		10
	.EQU	GPIOF_PIR_PXPIR9,		9
	.EQU	GPIOF_PIR_PXPIR8,		8
	.EQU	GPIOF_PIR_PXPIR7,		7
	.EQU	GPIOF_PIR_PXPIR6,		6
	.EQU	GPIOF_PIR_PXPIR5,		5
	.EQU	GPIOF_PIR_PXPIR4,		4
	.EQU	GPIOF_PIR_PXPIR3,		3
	.EQU	GPIOF_PIR_PXPIR2,		2
	.EQU	GPIOF_PIR_PXPIR1,		1
	.EQU	GPIOF_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOF_POR,		0x50000144
//  0x5000 0144  GPIOF_POR   Bits-------------------------------------
	.EQU	GPIOF_POR_PXPOR15,		15
	.EQU	GPIOF_POR_PXPOR14,		14
	.EQU	GPIOF_POR_PXPOR13,		13
	.EQU	GPIOF_POR_PXPOR12,		12
	.EQU	GPIOF_POR_PXPOR11,		11
	.EQU	GPIOF_POR_PXPOR10,		10
	.EQU	GPIOF_POR_PXPOR9,		9
	.EQU	GPIOF_POR_PXPOR8,		8
	.EQU	GPIOF_POR_PXPOR7,		7
	.EQU	GPIOF_POR_PXPOR6,		6
	.EQU	GPIOF_POR_PXPOR5,		5
	.EQU	GPIOF_POR_PXPOR4,		4
	.EQU	GPIOF_POR_PXPOR3,		3
	.EQU	GPIOF_POR_PXPOR2,		2
	.EQU	GPIOF_POR_PXPOR1,		1
	.EQU	GPIOF_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOF_PUR,		0x50000148
//  0x5000 0148  GPIOF_PUR   Bits-------------------------------------
	.EQU	GPIOF_PUR_PXPUR15,		15
	.EQU	GPIOF_PUR_PXPUR14,		14
	.EQU	GPIOF_PUR_PXPUR13,		13
	.EQU	GPIOF_PUR_PXPUR12,		12
	.EQU	GPIOF_PUR_PXPUR11,		11
	.EQU	GPIOF_PUR_PXPUR10,		10
	.EQU	GPIOF_PUR_PXPUR9,		9
	.EQU	GPIOF_PUR_PXPUR8,		8
	.EQU	GPIOF_PUR_PXPUR7,		7
	.EQU	GPIOF_PUR_PXPUR6,		6
	.EQU	GPIOF_PUR_PXPUR5,		5
	.EQU	GPIOF_PUR_PXPUR4,		4
	.EQU	GPIOF_PUR_PXPUR3,		3
	.EQU	GPIOF_PUR_PXPUR2,		2
	.EQU	GPIOF_PUR_PXPUR1,		1
	.EQU	GPIOF_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOF_PDR,		0x5000014C
//  0x5000 014C  GPIOF_PDR   Bits-------------------------------------
	.EQU	GPIOF_PDR_PXPDR15,		15
	.EQU	GPIOF_PDR_PXPDR14,		14
	.EQU	GPIOF_PDR_PXPDR13,		13
	.EQU	GPIOF_PDR_PXPDR12,		12
	.EQU	GPIOF_PDR_PXPDR11,		11
	.EQU	GPIOF_PDR_PXPDR10,		10
	.EQU	GPIOF_PDR_PXPDR9,		9
	.EQU	GPIOF_PDR_PXPDR8,		8
	.EQU	GPIOF_PDR_PXPDR7,		7
	.EQU	GPIOF_PDR_PXPDR6,		6
	.EQU	GPIOF_PDR_PXPDR5,		5
	.EQU	GPIOF_PDR_PXPDR4,		4
	.EQU	GPIOF_PDR_PXPDR3,		3
	.EQU	GPIOF_PDR_PXPDR2,		2
	.EQU	GPIOF_PDR_PXPDR1,		1
	.EQU	GPIOF_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOF_PODR,	0x50000150
//  0x5000 0150  GPIOF_PODR   Bits-------------------------------------
	.EQU	GPIOF_PODR_PXPODR15,		15
	.EQU	GPIOF_PODR_PXPODR14,		14
	.EQU	GPIOF_PODR_PXPODR13,		13
	.EQU	GPIOF_PODR_PXPODR12,		12
	.EQU	GPIOF_PODR_PXPODR11,		11
	.EQU	GPIOF_PODR_PXPODR10,		10
	.EQU	GPIOF_PODR_PXPODR9,		9
	.EQU	GPIOF_PODR_PXPODR8,		8
	.EQU	GPIOF_PODR_PXPODR7,		7
	.EQU	GPIOF_PODR_PXPODR6,		6
	.EQU	GPIOF_PODR_PXPODR5,		5
	.EQU	GPIOF_PODR_PXPODR4,		4
	.EQU	GPIOF_PODR_PXPODR3,		3
	.EQU	GPIOF_PODR_PXPODR2,		2
	.EQU	GPIOF_PODR_PXPODR1,		1
	.EQU	GPIOF_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOF_PMOD,	0x50000154
//  0x5000 0154  GPIOF_PMOD   Bits-------------------------------------
	.EQU	GPIOF_PMOD_PXPMD15_1,		31
	.EQU	GPIOF_PMOD_PXPMD15_0,		30
	.EQU	GPIOF_PMOD_PXPMD14_1,		29
	.EQU	GPIOF_PMOD_PXPMD14_0,		28
	.EQU	GPIOF_PMOD_PXPMD13_1,		27
	.EQU	GPIOF_PMOD_PXPMD13_0,		26
	.EQU	GPIOF_PMOD_PXPMD12_1,		25
	.EQU	GPIOF_PMOD_PXPMD12_0,		24
	.EQU	GPIOF_PMOD_PXPMD11_1,		23
	.EQU	GPIOF_PMOD_PXPMD11_0,		22
	.EQU	GPIOF_PMOD_PXPMD10_1,		21
	.EQU	GPIOF_PMOD_PXPMD10_0,		20
	.EQU	GPIOF_PMOD_PXPMD9_1,		19
	.EQU	GPIOF_PMOD_PXPMD9_0,		18
	.EQU	GPIOF_PMOD_PXPMD8_1,		17
	.EQU	GPIOF_PMOD_PXPMD8_0,		16
	.EQU	GPIOF_PMOD_PXPMD7_1,		15
	.EQU	GPIOF_PMOD_PXPMD7_0,		14
	.EQU	GPIOF_PMOD_PXPMD6_1,		13
	.EQU	GPIOF_PMOD_PXPMD6_0,		12
	.EQU	GPIOF_PMOD_PXPMD5_1,		11
	.EQU	GPIOF_PMOD_PXPMD5_0,		10
	.EQU	GPIOF_PMOD_PXPMD4_1,		9
	.EQU	GPIOF_PMOD_PXPMD4_0,		8
	.EQU	GPIOF_PMOD_PXPMD3_1,		7
	.EQU	GPIOF_PMOD_PXPMD3_0,		6
	.EQU	GPIOF_PMOD_PXPMD2_1,		5
	.EQU	GPIOF_PMOD_PXPMD2_0,		4
	.EQU	GPIOF_PMOD_PXPMD1_1,		3
	.EQU	GPIOF_PMOD_PXPMD1_0,		2
	.EQU	GPIOF_PMOD_PXPMD0_1,		1
	.EQU	GPIOF_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOF_OMOD,	0x50000158
//  0x5000 0158  GPIOF_OMOD   Bits-------------------------------------
	.EQU	GPIOF_OMOD_PXOMD15,		30
	.EQU	GPIOF_OMOD_PXOMD14,		28
	.EQU	GPIOF_OMOD_PXOMD13,		26
	.EQU	GPIOF_OMOD_PXOMD12,		24
	.EQU	GPIOF_OMOD_PXOMD11,		22
	.EQU	GPIOF_OMOD_PXOMD10,		20
	.EQU	GPIOF_OMOD_PXOMD9,		18
	.EQU	GPIOF_OMOD_PXOMD8,		16
	.EQU	GPIOF_OMOD_PXOMD7,		14
	.EQU	GPIOF_OMOD_PXOMD6,		12
	.EQU	GPIOF_OMOD_PXOMD5,		10
	.EQU	GPIOF_OMOD_PXOMD4,		8
	.EQU	GPIOF_OMOD_PXOMD3,		6
	.EQU	GPIOF_OMOD_PXOMD2,		4
	.EQU	GPIOF_OMOD_PXOMD1,		2
	.EQU	GPIOF_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOF_LOCK,	0x5000015C
//  0x5000 015C  GPIOF_LOCK   Bits-------------------------------------
	.EQU	GPIOF_LOCK_PXLCKKEY15,		31
	.EQU	GPIOF_LOCK_PXLCKKEY14,		30
	.EQU	GPIOF_LOCK_PXLCKKEY13,		29
	.EQU	GPIOF_LOCK_PXLCKKEY12,		28
	.EQU	GPIOF_LOCK_PXLCKKEY11,		27
	.EQU	GPIOF_LOCK_PXLCKKEY10,		26
	.EQU	GPIOF_LOCK_PXLCKKEY9,		25
	.EQU	GPIOF_LOCK_PXLCKKEY8,		24
	.EQU	GPIOF_LOCK_PXLCKKEY7,		23
	.EQU	GPIOF_LOCK_PXLCKKEY6,		22
	.EQU	GPIOF_LOCK_PXLCKKEY5,		21
	.EQU	GPIOF_LOCK_PXLCKKEY4,		20
	.EQU	GPIOF_LOCK_PXLCKKEY3,		19
	.EQU	GPIOF_LOCK_PXLCKKEY2,		18
	.EQU	GPIOF_LOCK_PXLCKKEY1,		17
	.EQU	GPIOF_LOCK_PXLCKKEY0,		16
	.EQU	GPIOF_LOCK_PXLCK15,		15
	.EQU	GPIOF_LOCK_PXLCK14,		14
	.EQU	GPIOF_LOCK_PXLCK13,		13
	.EQU	GPIOF_LOCK_PXLCK12,		12
	.EQU	GPIOF_LOCK_PXLCK11,		11
	.EQU	GPIOF_LOCK_PXLCK10,		10
	.EQU	GPIOF_LOCK_PXLCK9,		9
	.EQU	GPIOF_LOCK_PXLCK8,		8
	.EQU	GPIOF_LOCK_PXLCK7,		7
	.EQU	GPIOF_LOCK_PXLCK6,		6
	.EQU	GPIOF_LOCK_PXLCK5,		5
	.EQU	GPIOF_LOCK_PXLCK4,		4
	.EQU	GPIOF_LOCK_PXLCK3,		3
	.EQU	GPIOF_LOCK_PXLCK2,		2
	.EQU	GPIOF_LOCK_PXLCK1,		1
	.EQU	GPIOF_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOF_RMPL,	0x50000160
//  0x5000 0160  GPIOF_RMPL   Bits-------------------------------------
	.EQU	GPIOF_RMPL_PXRMP7_3,		31
	.EQU	GPIOF_RMPL_PXRMP7_2,		30
	.EQU	GPIOF_RMPL_PXRMP7_1,		29
	.EQU	GPIOF_RMPL_PXRMP7_0,		28
	.EQU	GPIOF_RMPL_PXRMP6_3,		27
	.EQU	GPIOF_RMPL_PXRMP6_2,		26
	.EQU	GPIOF_RMPL_PXRMP6_1,		25
	.EQU	GPIOF_RMPL_PXRMP6_0,		24
	.EQU	GPIOF_RMPL_PXRMP5_3,		23
	.EQU	GPIOF_RMPL_PXRMP5_2,		22
	.EQU	GPIOF_RMPL_PXRMP5_1,		21
	.EQU	GPIOF_RMPL_PXRMP5_0,		20
	.EQU	GPIOF_RMPL_PXRMP4_3,		19
	.EQU	GPIOF_RMPL_PXRMP4_2,		18
	.EQU	GPIOF_RMPL_PXRMP4_1,		17
	.EQU	GPIOF_RMPL_PXRMP4_0,		16
	.EQU	GPIOF_RMPL_PXRMP3_3,		15
	.EQU	GPIOF_RMPL_PXRMP3_2,		14
	.EQU	GPIOF_RMPL_PXRMP3_1,		13
	.EQU	GPIOF_RMPL_PXRMP3_0,		12
	.EQU	GPIOF_RMPL_PXRMP2_3,		11
	.EQU	GPIOF_RMPL_PXRMP2_2,		10
	.EQU	GPIOF_RMPL_PXRMP2_1,		9
	.EQU	GPIOF_RMPL_PXRMP2_0,		8
	.EQU	GPIOF_RMPL_PXRMP1_3,		7
	.EQU	GPIOF_RMPL_PXRMP1_2,		6
	.EQU	GPIOF_RMPL_PXRMP1_1,		5
	.EQU	GPIOF_RMPL_PXRMP1_0,		4
	.EQU	GPIOF_RMPL_PXRMP0_3,		3
	.EQU	GPIOF_RMPL_PXRMP0_2,		2
	.EQU	GPIOF_RMPL_PXRMP0_1,		1
	.EQU	GPIOF_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOF_RMPH,	0x50000164
//  0x5000 0164  GPIOF_RMPH   Bits-------------------------------------
	.EQU	GPIOF_RMPH_PXRMP15_3,		31
	.EQU	GPIOF_RMPH_PXRMP15_2,		30
	.EQU	GPIOF_RMPH_PXRMP15_1,		29
	.EQU	GPIOF_RMPH_PXRMP15_0,		28
	.EQU	GPIOF_RMPH_PXRMP14_3,		27
	.EQU	GPIOF_RMPH_PXRMP14_2,		26
	.EQU	GPIOF_RMPH_PXRMP14_1,		25
	.EQU	GPIOF_RMPH_PXRMP14_0,		24
	.EQU	GPIOF_RMPH_PXRMP13_3,		23
	.EQU	GPIOF_RMPH_PXRMP13_2,		22
	.EQU	GPIOF_RMPH_PXRMP13_1,		21
	.EQU	GPIOF_RMPH_PXRMP13_0,		20
	.EQU	GPIOF_RMPH_PXRMP12_3,		19
	.EQU	GPIOF_RMPH_PXRMP12_2,		18
	.EQU	GPIOF_RMPH_PXRMP12_1,		17
	.EQU	GPIOF_RMPH_PXRMP12_0,		16
	.EQU	GPIOF_RMPH_PXRMP11_3,		15
	.EQU	GPIOF_RMPH_PXRMP11_2,		14
	.EQU	GPIOF_RMPH_PXRMP11_1,		13
	.EQU	GPIOF_RMPH_PXRMP11_0,		12
	.EQU	GPIOF_RMPH_PXRMP10_3,		11
	.EQU	GPIOF_RMPH_PXRMP10_2,		10
	.EQU	GPIOF_RMPH_PXRMP10_1,		9
	.EQU	GPIOF_RMPH_PXRMP10_0,		8
	.EQU	GPIOF_RMPH_PXRMP9_3,		7
	.EQU	GPIOF_RMPH_PXRMP9_2,		6
	.EQU	GPIOF_RMPH_PXRMP9_1,		5
	.EQU	GPIOF_RMPH_PXRMP9_0,		4
	.EQU	GPIOF_RMPH_PXRMP8_3,		3
	.EQU	GPIOF_RMPH_PXRMP8_2,		2
	.EQU	GPIOF_RMPH_PXRMP8_1,		1
	.EQU	GPIOF_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOF_RMP_MSB,	0x50000174
//  0x5000 0174  GPIOF_RMP_MSB   Bits-------------------------------------
	.EQU	GPIOF_RMP_MSB_RMP_MSB31,		31
	.EQU	GPIOF_RMP_MSB_RMP_MSB30,		30
	.EQU	GPIOF_RMP_MSB_RMP_MSB29,		29
	.EQU	GPIOF_RMP_MSB_RMP_MSB28,		28
	.EQU	GPIOF_RMP_MSB_RMP_MSB27,		27
	.EQU	GPIOF_RMP_MSB_RMP_MSB26,		26
	.EQU	GPIOF_RMP_MSB_RMP_MSB25,		25
	.EQU	GPIOF_RMP_MSB_RMP_MSB24,		24
	.EQU	GPIOF_RMP_MSB_RMP_MSB23,		23
	.EQU	GPIOF_RMP_MSB_RMP_MSB22,		22
	.EQU	GPIOF_RMP_MSB_RMP_MSB21,		21
	.EQU	GPIOF_RMP_MSB_RMP_MSB20,		20
	.EQU	GPIOF_RMP_MSB_RMP_MSB19,		19
	.EQU	GPIOF_RMP_MSB_RMP_MSB18,		18
	.EQU	GPIOF_RMP_MSB_RMP_MSB17,		17
	.EQU	GPIOF_RMP_MSB_RMP_MSB16,		16
	.EQU	GPIOF_RMP_MSB_RMP_MSB15,		15
	.EQU	GPIOF_RMP_MSB_RMP_MSB14,		14
	.EQU	GPIOF_RMP_MSB_RMP_MSB13,		13
	.EQU	GPIOF_RMP_MSB_RMP_MSB12,		12
	.EQU	GPIOF_RMP_MSB_RMP_MSB11,		11
	.EQU	GPIOF_RMP_MSB_RMP_MSB10,		10
	.EQU	GPIOF_RMP_MSB_RMP_MSB9,		9
	.EQU	GPIOF_RMP_MSB_RMP_MSB8,		8
	.EQU	GPIOF_RMP_MSB_RMP_MSB7,		7
	.EQU	GPIOF_RMP_MSB_RMP_MSB6,		6
	.EQU	GPIOF_RMP_MSB_RMP_MSB5,		5
	.EQU	GPIOF_RMP_MSB_RMP_MSB4,		4
	.EQU	GPIOF_RMP_MSB_RMP_MSB3,		3
	.EQU	GPIOF_RMP_MSB_RMP_MSB2,		2
	.EQU	GPIOF_RMP_MSB_RMP_MSB1,		1
	.EQU	GPIOF_RMP_MSB_RMP_MSB0,		0
//  register-------------------------------------
	.EQU	IONMI_CTLR,	0x5000017C
//  0x5000 017C  IONMI_CTLR   Bits-------------------------------------
	.EQU	IONMI_CTLR_IONMIIF,		14
	.EQU	IONMI_CTLR_IONMIIC,		13
	.EQU	IONMI_CTLR_FLTCKS,		12
	.EQU	IONMI_CTLR_FLTEN,		11
	.EQU	IONMI_CTLR_IRQMS2,		10
	.EQU	IONMI_CTLR_IRQMS1,		9
	.EQU	IONMI_CTLR_IRQMS0,		8
	.EQU	IONMI_CTLR_FCKDIV2,		6
	.EQU	IONMI_CTLR_FCKDIV1,		5
	.EQU	IONMI_CTLR_FCKDIV0,		4
	.EQU	IONMI_CTLR_FLTWR2,		3
	.EQU	IONMI_CTLR_FLTWR1,		2
	.EQU	IONMI_CTLR_FLTWR0,		1
	.EQU	IONMI_CTLR_IONMIEN,		0
//  register-------------------------------------
	.EQU	GPIOG_PIR,		0x50000180
//  0x5000 0180  GPIOG_PIR   Bits-------------------------------------
	.EQU	GPIOG_PIR_PXPIR15,		15
	.EQU	GPIOG_PIR_PXPIR14,		14
	.EQU	GPIOG_PIR_PXPIR13,		13
	.EQU	GPIOG_PIR_PXPIR12,		12
	.EQU	GPIOG_PIR_PXPIR11,		11
	.EQU	GPIOG_PIR_PXPIR10,		10
	.EQU	GPIOG_PIR_PXPIR9,		9
	.EQU	GPIOG_PIR_PXPIR8,		8
	.EQU	GPIOG_PIR_PXPIR7,		7
	.EQU	GPIOG_PIR_PXPIR6,		6
	.EQU	GPIOG_PIR_PXPIR5,		5
	.EQU	GPIOG_PIR_PXPIR4,		4
	.EQU	GPIOG_PIR_PXPIR3,		3
	.EQU	GPIOG_PIR_PXPIR2,		2
	.EQU	GPIOG_PIR_PXPIR1,		1
	.EQU	GPIOG_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOG_POR,		0x50000184
//  0x5000 0184  GPIOG_POR   Bits-------------------------------------
	.EQU	GPIOG_POR_PXPOR15,		15
	.EQU	GPIOG_POR_PXPOR14,		14
	.EQU	GPIOG_POR_PXPOR13,		13
	.EQU	GPIOG_POR_PXPOR12,		12
	.EQU	GPIOG_POR_PXPOR11,		11
	.EQU	GPIOG_POR_PXPOR10,		10
	.EQU	GPIOG_POR_PXPOR9,		9
	.EQU	GPIOG_POR_PXPOR8,		8
	.EQU	GPIOG_POR_PXPOR7,		7
	.EQU	GPIOG_POR_PXPOR6,		6
	.EQU	GPIOG_POR_PXPOR5,		5
	.EQU	GPIOG_POR_PXPOR4,		4
	.EQU	GPIOG_POR_PXPOR3,		3
	.EQU	GPIOG_POR_PXPOR2,		2
	.EQU	GPIOG_POR_PXPOR1,		1
	.EQU	GPIOG_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOG_PUR,		0x50000188
//  0x5000 0188  GPIOG_PUR   Bits-------------------------------------
	.EQU	GPIOG_PUR_PXPUR15,		15
	.EQU	GPIOG_PUR_PXPUR14,		14
	.EQU	GPIOG_PUR_PXPUR13,		13
	.EQU	GPIOG_PUR_PXPUR12,		12
	.EQU	GPIOG_PUR_PXPUR11,		11
	.EQU	GPIOG_PUR_PXPUR10,		10
	.EQU	GPIOG_PUR_PXPUR9,		9
	.EQU	GPIOG_PUR_PXPUR8,		8
	.EQU	GPIOG_PUR_PXPUR7,		7
	.EQU	GPIOG_PUR_PXPUR6,		6
	.EQU	GPIOG_PUR_PXPUR5,		5
	.EQU	GPIOG_PUR_PXPUR4,		4
	.EQU	GPIOG_PUR_PXPUR3,		3
	.EQU	GPIOG_PUR_PXPUR2,		2
	.EQU	GPIOG_PUR_PXPUR1,		1
	.EQU	GPIOG_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOG_PDR,		0x5000018C
//  0x5000 018C  GPIOG_PDR   Bits-------------------------------------
	.EQU	GPIOG_PDR_PXPDR15,		15
	.EQU	GPIOG_PDR_PXPDR14,		14
	.EQU	GPIOG_PDR_PXPDR13,		13
	.EQU	GPIOG_PDR_PXPDR12,		12
	.EQU	GPIOG_PDR_PXPDR11,		11
	.EQU	GPIOG_PDR_PXPDR10,		10
	.EQU	GPIOG_PDR_PXPDR9,		9
	.EQU	GPIOG_PDR_PXPDR8,		8
	.EQU	GPIOG_PDR_PXPDR7,		7
	.EQU	GPIOG_PDR_PXPDR6,		6
	.EQU	GPIOG_PDR_PXPDR5,		5
	.EQU	GPIOG_PDR_PXPDR4,		4
	.EQU	GPIOG_PDR_PXPDR3,		3
	.EQU	GPIOG_PDR_PXPDR2,		2
	.EQU	GPIOG_PDR_PXPDR1,		1
	.EQU	GPIOG_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOG_PODR,	0x50000190
//  0x5000 0190  GPIOG_PODR   Bits-------------------------------------
	.EQU	GPIOG_PODR_PXPODR15,		15
	.EQU	GPIOG_PODR_PXPODR14,		14
	.EQU	GPIOG_PODR_PXPODR13,		13
	.EQU	GPIOG_PODR_PXPODR12,		12
	.EQU	GPIOG_PODR_PXPODR11,		11
	.EQU	GPIOG_PODR_PXPODR10,		10
	.EQU	GPIOG_PODR_PXPODR9,		9
	.EQU	GPIOG_PODR_PXPODR8,		8
	.EQU	GPIOG_PODR_PXPODR7,		7
	.EQU	GPIOG_PODR_PXPODR6,		6
	.EQU	GPIOG_PODR_PXPODR5,		5
	.EQU	GPIOG_PODR_PXPODR4,		4
	.EQU	GPIOG_PODR_PXPODR3,		3
	.EQU	GPIOG_PODR_PXPODR2,		2
	.EQU	GPIOG_PODR_PXPODR1,		1
	.EQU	GPIOG_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOG_PMOD,	0x50000194
//  0x5000 0194  GPIOG_PMOD   Bits-------------------------------------
	.EQU	GPIOG_PMOD_PXPMD15_1,		31
	.EQU	GPIOG_PMOD_PXPMD15_0,		30
	.EQU	GPIOG_PMOD_PXPMD14_1,		29
	.EQU	GPIOG_PMOD_PXPMD14_0,		28
	.EQU	GPIOG_PMOD_PXPMD13_1,		27
	.EQU	GPIOG_PMOD_PXPMD13_0,		26
	.EQU	GPIOG_PMOD_PXPMD12_1,		25
	.EQU	GPIOG_PMOD_PXPMD12_0,		24
	.EQU	GPIOG_PMOD_PXPMD11_1,		23
	.EQU	GPIOG_PMOD_PXPMD11_0,		22
	.EQU	GPIOG_PMOD_PXPMD10_1,		21
	.EQU	GPIOG_PMOD_PXPMD10_0,		20
	.EQU	GPIOG_PMOD_PXPMD9_1,		19
	.EQU	GPIOG_PMOD_PXPMD9_0,		18
	.EQU	GPIOG_PMOD_PXPMD8_1,		17
	.EQU	GPIOG_PMOD_PXPMD8_0,		16
	.EQU	GPIOG_PMOD_PXPMD7_1,		15
	.EQU	GPIOG_PMOD_PXPMD7_0,		14
	.EQU	GPIOG_PMOD_PXPMD6_1,		13
	.EQU	GPIOG_PMOD_PXPMD6_0,		12
	.EQU	GPIOG_PMOD_PXPMD5_1,		11
	.EQU	GPIOG_PMOD_PXPMD5_0,		10
	.EQU	GPIOG_PMOD_PXPMD4_1,		9
	.EQU	GPIOG_PMOD_PXPMD4_0,		8
	.EQU	GPIOG_PMOD_PXPMD3_1,		7
	.EQU	GPIOG_PMOD_PXPMD3_0,		6
	.EQU	GPIOG_PMOD_PXPMD2_1,		5
	.EQU	GPIOG_PMOD_PXPMD2_0,		4
	.EQU	GPIOG_PMOD_PXPMD1_1,		3
	.EQU	GPIOG_PMOD_PXPMD1_0,		2
	.EQU	GPIOG_PMOD_PXPMD0_1,		1
	.EQU	GPIOG_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOG_OMOD,	0x50000198
//  0x5000 0198  GPIOG_OMOD   Bits-------------------------------------
	.EQU	GPIOG_OMOD_PXOMD15,		30
	.EQU	GPIOG_OMOD_PXOMD14,		28
	.EQU	GPIOG_OMOD_PXOMD13,		26
	.EQU	GPIOG_OMOD_PXOMD12,		24
	.EQU	GPIOG_OMOD_PXOMD11,		22
	.EQU	GPIOG_OMOD_PXOMD10,		20
	.EQU	GPIOG_OMOD_PXOMD9,		18
	.EQU	GPIOG_OMOD_PXOMD8,		16
	.EQU	GPIOG_OMOD_PXOMD7,		14
	.EQU	GPIOG_OMOD_PXOMD6,		12
	.EQU	GPIOG_OMOD_PXOMD5,		10
	.EQU	GPIOG_OMOD_PXOMD4,		8
	.EQU	GPIOG_OMOD_PXOMD3,		6
	.EQU	GPIOG_OMOD_PXOMD2,		4
	.EQU	GPIOG_OMOD_PXOMD1,		2
	.EQU	GPIOG_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOG_LOCK,	0x5000019C
//  0x5000 019C  GPIOG_LOCK   Bits-------------------------------------
	.EQU	GPIOG_LOCK_PXLCKKEY15,		31
	.EQU	GPIOG_LOCK_PXLCKKEY14,		30
	.EQU	GPIOG_LOCK_PXLCKKEY13,		29
	.EQU	GPIOG_LOCK_PXLCKKEY12,		28
	.EQU	GPIOG_LOCK_PXLCKKEY11,		27
	.EQU	GPIOG_LOCK_PXLCKKEY10,		26
	.EQU	GPIOG_LOCK_PXLCKKEY9,		25
	.EQU	GPIOG_LOCK_PXLCKKEY8,		24
	.EQU	GPIOG_LOCK_PXLCKKEY7,		23
	.EQU	GPIOG_LOCK_PXLCKKEY6,		22
	.EQU	GPIOG_LOCK_PXLCKKEY5,		21
	.EQU	GPIOG_LOCK_PXLCKKEY4,		20
	.EQU	GPIOG_LOCK_PXLCKKEY3,		19
	.EQU	GPIOG_LOCK_PXLCKKEY2,		18
	.EQU	GPIOG_LOCK_PXLCKKEY1,		17
	.EQU	GPIOG_LOCK_PXLCKKEY0,		16
	.EQU	GPIOG_LOCK_PXLCK15,		15
	.EQU	GPIOG_LOCK_PXLCK14,		14
	.EQU	GPIOG_LOCK_PXLCK13,		13
	.EQU	GPIOG_LOCK_PXLCK12,		12
	.EQU	GPIOG_LOCK_PXLCK11,		11
	.EQU	GPIOG_LOCK_PXLCK10,		10
	.EQU	GPIOG_LOCK_PXLCK9,		9
	.EQU	GPIOG_LOCK_PXLCK8,		8
	.EQU	GPIOG_LOCK_PXLCK7,		7
	.EQU	GPIOG_LOCK_PXLCK6,		6
	.EQU	GPIOG_LOCK_PXLCK5,		5
	.EQU	GPIOG_LOCK_PXLCK4,		4
	.EQU	GPIOG_LOCK_PXLCK3,		3
	.EQU	GPIOG_LOCK_PXLCK2,		2
	.EQU	GPIOG_LOCK_PXLCK1,		1
	.EQU	GPIOG_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOG_RMPL,	0x500001A0
//  0x5000 01A0  GPIOG_RMPL   Bits-------------------------------------
	.EQU	GPIOG_RMPL_PXRMP7_3,		31
	.EQU	GPIOG_RMPL_PXRMP7_2,		30
	.EQU	GPIOG_RMPL_PXRMP7_1,		29
	.EQU	GPIOG_RMPL_PXRMP7_0,		28
	.EQU	GPIOG_RMPL_PXRMP6_3,		27
	.EQU	GPIOG_RMPL_PXRMP6_2,		26
	.EQU	GPIOG_RMPL_PXRMP6_1,		25
	.EQU	GPIOG_RMPL_PXRMP6_0,		24
	.EQU	GPIOG_RMPL_PXRMP5_3,		23
	.EQU	GPIOG_RMPL_PXRMP5_2,		22
	.EQU	GPIOG_RMPL_PXRMP5_1,		21
	.EQU	GPIOG_RMPL_PXRMP5_0,		20
	.EQU	GPIOG_RMPL_PXRMP4_3,		19
	.EQU	GPIOG_RMPL_PXRMP4_2,		18
	.EQU	GPIOG_RMPL_PXRMP4_1,		17
	.EQU	GPIOG_RMPL_PXRMP4_0,		16
	.EQU	GPIOG_RMPL_PXRMP3_3,		15
	.EQU	GPIOG_RMPL_PXRMP3_2,		14
	.EQU	GPIOG_RMPL_PXRMP3_1,		13
	.EQU	GPIOG_RMPL_PXRMP3_0,		12
	.EQU	GPIOG_RMPL_PXRMP2_3,		11
	.EQU	GPIOG_RMPL_PXRMP2_2,		10
	.EQU	GPIOG_RMPL_PXRMP2_1,		9
	.EQU	GPIOG_RMPL_PXRMP2_0,		8
	.EQU	GPIOG_RMPL_PXRMP1_3,		7
	.EQU	GPIOG_RMPL_PXRMP1_2,		6
	.EQU	GPIOG_RMPL_PXRMP1_1,		5
	.EQU	GPIOG_RMPL_PXRMP1_0,		4
	.EQU	GPIOG_RMPL_PXRMP0_3,		3
	.EQU	GPIOG_RMPL_PXRMP0_2,		2
	.EQU	GPIOG_RMPL_PXRMP0_1,		1
	.EQU	GPIOG_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOG_RMPH,	0x500001A4
//  0x5000 01A4  GPIOG_RMPH   Bits-------------------------------------
	.EQU	GPIOG_RMPH_PXRMP15_3,		31
	.EQU	GPIOG_RMPH_PXRMP15_2,		30
	.EQU	GPIOG_RMPH_PXRMP15_1,		29
	.EQU	GPIOG_RMPH_PXRMP15_0,		28
	.EQU	GPIOG_RMPH_PXRMP14_3,		27
	.EQU	GPIOG_RMPH_PXRMP14_2,		26
	.EQU	GPIOG_RMPH_PXRMP14_1,		25
	.EQU	GPIOG_RMPH_PXRMP14_0,		24
	.EQU	GPIOG_RMPH_PXRMP13_3,		23
	.EQU	GPIOG_RMPH_PXRMP13_2,		22
	.EQU	GPIOG_RMPH_PXRMP13_1,		21
	.EQU	GPIOG_RMPH_PXRMP13_0,		20
	.EQU	GPIOG_RMPH_PXRMP12_3,		19
	.EQU	GPIOG_RMPH_PXRMP12_2,		18
	.EQU	GPIOG_RMPH_PXRMP12_1,		17
	.EQU	GPIOG_RMPH_PXRMP12_0,		16
	.EQU	GPIOG_RMPH_PXRMP11_3,		15
	.EQU	GPIOG_RMPH_PXRMP11_2,		14
	.EQU	GPIOG_RMPH_PXRMP11_1,		13
	.EQU	GPIOG_RMPH_PXRMP11_0,		12
	.EQU	GPIOG_RMPH_PXRMP10_3,		11
	.EQU	GPIOG_RMPH_PXRMP10_2,		10
	.EQU	GPIOG_RMPH_PXRMP10_1,		9
	.EQU	GPIOG_RMPH_PXRMP10_0,		8
	.EQU	GPIOG_RMPH_PXRMP9_3,		7
	.EQU	GPIOG_RMPH_PXRMP9_2,		6
	.EQU	GPIOG_RMPH_PXRMP9_1,		5
	.EQU	GPIOG_RMPH_PXRMP9_0,		4
	.EQU	GPIOG_RMPH_PXRMP8_3,		3
	.EQU	GPIOG_RMPH_PXRMP8_2,		2
	.EQU	GPIOG_RMPH_PXRMP8_1,		1
	.EQU	GPIOG_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOG_RMP_MSB,	0x500001B4
//  0x5000 01B4  GPIOG_RMP_MSB   Bits-------------------------------------
	.EQU	GPIOG_RMP_MSB_RMP_MSB31,		31
	.EQU	GPIOG_RMP_MSB_RMP_MSB30,		30
	.EQU	GPIOG_RMP_MSB_RMP_MSB29,		29
	.EQU	GPIOG_RMP_MSB_RMP_MSB28,		28
	.EQU	GPIOG_RMP_MSB_RMP_MSB27,		27
	.EQU	GPIOG_RMP_MSB_RMP_MSB26,		26
	.EQU	GPIOG_RMP_MSB_RMP_MSB25,		25
	.EQU	GPIOG_RMP_MSB_RMP_MSB24,		24
	.EQU	GPIOG_RMP_MSB_RMP_MSB23,		23
	.EQU	GPIOG_RMP_MSB_RMP_MSB22,		22
	.EQU	GPIOG_RMP_MSB_RMP_MSB21,		21
	.EQU	GPIOG_RMP_MSB_RMP_MSB20,		20
	.EQU	GPIOG_RMP_MSB_RMP_MSB19,		19
	.EQU	GPIOG_RMP_MSB_RMP_MSB18,		18
	.EQU	GPIOG_RMP_MSB_RMP_MSB17,		17
	.EQU	GPIOG_RMP_MSB_RMP_MSB16,		16
	.EQU	GPIOG_RMP_MSB_RMP_MSB15,		15
	.EQU	GPIOG_RMP_MSB_RMP_MSB14,		14
	.EQU	GPIOG_RMP_MSB_RMP_MSB13,		13
	.EQU	GPIOG_RMP_MSB_RMP_MSB12,		12
	.EQU	GPIOG_RMP_MSB_RMP_MSB11,		11
	.EQU	GPIOG_RMP_MSB_RMP_MSB10,		10
	.EQU	GPIOG_RMP_MSB_RMP_MSB9,		9
	.EQU	GPIOG_RMP_MSB_RMP_MSB8,		8
	.EQU	GPIOG_RMP_MSB_RMP_MSB7,		7
	.EQU	GPIOG_RMP_MSB_RMP_MSB6,		6
	.EQU	GPIOG_RMP_MSB_RMP_MSB5,		5
	.EQU	GPIOG_RMP_MSB_RMP_MSB4,		4
	.EQU	GPIOG_RMP_MSB_RMP_MSB3,		3
	.EQU	GPIOG_RMP_MSB_RMP_MSB2,		2
	.EQU	GPIOG_RMP_MSB_RMP_MSB1,		1
	.EQU	GPIOG_RMP_MSB_RMP_MSB0,		0
//  register-------------------------------------
	.EQU	GPIOH_PIR,		0x500001C0
//  0x5000 01C0  GPIOH_PIR   Bits-------------------------------------
	.EQU	GPIOH_PIR_PXPIR15,		15
	.EQU	GPIOH_PIR_PXPIR14,		14
	.EQU	GPIOH_PIR_PXPIR13,		13
	.EQU	GPIOH_PIR_PXPIR12,		12
	.EQU	GPIOH_PIR_PXPIR11,		11
	.EQU	GPIOH_PIR_PXPIR10,		10
	.EQU	GPIOH_PIR_PXPIR9,		9
	.EQU	GPIOH_PIR_PXPIR8,		8
	.EQU	GPIOH_PIR_PXPIR7,		7
	.EQU	GPIOH_PIR_PXPIR6,		6
	.EQU	GPIOH_PIR_PXPIR5,		5
	.EQU	GPIOH_PIR_PXPIR4,		4
	.EQU	GPIOH_PIR_PXPIR3,		3
	.EQU	GPIOH_PIR_PXPIR2,		2
	.EQU	GPIOH_PIR_PXPIR1,		1
	.EQU	GPIOH_PIR_PXPIR0,		0
//  register-------------------------------------
	.EQU	GPIOH_POR,		0x500001C4
//  0x5000 01C4  GPIOH_POR   Bits-------------------------------------
	.EQU	GPIOH_POR_PXPOR15,		15
	.EQU	GPIOH_POR_PXPOR14,		14
	.EQU	GPIOH_POR_PXPOR13,		13
	.EQU	GPIOH_POR_PXPOR12,		12
	.EQU	GPIOH_POR_PXPOR11,		11
	.EQU	GPIOH_POR_PXPOR10,		10
	.EQU	GPIOH_POR_PXPOR9,		9
	.EQU	GPIOH_POR_PXPOR8,		8
	.EQU	GPIOH_POR_PXPOR7,		7
	.EQU	GPIOH_POR_PXPOR6,		6
	.EQU	GPIOH_POR_PXPOR5,		5
	.EQU	GPIOH_POR_PXPOR4,		4
	.EQU	GPIOH_POR_PXPOR3,		3
	.EQU	GPIOH_POR_PXPOR2,		2
	.EQU	GPIOH_POR_PXPOR1,		1
	.EQU	GPIOH_POR_PXPOR0,		0
//  register-------------------------------------
	.EQU	GPIOH_PUR,		0x500001C8
//  0x5000 01C8  GPIOH_PUR   Bits-------------------------------------
	.EQU	GPIOH_PUR_PXPUR15,		15
	.EQU	GPIOH_PUR_PXPUR14,		14
	.EQU	GPIOH_PUR_PXPUR13,		13
	.EQU	GPIOH_PUR_PXPUR12,		12
	.EQU	GPIOH_PUR_PXPUR11,		11
	.EQU	GPIOH_PUR_PXPUR10,		10
	.EQU	GPIOH_PUR_PXPUR9,		9
	.EQU	GPIOH_PUR_PXPUR8,		8
	.EQU	GPIOH_PUR_PXPUR7,		7
	.EQU	GPIOH_PUR_PXPUR6,		6
	.EQU	GPIOH_PUR_PXPUR5,		5
	.EQU	GPIOH_PUR_PXPUR4,		4
	.EQU	GPIOH_PUR_PXPUR3,		3
	.EQU	GPIOH_PUR_PXPUR2,		2
	.EQU	GPIOH_PUR_PXPUR1,		1
	.EQU	GPIOH_PUR_PXPUR0,		0
//  register-------------------------------------
	.EQU	GPIOH_PDR,		0x500001CC
//  0x5000 01CC  GPIOH_PDR   Bits-------------------------------------
	.EQU	GPIOH_PDR_PXPDR15,		15
	.EQU	GPIOH_PDR_PXPDR14,		14
	.EQU	GPIOH_PDR_PXPDR13,		13
	.EQU	GPIOH_PDR_PXPDR12,		12
	.EQU	GPIOH_PDR_PXPDR11,		11
	.EQU	GPIOH_PDR_PXPDR10,		10
	.EQU	GPIOH_PDR_PXPDR9,		9
	.EQU	GPIOH_PDR_PXPDR8,		8
	.EQU	GPIOH_PDR_PXPDR7,		7
	.EQU	GPIOH_PDR_PXPDR6,		6
	.EQU	GPIOH_PDR_PXPDR5,		5
	.EQU	GPIOH_PDR_PXPDR4,		4
	.EQU	GPIOH_PDR_PXPDR3,		3
	.EQU	GPIOH_PDR_PXPDR2,		2
	.EQU	GPIOH_PDR_PXPDR1,		1
	.EQU	GPIOH_PDR_PXPDR0,		0
//  register-------------------------------------
	.EQU	GPIOH_PODR,	0x500001D0
//  0x5000 01D0  GPIOH_PODR   Bits-------------------------------------
	.EQU	GPIOH_PODR_PXPODR15,		15
	.EQU	GPIOH_PODR_PXPODR14,		14
	.EQU	GPIOH_PODR_PXPODR13,		13
	.EQU	GPIOH_PODR_PXPODR12,		12
	.EQU	GPIOH_PODR_PXPODR11,		11
	.EQU	GPIOH_PODR_PXPODR10,		10
	.EQU	GPIOH_PODR_PXPODR9,		9
	.EQU	GPIOH_PODR_PXPODR8,		8
	.EQU	GPIOH_PODR_PXPODR7,		7
	.EQU	GPIOH_PODR_PXPODR6,		6
	.EQU	GPIOH_PODR_PXPODR5,		5
	.EQU	GPIOH_PODR_PXPODR4,		4
	.EQU	GPIOH_PODR_PXPODR3,		3
	.EQU	GPIOH_PODR_PXPODR2,		2
	.EQU	GPIOH_PODR_PXPODR1,		1
	.EQU	GPIOH_PODR_PXPODR0,		0
//  register-------------------------------------
	.EQU	GPIOH_PMOD,	0x500001D4
//  0x5000 01D4  GPIOH_PMOD   Bits-------------------------------------
	.EQU	GPIOH_PMOD_PXPMD15_1,		31
	.EQU	GPIOH_PMOD_PXPMD15_0,		30
	.EQU	GPIOH_PMOD_PXPMD14_1,		29
	.EQU	GPIOH_PMOD_PXPMD14_0,		28
	.EQU	GPIOH_PMOD_PXPMD13_1,		27
	.EQU	GPIOH_PMOD_PXPMD13_0,		26
	.EQU	GPIOH_PMOD_PXPMD12_1,		25
	.EQU	GPIOH_PMOD_PXPMD12_0,		24
	.EQU	GPIOH_PMOD_PXPMD11_1,		23
	.EQU	GPIOH_PMOD_PXPMD11_0,		22
	.EQU	GPIOH_PMOD_PXPMD10_1,		21
	.EQU	GPIOH_PMOD_PXPMD10_0,		20
	.EQU	GPIOH_PMOD_PXPMD9_1,		19
	.EQU	GPIOH_PMOD_PXPMD9_0,		18
	.EQU	GPIOH_PMOD_PXPMD8_1,		17
	.EQU	GPIOH_PMOD_PXPMD8_0,		16
	.EQU	GPIOH_PMOD_PXPMD7_1,		15
	.EQU	GPIOH_PMOD_PXPMD7_0,		14
	.EQU	GPIOH_PMOD_PXPMD6_1,		13
	.EQU	GPIOH_PMOD_PXPMD6_0,		12
	.EQU	GPIOH_PMOD_PXPMD5_1,		11
	.EQU	GPIOH_PMOD_PXPMD5_0,		10
	.EQU	GPIOH_PMOD_PXPMD4_1,		9
	.EQU	GPIOH_PMOD_PXPMD4_0,		8
	.EQU	GPIOH_PMOD_PXPMD3_1,		7
	.EQU	GPIOH_PMOD_PXPMD3_0,		6
	.EQU	GPIOH_PMOD_PXPMD2_1,		5
	.EQU	GPIOH_PMOD_PXPMD2_0,		4
	.EQU	GPIOH_PMOD_PXPMD1_1,		3
	.EQU	GPIOH_PMOD_PXPMD1_0,		2
	.EQU	GPIOH_PMOD_PXPMD0_1,		1
	.EQU	GPIOH_PMOD_PXPMD0_0,		0
//  register-------------------------------------
	.EQU	GPIOH_OMOD,	0x500001D8
//  0x5000 01D8  GPIOH_OMOD   Bits-------------------------------------
	.EQU	GPIOH_OMOD_PXOMD15,		30
	.EQU	GPIOH_OMOD_PXOMD14,		28
	.EQU	GPIOH_OMOD_PXOMD13,		26
	.EQU	GPIOH_OMOD_PXOMD12,		24
	.EQU	GPIOH_OMOD_PXOMD11,		22
	.EQU	GPIOH_OMOD_PXOMD10,		20
	.EQU	GPIOH_OMOD_PXOMD9,		18
	.EQU	GPIOH_OMOD_PXOMD8,		16
	.EQU	GPIOH_OMOD_PXOMD7,		14
	.EQU	GPIOH_OMOD_PXOMD6,		12
	.EQU	GPIOH_OMOD_PXOMD5,		10
	.EQU	GPIOH_OMOD_PXOMD4,		8
	.EQU	GPIOH_OMOD_PXOMD3,		6
	.EQU	GPIOH_OMOD_PXOMD2,		4
	.EQU	GPIOH_OMOD_PXOMD1,		2
	.EQU	GPIOH_OMOD_PXOMD0,		0
//  register-------------------------------------
	.EQU	GPIOH_LOCK,	0x500001DC
//  0x5000 01DC  GPIOH_LOCK   Bits-------------------------------------
	.EQU	GPIOH_LOCK_PXLCKKEY15,		31
	.EQU	GPIOH_LOCK_PXLCKKEY14,		30
	.EQU	GPIOH_LOCK_PXLCKKEY13,		29
	.EQU	GPIOH_LOCK_PXLCKKEY12,		28
	.EQU	GPIOH_LOCK_PXLCKKEY11,		27
	.EQU	GPIOH_LOCK_PXLCKKEY10,		26
	.EQU	GPIOH_LOCK_PXLCKKEY9,		25
	.EQU	GPIOH_LOCK_PXLCKKEY8,		24
	.EQU	GPIOH_LOCK_PXLCKKEY7,		23
	.EQU	GPIOH_LOCK_PXLCKKEY6,		22
	.EQU	GPIOH_LOCK_PXLCKKEY5,		21
	.EQU	GPIOH_LOCK_PXLCKKEY4,		20
	.EQU	GPIOH_LOCK_PXLCKKEY3,		19
	.EQU	GPIOH_LOCK_PXLCKKEY2,		18
	.EQU	GPIOH_LOCK_PXLCKKEY1,		17
	.EQU	GPIOH_LOCK_PXLCKKEY0,		16
	.EQU	GPIOH_LOCK_PXLCK15,		15
	.EQU	GPIOH_LOCK_PXLCK14,		14
	.EQU	GPIOH_LOCK_PXLCK13,		13
	.EQU	GPIOH_LOCK_PXLCK12,		12
	.EQU	GPIOH_LOCK_PXLCK11,		11
	.EQU	GPIOH_LOCK_PXLCK10,		10
	.EQU	GPIOH_LOCK_PXLCK9,		9
	.EQU	GPIOH_LOCK_PXLCK8,		8
	.EQU	GPIOH_LOCK_PXLCK7,		7
	.EQU	GPIOH_LOCK_PXLCK6,		6
	.EQU	GPIOH_LOCK_PXLCK5,		5
	.EQU	GPIOH_LOCK_PXLCK4,		4
	.EQU	GPIOH_LOCK_PXLCK3,		3
	.EQU	GPIOH_LOCK_PXLCK2,		2
	.EQU	GPIOH_LOCK_PXLCK1,		1
	.EQU	GPIOH_LOCK_PXLCK0,		0
//  register-------------------------------------
	.EQU	GPIOH_RMPL,	0x500001E0
//  0x5000 01E0  GPIOH_RMPL   Bits-------------------------------------
	.EQU	GPIOH_RMPL_PXRMP7_3,		31
	.EQU	GPIOH_RMPL_PXRMP7_2,		30
	.EQU	GPIOH_RMPL_PXRMP7_1,		29
	.EQU	GPIOH_RMPL_PXRMP7_0,		28
	.EQU	GPIOH_RMPL_PXRMP6_3,		27
	.EQU	GPIOH_RMPL_PXRMP6_2,		26
	.EQU	GPIOH_RMPL_PXRMP6_1,		25
	.EQU	GPIOH_RMPL_PXRMP6_0,		24
	.EQU	GPIOH_RMPL_PXRMP5_3,		23
	.EQU	GPIOH_RMPL_PXRMP5_2,		22
	.EQU	GPIOH_RMPL_PXRMP5_1,		21
	.EQU	GPIOH_RMPL_PXRMP5_0,		20
	.EQU	GPIOH_RMPL_PXRMP4_3,		19
	.EQU	GPIOH_RMPL_PXRMP4_2,		18
	.EQU	GPIOH_RMPL_PXRMP4_1,		17
	.EQU	GPIOH_RMPL_PXRMP4_0,		16
	.EQU	GPIOH_RMPL_PXRMP3_3,		15
	.EQU	GPIOH_RMPL_PXRMP3_2,		14
	.EQU	GPIOH_RMPL_PXRMP3_1,		13
	.EQU	GPIOH_RMPL_PXRMP3_0,		12
	.EQU	GPIOH_RMPL_PXRMP2_3,		11
	.EQU	GPIOH_RMPL_PXRMP2_2,		10
	.EQU	GPIOH_RMPL_PXRMP2_1,		9
	.EQU	GPIOH_RMPL_PXRMP2_0,		8
	.EQU	GPIOH_RMPL_PXRMP1_3,		7
	.EQU	GPIOH_RMPL_PXRMP1_2,		6
	.EQU	GPIOH_RMPL_PXRMP1_1,		5
	.EQU	GPIOH_RMPL_PXRMP1_0,		4
	.EQU	GPIOH_RMPL_PXRMP0_3,		3
	.EQU	GPIOH_RMPL_PXRMP0_2,		2
	.EQU	GPIOH_RMPL_PXRMP0_1,		1
	.EQU	GPIOH_RMPL_PXRMP0_0,		0
//  register-------------------------------------
	.EQU	GPIOH_RMPH,	0x500001E4
//  0x5000 01E4  GPIOH_RMPH   Bits-------------------------------------
	.EQU	GPIOH_RMPH_PXRMP15_3,		31
	.EQU	GPIOH_RMPH_PXRMP15_2,		30
	.EQU	GPIOH_RMPH_PXRMP15_1,		29
	.EQU	GPIOH_RMPH_PXRMP15_0,		28
	.EQU	GPIOH_RMPH_PXRMP14_3,		27
	.EQU	GPIOH_RMPH_PXRMP14_2,		26
	.EQU	GPIOH_RMPH_PXRMP14_1,		25
	.EQU	GPIOH_RMPH_PXRMP14_0,		24
	.EQU	GPIOH_RMPH_PXRMP13_3,		23
	.EQU	GPIOH_RMPH_PXRMP13_2,		22
	.EQU	GPIOH_RMPH_PXRMP13_1,		21
	.EQU	GPIOH_RMPH_PXRMP13_0,		20
	.EQU	GPIOH_RMPH_PXRMP12_3,		19
	.EQU	GPIOH_RMPH_PXRMP12_2,		18
	.EQU	GPIOH_RMPH_PXRMP12_1,		17
	.EQU	GPIOH_RMPH_PXRMP12_0,		16
	.EQU	GPIOH_RMPH_PXRMP11_3,		15
	.EQU	GPIOH_RMPH_PXRMP11_2,		14
	.EQU	GPIOH_RMPH_PXRMP11_1,		13
	.EQU	GPIOH_RMPH_PXRMP11_0,		12
	.EQU	GPIOH_RMPH_PXRMP10_3,		11
	.EQU	GPIOH_RMPH_PXRMP10_2,		10
	.EQU	GPIOH_RMPH_PXRMP10_1,		9
	.EQU	GPIOH_RMPH_PXRMP10_0,		8
	.EQU	GPIOH_RMPH_PXRMP9_3,		7
	.EQU	GPIOH_RMPH_PXRMP9_2,		6
	.EQU	GPIOH_RMPH_PXRMP9_1,		5
	.EQU	GPIOH_RMPH_PXRMP9_0,		4
	.EQU	GPIOH_RMPH_PXRMP8_3,		3
	.EQU	GPIOH_RMPH_PXRMP8_2,		2
	.EQU	GPIOH_RMPH_PXRMP8_1,		1
	.EQU	GPIOH_RMPH_PXRMP8_0,		0
//  register-------------------------------------
	.EQU	GPIOH_RMP_MSB,	0x500001F4
//  0x5000 01F4  GPIOH_RMP_MSB   Bits-------------------------------------
	.EQU	GPIOH_RMP_MSB_RMP_MSB31,		31
	.EQU	GPIOH_RMP_MSB_RMP_MSB30,		30
	.EQU	GPIOH_RMP_MSB_RMP_MSB29,		29
	.EQU	GPIOH_RMP_MSB_RMP_MSB28,		28
	.EQU	GPIOH_RMP_MSB_RMP_MSB27,		27
	.EQU	GPIOH_RMP_MSB_RMP_MSB26,		26
	.EQU	GPIOH_RMP_MSB_RMP_MSB25,		25
	.EQU	GPIOH_RMP_MSB_RMP_MSB24,		24
	.EQU	GPIOH_RMP_MSB_RMP_MSB23,		23
	.EQU	GPIOH_RMP_MSB_RMP_MSB22,		22
	.EQU	GPIOH_RMP_MSB_RMP_MSB21,		21
	.EQU	GPIOH_RMP_MSB_RMP_MSB20,		20
	.EQU	GPIOH_RMP_MSB_RMP_MSB19,		19
	.EQU	GPIOH_RMP_MSB_RMP_MSB18,		18
	.EQU	GPIOH_RMP_MSB_RMP_MSB17,		17
	.EQU	GPIOH_RMP_MSB_RMP_MSB16,		16
	.EQU	GPIOH_RMP_MSB_RMP_MSB15,		15
	.EQU	GPIOH_RMP_MSB_RMP_MSB14,		14
	.EQU	GPIOH_RMP_MSB_RMP_MSB13,		13
	.EQU	GPIOH_RMP_MSB_RMP_MSB12,		12
	.EQU	GPIOH_RMP_MSB_RMP_MSB11,		11
	.EQU	GPIOH_RMP_MSB_RMP_MSB10,		10
	.EQU	GPIOH_RMP_MSB_RMP_MSB9,		9
	.EQU	GPIOH_RMP_MSB_RMP_MSB8,		8
	.EQU	GPIOH_RMP_MSB_RMP_MSB7,		7
	.EQU	GPIOH_RMP_MSB_RMP_MSB6,		6
	.EQU	GPIOH_RMP_MSB_RMP_MSB5,		5
	.EQU	GPIOH_RMP_MSB_RMP_MSB4,		4
	.EQU	GPIOH_RMP_MSB_RMP_MSB3,		3
	.EQU	GPIOH_RMP_MSB_RMP_MSB2,		2
	.EQU	GPIOH_RMP_MSB_RMP_MSB1,		1
	.EQU	GPIOH_RMP_MSB_RMP_MSB0,		0
.endif
